CN118034456A - Multichannel data acquisition synchronization method and system - Google Patents
Multichannel data acquisition synchronization method and system Download PDFInfo
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- CN118034456A CN118034456A CN202410140376.6A CN202410140376A CN118034456A CN 118034456 A CN118034456 A CN 118034456A CN 202410140376 A CN202410140376 A CN 202410140376A CN 118034456 A CN118034456 A CN 118034456A
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- 230000001360 synchronised effect Effects 0.000 claims abstract description 24
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Abstract
The invention discloses a multichannel data acquisition synchronization method and a multichannel data acquisition synchronization system, which belong to the technical field of signal sampling and comprise the following steps: the first control end sends an external synchronous trigger signal to the second control end; the second control end acquires an external synchronous trigger signal from the first control end; the second control end obtains a target signal source signal and generates a single pulse signal according to the external synchronous trigger signal; the second control end sends the single pulse signal to the acquisition end and the first control end respectively; the acquisition end acquires a single pulse signal from the second control end. According to the invention, the first control end sends the external synchronous trigger signal to the second control end, so that the first control end and the acquisition end acquire a first lmfc phase and a second lmfc phase according to the single pulse signal generated by the second control end, the first control end can obtain a phase difference corresponding to the first lmfc phase and the second lmfc phase, and the delay amount of the second lmfc phase can be adjusted according to the phase difference, so that deterministic delay is realized.
Description
Technical Field
The invention relates to a multichannel data acquisition synchronization method and system, and belongs to the technical field of signal sampling.
Background
When a plurality of traditional sampling chips are used for sampling, in a power-on period, because of chip manufacturing process deviation, different time delays exist in transmitted sampling data, the sampling deviation is corrected after phase measurement through Iserdes modules and a signal processing algorithm, and the time delays of the sampling deviation are different in each power-on period, so that the sampling deviation is corrected again after power-on, and the design of a synchronous acquisition system is not facilitated.
Disclosure of Invention
The invention aims to overcome the defects in the prior art, and provides a multi-channel data acquisition synchronization method and system, which can adjust the local multi-frame period lmfc delay amount of a control end according to lmfc phases of an acquisition end, realize deterministic delay and solve the problems that the time delay exists in the sampling data of a traditional sampling chip and the data needs to be corrected again after each power-on.
In order to achieve the above purpose/solve the above technical problems, the present invention is realized by adopting the following technical scheme:
in one aspect, the present invention provides a multi-channel data acquisition synchronization method, including:
the first control end sends an external synchronous trigger signal to the second control end;
The second control end acquires an external synchronous trigger signal from the first control end;
the second control end obtains a target signal source signal and generates a single pulse signal according to the external synchronous trigger signal;
The second control end sends the single pulse signal to the acquisition end and the first control end respectively;
The acquisition end acquires a single pulse signal from the second control end;
the acquisition end acquires a first lmfc phase according to the single pulse signal;
the acquisition end sends a first lmfc phase to a first control end;
The first control end obtains a first lmfc phase from the acquisition end;
The first control end obtains a phase difference corresponding to the acquisition end according to the first lmfc phases;
the first control end adjusts the phase delay amount of the acquisition end according to the phase difference.
Further, the adjusting the phase delay amount of the acquisition end according to the phase difference includes:
the first control end acquires a single pulse signal from the second control end;
The first control end obtains a second lmfc phase according to the single pulse signal;
the first control end obtains a corresponding phase difference according to the first lmfc phase and the second lmfc phase;
The first control end adjusts the second lmfc phase delay amount according to the phase difference.
On the other hand, the invention provides a multichannel data acquisition synchronization system, which comprises a first control end, two second control ends and an acquisition end matched with the second control ends;
the first control end is respectively and electrically connected with the second control end and the acquisition end;
The second control end is electrically connected with the acquisition end.
Optionally, the first control end includes an on-board FPGA;
The on-board FPGA is used for sending an external synchronous trigger signal to the second control end; acquiring a first lmfc phase from the acquisition end and acquiring a phase difference corresponding to the acquisition end according to the first lmfc phase; and adjusting the phase delay amount of the acquisition end according to the phase difference.
Optionally, the second control terminal includes a clock chip LMK04832;
The clock chip LMK04832 is used for obtaining an external synchronous trigger signal from the first control end; acquiring a target signal source signal and generating a single pulse signal according to an external synchronous trigger signal; and sending the monopulse signals to the acquisition end and the first control end respectively.
Optionally, the collecting end comprises an AD9680 collecting sub-card adopting jesd b protocol;
The AD9680 acquisition sub-card is used for acquiring a single pulse signal from the second control end; acquiring a first lmfc phase according to the single pulse signal; the first lmfc phases are sent to the first control terminal.
Compared with the prior art, the invention has the beneficial effects that:
According to the invention, the first control end sends the external synchronous trigger signal to the second control end, so that the first control end and the acquisition end acquire the first lmfc phase and the second lmfc phase according to the single pulse signal generated by the second control end, the first control end can obtain the phase difference corresponding to the first lmfc phase and the second lmfc phase, the delay amount of the second lmfc phase can be adjusted according to the phase difference, deterministic delay is realized, and the problems that the delay exists in sampling data of a traditional sampling chip and the data needs to be corrected again after each power-on are solved.
Drawings
Fig. 1 is a flowchart of a multi-channel data acquisition synchronization method provided by an embodiment of the present invention at a first control end;
fig. 2 is a flowchart of a multi-channel data acquisition synchronization method provided by an embodiment of the present invention at a second control end;
FIG. 3 is a flowchart of a multi-channel data acquisition synchronization method provided by an embodiment of the present invention at an acquisition end;
Fig. 4 is a schematic structural diagram of a multi-channel data acquisition synchronization system according to an embodiment of the present invention.
Detailed Description
The invention is further described below with reference to the accompanying drawings. The following examples are only for more clearly illustrating the technical aspects of the present invention, and are not intended to limit the scope of the present invention.
Example 1
As shown in fig. 1, 2 and 3, a multi-channel data acquisition synchronization method includes:
the first control end sends an external synchronous trigger signal sync-in to the second control end;
The second control end obtains an external synchronous trigger signal sync-in and a target signal source signal sysref-in from the first control end;
generating a single pulse signal according to the external synchronous trigger signal sync-in;
And sending the monopulse signals to the acquisition end and the first control end respectively.
The acquisition end acquires a single pulse signal from the second control end, and acquires a first lmfc phase according to the single pulse signal;
The first lmfc phases are sent to the first control terminal.
The first control end obtains a first lmfc phase from the acquisition end, and obtains a phase difference corresponding to the acquisition end according to the first lmfc phase;
the first control end adjusts the phase delay amount of the acquisition end according to the phase difference, and specifically:
acquiring a single pulse signal from a second control end;
acquiring a second lmfc phase according to the single pulse signal;
acquiring a corresponding phase difference according to the first lmfc phase and the second lmfc phase;
and adjusting the second lmfc phase delay amount according to the phase difference.
Example 2
The multi-channel data acquisition synchronization system shown in fig. 4 comprises a first control end, two second control ends and an acquisition end matched with the second control ends;
the first control end is electrically connected with the second control end and the acquisition end respectively;
The second control end is electrically connected with the acquisition end;
The first control end comprises an on-board FPGA;
The on-board FPGA is used for sending an external synchronous trigger signal to the second control end, acquiring a first lmfc phase from the acquisition end, acquiring a phase difference corresponding to the acquisition end according to the first lmfc phase, and adjusting the phase delay amount of the acquisition end according to the phase difference;
the second control end comprises a clock chip LMK04832;
The clock chip LMK04832 is used for obtaining an external synchronous trigger signal from the first control end, obtaining a target signal source signal, generating a single pulse signal according to the external synchronous trigger signal, and respectively transmitting the single pulse signal to the acquisition end and the first control end;
The acquisition end comprises an AD9680 acquisition daughter card adopting jesd204b protocol;
the AD9680 acquisition sub-card is used for acquiring a single pulse signal from the second control end; acquiring a first lmfc phase according to the single pulse signal; the first lmfc phases are sent to the first control terminal.
The foregoing is merely a preferred embodiment of the present invention, and it should be noted that modifications and variations could be made by those skilled in the art without departing from the technical principles of the present invention, and such modifications and variations should also be regarded as being within the scope of the invention.
Claims (8)
1. A multi-channel data acquisition synchronization method, comprising:
sending an external synchronous trigger signal to a second control end;
acquiring a first lmfc phase from an acquisition end;
acquiring a phase difference corresponding to the acquisition end according to the first lmfc phases;
and adjusting the phase delay amount of the acquisition end according to the phase difference.
2. The method for synchronizing multi-channel data acquisition according to claim 1, wherein the adjusting the phase delay amount with the acquisition end according to the phase difference comprises:
acquiring a single pulse signal from a second control end;
acquiring a second lmfc phase according to the single pulse signal;
acquiring a corresponding phase difference according to the first lmfc phase and the second lmfc phase;
and adjusting the second lmfc phase delay amount according to the phase difference.
3. A multi-channel data acquisition synchronization method, comprising:
Acquiring an external synchronous trigger signal from a first control end;
acquiring a target signal source signal and generating a single pulse signal according to an external synchronous trigger signal;
And sending the monopulse signals to the acquisition end and the first control end respectively.
4. A multi-channel data acquisition synchronization method, comprising:
acquiring a single pulse signal from a second control end;
Acquiring a first lmfc phase according to the single pulse signal;
The first lmfc phases are sent to the first control terminal.
5. The multichannel data acquisition synchronization system is characterized by comprising a first control end, two second control ends and an acquisition end matched with the second control ends;
the first control end is respectively and electrically connected with the second control end and the acquisition end;
The second control end is electrically connected with the acquisition end.
6. The multi-channel data acquisition synchronization system of claim 5, wherein the first control terminal comprises an on-board FPGA;
The on-board FPGA is used for sending an external synchronous trigger signal to the second control end; acquiring a first lmfc phase from the acquisition end and acquiring a phase difference corresponding to the acquisition end according to the first lmfc phase; and adjusting the phase delay amount of the acquisition end according to the phase difference.
7. The multi-channel data acquisition synchronization system of claim 5, wherein the second control terminal comprises a clock chip LMK04832;
The clock chip LMK04832 is used for obtaining an external synchronous trigger signal from the first control end; acquiring a target signal source signal and generating a single pulse signal according to an external synchronous trigger signal; and sending the monopulse signals to the acquisition end and the first control end respectively.
8. The multi-channel data acquisition synchronization system of claim 5, wherein the acquisition end comprises an AD9680 acquisition daughter card employing jesd204b protocol;
The AD9680 acquisition sub-card is used for acquiring a single pulse signal from the second control end; acquiring a first lmfc phase according to the single pulse signal; the first lmfc phases are sent to the first control terminal.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202410140376.6A CN118034456A (en) | 2024-01-31 | 2024-01-31 | Multichannel data acquisition synchronization method and system |
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| CN202410140376.6A CN118034456A (en) | 2024-01-31 | 2024-01-31 | Multichannel data acquisition synchronization method and system |
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| CN118034456A true CN118034456A (en) | 2024-05-14 |
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