CN118017950A - Radio frequency amplifier system - Google Patents
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Abstract
The invention provides a radio frequency amplifier system, which comprises a power divider, an adjustable phase shifter, an input coupler, an output coupler, an enhanced load modulation balance amplifier branch and an enhanced load modulation control amplifier branch, wherein the power divider is connected with the input coupler; the power divider divides the signal into two parts and inputs the two parts into the adjustable phase shifter and the enhanced load modulation control amplifier branch; the output end of the adjustable phase shifter is connected with the input end of the input coupler, the isolation end of the input coupler is grounded through the load of the isolation end, the enhanced load modulation balance amplifier branch is arranged between the input coupler and the output coupler, the output end of the output coupler outputs amplified signals, and the isolation end is connected with the enhanced load modulation control amplifier branch. The radio frequency amplifier system provided by the invention has the characteristics of ultra-wideband, high power, high linearity and high rollback efficiency.
Description
Technical Field
The invention relates to the field of radio frequency power amplifiers for wireless communication, in particular to an ultra-wideband, high-power and high-linearity radio frequency amplifier system.
Background
With the continuous development of modern wireless communication systems, the requirements for higher and higher data transmission rate are caused, and due to the scarcity of wireless spectrum resources to communication operators, modern communication technologies develop advanced modulation modes (such as 1024 QAM) capable of greatly improving spectrum efficiency so as to meet the requirements of low-delay and high-throughput wireless connection. However, these complex modulation schemes result in higher and higher peak-to-average ratio (PAR) of the transmission signal, which in turn reduces the back-off efficiency of the conventional power amplifier. In addition, due to the increasing number of communication frequency bands, there is a growing demand for bandwidth expansion technology of power amplifiers. Thus, how to boost the ultra wideband characteristics of a power amplifier while maintaining high back-off efficiency plays a vital role in the cost, volume, and system complexity of modern and next generation wireless communication systems.
In recent years, load modulation balanced power amplifier architecture (LMBA) has received increasing attention from industry due to its good ultra-wideband characteristics, high back-off efficiency, low cost, and low system complexity. Fig. 1 is a schematic block diagram of a conventional load modulation balanced power amplifier architecture (LMBA), which can be seen that, unlike a typical balanced architecture, the LMBA architecture is composed of a balanced amplifier branch and a control power amplifier branch, and unlike a typical balanced architecture, the output coupler isolation end is no longer connected with a load, but is connected with the control power amplifier output end, so that the load impedance of the main power amplifier can be modulated by changing the signal amplitude and phase of the control power amplifier, thereby improving the efficiency under the back-off power, unlike the Doherty architecture, the LMBA architecture has no quarter-wavelength impedance transformation line, and the broadband characteristic of the power amplifier is only determined by the bandwidth of the coupler, so that the LMBA architecture greatly expands the broadband application of the power amplifier.
However, it should be noted that the conventional load-modulated balanced amplifier architecture (LMBA) is not currently commercially available in the industry for the following reasons: firstly, the output power of a power amplifier with LMBA architecture studied in the current industry is limited (usually 5W or below), the linearity is poor, commercial index requirements are difficult to meet, and although the load modulation balanced amplifier architecture has broadband characteristics, the Video Bandwidth (VBW) of a circuit is limited due to parasitic capacitance Cds of a power amplifier device, and the parasitic capacitance Cds is increased along with the increase of the power of the device, so that the linearity of the system becomes a great challenge; secondly, the current traditional load modulation balanced amplifier architecture (LMBA) adopts two identical power amplification tubes, so that the power range for keeping high rollback efficiency under broadband is usually smaller (usually only 6 dB), and the power range is difficult to be compared with the higher rollback efficiency of an asymmetric Doherty architecture, and the peak-to-average ratio requirement of a modern communication system is difficult to be met. Therefore, how to improve the high-power, ultra-wideband, high-linearity and high-rollback efficiency characteristics of the load modulation balanced amplifier architecture becomes a pain point problem in the current industry.
Disclosure of Invention
Aiming at the problems in the prior art, the radio frequency amplifier system is provided, and the broadband, the power and the linearity of the load modulation balanced amplifier can be improved.
The technical scheme adopted by the invention is as follows: a radio frequency amplifier system comprises a power divider, an adjustable phase shifter, an input coupler, an output coupler, an enhanced load modulation balance amplifier branch and an enhanced load modulation control amplifier branch; wherein,
The input end of the power divider receives an input signal, the first output end of the power divider is connected with the input end of the adjustable phase shifter, and the second output end of the power divider is connected with the input end of the branch of the enhanced load modulation control amplifier; the output end of the adjustable phase shifter is connected with the input end of the input coupler, the isolation end of the input coupler is grounded through an isolation end load, the first output end and the second output end of the input coupler are respectively connected to the first input end and the second input end of the output coupler after passing through the enhanced load modulation balance amplifier branch, the output end of the output coupler outputs amplified signals, and the isolation end of the output coupler is connected with the output end of the enhanced load modulation control amplifier branch; the enhanced load modulation balanced amplifier branch is used as a main power source of the whole radio frequency amplifier system, the load impedance of the enhanced load modulation balanced amplifier branch is dynamically modulated by the control amplifier branch to realize the transition between the high efficiency and high power states, the enhanced load modulation control amplifier branch is used for modulating the load impedance of the enhanced load modulation balanced amplifier branch, and the adjustable phase shifter is used for adjusting the phase difference between the enhanced load modulation balanced amplifier branch and the enhanced load modulation control amplifier branch.
Further, the enhanced load modulation balanced amplifier branch includes: the device comprises a first driving amplifier, a second driving amplifier, a first final-stage amplifier, a second final-stage amplifier, a first matching network, a second matching network, a third matching network, a fourth matching network, a first bandwidth enhancing network, a second bandwidth enhancing network, a third bandwidth enhancing network and a fourth bandwidth enhancing network; the input end of the first drive amplifier is connected with the first output end of the input coupler, the output end of the first drive amplifier is connected to the input end of the first final amplifier through a first matching network, and the output end of the first final amplifier is connected to the first input end of the output coupler through a second matching network; the input end of the second driving amplifier is connected with the second output end of the input coupler, the output end of the second driving amplifier is connected to the input end of the second final-stage amplifier through a third matching network, and the output end of the second final-stage amplifier is connected to the second input end of the output coupler through a fourth matching network; the first bandwidth enhancing network is connected to the output end of the first drive amplifier, the second bandwidth enhancing network is connected to the output end of the first final amplifier, the third bandwidth enhancing network is connected to the output end of the second drive amplifier, and the fourth bandwidth enhancing network is connected to the output end of the second final amplifier.
Further, the second final stage amplifier has a power greater than the first final stage power amplifier.
Further, the enhanced load modulation control amplifier branch comprises a fifth matching network, a first control power amplifier, a second control power amplifier, a fifth bandwidth enhancing network and a sixth matching network; the first end of the fifth matching network is connected to the second output end of the power divider, the second end of the fifth matching network is connected to the input end of the first control power amplifier, the output end of the first control power amplifier is connected to the input end of the second control power amplifier, and the output end of the second control power amplifier is connected to the isolation end of the output coupler through the sixth matching network; the fifth bandwidth enhancing network is connected to the output of the second control power amplifier.
Further, the second bandwidth enhancing network, the fourth bandwidth enhancing network and the fifth bandwidth enhancing network are all realized by adopting a combination of a first bandwidth enhancing sub-network and a second bandwidth enhancing sub-network; the first bandwidth enhancing network and the third bandwidth enhancing network are implemented by adopting a first bandwidth enhancing sub-network or a second bandwidth enhancing sub-network.
Further, the adjustable phase shifter comprises a first single-pole N-throw switch, a second single-pole N-throw switch and N phase shifting units, wherein the input end of the first single-pole N-throw switch is connected with the first output end of the power divider, the N output ends of the first single-pole N-throw switch are correspondingly connected to the N input ends of the second single-pole N-throw switch through the N phase shifting units, and the output end of the second single-pole N-throw switch is connected to the input end of the input coupler; the first single-pole N-throw switch and the second single-pole N-throw switch are controlled by external control voltage to switch.
Further, the first bandwidth enhancer network includes: the first end of the adjustable inductor is used as a connecting end of the first bandwidth enhancer network, the second end of the adjustable inductor is connected to the first end of the second adjustable capacitor through the adjustable resistor, and the second section of the second adjustable capacitor is grounded; the first end of the first adjustable capacitor is connected to a common node of the adjustable inductor and the adjustable resistor, and the second end of the first adjustable capacitor is grounded.
Further, the second bandwidth enhancer network comprises N identical enhancement units, and the enhancement units comprise a first microstrip, a second microstrip, a third adjustable capacitor and a fourth adjustable capacitor; the first end of the first microstrip is used as an input end of the enhancement unit, the second end of the first microstrip is connected to the first end of the fourth adjustable capacitor through the second microstrip, and the second end of the fourth adjustable capacitor is grounded; the first end of the third adjustable capacitor is connected to a common node of the first microstrip and the second microstrip, and the second end of the third adjustable capacitor is grounded; the inputs of the N enhancement units are connected and serve as connections for the second bandwidth enhancer network.
Further, the phase shifting unit comprises a second adjustable inductor, a fifth adjustable capacitor and a sixth adjustable capacitor, a first end of the second adjustable inductor is used for being connected with an output end of the first single-pole N-throw switch, and a second end of the second adjustable inductor is used for being connected with an input end of the second single-pole N-throw switch; the first end of the fifth adjustable capacitor is connected to the first end of the second adjustable inductor, and the second end of the fifth adjustable capacitor is grounded; the first end of the sixth adjustable capacitor is connected to the second end of the second adjustable inductor, and the second end of the sixth adjustable capacitor is grounded.
Further, the phase shifting unit comprises a first adjustable microstrip, a second adjustable microstrip, a seventh adjustable capacitor, an eighth adjustable capacitor and an adjustable microstrip branch; the first end of the first adjustable microstrip is used for being connected with the output end of the first single-pole N-throw switch, the second end of the first adjustable microstrip is connected to the first end of the second adjustable microstrip through a seventh adjustable capacitor and an eighth adjustable capacitor in sequence, and the second end of the second adjustable microstrip is used for being connected with the input end of the second single-pole N-throw switch; the adjustable microstrip branch is connected to a common node of the seventh adjustable capacitor and the eighth adjustable capacitor.
Compared with the prior art, the beneficial effects of adopting the technical scheme are as follows: the invention has the characteristics of ultra-wideband, high power, high linearity and high rollback efficiency.
Drawings
Fig. 1 is a schematic block diagram of a conventional load-balanced power amplifier.
Fig. 2 is a schematic block diagram of a radio frequency amplifier system according to the present invention.
Fig. 3 is a schematic block diagram of an enhanced load modulation balanced amplifier branch in an embodiment of the invention.
Fig. 4 is a schematic block diagram of an enhanced load modulation control amplifier according to an embodiment of the present invention.
Fig. 5 is a schematic diagram of a bandwidth enhancing network according to an embodiment of the present invention.
Fig. 6 is a schematic diagram of a typical power amplifier model.
Fig. 7 is a frequency response plot of the amplitude of the VBW of a power amplifier without a bandwidth enhancing network.
Fig. 8 is a schematic block diagram of a first bandwidth enhancer network according to an embodiment of the present invention.
Fig. 9 is a functional block diagram of a second bandwidth-enhanced subnetwork in accordance with an embodiment of the present invention.
Fig. 10 is a frequency response diagram of the amplitude of VBW of a power amplifier before and after using a bandwidth enhanced network element according to an embodiment of the present invention.
Fig. 11 is a schematic block diagram of a tunable phase shifter in an embodiment of the present invention.
Fig. 12 is a schematic block diagram of a phase shifting unit in an embodiment of the present invention.
Fig. 13 is a schematic block diagram of a phase shifting unit in another embodiment of the present invention.
Reference numerals: the power amplifier comprises a 10-input coupler, a 20-adjustable phase shifter, a 30-power divider, a 40-enhanced load modulation balance amplifier branch, a 50-enhanced load modulation control amplifier branch, a 60-output coupler, a 201-first single-pole N-throw switch, a 202-phase shifting unit, a 203-second single-pole N-throw switch, a 401-driven power amplifying unit, a 402-final power amplifying unit, a 403-first matching network, a 404-second matching network, a 405-third matching network, a 406-fourth matching network, a 407-first bandwidth enhancing network, a 408-second bandwidth enhancing network, a 409-third bandwidth enhancing network, a 410-fourth bandwidth enhancing network, a 4011-first driving amplifier, a 4012-second driving amplifier, a 4021-first final stage amplifier, a 4022-second final stage amplifier, a 501-controlled power amplifying unit, a 502-fifth matching network, a 503-sixth matching network, a 504-fifth bandwidth enhancing network, a 5011-first controlled power amplifier, a 5012-second controlled power amplifier, a 409-third bandwidth enhancing network, a 410-fourth bandwidth enhancing network, a 5042-second bandwidth enhancing network.
Detailed Description
Embodiments of the present application are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar modules or modules having like or similar functions throughout. The embodiments described below by referring to the drawings are illustrative only and are not to be construed as limiting the application. On the contrary, the embodiments of the application include all alternatives, modifications and equivalents as may be included within the spirit and scope of the appended claims.
In order to improve the power, broadband, linearity and rollback efficiency characteristics of the load modulation balanced amplifier architecture, referring to fig. 2, a radio frequency amplifier system is proposed in the present embodiment, which includes a power divider 30, an adjustable phase shifter 20, an input coupler 10, an output coupler 60, an enhanced load modulation balanced amplifier branch 40, and an enhanced load modulation control amplifier branch 50. In particular, the method comprises the steps of,
The power divider 30 has an input end, a first output end and a second output end, the input end of the power divider 30 receives an input signal, the input signal is output at the first output end and the second output end after being divided into two by the power divider 30, the first output end of the power divider 30 is connected to the adjustable phase shifter 20, and the first output end of the power divider 30 is connected to the enhanced load modulation control amplifier branch 50.
The adjustable phase shifter 20 is mainly used for adjusting the phase difference between the enhanced load modulation balance amplifier branch 40 and the enhanced load modulation control amplifier branch 50, and has an input end receiving the signal output from the first output end of the power divider 30 and an output end connected to the input end of the input coupler 10.
The input coupler 10 has an input end, an isolation end, a first output end and a second output end, and the output coupler 60 has a first input end, a second output end, an isolation end and an output end; the isolated end of the input coupler 10 is grounded via an isolated end load R0, and the first output end and the second output end of the input coupler 10 are connected to the first input end and the second input end of the output coupler 60 respectively after passing through the enhanced load modulation balanced amplifier branch 40. The output of the output coupler 60 is used for outputting the amplified signal, and the isolation end of the output coupler 60 is connected to the enhanced load modulation control amplifier branch 50.
The enhanced load modulation balanced amplifier branch 40 is used as the primary power source for the overall radio frequency amplifier system, its load impedance being dynamically modulated by the control amplifier branch to effect transitions between its high efficiency and high power states, and the enhanced load modulation control amplifier branch 50 is used to modulate the load impedance of the enhanced load modulation balanced amplifier branch.
Referring to fig. 3, an embodiment of the present invention proposes an implementation of an enhanced load modulation balanced amplifier branch 40, in particular,
The enhanced load modulation balanced amplifier branch 40 includes a driving power amplifier unit 401, a final stage power amplifier unit 402, a first matching network 403, a second matching network 404, a third matching network 405, and a fourth matching network 406, where the driving power amplifier unit 401 includes a first driving amplifier 4011 and a second driving amplifier 4012, and the final stage power amplifier unit 402 includes a first final stage amplifier 4021 and a second final stage amplifier 4022. An input end of the first driving amplifier 4011 is connected to a first output end of the input coupler 10, an output end of the first driving amplifier 4011 is connected to an input end of the first final stage amplifier 4021 through a first matching network 403, and an output end of the first final stage amplifier 4021 is connected to a first input end of the output coupler 60 through a second matching network 404. An input end of the second driving amplifier 4012 is connected to a second output end of the input coupler 10, an output end of the second driving amplifier 4012 is connected to an input end of the second final stage amplifier 4022 through a third matching network 405, and an output end of the second final stage amplifier 4022 is connected to a second input end of the output coupler 60 through a fourth matching network 406. In this embodiment, a pair of push amplifiers (i.e., a first driver amplifier 4011 and a second driver amplifier 4012) are respectively added to the front ends of the first final amplifier 4021 and the second final amplifier 4022 in the enhanced load modulation balanced amplifier branch, so that higher link gain and output power can be provided.
To boost the power amplifier's own VBW, in one embodiment, the enhanced load modulation balanced amplifier branch 40 further comprises a first bandwidth enhancing network 407, a second bandwidth enhancing network 408, a third bandwidth enhancing network 409, and a fourth bandwidth enhancing network 410. The first bandwidth enhancing network 407 is connected to the output of the first driver amplifier 4011, the second bandwidth enhancing network 408 is connected to the output of the first final amplifier 4021, the third bandwidth enhancing network 409 is connected to the output of the second driver amplifier 4012, and the fourth bandwidth enhancing network 410 is connected to the output of the second final amplifier 4022.
Referring to fig. 4, an embodiment of the present invention proposes an implementation of an enhanced load modulation control amplifier branch 50, specifically. The enhanced load modulation controlled amplifier branch 50 comprises a fifth matching network 502, a controlled power amplifier unit 501, a fifth bandwidth enhancing network 504 and a sixth matching network 503, wherein the controlled power amplifier unit 501 comprises a first controlled power amplifier 5011 and a second controlled power amplifier 5012. The first end of the fifth matching network 502 is connected to the second output end of the power divider 30, the second end of the fifth matching network 502 is connected to the input end of the first control power amplifier 5011, the output end of the first control power amplifier 5011 is connected to the input end of the second control power amplifier 5012, and the output end of the second control power amplifier 5012 is connected to the isolation end of the output coupler 60 through the sixth matching network 503.
To boost the power amplifier's own VBW, in one embodiment, a fifth bandwidth booster network 504 is also included in the enhanced load modulation control amplifier branch 50, the fifth bandwidth booster network 504 being connected to the output of the second control power amplifier 5012.
Referring to fig. 5, cds are parasitic capacitances from the drain to the source of the power amplifier, and their magnitudes are determined only by the wafer material and the device fabrication process and bias voltages. On the other hand, cds have a linear increasing trend along with the increase of the power of the device, and the VBW (video bandwidth) of the power amplifier has a strong negative correlation with the size of Cds, so in order to improve the broadband characteristic of the high-power amplifier, a bandwidth improving network capable of compensating and eliminating Cds needs to be added at the periphery of the amplifier, and fig. 6 is a frequency response of the VBW amplitude of the power amplifier without the bandwidth enhancing network. Therefore, the first bandwidth enhancing network 407 to the fifth bandwidth enhancing network 504 are introduced in the present embodiment to enhance the broadband characteristics.
Further, in order to maximize high-power and ultra-wideband performance, in one embodiment, referring to fig. 7, the second bandwidth enhancing network 408, the fourth bandwidth enhancing network 410, and the fifth bandwidth enhancing network 504 are implemented by using a combination of a first bandwidth enhancing sub-network 5041 and a second bandwidth enhancing sub-network 5042, where the first bandwidth enhancing sub-network 5041 and the second bandwidth enhancing sub-network 5042 are in different forms. The first bandwidth enhancing network 407, the third bandwidth enhancing network 409 are implemented with a first bandwidth enhancing sub-network 5041 or a second bandwidth enhancing sub-network 5042.
Referring to fig. 8, an implementation of a first bandwidth enhancer network 5041 is provided in the present embodiment, where the first bandwidth enhancer network 5041 includes a first tunable inductor L1, a tunable resistor R1, a first tunable capacitor C1, and a second tunable capacitor C2. The first end of the first adjustable inductor L1 is used as a connection end of the first bandwidth enhancer network 5041, the second end of the first adjustable inductor L1 is connected to the first end of the second adjustable capacitor C2 through the adjustable resistor R1, and the second section of the second adjustable capacitor C2 is grounded; the first end of the first adjustable capacitor C1 is connected to the common node of the first adjustable inductor L1 and the adjustable resistor R1, and the second end of the first adjustable capacitor C1 is grounded.
Referring to fig. 9, an implementation of a second bandwidth enhancer network 5042 is proposed in this embodiment, where the second bandwidth enhancer network 5042 includes N identical enhancement units. In this embodiment, one of the enhancement units is specifically described, and the enhancement unit includes a first microstrip, a second microstrip, a third adjustable capacitor C3, and a fourth adjustable capacitor C4; the first end of the first microstrip is used as an input end of the enhancement unit, the second end of the first microstrip is connected to the first end of the fourth adjustable capacitor C4 through the second microstrip, and the second end of the fourth adjustable capacitor C4 is grounded; the first end of the third adjustable capacitor C3 is connected to a common node of the first microstrip and the second microstrip, and the second end of the third adjustable capacitor C3 is grounded; the inputs of the N enhancement units are connected and serve as connections for the second bandwidth enhancement sub-network 5042.
The second bandwidth enhancing network 408, the fourth bandwidth enhancing network 410, and the fifth bandwidth enhancing network 504 can be obtained by connecting the connection terminals of the first bandwidth enhancing sub-network 5041 and the second bandwidth enhancing sub-network 5042, and at this time, bandwidth enhancement can be achieved by connecting the connection terminals with the output terminals of the corresponding amplifiers. In practical applications, the capacitance, inductance, and resistance in the first bandwidth enhancer network 5041 may be appropriately adjusted according to the actual ultra-wideband requirement and Cds of the selected final stage/control power amplifier unit 501 device, and an appropriate node number and capacitance may be selected in the second bandwidth enhancer network 5042 unit. The first bandwidth enhancing network 407 and the third bandwidth enhancing network 409 driving the output of the power amplifying unit 401 may select one of the first bandwidth enhancing sub-network 5041 or the second bandwidth enhancing sub-network 5042 according to the actual circuit requirement. The VBW improvement effect shown in fig. 10 can be achieved by introducing a bandwidth enhancing network, wherein the dashed line is a frequency-dependent curve of the improved VBW amplitude.
In practical application, according to the actual output power requirement, the driving power amplification unit 401, the final stage power amplification unit 402 and the control power amplification unit 501 with appropriate power can be selected through theoretical calculation. Specifically, the driving power amplifier unit 401 may use an LDMOS or GaN process device to bias it in class B, mainly for providing link gain. The final stage power amplifier unit 402 uses GaN process devices and biases them in class C, mainly providing peak power. It should be noted that, the first final stage amplifier 4021 and the second final stage amplifier 4022 in the final stage power amplification unit 402 may adopt two independent devices or devices packaged in the same package type, and the power of the second final stage amplifier 4022 is greater than that of the first final stage amplifier 4021, and the asymmetric ratio of the first final stage amplifier 4021 and the second final stage amplifier 4022 is determined by the back-off amount and the back-off point power of the power amplifier as a whole. The control power amplifier unit 501 is implemented by adopting a two-stage discrete or integrated device of a GaN process and is biased in class AB, and is mainly used for providing average power and link gain. In this embodiment, the asymmetric load balanced power amplifier is implemented by the final power amplifier with different power classes, and compared with the final power amplifier with symmetric power in the conventional architecture, the asymmetric load balanced power amplifier can provide a larger power dynamic range.
Referring to fig. 11, an implementation of the adjustable phase shifter 20 is also provided in the embodiment of the present invention. The adjustable phase shifter 20 is mainly used for mainly adjusting the phase difference between the balanced amplifier branch and the control amplifier branch to obtain the optimal combining efficiency. The adjustable phase shifter 20 comprises a first single-pole N-throw switch 201, a second single-pole N-throw switch 203 and N phase shift units 202, wherein the input end of the first single-pole N-throw switch 201 is connected with the first output end of the power divider 30, the N output ends of the first single-pole N-throw switch 201 are correspondingly connected to the N input ends of the second single-pole N-throw switch 203 through the N phase shift units 202, and the output end of the second single-pole N-throw switch 203 is connected to the input end of the input coupler 10; the first single pole N throw switch 201 and the second single pole N throw switch 203 are both controlled by an external control voltage to switch.
In order to meet the actual circuit phase difference requirement, two implementations of the phase shift unit 202 are also proposed in this embodiment.
Referring to fig. 12, in one embodiment, the phase shift unit 202 includes a second adjustable inductor L2, a fifth adjustable capacitor C5, and a sixth adjustable capacitor C6, wherein a first end of the second adjustable inductor L2 is connected to an output end of the first single pole N throw switch 201, and a second end of the second adjustable inductor L2 is connected to an input end of the second single pole N throw switch 203; the first end of the fifth adjustable capacitor C5 is connected to the first end of the second adjustable inductor L2, and the second end of the fifth adjustable capacitor C5 is grounded; the first end of the sixth adjustable capacitor C6 is connected to the second end of the second adjustable inductor L2, and the second end of the sixth adjustable capacitor C6 is grounded.
Referring to fig. 13, in one embodiment, the phase shift unit 202 includes a first tunable microstrip, a second tunable microstrip, a seventh tunable capacitor C7, an eighth tunable capacitor C8, and a tunable microstrip branch; the first end of the first adjustable microstrip is used for being connected with the output end of the first single-pole N-throw switch 201, the second end of the first adjustable microstrip is connected to the first end of the second adjustable microstrip through a seventh adjustable capacitor C7 and an eighth adjustable capacitor C8 in sequence, and the second end of the second adjustable microstrip is used for being connected with the input end of the second single-pole N-throw switch 203; the adjustable microstrip branch is connected to a common node of the seventh adjustable capacitor C7 and the eighth adjustable capacitor C8.
Based on the two phase shift unit implementations, a proper lumped element or distributed element value can be selected according to the actual circuit phase difference requirement so as to meet the performance requirement of the whole power amplifier.
In this embodiment, the enhanced load modulation balanced amplifier branch 40 and the enhanced load modulation control circuit amplifier branch form main components of the enhanced asymmetric balanced power amplifier, and by adopting the first final amplifier 4021 and the second final amplifier 4022 in the asymmetric final power amplifier unit 402 and combining the bandwidth enhancement network, the ultra-wideband, high power, high linearity and high rollback efficiency characteristics of the load balanced power amplifier architecture can be improved.
It should be noted that, in the description of the embodiments of the present invention, unless explicitly specified and limited otherwise, the terms "disposed," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; may be directly connected or indirectly connected through an intermediate medium. The specific meaning of the above terms in the present invention will be understood in detail by those skilled in the art; the accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention. The components of the embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations.
While embodiments of the present application have been shown and described above, it will be understood that the above embodiments are illustrative and not to be construed as limiting the application, and that variations, modifications, alternatives and variations may be made to the above embodiments by one of ordinary skill in the art within the scope of the application.
Claims (10)
1. A radio frequency amplifier system, which is characterized by comprising a power divider, an adjustable phase shifter, an input coupler, an output coupler, an enhanced load modulation balance amplifier branch and an enhanced load modulation control amplifier branch; wherein,
The input end of the power divider receives an input signal, the first output end of the power divider is connected with the input end of the adjustable phase shifter, and the second output end of the power divider is connected with the input end of the branch of the enhanced load modulation control amplifier; the output end of the adjustable phase shifter is connected with the input end of the input coupler, the isolation end of the input coupler is grounded through an isolation end load, the first output end and the second output end of the input coupler are respectively connected to the first input end and the second input end of the output coupler after passing through the enhanced load modulation balance amplifier branch, the output end of the output coupler outputs amplified signals, and the isolation end of the output coupler is connected with the output end of the enhanced load modulation control amplifier branch; the enhanced load modulation balanced amplifier branch is used as a main power source of the radio frequency amplifier system, the enhanced load modulation control amplifier branch is used for modulating the load impedance of the enhanced load modulation balanced amplifier branch, and the adjustable phase shifter is used for adjusting the phase difference between the enhanced load modulation balanced amplifier branch and the enhanced load modulation control amplifier branch.
2. The radio frequency amplifier system of claim 1, wherein the enhanced load modulation balanced amplifier branch comprises: the device comprises a first driving amplifier, a second driving amplifier, a first final-stage amplifier, a second final-stage amplifier, a first matching network, a second matching network, a third matching network, a fourth matching network, a first bandwidth enhancing network, a second bandwidth enhancing network, a third bandwidth enhancing network and a fourth bandwidth enhancing network; the input end of the first drive amplifier is connected with the first output end of the input coupler, the output end of the first drive amplifier is connected to the input end of the first final amplifier through a first matching network, and the output end of the first final amplifier is connected to the first input end of the output coupler through a second matching network; the input end of the second driving amplifier is connected with the second output end of the input coupler, the output end of the second driving amplifier is connected to the input end of the second final-stage amplifier through a third matching network, and the output end of the second final-stage amplifier is connected to the second input end of the output coupler through a fourth matching network; the first bandwidth enhancing network is connected to the output end of the first drive amplifier, the second bandwidth enhancing network is connected to the output end of the first final amplifier, the third bandwidth enhancing network is connected to the output end of the second drive amplifier, and the fourth bandwidth enhancing network is connected to the output end of the second final amplifier.
3. The radio frequency amplifier system of claim 2, wherein the second final stage amplifier has a power greater than the first final stage power amplifier.
4. The radio frequency amplifier system of claim 1, wherein the enhanced load modulation control amplifier branch comprises a fifth matching network, a first control power amplifier, a second control power amplifier, a fifth bandwidth enhancement network, and a sixth matching network; the first end of the fifth matching network is connected to the second output end of the power divider, the second end of the fifth matching network is connected to the input end of the first control power amplifier, the output end of the first control power amplifier is connected to the input end of the second control power amplifier, and the output end of the second control power amplifier is connected to the isolation end of the output coupler through the sixth matching network; the fifth bandwidth enhancing network is connected to the output of the second control power amplifier.
5. The radio frequency amplifier system according to claim 2 or 4, wherein the second bandwidth enhancing network, the fourth bandwidth enhancing network, and the fifth bandwidth enhancing network are each implemented using a combination of a first bandwidth enhancing sub-network and a second bandwidth enhancing sub-network; the first bandwidth enhancing network and the third bandwidth enhancing network are implemented by adopting a first bandwidth enhancing sub-network or a second bandwidth enhancing sub-network.
6. The radio frequency amplifier system of claim 1, wherein the adjustable phase shifter comprises a first single-pole N-throw switch, a second single-pole N-throw switch, and N phase shift units, wherein an input terminal of the first single-pole N-throw switch is connected to a first output terminal of the power divider, and N output terminals of the first single-pole N-throw switch are connected to N input terminals of the second single-pole N-throw switch through the N phase shift units, and an output terminal of the second single-pole N-throw switch is connected to an input terminal of the input coupler; the first single-pole N-throw switch and the second single-pole N-throw switch are controlled by external control voltage to switch.
7. The radio frequency amplifier system according to claim 5, wherein the first bandwidth enhancer network comprises: the first end of the adjustable inductor is used as a connecting end of the first bandwidth enhancer network, the second end of the adjustable inductor is connected to the first end of the second adjustable capacitor through the adjustable resistor, and the second section of the second adjustable capacitor is grounded; the first end of the first adjustable capacitor is connected to a common node of the adjustable inductor and the adjustable resistor, and the second end of the first adjustable capacitor is grounded.
8. The radio frequency amplifier system according to claim 5, wherein the second bandwidth enhancer network comprises N identical enhancement units, the enhancement units comprising a first microstrip, a second microstrip, a third adjustable capacitance, and a fourth adjustable capacitance; the first end of the first microstrip is used as an input end of the enhancement unit, the second end of the first microstrip is connected to the first end of the fourth adjustable capacitor through the second microstrip, and the second end of the fourth adjustable capacitor is grounded; the first end of the third adjustable capacitor is connected to a common node of the first microstrip and the second microstrip, and the second end of the third adjustable capacitor is grounded; the inputs of the N enhancement units are connected and serve as connections for the second bandwidth enhancer network.
9. The radio frequency amplifier system of claim 6, wherein the phase shifting unit comprises a second adjustable inductance, a fifth adjustable capacitance, and a sixth adjustable capacitance, a first end of the second adjustable inductance being configured to be coupled to an output of the first single pole N throw switch, a second end of the second adjustable inductance being configured to be coupled to an input of the second single pole N throw switch; the first end of the fifth adjustable capacitor is connected to the first end of the second adjustable inductor, and the second end of the fifth adjustable capacitor is grounded; the first end of the sixth adjustable capacitor is connected to the second end of the second adjustable inductor, and the second end of the sixth adjustable capacitor is grounded.
10. The radio frequency amplifier system according to claim 6, wherein the phase shifting unit comprises a first adjustable microstrip, a second adjustable microstrip, a seventh adjustable capacitance, an eighth adjustable capacitance, and an adjustable microstrip leg; the first end of the first adjustable microstrip is used for being connected with the output end of the first single-pole N-throw switch, the second end of the first adjustable microstrip is connected to the first end of the second adjustable microstrip through a seventh adjustable capacitor and an eighth adjustable capacitor in sequence, and the second end of the second adjustable microstrip is used for being connected with the input end of the second single-pole N-throw switch; the adjustable microstrip branch is connected to a common node of the seventh adjustable capacitor and the eighth adjustable capacitor.
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| CN202410105323.0A CN118017950A (en) | 2024-01-24 | 2024-01-24 | Radio frequency amplifier system |
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| CN202410105323.0A CN118017950A (en) | 2024-01-24 | 2024-01-24 | Radio frequency amplifier system |
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