CN117970564A - Silicon-based III-V sub-nanowire grating, preparation method and application - Google Patents
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 112
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Abstract
The application discloses a silicon-based III-V group submicron line grating, a preparation method and application thereof, belonging to the technical field of optoelectronic devices, wherein the silicon-based III-V group submicron line grating comprises a doped silicon layer, a buried oxide layer, a refractive index perturbation structure, a silicon dioxide layer, a groove and a III-V group submicron line epitaxial structure, wherein the refractive index perturbation structure comprises a first refractive index perturbation structure and a second refractive index perturbation structure; the groove is positioned between the first refractive index perturbation structure and the second refractive index perturbation structure, and the III-V group submicron line extension structure is arranged in the groove; and the III-V group submicron line epitaxial structure and the refractive index perturbation structure form a grating structure together. The application also discloses a preparation method of the silicon-based III-V group submicron line grating, by the preparation method, the manufacture of the grating structure can be automatically completed in the process of preparing the silicon optical device and the III-V group submicron line epitaxial structure, the process steps are reduced, the manufacturing cost is reduced, the batch production of the silicon-based III-V group submicron line laser is easier, and the monolithic integration of the silicon-based III-V group submicron line laser and the silicon optical device is facilitated.
Description
Technical Field
The application relates to the technical field of optoelectronic devices, in particular to a silicon-based III-V sub-micron line grating, a preparation method and application.
Background
The method for preparing the small-size laser on any appointed position of the wafer can be realized by using the high aspect ratio limit (Aspect Ratio Trapping, ART) technology to carry out small-size selective epitaxy III-V group gain material on the silicon, which is beneficial to promoting large-scale and high-density integration of the silicon-based photoelectronic integrated chip. Silicon-based III-V group submicron line lasers based on ART technology have realized optical pumping, and various research teams at home and abroad are working on realizing electric pumping; among them, the optical resonator is an important factor affecting the pumping of the electric pump. Because silicon is of a diamond structure, a natural cleavage surface is not easy to obtain through slicing operation like a zinc blende structure such as indium phosphide (InP), and the cleavage method is unfavorable for the silicon-based III-V group submicron line laser to exert the advantage of easy ultra-large scale integration, and a method for obtaining an optical resonant cavity without cutting a wafer needs to be developed.
Currently, the optical resonator of a silicon-based III-V group submicron line laser is obtained by etching a facet or a distributed bragg reflector (Distributed Bragg Reflector, DBR) grating by a Focused Ion Beam (FIB) process, and the method can obtain the optical resonator of the laser without dicing the wafer. However, the FIB technology has certain physical damage to the group III-V submicron line, the optical loss of the prepared optical resonant cavity surface is large, the reflectivity of the optical resonant cavity surface is favorably controlled after the DBR grating is introduced, the optical loss of the end surface of the optical resonant cavity is reduced to a certain extent, but the FIB technology is used for etching the grating, and the problems of complex operation, long time consumption, high price and the like exist.
Therefore, it is a technical difficulty to produce gratings for silicon-based III-V group submicron line lasers that are low cost, high performance, and easy to mass produce.
Disclosure of Invention
Aiming at the defects of the prior art, the application provides a silicon-based III-V submicron line grating, a preparation method and application thereof, and aims to solve or relieve the problems of complex operation, long time consumption, high price and the like existing in the prior art in the process of preparing a silicon-based III-V submicron line laser by utilizing a FIB process to etch the grating.
In order to achieve the above purpose, the present application provides the following technical solutions:
In a first aspect, the present application provides a silicon-based III-V sub-nanowire grating comprising:
doping the silicon layer;
The buried oxide layer is arranged on the surface of the doped silicon layer;
The refractive index perturbation structure is arranged on the surface of the buried oxide layer and comprises a first refractive index perturbation structure and a second refractive index perturbation structure;
The silicon dioxide layer is arranged on the surface of the buried oxide layer and covers the refractive index perturbation structure;
The groove between the first refractive index perturbation structure and the second refractive index perturbation structure comprises a selective groove and a V-shaped groove which are communicated with each other, the selective groove penetrates through the silicon dioxide layer and the buried oxide layer, the V-shaped groove is arranged in the doped silicon layer and consists of two Si {111} planes, and the width of the V-shaped groove at the contact surface of the V-shaped groove and the selective groove is not lower than the width of the selective groove;
A III-V group submicron line epitaxial structure disposed in the trench; and the III-V family submicron line epitaxial structure and the refractive index perturbation structure form a grating structure together.
Further, the buried oxide layer is made of silicon dioxide (SiO 2).
Further, the material of the refractive index perturbation structure is silicon (Si).
Further, the III-V group submicron line epitaxial structure at least comprises a doped buffer layer, a lower cladding layer, a multi-quantum well active region, an upper cladding layer and a doped contact layer according to the direction away from the doped silicon layer, wherein the multi-quantum well active region is positioned in the region of the selected region groove and is positioned between the first refractive index perturbation structure and the second refractive index perturbation structure.
Preferably, the vertical distance between the first refractive index perturbation structure and the side surface of the adjacent selective area groove is d 1, wherein d 1 is more than 0 and less than or equal to 500nm; the vertical distance between the second refractive index perturbation structure and the side surface of the adjacent selective area groove is d 2, wherein d 2 is more than 0 and less than or equal to 500nm.
In a second aspect, the application provides a method for preparing a silicon-based III-V group submicron line grating, comprising the following steps:
Providing an SOI substrate;
Preparing a refractive index perturbation structure on a top silicon layer of the SOI substrate, and exposing a buried oxide layer of the SOI substrate in a region to be prepared of III-V group submicron lines, wherein the refractive index perturbation structure comprises a first refractive index perturbation structure and a second refractive index perturbation structure;
Depositing a silicon dioxide layer on the buried oxide layer, wherein the silicon dioxide layer covers the refractive index perturbation structure;
Preparing a region selection groove between the first refractive index perturbation structure and the second refractive index perturbation structure, wherein the region selection groove penetrates through the silicon dioxide layer and the buried oxide layer;
preparing a V-shaped groove in a bottom silicon layer of the SOI substrate; the V-shaped groove is communicated with the selective area groove to form an integrated groove;
And sequentially epitaxially growing at least a doped buffer layer, a lower cladding layer, a multi-quantum well active region, an upper cladding layer and a doped contact layer along the direction far away from the V-shaped groove to form a III-V sub-micron line epitaxial structure.
In a third aspect, the application provides an application of the silicon-based III-V submicron line grating or the preparation method in preparation of a silicon-based III-V submicron line laser.
The application provides a silicon-based III-V sub-nanowire grating, a preparation method and application, which have at least the following beneficial effects compared with the prior art:
(1) The preparation method automatically completes the preparation work of the grating structure in the process of preparing the III-V submicron line epitaxial structure between the refractive index perturbation structures by preparing the silicon structure with refractive index perturbation effect on the light field in the III-V submicron line on the top silicon layer of the SOI substrate; the preparation work of the refractive index perturbation structure and the preparation work of the silicon optical device are completed synchronously, so that the process steps are reduced, the manufacturing cost is reduced, and the monolithic integration of the silicon-based III-V submicron line laser and the silicon optical device is facilitated.
(2) Compared with the method for obtaining the grating structure by etching the III-V group submicron line through the FIB process, the preparation method of the silicon-based III-V group submicron line grating provided by the application has the advantages of no physical damage to the III-V group submicron line, simplicity in operation, short time consumption and low cost, and is beneficial to mass production of the silicon-based III-V group submicron line grating and a laser based on the silicon-based III-V group submicron line grating.
Drawings
The application will be described in further detail below in connection with the drawings and the preferred embodiments, but it will be appreciated by those skilled in the art that these drawings are drawn for the purpose of illustrating the preferred embodiments only and thus should not be taken as limiting the scope of the application. Moreover, unless specifically indicated otherwise, the drawings are merely schematic representations, not necessarily to scale, of the compositions or constructions of the described objects and may include exaggerated representations.
FIG. 1 is a schematic cross-sectional view of a silicon-based III-V group submicron line grating along a Y-Z plane provided by an embodiment of the application;
FIG. 2 is a schematic cross-sectional view of an SOI substrate along a Y-Z plane according to an embodiment of the present application;
FIG. 3 is a schematic cross-sectional view of a refractive index perturbation structure along an X-Y plane according to an embodiment of the present application;
FIG. 4 is a schematic cross-sectional view of another refractive index perturbation structure along the X-Y plane according to an embodiment of the present application;
FIG. 5 is a schematic cross-sectional view of a refractive index perturbation structure along a Y-Z plane prepared on a top silicon layer of an SOI substrate according to an embodiment of the present application;
FIG. 6 is a schematic cross-sectional view of a device along the Y-Z plane after the preparation of a silicon dioxide layer according to an embodiment of the present application;
FIG. 7 is a schematic cross-sectional view of a device along a Y-Z plane after the preparation of a selected trench according to an embodiment of the present application;
FIG. 8 is a schematic cross-sectional view of a device along the Y-Z plane after the preparation of the V-shaped trench according to an embodiment of the present application;
FIG. 9 is a schematic cross-sectional view of a silicon-based III-V group submicron line laser along the Y-Z plane prepared with a silicon-based III-V group submicron line grating according to an embodiment of the present application;
FIG. 10 is a schematic cross-sectional view of a silicon-based III-V group submicron line laser along the Y-Z plane prepared with a silicon-based III-V group submicron line grating according to an embodiment of the present application;
Wherein 1 is an SOI substrate, 11 is a bottom silicon layer, 12 is a buried oxide layer, and 13 is a top silicon layer; 2 is a doped silicon layer; 3 is a refractive index perturbation structure, 31 is a first refractive index perturbation structure, and 32 is a second refractive index perturbation structure; 4 is a silicon dioxide layer; 5 is a groove, 51 is a selective area groove, and 52 is a V-shaped groove; 6 is III-V group submicron line epitaxial structure, 61 is doped buffer layer, 62 is lower cladding layer, 63 is multiple quantum well active region, 64 is upper cladding layer, 65 is doped contact layer; 7 is a first electrode; 8 is a second electrode.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the concept and technical effects of the present application will be further described in detail with reference to the accompanying drawings and examples, so as to fully understand the objects, features and effects of the present application. It should be understood that the specific embodiments described herein are for illustrative purposes only and are not intended to limit the application, as other embodiments may be obtained by those skilled in the art without undue burden, and are within the scope of the present application.
In the embodiments of the present application, the terms "first," "second," and the like are used to distinguish between the same item or similar items having substantially the same function and effect, and are merely used to clearly describe the technical solutions of the embodiments of the present application, and are not to be construed as indicating or implying relative importance or implying an indication of the number of technical features indicated. In the embodiments of the present application, the terms "upper", "lower", "top", "height", and the like indicate an azimuth or a positional relationship based on the azimuth or the positional relationship shown in the drawings, and are merely for convenience of description and simplification of description, and do not indicate or imply that the apparatus or element to be referred to must have a specific azimuth, be constructed and operated in a specific azimuth, and thus should not be construed as limiting the present application. In the embodiments of the present application, the expression "specific numerical value" or "left and right" should be understood as a range value that fluctuates up and down in the specific numerical value, and the fluctuation range is typically-10% to 10% unless otherwise specifically defined.
The embodiment of the application provides a silicon-based III-V group submicron line grating (shown in a figure 1), which comprises the following components: a doped silicon layer 2 (namely a bottom silicon layer 11 of the SOI substrate 1), a buried oxide layer 12, a refractive index perturbation structure 3, a silicon dioxide layer 4, a groove 5 and a III-V group submicron line extension structure 6; the buried oxide layer 12 is arranged on the surface of the doped silicon layer 2; the refractive index perturbation structure 3 is arranged on the surface of the buried oxide layer 12, and comprises a first refractive index perturbation structure 31 and a second refractive index perturbation structure 32; the silicon dioxide layer 4 is arranged on the surface of the buried oxide layer 12 and covers the refractive index perturbation structure 3; the trench 5 is located between the first refractive index perturbation structure 31 and the second refractive index perturbation structure 32, and comprises a selected region trench 51 and a V-shaped trench 52 which are communicated with each other, the selected region trench 51 penetrates through the buried oxide layer 12 and the silicon dioxide layer 4, the V-shaped trench 52 is arranged in the doped silicon layer 2, and the top width of the V-shaped trench 52 is not lower than the width of the selected region trench 51; the III-V group submicron line extension structure 6 is arranged in the groove 5; the III-V group submicron line extension structure 6 and the refractive index perturbation structure 3 form a grating structure together.
Based on the above, the embodiment of the application provides a preparation method of a silicon-based III-V group submicron line grating, which comprises the following steps: etching a silicon structure with refractive index perturbation effect on the optical field in the III-V group submicron line on the top silicon layer 13 of the SOI substrate 1, namely two rows of refractive index perturbation structures 3 (shown in figures 3-5); the silicon dioxide layer 4 is deposited on the buried oxide layer 12 to cover the refractive index perturbation structure 3 (as shown in fig. 6), a selective groove 51 penetrating through the silicon dioxide layer 4 and the buried oxide layer 12 is prepared between the two refractive index perturbation structures 3 (as shown in fig. 7), a V-shaped groove 52 formed by two Si {111} planes is etched on the doped silicon layer 2 at the bottom of the selective groove 51 (namely the bottom silicon layer 11 of the SOI substrate 1), the V-shaped groove 52 and the selective groove 51 are communicated to form a groove 5 (as shown in fig. 8), a III-V group submicron line extension structure 6 (as shown in fig. 9) is epitaxially grown on the Si {111} plane in the groove 5, and the III-V group submicron line extension structure 6 and the refractive index perturbation structure 3 form a grating structure together. The grating preparation process can be automatically completed in the process of preparing a silicon optical device and growing a III-V group submicron line epitaxial structure 6, so that the process steps are reduced, the manufacturing cost is reduced, and the monolithic integration of a silicon-based III-V group submicron line laser and the silicon optical device is facilitated. The grating preparation method has no physical damage to III-V submicron lines, is easy for mass production of lasers based on silicon-based III-V submicron line gratings, and has good application prospect.
In some embodiments, the width of the selective area groove 51 is smaller than 1 μm, the length of the selective area groove 51 is between 10 μm and 500 μm, and the ratio of the depth to the width of the selective area groove 51 is larger than 1; the vertical distance between the first refractive index perturbation structure 31 and the side surface of the adjacent selective area groove 51 is d 1, wherein d 1 is more than 0 and less than or equal to 500nm; the vertical distance between the second refractive index perturbation structure 31 and the side surface of the adjacent selective area groove 51 is d 2, wherein d 2 is more than 0 and less than or equal to 500nm.
In the embodiment of the present application, the refractive index perturbation structure 3 and the group III-V submicron line extension structure 6 may form different grating structures. In some embodiments, the refractive index perturbation 3 (shown in FIG. 3) and the III-V family submicrowire epitaxial structure 6 together form part of a grating structure. In some embodiments, a different refractive index perturbation structure 3 (as shown in FIG. 4) is employed to form a distributed feedback grating structure in combination with the III-V sub-micron line epitaxial structure 6.
In some embodiments, the III-V group submicron line epitaxial structure 6 comprises at least a doped buffer layer 61, a lower cladding layer 62, a multiple quantum well active region 63, an upper cladding layer 64, and a doped contact layer 65 (as shown in FIG. 9) in a direction away from the doped silicon layer 2; wherein the doping type of the doped buffer layer 61 is the same as the doping type of the doped silicon layer 2, and opposite to the doping type of the doped contact layer 65, the multiple quantum well active region 63 is located in the region of the selected region trench 51 and is located between the first refractive index micro 31 perturbation structure and the second refractive index perturbation structure 32.
Based on this, the embodiment of the present application further provides an application of the foregoing silicon-based III-V group submicron line grating or the foregoing preparation method in preparing a silicon-based III-V group submicron line laser, where a first electrode 7, such as Ti/Au, capable of forming ohmic contact with the doped contact layer 65 is prepared on the surface of the III-V group submicron epitaxial structure 6, and a second electrode 8, such as Sb/Au, capable of forming ohmic contact with the doped silicon layer 2 is prepared on the surface of the doped silicon layer 2, so as to finally obtain the silicon-based III-V group submicron line laser.
The technical solution provided by the present application will be further described by the following more specific examples.
Example 1
The embodiment provides a preparation method of a silicon-based III-V group submicron line grating, which comprises the following specific steps:
(1) The bottom silicon layer 11 of the SOI substrate 1 is selected as a doped silicon layer 2, the doping type of the bottom silicon layer 11 of the SOI substrate 1 is N-type doping, the thickness of the buried oxide layer 12 of the SOI substrate 1 is 1000nm, and the thickness of the top silicon layer 13 of the SOI substrate 1 is 500nm;
(2) Etching the top silicon layer 13 by using a photoetching technology and a wet etching technology to obtain two rows of densely arranged refractive index perturbation structures 3 (shown in figures 3-5), and exposing a buried oxide layer 12 of a region to be prepared of the III-V submicron line; the refractive index perturbation structure 3 comprises a first refractive index perturbation structure 31 and a second refractive index perturbation structure 32;
(3) Depositing a silicon dioxide layer 4 on the surface of the buried oxide layer 12 by Plasma Enhanced Chemical Vapor Deposition (PECVD) to form a cladding refractive index perturbation structure 3 (as shown in fig. 6) having a thickness of 1000nm;
(4) Etching a selective groove 51 (shown in fig. 7) on the buried oxide layer 12 and the silicon dioxide layer 4 along the Si < 110 > direction of the bottom silicon layer 11 by using a photoetching technology and a dry etching technology, wherein the selective groove 51 penetrates through the buried oxide layer 12 and the silicon dioxide layer 4; the vertical distance between the first refractive index perturbation structure 31 and the side surface of the adjacent selective area groove 51 is 100nm, and the vertical distance between the second refractive index perturbation structure 32 and the side surface of the adjacent selective area groove 51 is 200nm;
(5) Etching the bottom silicon layer 11 by KOH solution to form a V-shaped groove 52 (shown in figure 8) below the selective groove 51, wherein the V-shaped groove 52 is communicated with the selective groove 51 to form an integral groove 5, and the top width of the etched V-shaped groove 52 is larger than the width of the selective groove 51; soaking the formed device in dilute HCl for 1-2 min to remove chemical reaction products of KOH solution and Si attached to the side wall of the groove 5, and then cleaning the device with deionized water;
(6) Group III-V submicron line epitaxial structures 6 are grown sequentially in trenches 5 in a direction away from doped silicon layer 2 using Metal Organic Chemical Vapor Deposition (MOCVD) or Molecular Beam Epitaxy (MBE): an N-type GaAs buffer layer (doped buffer layer 61), an InP lower cladding layer (lower cladding layer 62), an InGaAs/InGaAsP multiple quantum well active region (multiple quantum well active region 63), an InP upper cladding layer (upper cladding layer 64), a P-type InGaAs contact layer (doped contact layer 65) (as shown in fig. 9); wherein the multiple quantum well active region 63 is located in the region of the selected region trench 51 and between the first refractive index perturbation structure 31 and the second refractive index perturbation structure 32, and the height of the multiple quantum well active region 63 does not exceed the height of the selected region trench 51; and the III-V group submicron line epitaxial structure 6 and the refractive index perturbation structure 3 form a grating structure together, and finally the silicon-based III-V group submicron line grating is obtained.
Example 2
The silicon-based III-V submicron line laser is prepared by using the silicon-based III-V submicron line grating prepared in the embodiment 1, and the specific method is as follows:
Depositing silicon dioxide by utilizing a PECVD technology, opening an electrode window above the III-V submicron epitaxial structure 6, sputtering P electrode metal Ti/Au which can form ohmic contact with a P type InGaAs contact layer (doped contact layer 65), wherein the thickness of Ti is 20-200 nm, the thickness of Au is 100-1000 nm, and reserving the P electrode metal Ti/Au on the upper surface of the III-V submicron epitaxial structure 6 by utilizing a photoetching technology and a wet etching technology to obtain a P electrode (a first electrode 7); thinning the thickness of the doped silicon layer 2 to 50-200 mu m from the lower surface of the doped silicon layer 2, and preparing N electrode metal Sb/Au capable of forming ohmic contact with an N-type doped silicon material on the lower surface of the doped silicon layer 2, wherein the thickness of Sb is 20-200 nm, and the thickness of Au is 100-1000 nm, so as to obtain an N electrode (a second electrode 8); a silicon-based group III-V submicron line laser (as shown in fig. 10) was obtained by the above procedure.
The preparation methods provided in the above embodiments are all in the process of preparing the silicon-based III-V group submicron line grating and the silicon-based III-V group submicron line laser, and the preparation process of the grating structure can automatically complete the manufacture of the grating structure in the process of preparing the silicon optical device and the III-V group submicron line epitaxial structure 6, thereby reducing the process steps, being beneficial to reducing the manufacturing cost, being easier to mass production of the silicon-based III-V group submicron line laser, being beneficial to promoting the monolithic integration of the silicon-based III-V group submicron line laser and the silicon optical device, and having good application prospects.
The foregoing has outlined rather broadly the more detailed description of the application in order that the detailed description of the application that follows may be better understood, and in order that the present application may be better understood. It should be noted that it will be apparent to those skilled in the art that various modifications and adaptations of the application can be made without departing from the principles of the application and these modifications and adaptations are intended to be within the scope of the application as defined in the following claims.
Claims (10)
1. A silicon-based group III-V sub-nanowire grating, comprising:
doping the silicon layer;
The buried oxide layer is arranged on the surface of the doped silicon layer;
The refractive index perturbation structure is arranged on the surface of the buried oxide layer and comprises a first refractive index perturbation structure and a second refractive index perturbation structure;
The silicon dioxide layer is arranged on the surface of the buried oxide layer and covers the refractive index perturbation structure;
The groove between the first refractive index perturbation structure and the second refractive index perturbation structure comprises a selective groove and a V-shaped groove which are communicated with each other, the selective groove penetrates through the silicon dioxide layer and the buried oxide layer, the V-shaped groove is arranged in the doped silicon layer and consists of two Si {111} planes, and the width of the V-shaped groove at the contact surface of the V-shaped groove and the selective groove is not lower than the width of the selective groove;
and the III-V group submicron line epitaxial structure and the refractive index perturbation structure form a grating structure together.
2. The silicon-based III-V sub-nanowire grating of claim 1, wherein the selected region trench has a width of less than 1 μm, the selected region trench has a length of between 10 and 500 μm, and the selected region trench has a ratio of depth to width of greater than 1.
3. The silicon-based III-V sub-nanowire grating of claim 1, wherein a vertical distance between the first refractive index perturbation structure and a side surface of an adjacent selected region trench is d 1, wherein 0 < d 1 is less than or equal to 500nm; the vertical distance between the second refractive index perturbation structure and the side surface of the adjacent selective area groove is d 2, wherein d 2 is more than 0 and less than or equal to 500nm.
4. The silicon-based group III-V sub-nanowire grating of claim 1, wherein the grating structure is a partial grating or a distributed feedback grating.
5. The silicon-based III-V sub-nanowire grating of claim 1, wherein the III-V sub-nanowire epitaxial structure comprises at least a doped buffer layer, a lower cladding layer, a multi-quantum well active region, an upper cladding layer, and a doped contact layer in a direction away from the doped silicon layer.
6. The silicon-based III-V sub-nanowire grating of claim 5, wherein the multiple quantum well active region is located within the region of the selected region trench and between the first refractive index perturbation structure and the second refractive index perturbation structure.
7. The silicon-based group III-V sub-nanowire grating of claim 5, wherein the doping buffer layer has a doping type that is the same as a doping type in the doped silicon layer, opposite to a doping type in the doped contact layer.
8. A preparation method of a silicon-based III-V group submicron line grating is characterized by comprising the following steps:
Providing an SOI substrate;
Preparing a refractive index perturbation structure on a top silicon layer of the SOI substrate, and exposing a buried oxide layer of the SOI substrate in a region to be prepared of III-V group submicron lines, wherein the refractive index perturbation structure comprises a first refractive index perturbation structure and a second refractive index perturbation structure;
Depositing a silicon dioxide layer on the buried oxide layer, wherein the silicon dioxide layer covers the refractive index perturbation structure;
Preparing a region selection groove between the first refractive index perturbation structure and the second refractive index perturbation structure, wherein the region selection groove penetrates through the silicon dioxide layer and the buried oxide layer;
preparing a V-shaped groove in a bottom silicon layer of the SOI substrate; the V-shaped groove is communicated with the selective area groove to form an integrated groove;
And at least sequentially epitaxially growing a doped buffer layer, a lower cladding layer, a multi-quantum well active region, an upper cladding layer and a doped contact layer in the direction away from the V-shaped groove to form a III-V sub-micron line epitaxial structure.
9. The method of claim 8, wherein the step of fabricating the refractive index perturbation structure in the top silicon layer of the SOI substrate is performed simultaneously with the step of fabricating the silicon optical device in the top silicon layer of the SOI substrate.
10. Use of a silicon-based group III-V sub-nanowire grating according to any one of claims 1 to 7 or a method of preparation according to any one of claims 8 to 9 for the preparation of a monolithically integrated silicon-based group III-V sub-nanowire laser.
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