CN117955329A

CN117955329A - High-power factor high-efficiency DCM boost converter based on inductance-changing technology

Info

Publication number: CN117955329A
Application number: CN202410081138.2A
Authority: CN
Inventors: 姚凯; 薛磊; 李飞; 毛瑞鑫; 夏邦辉; 张晨阳; 于海鹏
Original assignee: Nanjing University of Science and Technology
Current assignee: Nanjing University of Science and Technology
Priority date: 2024-01-19
Filing date: 2024-01-19
Publication date: 2024-04-30

Abstract

The invention discloses a high-power factor and high-efficiency DCM (Discontinuous conduction mode, inductor current discontinuous mode) boost converter based on a inductance-changing technology. The converter comprises a main power circuit, a digital controller, a sampling circuit, a voltage control current source circuit and an isolation driving circuit, wherein the digital controller comprises an analog-to-digital conversion module, a digital-to-analog conversion module, a theta calculation module, a sensing value calculation module, a bias voltage calculation module, a digital PI module, a feedforward signal calculation module, a multiplier module and a EPWM generation module. According to the invention, the degree of freedom of the critical inductance value is increased by changing the inductance value; the DCM boost PFC (Power Factor Correction ) converter high power factor is realized, and the output voltage ripple is reduced; the switching period utilization rate of the converter is improved, the peak value and the effective value of the inductive current and the conduction loss of the switching tube are reduced, and the efficiency of the converter is improved; the utilization rate control of the full switching period reduces the inductance variation range and the inductance control difficulty.

Description

High-power factor high-efficiency DCM boost converter based on inductance-changing technology

Technical Field

The invention relates to the technical field of alternating current-direct current converters of electric energy conversion devices, in particular to a high-power factor and high-efficiency DCM boost converter based on a inductance transformation technology.

Background

The power factor correction (Power Factor Correction, PFC) converter can reduce input current harmonic wave, improve input power factor and improve electric energy quality. The DCM boost PFC converter is widely applied to low and medium power occasions because the boost switch tube Q _b is turned on with zero current and the boost diode D _b has no reverse recovery. The traditional DCM boost PFC converter controlled by the fixed duty ratio has constant switching frequency and simple control, but has intermittent stages of inductor current in the switching period, so that the peak value of the inductor current is high, the input power factor is low, and the converter efficiency is low. Therefore, scholars propose a duty ratio control, which can effectively reduce the higher harmonic of the input current and increase the PF value to be close to 1 in the whole 90V-264 VAC input voltage range, and the disadvantage is that the inductor current of the switching period still has an intermittent stage, the peak value and the effective value of the inductor current are larger, and the efficiency is lower.

Disclosure of Invention

Aiming at the defects of intermittent stage, larger inductance current peak value and effective value and lower efficiency of the inductance current of the switching period controlled by the variable duty ratio in the background technology, the invention provides a high-power factor high-efficiency DCM boost converter based on the inductance transformation technology, which realizes the remarkable improvement of the efficiency of the converter and the high power factor of the input current under the wide input voltage range of 90 VAC-264 VAC and solves the technical problems of low utilization rate of the switching period and larger inductance current peak value of the traditional control scheme.

The invention adopts the following technical proposal to realize the technical aim:

The utility model provides a high power factor high efficiency DCM boost converter based on become inductance technique which characterized in that: the boost converter comprises a DCM boost PFC converter main power circuit, a digital controller, a sampling circuit, a voltage control current source circuit and an isolation driving circuit; the digital controller comprises an analog-to-digital conversion module, a digital-to-analog conversion module, a theta calculation module, a sensing value calculation module, a bias voltage calculation module, a digital PI module, a feedforward signal calculation module, a multiplier module and a EPWM generation module.

The DCM boost PFC converter main power circuit comprises an input voltage source v _in, an EMI filter, a rectifier bridge RB, a variable boost inductor L _b, a boost switch tube Q _b, a boost diode D _b, an output capacitor C _o and a load R _L. The input voltage source V _in is connected with an input port of the EMI filter, an output port of the EMI filter is connected with an input port of the rectifying bridge RB, an output positive port of the rectifying bridge RB is connected with a variable boost inductor L _b in series and then is connected with a drain electrode of a boost switch tube Q _b and an input end of a boost diode D _b, two ends of a resistor R _i are connected with an inductive current sampling circuit, an output negative port of the rectifying bridge RB is connected with a source electrode of the boost switch tube Q _b, a negative end of an output capacitor C _o and a negative end of a load R _L, a negative port of the output capacitor C _o is a reference potential zero point, an output end of the boost diode D _b is connected with a positive end of the output capacitor C _o and a positive end of the load R _L, a grid electrode of the boost switch tube Q _b is connected with an isolation driving circuit, voltages at two ends of the load R _L are output voltages V _o, and two ends of the load R _L are connected with the output voltage sampling circuit;

The digital controller comprises an analog-to-digital conversion module, a digital-to-analog conversion module, a theta calculation module, a sensing value calculation module, a bias voltage calculation module, a digital PI module, a feedforward signal calculation module, a multiplier module and a EPWM generation module;

The analog-to-digital conversion module comprises a 2-path ADC (analog-to-digital converter), the sampling circuit comprises an input voltage sampling circuit and an output voltage sampling circuit, the input voltage sampling circuit collects rectified input voltage V _g and sends collected signals to the theta calculation module, the inductance calculation module and the feedforward signal calculation module, the output voltage sampling circuit collects output voltage V _o and enters the digital PI module through the third path ADC2 converter, the output results of the feedforward signal calculation module and the digital PI module enter the multiplier module and then are output to the EPWM generation module, the EPWM generation module outputs PWM signals to enter the isolation driving circuit, the theta calculation module calculates an electrical angle theta and sends the signals to the inductance calculation module, the inductance calculation module sends the calculated inductance values to the bias voltage calculation module, and the bias voltage calculation module calculates bias voltage signals and outputs the bias voltage signals through the DAC1 converter; the output end of the DAC1 converter is connected with the positive input end of an operational amplifier of the voltage control current source circuit, the output end of the voltage control current source is connected with the control end of the variable boost inductor L _b, and the output port of the isolation driving circuit is connected with the grid electrode of the boost switching tube Q _b of the main power circuit;

The voltage control current source circuit comprises an amplifier IC ₁, a first resistor R ₁, a second resistor R ₂, a first capacitor C ₁ and an MOS tube, wherein the positive input end of the first operational amplifier IC ₁ is connected with the DAC1 port of the digital controller, the reverse output end of the first operational amplifier IC ₁ is connected with the source electrode s end of the first MOS tube and one end of the first capacitor C ₁, the reverse output end of the first operational amplifier IC ₁ is connected with the other end of the first capacitor C ₁ and one end of the first resistor R ₁, the other end of the first resistor R ₁ is connected with the gate electrode g end of the MOS tube, the drain electrode d end of the MOS tube is the output end of the voltage control current source, the source electrode s end of the MOS tube is connected with one end of the second resistor R ₂, the other end of the second resistor R ₂ is connected with the reference digital potential zero point, and the output end of the voltage control current source is connected with the variable boosting inductor L _b of the main power circuit;

The isolation driving circuit selects a UCC23313 driving chip, and the digital controller uses a DSP28335 or DSP28377 MCU chip;

The amplifier used in the first operational amplifier IC ₁ is an operational amplifier of model TL074, TL072, LM358 or LM 324;

the high-power factor high-efficiency DCM boost converter based on the inductance transformation technology is characterized by comprising the following steps:

step 1, an analog-to-digital conversion circuit is provided with 2 paths of ADC converters, a sampling circuit is provided with an input voltage sampling circuit and an output voltage sampling circuit, and a digital-to-analog conversion module is provided with 1 paths of DAC converters;

In the step 2, in the sampling circuit, an input voltage sampling circuit collects the rectified input voltage V _g, and sends the collected signal to a theta calculation module, a sensing value calculation module and a feedforward signal calculation module, an output voltage sampling circuit collects the output voltage V _o and enters a digital PI module through a third path ADC2 converter, the output results of the feedforward signal calculation module and the digital PI module enter a multiplier module and then are output to a EPWM generation module, a EPWM generation module outputs PWM signals to enter an isolation driving circuit, the theta calculation module calculates an electrical angle theta and sends the signals to the sensing value calculation module, the sensing value calculation module sends the calculated inductance value to a bias voltage calculation module, and the bias voltage calculation module calculates a bias voltage signal and outputs the bias voltage signal through a DAC1 converter;

Step 3, a V _{o_ref} signal entering the digital PI module, wherein the specific value of the V _{o_ref} signal is determined by the voltage division coefficient of the output voltage sampling circuit and the target output voltage value;

step 4, specific formulas of the theta calculation module and the inductance calculation module are given in the specification;

And step 5, the DAC digital-to-analog converter inputs the bias voltage signal v _bias to the same-directional input end of the operational amplifier IC ₁ of the voltage control current source, and outputs bias current from the d end of the switching tube of the voltage control current source to the boosting variable inductor.

Compared with the prior art, the invention has the following beneficial effects:

(1) The control mode of variable inductance is adopted, so that the limitation of fixed critical inductance value of the traditional control circuit is overcome, and the degree of freedom is increased;

(2) The high power factor of the converter and the effect of small output voltage ripple are realized;

(3) The utilization rate of the switching period of the converter reaches 1, the peak value and the effective value of the inductive current are reduced, the conduction loss of a switching tube is reduced, and the efficiency of the converter is improved;

(4) The inductance variation range is reduced relative to FUUPFC, and the inductance control difficulty is reduced.

Drawings

Fig. 1 is a schematic diagram of a main circuit of a DCM boost PFC converter according to an embodiment of the present invention.

Fig. 2 is a waveform diagram of inductor current and switching tube of a DCM boost PFC converter in one switching cycle according to an embodiment of the present invention.

Fig. 3 is a graph of critical inductance versus input voltage for fixed duty cycle control and variable duty cycle control in an embodiment of the present invention.

FIG. 4 is a plot of switching cycle utilization over a half power frequency cycle for a fixed duty cycle control and a variable duty cycle control at different input voltages in an embodiment of the present invention.

Fig. 5 is a graph showing inductance change curves of FUUPFC in a half power frequency period according to an embodiment of the present invention.

Fig. 6 is a plot of I _{Lb_rms_FUQUPFC} as a function of θ for example FUQUPFC of the present invention.

FIG. 7 is a graph showing PF versus θ for FUQUPFC in an example of the present invention.

Fig. 8 is a plot of L _b1 as a function of θ for example FUQUPFC of the present invention.

Fig. 9 is a graph showing the variation of L _b1 with input voltage for FUQUPFC in an embodiment of the present invention.

Fig. 10 is a plot of the input voltage as a function of electrical angle fitted at FUQUPFC for L _b1＝L_{b_FUQUPFC_max} in an embodiment of the invention.

Fig. 11 is a plot of L _{b2_min} as a function of θ for example FUQUPFC of the present invention.

FIG. 12 is a graph showing the variation of L _{b2_min} with input voltage for FUQUPFC in an embodiment of the present invention.

Fig. 13 is a plot of θ _FUQUPFC as a function of λ _{FUQUPFC_max} fitted at FUQUPFC in an example of the invention.

Fig. 14 is a plot of inductance FUQUPFC (λ=5) over a half-power frequency period in an embodiment of the present invention.

Fig. 15 is a variation curve of the inductance value QFUUPFC (λ=5) in a half power frequency period in the embodiment of the present invention.

FIG. 16 is a graph of PF versus input voltage for various controls in an embodiment of the present invention.

Fig. 17 is a graph showing the change of the switching cycle utilization of different controls (V _rms =220v) within a half power frequency cycle in an embodiment of the present invention.

Fig. 18 is a graph showing the peak inductor current for different controls (V _rms =220V) over a half-frequency period in an embodiment of the present invention.

Fig. 19 is a graph showing the effective value of inductor current with input voltage for different controls in an embodiment of the present invention.

Fig. 20 is a graph showing the variation of the unit value of the instantaneous input power of different controls (V _rms =220v) in a half power frequency period according to the embodiment of the present invention.

Fig. 21 is a graph showing output voltage ripple versus input voltage for different controls in an embodiment of the present invention.

Fig. 22 is a general schematic diagram of the operating circuit of the high power factor high efficiency DCM boost converter of the present invention based on a inductance varying technique.

Main symbol names in the above figures: v _in: supply voltage, i _in: input current, RB: rectifier bridge, v _g: input voltage after rectifier bridge, i _Lb: boost inductor current, L _b: boost inductance, Q _b: boost switching tube, D _b: boost diode, C _o: output capacitance, R _L: load, V _o: output voltage, i _{Lb_pk}: boost inductor current peak, i _Lb: boost inductor current waveform, D _y: duty cycle of on time of boost switching tube, D _R: duty cycle, T _s, of inductor current drop period: switching period of boost switching tube, i _{Lb_avg}: boost inductor current average, T _line: period of input voltage, PF: converter power factor, V _rms: input voltage effective value, ω: input voltage angular frequency, L _{b_FUQUPFC}: FUQUPFC variable inductance, L _{b_QFUUPFC}: QFUUPFC variable inductance. V _m: input voltage amplitude, l ₁: auxiliary winding, l ₃: main winding, l _g: air gap effective magnetic path length, a ₁: effective cross-sectional area of auxiliary core, a ₃: effective cross-sectional area of main core, Φ _bias: bias winding current corresponds to magnetic flux, Φ _Lb: the main winding current corresponds to the magnetic flux, N _L: main inductance winding, N _C: auxiliary winding, mu ₀: effective permeability of main winding air gap, μ ₁: effective permeability of the auxiliary winding, μ ₃: effective permeability of main winding, i _bias: bias winding current, D _y: the actual duty cycle of the converter,Instantaneous input power per unit value of converter,/>Instantaneous input power per unit value of a duty cycle control converter,/>FUQUPFC instantaneous input power per unit value,/>QFUUPFC instantaneous input power per unit value, ωt ₁: electric angle, ωt ₂ of intersection point of instantaneous input power per unit value and reference value under fixed duty ratio control: the electrical angle at the intersection of the per unit value of the instantaneous input power of FUQUPFC and the reference value, ωt ₃: QFUUPFC electric angle at the intersection of the instantaneous input power per unit value and the reference value, Δv _{o_CDCC}: output voltage ripple value under fixed duty cycle control, Δv _{o_FUQUPFC}: output voltage ripple value at FUQUPFC, Δv _{o_QFUUPFC}: the output voltage ripple value at QFUUPFC.

Detailed Description

The present invention is described below based on examples, but the present invention is not limited to only these examples. In the following detailed description of the present invention, certain specific details are set forth in detail. The present invention will be fully understood by those skilled in the art without the details described herein. Well-known methods, procedures, flows, components and circuits have not been described in detail so as not to obscure the nature of the invention.

The design parameters of the converter are as follows: input voltage v _in: 90 VAC-264 VAC/50Hz; output voltage V _o: 400V; output power P _o: 120W; switching frequency f _s of the converter: 100kHz; output capacitance: 220uF;1DCM boost PFC converter.

The operation of the variable duty cycle controlled DCM boost PFC converter will be described with reference to fig. 1-4.

Setting: 1. all devices are ideal elements; 2. the output voltage ripple is small compared with the direct current thereof, and is ignored in the analysis in the switching period; 3. the switching frequency is much higher than the input voltage frequency.

Fig. 2 shows the switching tube drive waveform and inductor current waveform for one switching cycle of the converter. When the boost switching tube Q _b is turned on, the boost diode D _b is turned off, the voltage across the boost inductor L _b is the LC post-filter voltage v _g, the current i _Lb thereof starts to rise linearly from zero with the slope of v _g/L_b, and the load R _L is powered by the output capacitor C _o. When Q _b is off, D _b is on, i _Lb freewheels through D _b, the voltage across L _b is v _g-V_o,i_Lb (v _g-V_o)/L_b, i _Lb drops to zero, load R _L is supplied by output capacitor C _o, and i _Lb remains zero until the next switching cycle.

Without loss of generality, the expression defining the input ac voltage v _in is:

v_in＝V_msinωt (1)

where V _m and ω are the amplitude and angular frequency of the input AC voltage, respectively.

The input voltage rectified, LC filter-passed voltage v _g is:

v_g＝V_m|sinωt| (2)

In one switching cycle, the inductor current peak i _{Lb_pk} is:

where D _y represents the duty cycle corresponding to the on-time of the switching tube Q _b and T _s represents the switching period of the converter.

In each switching period, the two ends of the inductor L _b meet the balance of volt-second areas, and the expression of the D _R can be obtained as follows:

Where V _o represents the output voltage and D _R represents the duty cycle corresponding to the inductor current drop time when the switching transistor Q _b is turned off.

From equations (3) and (4), the inductor current average i _{Lb_avg} over one switching period is available:

Where f _s denotes the switching frequency.

The input current of the converter i _in, which is obtained by equation (5):

According to equations (1) and (6), the average input power P _{in_CDCC} of the converter under the duty cycle control can be determined as:

Assuming a converter efficiency of 100%, then the average input power P _in is equal to the output power P _o, and the duty cycle D _{y_CDCC} under the duty cycle control is available as:

Substituting equation (8) into equation (6) yields an input current i _{in_CDCC} under duty cycle control:

from equation (9), the input current for conventional duty cycle control is a non-sinusoidal waveform.

The power factor PF is expressed as:

Where V _{in_rms} and I _{in_rms} represent the input voltage effective value and the input current effective value, respectively.

Ideally the average input power is equal to the average output power, and the combination (10) may have when the PF value is 1:

The input current i _{in_VDCC} under the control of the variable duty cycle by equation (11) is:

the variable duty cycle control of the combination formula (6) and the formula (12) is D _{y_VDCC}:

If the duty ratio is changed according to equation (13), the input current of the DCM boost PFC converter has a sinusoidal waveform as shown in equation (12), and the unit PF can be reached.

In order to analyze the inductive energy transferred in the switching cycle, the concept of the switching cycle utilization β is proposed, which is defined as the ratio of the sum of the rise time and the fall time of the inductive current to the entire switching cycle. The definition of the switching cycle utilization is available:

β＝D_y+D_R (14)

Substitution of formula (4) into (14) yields:

Substituting the expression (8) and the expression (13) into the expression (15) can obtain the switching cycle utilization expression under the fixed duty ratio control and the variable duty ratio control:

To ensure that the converter operates in DCM mode, the condition β.ltoreq.1 should be satisfied, and the critical inductances of the two control methods available in combination of equation (16) and equation (17) are:

as can be seen from the formulas (18) and (19), the critical inductance is minimized at pi/2, so that the minimum critical inductance expressions of the two control methods are respectively:

substituting the converter design parameters into (and the same will apply when drawing below) equations (20) and (21) can draw the minimum critical inductance change curves of the two control modes as shown in fig. 3, and it can be seen that the minimum critical inductance value under the duty cycle control is 98 μh, and the minimum critical inductance under the duty cycle control is 193 μh.

Substituting L _{b_CDCC} =98muh and L _{b_VDCC} =193 muh into equation (16) and equation (17) can draw a switching cycle utilization curve for a half of a power frequency period under different input voltages, as shown in fig. 4, it is seen that the switching cycle utilization of the variable duty cycle control is improved under different input voltages compared with the fixed duty cycle control, the power transmission is more balanced, but the switching cycle utilization near the electrical angle of 0 or pi still has a large improvement space.

A control strategy for improving the switching cycle utilization rate based on the inductance transformation technology will be described with reference to fig. 5 to 15.

The full switching period utilization unit power factor control is available from equation (15), and the duty ratio expression for achieving full switching period utilization is:

as can be seen from the equation (19), if the inductance value is changed as follows:

Not only can the switching cycle utilization be 1 be achieved and a unity power factor is achieved, i.e. Full switching cycle utilization unity power factor control (Full SWITCHING CYCLE utilization unit power factor control, FUUPFC).

A change curve of FUUPFC inductance in half a power frequency period can be plotted according to equation (23), as shown in fig. 5. From the graph, the variation range of the inductance is continuously increased along with the increase of the input voltage, which increases the design and implementation difficulty of the variable inductance. Therefore, it is considered that only a portion with a small range of variation of the intermediate inductance is reserved, the corresponding electrical angle ranges are [ theta, pi-theta ], and a portion with a large range of variation of the inductance at both ends keeps the inductance value unchanged, and the corresponding electrical angle ranges are [0, theta ] and [ pi-theta, pi ]. The input current in [0, theta ] and [ pi-theta, pi ] is i _in1, the inductance is L _b1, the input power is P _o1, the input current in [ theta, pi-theta ] is i _in2, the inductance is L _b2, and the input power is P _o2. Obviously, keeping L _b1 unchanged will lose the possibility of simultaneously achieving Full switching cycle utilization and unit PF, so two control methods, full switching cycle utilization Quasi-unit power factor control (Full SWITCHING CYCLE utilization Quasi-unit power factor control, FUQUPFC) and Quasi-Full switching cycle utilization unit power factor control (Quasi Full SWITCHING CYCLE utilization unit power factor control, QFUUPFC) can be differentiated for different control purposes, such as high efficiency and high PF.

The full switching cycle utilization quasi-single power factor control, the duty ratio should be equation (22) if the full switching cycle utilization is to be obtained, and the equation (22) is substituted into equation (6) to obtain:

The amplitude of sinusoidal current i _in2 cannot be known according to equation (24), so it is assumed that:

i_in2＝ksinωt (25)

substituting equation (24) and equation (25) into the power balance expression yields:

Can be deduced from formula (26):

Substituting formula (27) into formula (25) and then examining formula (24) yields an expression of L _b2 for L _b1:

L _b1, which is equal to L _b1 at θ and can be deduced to be within [0, θ ] and [ pi- θ, pi ], from L _b2:

substituting formula (29) into formula (28) yields L _b2 within [ θ, pi- θ ]:

Substituting formula (29) and formula (30) into formula (24) yields i _{in_FUQUPFC} as:

Substituting equations (22), (29) and (30) into equation (44) can plot the effective inductor current value as a function of θ as shown in fig. 6, and it can be seen that the effective inductor current value increases monotonically with θ at any input voltage.

Substituting equation (31) into equation (10) can plot the change of PF with θ as shown in fig. 7, and it can be seen that PF monotonically decreases with θ regardless of the value of the input voltage. It can be seen from fig. 6 and 7 that the smaller the value of θ, the more advantageous it is to improve efficiency and PF, so that the value of θ should be minimized at different input voltages.

The relationship between L _b1 and θ and the input voltage can be plotted according to equation (29) as shown in fig. 8 and 9. As can be seen from fig. 8, L _b1 decreases monotonically with increasing θ at any input voltage, and in combination with the analysis of fig. 6 and 7, it is apparent that the maximum inductance L _{b_FUQUPFC_max} should be obtained for L _b1 at different input voltages. It can be seen from fig. 9 that L _b1 does not have monotonicity over part of the electrical angle range, i.e. the input voltage of L _b1＝L_{b_FUQUPFC_max} is made to vary continuously with electrical angle. From the following componentsThe effective value of the obtained L _{b_FUQUPFC_max} at the input voltage is in the range of 264V [0, pi/3.785 ], which is expressed by/>No solution is known at/>At any electrical angle/>Maximum, byObtaining the relation between the input voltage and the electrical angle when the effective value of the input voltage of L _{b_FUQUPFC_max} is 221V and is [ pi/2.108, pi/2 ], and fitting the relation between the input voltage and the electrical angle when L _b1＝L_{b_FUQUPFC_max} is within [ pi/3.785, pi/2.108 ] according to the data obtained by the formula (29), and finally obtaining the three-phase capacitor:

The degree of fitting of the fitted expression to the actual data is shown in fig. 10.

Substituting formula (32) into formula (29) yields an expression of L _{b_FUQUPFC_max} for θ:

From formula (30), it can be seen that L _b2 takes a minimum at pi/2, i.e., L _{b2_min} is:

The relationship between L _{b2_min} and θ and the input voltage, respectively, can be plotted according to equation (34), as shown in fig. 11 and 12. From fig. 11, it can be seen that L _{b2_min} increases monotonically with increasing θ at different input voltages, and from an analysis of fig. 8, the inductance variation range decreases monotonically with increasing θ at any input voltage.

As can be seen from fig. 12, at any electrical angle, L _{b2_min} is a function that monotonically increases and then monotonically decreases with the input voltage, so that the minimum inductance value L _{b_FUQUPFC_min} is obtained at 90V or 264V of the effective input voltage. Then fromThe expression of L _{b_FUQUPFC_min} available is:

Let the maximum inductance change multiple be λ _{FUQUPFC_max}:

Substituting equation (29) and equation (34) into equation (36) can fit the expression of θ _FUQUPFC with respect to λ _{FUQUPFC_max} accordingly as follows, and a comparison of the fitted curve and the actual curve is drawn, as shown in fig. 13.

When the maximum inductance change multiple lambda _{FUQUPFC_max} is determined, the electric angle theta _FUQUPFC corresponding to L _{b_FUQUPFC_max} can be obtained according to the formula (37), then L _{b_FUQUPFC_max} can be obtained according to the formula (29) and the formula (33), and finally the expression of theta relative to V _m can be fitted by the formula (_{b_FUQUPFC_max}＝L_b1(V_m, theta), wherein the application range of the formula is determined by the formula (30). Taking the example that the maximum inductance change multiple is five times, the method can be used for obtaining:

Substituting equation (38) into equations (29) and (30) can plot FUQUPFC the inductance change curve over half the power frequency period when the maximum inductance change range is five times, as shown in fig. 14.

The quasi-full switching cycle utilization unit PF control QFUUPFC uses FUUPFC at [ theta, pi-theta ] to achieve the region PF is 1 and the switching cycle utilization is 1, and uses variable duty cycle control at [0, theta ] and [ pi-theta, pi ] to achieve the full range unit PF.

L _{b_QFUUPFC}, which is obtainable from the formulae (21) and (23), is:

Substituting formula (39) into formula (13) yields D _{y_QFUUPFC} as:

From FIG. 3, L _{b_QFUUPFC_min} in combination with formula (39) yields λ _{QFUUPFC_max} as:

The expression of θ with respect to V _m can be obtained according to equation (41), the applicable range of which is determined by equation (30), and finally:

Substituting equation (42) into equation (39) can draw QFUUPFC a change curve of inductance in half a power frequency period when the maximum inductance change range is five times, as shown in fig. 15.

Next, a control circuit will be described. The invention provides a high-power factor and high-efficiency DCM boost converter based on a variable inductance technology, which solves the problems of low input current power factor, large switching cycle utilization rate change range and low utilization rate in a half power frequency period, large inductance current peak value and effective value and low converter efficiency in the traditional constant/variable duty ratio control. By adopting full-switch period utilization rate optimal control, input current can track a reference sinusoidal signal well, input current sinusoidal is realized, bias voltage control signals are generated according to a theta calculation module, a sensing value calculation module and a bias voltage calculation module, and the bias voltage control signals are sent to a voltage control current source circuit through a digital-to-analog converter, so that sectional change of an inductor is controlled.

The utility model provides a high power factor high efficiency DCM boost converter based on become inductance technique which characterized in that: the digital control device comprises a DCM boosting PFC converter main power circuit, a digital controller, a sampling circuit, a voltage control current source circuit and an isolation driving circuit, wherein the digital controller comprises an analog-to-digital conversion module, a digital-to-analog conversion module, a theta calculation module, a sensing value calculation module, a bias voltage calculation module, a digital PI module, a feedforward signal calculation module, a multiplier module and a EPWM generation module;

The main power circuit includes an input voltage source v _in, an EMI filter, a rectifier bridge RB, a variable boost inductance L _b, a boost switching tube Q _b, a boost diode D _b, an output capacitor C _o, and a load R _L. The input voltage source V _in is connected with an input port of the EMI filter, an output port of the EMI filter is connected with an input port of the rectifying bridge RB, an output positive port of the rectifying bridge RB is connected with a variable boost inductor L _b in series and then is connected with a drain electrode of a boost switch tube Q _b and an input end of a boost diode D _b, two ends of a resistor R _i are connected with an inductive current sampling circuit, an output negative port of the rectifying bridge RB is connected with a source electrode of the boost switch tube Q _b, a negative end of an output capacitor C _o and a negative end of a load R _L, a negative port of the output capacitor C _o is a reference potential zero point, an output end of the boost diode D _b is connected with a positive end of the output capacitor C _o and a positive end of the load R _L, a grid electrode of the boost switch tube Q _b is connected with an isolation driving circuit, voltages at two ends of the load R _L are output voltages V _o, and two ends of the load R _L are connected with the output voltage sampling circuit;

The isolation driving circuit can be selected from driving chips of UCC23313 and other types, and the digital controller can use MCU chips of DSP28335 or DSP28377 and the like;

The amplifier used in the first operational amplifier IC ₁ is an operational amplifier of model TL074, TL072, LM358 or LM324, etc.;

The implementation method of the high-power factor high-efficiency DCM boost converter based on the inductance transformation technology comprises the following steps:

In connection with the specific embodiments and with fig. 16-21, it can be seen that the novel control has the following advantages:

(1) Improvement of power factor

Substituting equation (9), equation (12), equation (31) and equation (38) into equation (10) can draw PF curves under different controls, as shown in fig. 16. As can be seen from the graph, the PF value increasing effect of FUQUPFC and QFUUPFC is remarkable, in which QFUUPFC reaches the unit PF.

(2) Improvement of the utilization rate of the switching period

Substituting equation (8), equation (22), equation (40) and equation (42) into equation (15) yields a switching cycle utilization change curve under different control, and fig. 17 is drawn by taking 220V as an input voltage effective value as an example. As can be seen from fig. 17, the switching cycle utilization of FUQUPFC and QFUUPFC is greatly improved with respect to CDCC, wherein FUQUPFC achieves full switching cycle utilization.

(3) Inductor current peak reduction

Substituting the three controlled duty ratio expressions and inductance value expressions into the expression (3) to draw inductance current peak envelope change curves under different control, and drawing fig. 18 by taking an input voltage effective value of 220V as an example, the inductance current peak values of FUQUPFC and QFUUPFC are both greatly reduced compared with CDCC.

(4) Reduction of inductor current effective value

The effective value of the inductance current in one switching period can be obtained by the analysis of the working principle:

Then, the effective value of the inductor current in one power frequency period is:

Substituting the three controlled duty ratio expressions and the inductance value expressions into the expression (44) can draw the effective inductance current value change curves under the three controls as shown in fig. 19, and it can be seen that the effective inductance current values of FUQUPFC and QFUUPFC are smaller than CDCC, which is beneficial to reducing the conduction loss of the switching tube and improving the converter efficiency.

(5) Reduction of output voltage ripple

When CDCC is used, the instantaneous input power per unit value of the converter can be obtained by the formulas (1) and (6)The method comprises the following steps:

/>

when FUQUPFC is used, it is obtained from the formulae (1) and (31) The method comprises the following steps:

Obtainable from formulae (1) and (12) The method comprises the following steps:

substituting the formula (38) into the formula (46) and combining the formulas (45) and (47) can draw a change curve of the instantaneous input power per unit value in a half power frequency period under three different control modes, and drawing a graph 20 by taking an input voltage effective value of 220V as an example. When (when) When the energy storage capacitor C _o is charged; when/>At this time, C _o discharges. Under the three control modes, the maximum energy per unit value stored in the output capacitor C _o in the half power frequency period (the reference value is the output energy in the half power frequency period) is respectively:

According to the calculation formula of the capacitor energy storage, And/>Can be expressed as:

/>

The output voltage ripple obtained from equations (51), 52 and 53 is:

Three curves of the output voltage ripple with the input voltage under control can be plotted from equations (54), (55) and (56) as shown in fig. 21, and it can be seen that the output voltage ripple of FUQUPFC and QFUUPFC is significantly reduced.

In summary, the invention discloses a high power factor and high efficiency DCM boost converter based on a inductance varying technology, and the general schematic diagram of the working circuit is shown in FIG. 22.

The above embodiments are only for illustrating the technical solution of the present invention, and not for limiting the same; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the invention.

Claims

1. The utility model provides a high power factor high efficiency DCM boost converter based on become inductance technique which characterized in that: the boost converter comprises a DCM boost PFC converter main power circuit, a digital controller, a sampling circuit, a voltage control current source circuit and an isolation driving circuit; the digital controller comprises an analog-to-digital conversion module, a digital-to-analog conversion module, a theta calculation module, a sensing value calculation module, a bias voltage calculation module, a digital PI module, a feedforward signal calculation module, a multiplier module and a EPWM generation module.

2. The high power factor high efficiency DCM boost converter based on inductance technology of claim 1, wherein: the main power circuit comprises an input voltage source v _in, an EMI filter, a rectifier bridge RB, a variable boost inductor L _b, a boost switch tube Q _b, a boost diode D _b, an output capacitor C _o and a load R _L.

3. The high power factor high efficiency DCM boost converter based on inductance technology of claim 1, wherein: the analog-to-digital conversion module comprises a 2-channel ADC converter.

4. The high power factor high efficiency DCM boost converter based on inductance technology of claim 1, wherein: the sampling circuit comprises an input voltage sampling circuit and an output voltage sampling circuit; the voltage control current source circuit comprises an amplifier IC ₁, a first resistor R ₁, a second resistor R ₂, a first capacitor C ₁ and a MOS tube.

5. The high power factor high efficiency DCM boost converter based on inductance technology of claim 5, wherein: the amplifier used in the first operational amplifier IC ₁ is an operational amplifier of model TL074, TL072, LM358 or LM 324.

6. The high power factor high efficiency DCM boost converter based on inductance technology of claim 1, wherein: the isolation driving circuit is required to select a UCC23313 type driving chip; the digital controller needs to use a MCU chip of the model number of DSP28335 or DSP 28377.

7. The high power factor and high efficiency DCM boost converter based on inductance technology of claim 1, wherein the specific implementation method includes the following steps: