CN117954511A - Groove electrode single photon avalanche array, sensor and preparation method - Google Patents
Groove electrode single photon avalanche array, sensor and preparation method Download PDFInfo
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Abstract
The invention provides a groove electrode single photon avalanche array, a sensor and a preparation method, wherein the groove electrode single photon avalanche array comprises an epitaxial layer and a plurality of groove structures, wherein the surfaces of the groove structures are transversely and longitudinally arranged; forming a first heavily doped region and an avalanche injection region on two sides of the groove structure through ion angle injection respectively, and filling a passivation substance in the groove structure; the first heavily doped region leads out a first electrode; the epitaxial layer also comprises a second heavily doped region and a second electrode led out of the second heavily doped region. The single photon avalanche array forms an active area by ion angle injection at two sides of the groove structure, the active area is small and is arranged around a cell, the photon detection efficiency is ensured, the dark count rate is reduced, the number of photoetching plates of devices in a wafer flow process is reduced, the process flow is simplified, the overall reliability of the sensor is improved, and the single photon avalanche array can be applied to infrared radiation detection or weak light detection.
Description
Technical Field
The invention belongs to the technical field of avalanche array sensors, and particularly relates to a trench electrode single photon avalanche array, a sensor and a preparation method.
Background
Silicon photomultiplier is particularly useful for the detection of weak light. Weak photodetector technology has long been very important applications in the fields of optical detection, high-energy physics, astrophysics, and nuclear medicine imaging. The weak light sensor most widely used today is mainly a photomultiplier tube (PMT). However, PMTs are limited in their applications in many areas due to their large size, high operating voltage, high power consumption, easy damage, and limited detection efficiency by photocathodes, sensitivity to magnetic field changes, and inapplicability to large-scale detection arrays. SPAD (Single Photon Avalanche Diode ) operating in geiger mode can be used to detect photons, so SPAD-based area array sensors are widely used in laser ranging, lidar imaging, three-dimensional depth-of-flight time imaging and other technologies, which are highly focused by researchers in the field of weak light detection and now become a research hotspot in the technical field of weak light detectors.
The basic structure of a single cell of the SPAD array photoelectric conversion sensor is shown in fig. 1, and the single cell comprises a wafer substrate n+ region 101, an epitaxial layer N-region 102, a light incidence end p+ region 103, a protection ring P-region 104, an anode lead-out end 106 and a cathode lead-out end 108. The SPAD depletion layer of each pixel cell has a high electric field after the SPAD is reverse biased (typically tens to tens of volts). Compton scattering occurs after photons enter the SPAD, valence electrons of the semiconductor are excited into free electrons, the generated free electrons are accelerated in an electric field, a large number of secondary electrons are generated, and electron multiplication is realized through avalanche discharge. At this time, the current in each micro-circuit suddenly increases, and an electrical signal is formed at the output terminal. The amount of charge Q output by a single SPAD. The quantity of the incident photons is not reflected, and the capacitance of the pixel point is only related to the threshold voltage; however, since the area of each pixel is small (typically on the order of tens to tens μm), when the number of incident photons is much smaller than the sum of pixels of the SPAD, the probability of 2 or more photons entering the same pixel is small, which gives the SPAD the ability to resolve a single photon.
The method is mainly used for weak light detection, ray measurement and detection, industrial automatic control, photometry and the like; when it is used in infrared band, it is mainly used in the fields of missile guidance, infrared thermal imaging instrument and infrared remote sensing, etc. In addition, the method can be applied to a single photon information carrier receiving end of quantum communication and can obtain true random numbers to realize quantum secret communication security key distribution.
The main performance indexes of the SPAD are as follows: detection efficiency and dark count rate. Wherein the detection efficiency directly affects the single photon detection performance. Photon Detection Efficiency (PDE) of SPAD is mainly composed of three factors: quantum detection efficiency (QE), fill factor of light entrance (FF) and photo-generated carrier trigger avalanche probability (P T) can be expressed as:
PDE＝QE×FF×PT
Wherein the photo-generated carrier trigger avalanche probability (P T) is affected by the device structure; the Filling Factor (FF) of the light inlet is mainly affected by the layout of the quenching resistor (R Q), the top extraction electrode and the pixel isolation structure, and is difficult to reach 100%. And the Filling Factor (FF) of the light inlet is reduced along with the increase of the number of pixels in unit area, thereby affecting the quantum detection efficiency.
The Dark Counts (DCR) of SPADs are divided into primary dark counts and secondary dark counts, the primary dark counts are generated by the reasons including diffusion of neutral region carriers, generation of depletion region hot carriers and inter-band tunneling, and the secondary dark counts are mainly caused by the post-pulse phenomenon. As CMOS process dimensions decrease, the SPAD depletion layer becomes thinner and the electric field strength increases accordingly. Carriers generated by inter-band tunneling may trigger avalanche with a certain probability, so inter-band tunneling is a main cause of dark counts. And the carrier generation rate (C GR) in the band-to-band tunneling process is in direct proportion to the area of the active region (PN junction avalanche region) of the SPAD.
The improvement of the performance of the SPAD needs to improve the detection efficiency and reduce the dark count rate at the same time, but the effective detection efficiency and the dark count rate of the current SPAD sensor device structure are generally in direct proportion, so how to optimally design the SPAD device structure is very critical.
Disclosure of Invention
The invention aims to provide a single photon avalanche array of a trench electrode, a sensor and a preparation method, wherein the single photon avalanche array forms an active region on two sides of a trench structure through ion angle injection, the active region is small in area and is arranged around a cell, so that the dark count rate can be reduced while the photon detection efficiency is ensured, the number of photoetching plates of devices in a wafer flow process is reduced, the process flow is simplified, the overall reliability of the sensor is improved, and the single photon avalanche array can be applied to infrared radiation detection or weak light detection.
In order to achieve the above purpose, the invention provides a trench electrode single photon avalanche array, which comprises an epitaxial layer, wherein a plurality of trench structures are transversely and longitudinally arranged on one side surface of the epitaxial layer, and the epitaxial layer is divided into a plurality of cell structures; forming a first heavily doped region close to the side wall surface of the groove structure and an avalanche injection region far away from the side wall surface of the groove structure by ion angle injection at two sides of the groove structure, wherein the groove structure is filled with a passivation substance; the first heavily doped region leads out a first electrode from the opening of the groove structure; and one side of the epitaxial layer, which is provided with the groove structure, also comprises a second heavily doped region, and the second heavily doped region leads out a second electrode.
Further, the epitaxial layer, the avalanche injection region and the second heavily doped region are of N type, and the first heavily doped region is of P type; or the epitaxial layer, the avalanche injection region and the second heavily doped region are of P type, and the first heavily doped region is of N type;
The passivation filled in the groove structure is silicon dioxide or silicon nitride;
the first electrode and the second electrode are made of metal or heavily doped polysilicon.
Further, the resistivity of the epitaxial layer is between 0.01 and 10 omega cm, and the thickness is between 1 and 400 mu m;
The depth of the groove structure is between 1 and 350 mu m, and the width is between 0.5 and 10 mu m;
the distance between the upper surface of the passivation in the groove structure and the surface of the array structure is 0.1-5 mu m;
The depth of the avalanche injection region from the side wall surface of the groove structure is between 0.5 and 3 mu m, and the peak doping concentration range is 1 multiplied by 10 16/cm3～1×1018/cm3;
The depth of the first heavily doped region from the side wall surface of the deep trench structure is between 0.2 and 1 mu m, and the peak doping concentration range is 1 multiplied by 10 18/cm3～1×1020/cm3;
the peak doping concentration of the second doping region ranges from 1 x 10 18/cm3～1×1020/cm3.
The invention also provides a sensor of the trench electrode single photon avalanche array, which further comprises a readout electronics chip, wherein the surface of the trench electrode single photon avalanche array comprises an electrode provided with a passivation layer, the readout electronics chip is inversely packaged on the passivation layer, the first electrode is connected with a signal processing circuit of the readout electronics chip, and the signal processing circuit is led out through an electrode lead-out wire; the second electrode is directly led out through an electrode lead-out wire; and an anti-reflection layer grows on the surface of one side of the epitaxial layer, which is far away from the groove structure.
Further, the passivation layer is silicon dioxide or silicon nitride with the thickness ranging from 0.1 to 0.5 mu m, and the anti-reflection layer is silicon dioxide or silicon nitride with the thickness ranging from 0.05 to 0.2 mu m; the thickness of the read-out electronic chip ranges from 200 mu m to 400 mu m.
The invention also provides a silicon photomultiplier sensor of the trench electrode single photon avalanche array, which further comprises a polysilicon quenching resistor, wherein the surface of the trench electrode single photon avalanche array comprises an electrode is provided with a passivation layer, the polysilicon quenching resistor is arranged above the trench structure, the trench structure leads out a shared first electrode at the edge of the device, and a second electrode is led out at the edge position of the sensor after the polysilicon quenching resistors of each cell are connected.
The invention provides a preparation method of a trench electrode single photon avalanche array, which comprises the following steps of
S1, growing a silicon nitride layer on an epitaxial wafer, marking a groove etching area by photoetching, preparing a groove structure by dry etching, growing a passivation in the groove structure, reserving the depth of a first groove by back etching, and forming a thin oxide layer by thermal oxidation of the inner wall of the groove structure;
s2, implanting and annealing at two sides of the groove structure through ion angles twice to form a first heavily doped region close to the wall surface of the groove structure and an avalanche implantation region far away from the wall surface of the groove structure;
s3, growing a passivation in the groove structure, reserving the depth of the second groove through back etching, etching the surface silicon nitride layer, and preparing a second heavily doped region on the surface of the epitaxial layer through photoetching and ion implantation;
S4, growing a passivation layer on the surface of the epitaxial layer, and preparing electrode contact holes of the first heavily doped region and the second heavily doped region through photoetching;
and S5, growing a metal layer on the surface of the epitaxial layer, filling the electrode contact hole to form an electrode, and etching to remove metal which does not need to be covered.
Further, the epitaxial wafer comprises a substrate and an epitaxial layer; the epitaxial layer, the avalanche injection region and the second heavily doped region are of N type, and the first heavily doped region is of P type; or the epitaxial layer, the avalanche injection region and the second heavily doped region are of P type, and the first heavily doped region is of N type;
the ion implantation angle of the first heavily doped region ranges from 15 degrees to 45 degrees, the implantation energy ranges from 20 keV to 50keV, and the implantation dosage ranges from 1 multiplied by 10 14/cm3～5×1015/cm3;
The ion implantation angle of the avalanche implantation region ranges from 20 degrees to 50 degrees, the implantation energy ranges from 600keV to 1600keV, and the implantation dosage ranges from 1 multiplied by 10 12/cm3～1×1014/cm3.
The invention also provides a preparation method of the sensor, which is based on the preparation method of the trench electrode single photon avalanche array, and further comprises the following steps of
Inverting the electronic chip on the surface of the epitaxial layer, wherein a circuit part of the electronic chip is communicated with the first electrode and is led out through the electronic chip by an outgoing line, and the second electrode is led out through the electronic chip by the outgoing line;
And growing an anti-reflection layer after the epitaxial layer substrate is polished.
The invention also provides a preparation method of the silicon photomultiplier sensor, which is based on the preparation method of the trench electrode single photon avalanche array and comprises the following steps of
Growing polysilicon on the surface of the epitaxial layer, wherein the resistance value of the polysilicon is 50-300 kΩ;
And etching redundant polysilicon, and leading out the polysilicon of each cell at the edge of the sensor after interconnection.
The invention has the beneficial effects that:
the invention provides a SPAD array, wherein the cells of the SPAD array are separated by deep trench structures to prevent charge crosstalk. The SPAD array is injected and annealed at the two sides of the deep groove structure through the angles of N type ions and P type ions to form an N type avalanche injection region and a heavily doped P type region respectively, so that the area of an active region is reduced, the detection efficiency is improved, and the dark count rate is reduced.
The SPAD array designed by the invention is combined with the inverted electronic chip to form the SPAD array sensor, the SPAD array sensor is of a back-illuminated sensor structure, and the filling factor of the photon detection surface is improved. The area of the ion implantation active region of the SPAD array sensor is smaller and the ion implantation active region is arranged around SPAD cells, so that the duty ratio of the active region can be effectively reduced while the quantum detection efficiency of incident light is ensured, and the dark count rate of the SPAD array sensor is further reduced.
The SPAD array designed by the invention can also be combined with a quenching resistor to form a Silicon photomultiplier (Silicon PhotoMultiplier, siPM).
In addition, the N-type avalanche injection region and the P-type heavily doped region are formed through ion angle injection, and an additional photoetching plate is not needed for photoetching and etching processes, so that the process steps are simplified as a whole, the influence of process uncertainty on the performance of the sensor is reduced, and the reliability of the SPAD array sensor is further improved.
The single photon avalanche array sensor structure provided by the invention can be applied to infrared radiation detection or weak light detection.
Drawings
The accompanying drawings, which are included to provide a further understanding of embodiments of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention. It is evident that the drawings in the following description are only some embodiments of the present invention and that other drawings may be obtained from these drawings without inventive effort for a person of ordinary skill in the art.
FIG. 1 is a schematic cross-sectional view of a single cell of a conventional single photon avalanche array;
FIG. 2 is a schematic cross-sectional view of two adjacent cells of a trench electrode single photon avalanche array sensor provided in an embodiment of the present invention;
FIG. 3 is a schematic diagram illustrating a process step of a trench electrode single photon avalanche array sensor in accordance with an embodiment of the present invention;
FIG. 4 is a schematic diagram of a second process step of a trench electrode single photon avalanche array sensor in accordance with an embodiment of the present invention;
FIG. 5 is a schematic diagram showing three steps in a process of a trench electrode single photon avalanche array sensor in accordance with an embodiment of the present invention;
FIG. 6 is a schematic diagram illustrating a fourth process step of a trench electrode single photon avalanche array sensor in accordance with an embodiment of the present invention;
FIG. 7 is a schematic diagram of a process step of a trench electrode single photon avalanche array sensor in accordance with an embodiment of the present invention;
FIG. 8 is a schematic diagram illustrating a process step six of a trench electrode single photon avalanche array sensor in accordance with an embodiment of the present invention;
FIG. 9 is a schematic diagram of a process step seven of a trench electrode single photon avalanche array sensor provided in an embodiment of the present invention;
FIG. 10 is a schematic diagram illustrating a process step eight of a trench electrode single photon avalanche array sensor in accordance with an embodiment of the present invention;
FIG. 11 is a top view of a trench electrode single photon avalanche array sensor structure provided in an embodiment of the present invention;
FIG. 12 is a schematic illustration of a silicon photomultiplier sensor process according to an embodiment of the present invention;
FIG. 13 is a top view of a silicon photomultiplier sensor structure provided in an embodiment of the present invention.
Detailed Description
The technical scheme of the present invention will be described in detail by embodiments with reference to the accompanying drawings.
It is noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of exemplary embodiments according to the present application. The relative arrangement of the components and steps, numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present application unless it is specifically stated otherwise.
The invention provides a single photon avalanche array of a trench electrode, which comprises an epitaxial layer, wherein a plurality of trench structures are transversely and longitudinally arranged on one side surface of the epitaxial layer, the epitaxial layer is divided into a plurality of cell structures, a first heavily doped region close to the side wall surface of the trench structure and an avalanche injection region far away from the side wall surface of the trench structure are respectively formed at two sides of the trench structure through ion angle injection, passivation substances are filled in the trench structure, and the first heavily doped region leads out a first electrode from an opening of the trench structure; one side of the epitaxial layer, which comprises the groove structure, also comprises a second heavily doped region, and the second heavily doped region leads out a second electrode. The epitaxial layer, the avalanche injection region and the second heavily doped region are of N type, and the first heavily doped region is of P type; or the epitaxial layer, the avalanche injection region and the second heavily doped region are of P type, and the first heavily doped region is of N type.
Further, the passivation filled in the groove structure is silicon dioxide or silicon nitride.
The invention also provides a groove electrode single photon avalanche array sensor, which comprises the groove electrode single photon avalanche array and a readout electronics chip, wherein the surface of the groove electrode single photon avalanche array, which comprises an electrode, is provided with a passivation layer to cover, the groove electrode single photon avalanche array and the readout electronics chip are packaged reversely, a first electrode is connected with a signal processing circuit of the readout electronics chip, a detection signal is led out through an electrode lead-out wire after being subjected to data processing, and a second electrode is directly led out through the electrode lead-out wire; and an anti-reflection layer grows on the surface of one side of the epitaxial layer, which is far away from the groove structure.
Further, the passivation layer is silicon dioxide or silicon nitride; the anti-reflection layer is silicon nitride or silicon dioxide.
The invention also provides a silicon photomultiplier sensor of the trench electrode single photon avalanche array, which comprises the trench electrode single photon avalanche array and a polysilicon quenching resistor, wherein the surface of the trench electrode single photon avalanche array comprises an electrode, a passivation layer is arranged on the surface of the electrode, the polysilicon quenching resistor is arranged above a trench structure, the trench structure leads out a shared first electrode at the edge of a device, and a second electrode is led out at the edge position of the sensor after the polysilicon quenching resistors of each cell are interconnected.
The invention also provides a preparation method of the trench electrode single photon avalanche array, which comprises the following steps of
S1, growing a silicon nitride layer on an epitaxial wafer, marking a groove etching area by photoetching, preparing a groove structure by dry etching, growing a passivation in the groove structure, reserving the depth of a first groove by back etching, and forming a thin oxide layer by thermal oxidation of the inner wall of the groove structure;
s2, implanting and annealing at two sides of the groove structure through ion angles twice to form a first heavily doped region close to the wall surface of the groove structure and an avalanche implantation region far away from the wall surface of the groove structure;
s3, growing a passivation in the groove structure, reserving the depth of the second groove through back etching, etching the surface silicon nitride layer, and preparing a second heavily doped region on the surface of the epitaxial layer through photoetching and ion implantation;
S4, growing a passivation layer on the surface of the epitaxial layer, and preparing electrode contact holes of the first heavily doped region and the second heavily doped region through photoetching;
and S5, growing a metal layer on the surface of the epitaxial layer, filling the electrode contact hole to form an electrode, and etching to remove metal which does not need to be covered.
Further, the epitaxial layer, the avalanche injection region and the second heavily doped region of the epitaxial wafer are of N type, and the first heavily doped region is of P type; or the epitaxial layer, the avalanche injection region and the second heavily doped region of the epitaxial wafer are of a P type, and the first heavily doped region is of an N type.
The invention also provides a preparation method of the sensor based on the trench electrode single photon avalanche array, which further comprises the following steps on the basis of the step S5
S6, inverting the read-out electronic chip on the surface of the epitaxial layer, wherein a circuit part of the read-out electronic chip is communicated with the first electrode and is led out through the electronic chip by an outgoing line, and the second electrode is led out through the electronic chip by the outgoing line; and growing an anti-reflection layer after the epitaxial layer substrate is polished.
The invention also provides a preparation method of the silicon photomultiplier sensor based on the trench electrode single photon avalanche array, which further comprises the following steps on the basis of the step S5
And S6, growing polysilicon on the top of the epitaxial layer, etching off redundant polysilicon, wherein the resistance value of the polysilicon is 50-300 kΩ, and leading out the polysilicon of each cell at the edge position of the sensor after interconnection.
The technical scheme of the present invention will be described in detail with reference to a specific embodiment.
The structural composition of the SPAD array sensor is illustrated by taking the SPAD array sensor as an example. The groove electrode single photon avalanche array and the sensor have the basic structure that: the SPAD cell is processed on an N-type epitaxial wafer, namely an N-type epitaxial wafer which is an N-type heavily doped silicon wafer substrate and is epitaxially grown with an N-type low doped region; the inside of the groove structure among the cells is filled with silicon dioxide or silicon nitride, an N-type avalanche injection region and a heavily doped P-type region are respectively formed at the two sides of the deep groove through the angle injection and annealing of N-type and P-type ions, and N-type ion injection is carried out at the top part by etching; and at the tops of the deep groove and the N-type ion implantation region, the heavily doped P-type region and the N-type region are led out by metal or heavily doped polysilicon to respectively form an anode and a cathode of the SPAD array. In addition, after the SPAD array and the read-out electronic chip are packaged reversely, the bottom of the SPAD array is thinned and polished, and an anti-reflection layer silicon nitride or silicon dioxide grows on the surface layer of the bottom of the SPAD array, so that the SPAD array sensor is formed.
Specifically, as shown in fig. 2, the cross-sectional schematic diagram of two adjacent cell structures of the SPAD array includes an epitaxial layer N-type doped region 202 and a deep trench structure 203, the inside of the deep trench structure 203 is filled with silicon dioxide or silicon nitride, an N-type avalanche injection region 209 and a heavily doped P-type region 207 are respectively formed by angle injection and annealing of N-type and P-type ions at two sides of the deep trench structure 203, an anti-reflection layer silicon nitride or silicon dioxide 220 is grown on a surface layer of the SPAD structure far away from the deep trench structure, the heavily doped P-type region 207 is led out by a metal 214 at the top of the deep trench structure 203 to form an anode of the SPAD device, an N-type heavily doped region 205 is also provided on one side surface of the SPAD structure including the deep trench structure, and a cathode of the SPAD is led out by a metal 206. The SPAD structure comprises a side surface of a deep trench structure covered by passivation layer silicon dioxide or silicon nitride 212 and packaged inversely with a readout electronics chip 213, an electrode lead-out wire 216 leads out a cathode of the SPAD array, a bias potential is applied to the outside, an anode of the SPAD array is connected with a readout electronics processing circuit 218, a detection signal is led out through an electrode lead-out wire 217 after being subjected to data processing, and the electrode lead-out wires 216 and 217 are realized on a silicon substrate by adopting a silicon-based via technology.
Wherein, the resistivity of the epitaxial layer N-type doped region 202 is between 0.01 and 10 omega cm, and the thickness is between 1 and 400 mu m. The depth of the deep trench structure 203 is between 1 and 350 mu m, the width is between 0.5 and 10 mu m, and the depth-to-width ratio of the actual trench structure is set according to the actual trench etching process conditions; the inside of the deep trench structure is filled with silicon dioxide or silicon nitride, and the distance between the upper surface of the insulating passivation and the surface of the device structure is 0.1-5 mu m. N-type avalanche implantation region 209 is formed at both sides of the deep trench structure by angle implantation and annealing of N-type ions, and the depth from the side wall surface of the trench structure is between about 0.5 and 3 μm, and the peak doping concentration range is 1×10 16/cm3～1×1018/cm3. The P-type heavily doped region 207 is formed on two sides of the deep trench structure through the angle implantation and annealing of P-type ions, the depth from the side wall surface of the deep trench structure is between about 0.2 and 1 mu m, and the peak doping concentration range is 1 multiplied by 10 18/cm3～1×1020/cm3. The anti-reflection layer silicon nitride or silicon dioxide 220 is grown on the SPAD structure surface layer, the thickness can be optimally designed according to the wavelength of the incident photons, and the thickness is generally between 0.05 and 0.2 mu m. The P-type heavily doped region 207 is extracted from the metal 214, and the peak doping concentration of the P-type heavily doped region 207 is in the range of 1×10 18/cm3～1×1020/cm3. The N-type heavily doped region 205 is led out from the metal 206, and the peak doping concentration of the N-type heavily doped region 205 is 1×10 18/cm3～1×1020/cm3. The surface of the SPAD is covered by passivation layer silicon dioxide or silicon nitride 212, the thickness range is between 0.1 and 0.5 μm, the thickness of the readout electronic chip 213 is between 200 and 400 μm, and the SPAD array and the readout electronic chip can be bonded by adopting a gold-gold inversion packaging process.
Taking the SPAD array sensor as an example, the preparation method flow of the invention is described:
The first step is shown in fig. 3. Preparing an N-type epitaxial wafer, wherein the N-type heavily doped substrate 301 has a doping concentration of more than 5 multiplied by 10 18/cm3 and a thickness of more than 200 mu m; the doping concentration range of the N-type epitaxial layer 302 is 1 multiplied by 10 14/cm3～5×1016/cm3, and the thickness is larger than 5 mu m; growing a silicon nitride layer 305 on the N-type epitaxial wafer, wherein the thickness is larger than 0.5 mu m, etching a groove etching region by adopting a photoetching process, and etching a deep groove structure 304 by adopting a dry etching process, wherein the depth H1 is larger than 4 mu m, and the width is 1 mu m; then, a silicon dioxide layer is grown again, and back etching is performed, so that silicon dioxide fills the bottom 303 of the deep trench structure 304, and the depth H2 of the trench is more than 2 mu m; a thin oxide layer is formed on the inner wall of the groove by thermal oxidation, and the thickness is about 50nm, so that silicon defects which can be introduced by subsequent ion implantation can be effectively prevented.
The second step is shown in fig. 4. The photoetching process is not needed, the P-type heavily doped region 307 is formed on the exposed two sides of the deep trench structure 304 through ion angle implantation and annealing of P-type boron element, the implantation angle alpha ranges from 15 degrees to 45 degrees, the implantation energy ranges from 20 to 50keV, the implantation dosage ranges from 1 multiplied by 10 14/cm3～5×1015/cm3, and accordingly the P-type heavily doped region 307 is formed between about 0.2 μm to 1.0 μm from the surface depth of the side wall of the trench, the length H3 of the P-type heavily doped region 307 is long, and the peak doping concentration range is 5 multiplied by 10 18/cm3～1×1020/cm3.
And a third step, as shown in figure 5. The exposed two sides of the deep trench structure 304 are subjected to ion angle implantation and annealing by N-type phosphorus element without photoetching technology to form an N-type avalanche implantation region 309, wherein the implantation angle beta ranges from 20 degrees to 50 degrees, the implantation energy ranges from 600keV to 1600keV, the implantation dosage ranges from 1 multiplied by 10 12/cm3～1×1014/cm3, and thus the N-type avalanche implantation region 309 is formed between about 0.5 μm to 1.5 μm from the surface depth of the side wall of the trench, and the length H4 peak doping concentration range of the N-type avalanche implantation region 309 is 1 multiplied by 10 16/cm3～1×1018/cm3.
Fourth, as shown in fig. 6. And growing silicon dioxide, filling the deep trench structure 304, and then etching back the silicon dioxide to about 0.3-1 μm below the silicon surface of the N-type epitaxial layer 302. The silicon nitride layer 305 is etched away from the surface of the N-type epitaxial layer. The upper surface of the N-type epitaxial layer is formed into an N-type heavily doped region 310 by a photolithography process and an ion implantation process.
Fifth step, as shown in fig. 7. A silicon dioxide or silicon nitride layer 312 is grown on the upper surface of the N-type epitaxial layer, a photolithography process is performed, and an anode contact hole 311 is etched at a position of the side of the deep trench structure 304. A cathode contact hole 313 is etched over the N-type heavily doped region.
In the sixth step, as shown in fig. 8, a metal layer is grown on the upper surface of the N-type epitaxial layer to fill the electrode contact hole, thereby forming an anode electrode 314 and a cathode electrode 315. Then, the photoetching process is carried out, and the metal which is not required to be covered on the periphery is etched.
Seventh, as shown in fig. 9, the corresponding readout electronics chip 400 is prepared, mainly including an analog and digital signal processing integrated circuit portion 318, an electrode lead 316 for biasing the SPAD array sensor, and a final processing signal is output from the electrode lead 317.
Eighth, as shown in fig. 10, the SPAD array 300 and the readout electronics chip 400 are packaged upside down to realize electrode butt joint, the analog and digital signal processing integrated circuit part 318 is communicated with the anode 314, and output through the electrode lead 317, and the electrode lead 316 is communicated with the cathode 315. And filling the gap with the filling glue 319 to ensure the reliability and stability of the device. And thinning and polishing the back substrate 301 of the SPAD array, and growing a silicon dioxide or silicon nitride layer 320 on the back as an anti-reflection layer thereof, wherein the thickness of the silicon dioxide or silicon nitride layer is set according to the wavelength of main detection incident light, and is generally 40-200 nm, so that the quantum detection efficiency of an incident light wave band is effectively improved.
As shown in fig. 11, the SPAD array sensor is composed of a plurality of cells, and an N-type avalanche injection region 309 and a heavily doped P-type region 307 are present in each SPAD, and the N-type avalanche injection region 309 and the heavily doped P-type region 307 are arranged in a ring-shaped structure on the inner wall of the SPAD because the doped regions are formed by ion angle injection. A trench isolation structure 304 is arranged between the cell SPAD structures, a metal electrode is led out from the edge of the device to be a common anode, and a cathode 313 of the cell SPAD is connected with a read-out electronic chip through an inverted packaging process. Because the SPAD array sensor employs back-illuminated detection, the readout electronics chip can be disposed over the entire area of the SPAD cells without impeding the detection of photons.
In the above-mentioned sensor manufacturing method, the order of implanting ions at both sides of the trench structure may be exchanged, so that the formation of the N-type avalanche implantation region and the P-type heavily doped region is not affected.
The invention also provides a preparation method of the silicon photomultiplier (SiPM) sensor, which comprises the following steps: after the sixth process, a polysilicon material with a certain resistivity is grown on top of the SPAD array, as shown in fig. 12, and a photolithography process is performed to etch out the unnecessary polysilicon that does not need to be covered around, so that the polysilicon 321 is arranged above the trench structure between the cells in a stripe shape, and the blocking of the incident light is prevented. The top layer polysilicon mainly achieves quenching after avalanche breakdown is triggered after SPAD detects photons, and the resistance value is set to be 150k, so that a silicon photomultiplier (SiPM) sensor is formed. As shown in fig. 13, which is a top view of the complete device structure, the SiPM device is formed by a plurality of cellular SPAD structures, and an N-type avalanche injection region 309 and a heavily doped P-type region 307 are present in each SPAD, and since the doped regions are formed by ion angle injection, the N-type avalanche injection region 309 and the heavily doped P-type region 307 are arranged on the inner wall of the SPAD in a ring structure. A groove isolation structure is arranged between the cell SPAD structures, and a common metal electrode anode is led out from the edge of the device; and the polysilicon quenching resistors 321 are arranged above the device, and after the polysilicon quenching resistors of each cell are interconnected, a cathode is led out at the edge position of the SiPM sensor, as shown in fig. 13.
The filling factor of the photon detection surface of the SPAD array sensor is improved. The area of the ion implantation active region of the SPAD array sensor is smaller and the ion implantation active region is arranged around SPAD cells, so that the duty ratio of the active region can be effectively reduced while the quantum detection efficiency of incident light is ensured, and the dark count rate of the SPAD array sensor is further reduced. In addition, the N-type avalanche injection region and the P-type heavily doped region are formed by ion angle injection, and an additional photoetching plate is not needed for photoetching and etching processes, so that the process steps are simplified as a whole, the influence of process uncertainty on the performance of the sensor is reduced, and the reliability of the SPAD array sensor is further improved.
It should be noted that in the above embodiment, the N-type region and the P-type region may be exchanged, and a single photon avalanche array and a sensor using the same may also be formed.
The above description is only of the preferred embodiments of the present invention and is not intended to limit the present invention, but various modifications and variations can be made to the present invention by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
The invention is not described in detail in a manner known to those skilled in the art.
Claims (10)
1. The single photon avalanche array with the trench electrode is characterized by comprising an epitaxial layer, wherein a plurality of trench structures are transversely and longitudinally arranged on one side surface of the epitaxial layer, and the epitaxial layer is divided into a plurality of cell structures; forming a first heavily doped region close to the side wall surface of the groove structure and an avalanche injection region far away from the side wall surface of the groove structure by ion angle injection at two sides of the groove structure, wherein the groove structure is filled with a passivation substance; the first heavily doped region leads out a first electrode from the opening of the groove structure; and one side of the epitaxial layer, which is provided with the groove structure, also comprises a second heavily doped region, and the second heavily doped region leads out a second electrode.
2. The trench electrode single photon avalanche array according to claim 1, wherein said epitaxial layer, avalanche injection region, second heavily doped region are N-type, said first heavily doped region is P-type; or the epitaxial layer, the avalanche injection region and the second heavily doped region are of P type, and the first heavily doped region is of N type;
The passivation filled in the groove structure is silicon dioxide or silicon nitride;
the first electrode and the second electrode are made of metal or heavily doped polysilicon.
3. The trench electrode single photon avalanche array according to claim 2, wherein said epitaxial layer has a resistivity of between 0.01 and 10 Ω -cm and a thickness of between 1 and 400 μm;
The depth of the groove structure is between 1 and 350 mu m, and the width is between 0.5 and 10 mu m;
the distance between the upper surface of the passivation in the groove structure and the surface of the array structure is 0.1-5 mu m;
The depth of the avalanche injection region from the side wall surface of the groove structure is between 0.5 and 3 mu m, and the peak doping concentration range is 1 multiplied by 10 16/cm3～1×1018/cm3;
The depth of the first heavily doped region from the side wall surface of the deep trench structure is between 0.2 and 1 mu m, and the peak doping concentration range is 1 multiplied by 10 18/cm3～1×1020/cm3;
the peak doping concentration of the second doping region ranges from 1 x 10 18/cm3～1×1020/cm3.
4. A sensor of a trench electrode single photon avalanche array according to any of claims 1 to 3, further comprising a readout electronics chip, said trench electrode single photon avalanche array comprising a passivation layer provided on a surface of an electrode, said readout electronics chip being packaged upside down on the passivation layer, said first electrode being connected to a signal processing circuit of the readout electronics chip, the signal processing circuit being led out through an electrode lead-out; the second electrode is directly led out through an electrode lead-out wire; and an anti-reflection layer grows on the surface of one side of the epitaxial layer, which is far away from the groove structure.
5. The sensor of claim 1, wherein the passivation layer is silicon dioxide or silicon nitride with a thickness ranging from 0.1 to 0.5 μm, and the anti-reflection layer is silicon dioxide or silicon nitride with a thickness ranging from 0.05 to 0.2 μm; the thickness of the read-out electronic chip ranges from 200 mu m to 400 mu m.
6. A silicon photomultiplier sensor of a trench electrode single photon avalanche array according to any of claims 1-3, further comprising a polysilicon quenching resistor, wherein the surface of the trench electrode single photon avalanche array comprises an electrode is provided with a passivation layer, the polysilicon quenching resistor is arranged above the trench structure, the trench structure draws out a common first electrode at the edge of the device, and the polysilicon quenching resistor of each cell is connected with a second electrode at the edge of the sensor.
7. The preparation method of the trench electrode single photon avalanche array is characterized by comprising the following steps of
S1, growing a silicon nitride layer on an epitaxial wafer, marking a groove etching area by photoetching, preparing a groove structure by dry etching, growing a passivation in the groove structure, reserving the depth of a first groove by back etching, and forming a thin oxide layer by thermal oxidation of the inner wall of the groove structure;
s2, implanting and annealing at two sides of the groove structure through ion angles twice to form a first heavily doped region close to the wall surface of the groove structure and an avalanche implantation region far away from the wall surface of the groove structure;
s3, growing a passivation in the groove structure, reserving the depth of the second groove through back etching, etching the surface silicon nitride layer, and preparing a second heavily doped region on the surface of the epitaxial layer through photoetching and ion implantation;
S4, growing a passivation layer on the surface of the epitaxial layer, and preparing electrode contact holes of the first heavily doped region and the second heavily doped region through photoetching;
and S5, growing a metal layer on the surface of the epitaxial layer, filling the electrode contact hole to form an electrode, and etching to remove metal which does not need to be covered.
8. The method of manufacturing of claim 7, wherein the epitaxial wafer comprises a substrate and an epitaxial layer; the epitaxial layer, the avalanche injection region and the second heavily doped region are of N type, and the first heavily doped region is of P type; or the epitaxial layer, the avalanche injection region and the second heavily doped region are of P type, and the first heavily doped region is of N type;
the ion implantation angle of the first heavily doped region ranges from 15 degrees to 45 degrees, the implantation energy ranges from 20 keV to 50keV, and the implantation dosage ranges from 1 multiplied by 10 14/cm3～5×1015/cm3;
The ion implantation angle of the avalanche implantation region ranges from 20 degrees to 50 degrees, the implantation energy ranges from 600keV to 1600keV, and the implantation dosage ranges from 1 multiplied by 10 12/cm3～1×1014/cm3.
9. A method of manufacturing a sensor according to any one of claims 7 and 8, further comprising the steps of
Inverting the electronic chip on the surface of the epitaxial layer, wherein a circuit part of the electronic chip is communicated with the first electrode and is led out through the electronic chip by an outgoing line, and the second electrode is led out through the electronic chip by the outgoing line;
And growing an anti-reflection layer after the epitaxial layer substrate is polished.
10. A method of manufacturing a silicon photomultiplier sensor according to any one of claims 7 and 8, further comprising the steps of
Growing polysilicon on the surface of the epitaxial layer, wherein the resistance value of the polysilicon is 50-300 kΩ;
And etching redundant polysilicon, and leading out the polysilicon of each cell at the edge of the sensor after interconnection.
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