CN108231947B - Single photon avalanche diode detector structure and manufacturing method thereof - Google Patents
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Abstract
The invention discloses a single photon avalanche diode detector structure, which comprises: a P-type silicon substrate; the deep N well and the deep P well are formed in the P-type silicon substrate, and the first deep groove is formed between the deep N well and the deep P well; n formed in deep N well+Region and P+A region surrounding the multiplication region and provided with a second deep trench and an N-well region; an anode leading-out terminal of the avalanche diode is formed in the N well region+A cathode leading-out end of the avalanche diode is formed in the region; a P-well region is formed in the deep P-well, and a substrate leading-out end is formed in the P-well region; and the surfaces of the deep N well and the deep P well are covered with protective layers. The invention has simple structure, only has two PN junctions along the junction depth vertical direction, and adopts a deep groove structure for isolation, thereby not only improving the edge breakdown resistance of the avalanche diode, but also improving the working voltage of the single photon avalanche diode, and further improving the photon detection efficiency. The invention also discloses a manufacturing method of the single photon avalanche diode detector structure.
Description
Technical Field
The invention relates to the technical field of detectors, in particular to a single photon avalanche diode detector structure and a manufacturing method thereof.
Background
The single photon detection is a very weak light detection method, the intensity of the detected light current is lower than the thermal noise level (10-14W) of the photoelectric detector at room temperature, and the signal which is annihilated in the noise cannot be extracted by using a common direct current detection method. Single photon detection has wide application in the fields of high-resolution spectral measurement, nondestructive substance analysis, high-speed phenomenon detection, precision analysis, atmospheric pollution measurement, bioluminescence, radiation detection, high-energy physics, astronomical photometry, optical time domain reflection, quantum key distribution systems and the like.
The devices applied to single photon detection at present mainly comprise: photomultiplier tubes (PMT), Avalanche diodes (APD), Superconducting Single Photon Detectors (SSPD), and Superconducting Transition Edge Sensors (STES), among others.
Photomultiplier tubes (PMTs) are electro-vacuum devices that utilize the external photoelectric effect to detect optical signals. The photomultiplier has the advantages of high gain, low noise power, low dark current and the like; but it has the disadvantages of large volume, high reverse bias, poor ability to resist external magnetic field, and complex maintenance, which greatly limits its application.
An Avalanche Photodiode (APD) is a type of optoelectronic device that utilizes the internal photoelectric effect. The avalanche photodiode has the functions of internal gain and amplification, and one photon can generate 10-100 pairs of photo-generated electron-hole pairs, so that a large gain can be generated in the device. The avalanche diode has the advantages of high detection sensitivity, high response speed, high gain coefficient, insensitivity to ionizing radiation and magnetic fields, low dark current, small volume, simple structure and the like.
Superconducting Single Photon Detector (SSPD) is a superconductor single photon detection technology based on niobium nitride (NbN). Its advantages are very fast response and negligible dark counting rate, but its low quantum efficiency (about 5-10%, PMT 30%, Si-APD 60-80%, STES 90% or more), high cost, complex maintenance and application, and poor anti-interference power.
Superconducting transition edge sensors (SETS) are devices that use superconducting materials as photosensitive layers for single photon detection. It has high quantum efficiency and extremely low dark count rate. However, the conversion time between the superconducting state and the normal state of the existing superconducting material is too long, so that the repeated working frequency of the sensor is only about 20KHz (the PMT working frequency can reach 1MHz, the Si-APD working frequency can reach 1MHz, and the SSPD working frequency can reach 1000MHz), and the extremely low working frequency is the main reason that STES cannot be widely applied at present.
The single photon detection technology has been developed for many years, and the avalanche diode has the advantages of high detection sensitivity, high response speed, high gain coefficient, insensitivity to ionizing radiation and magnetic fields, low dark current, small volume, simple structure and the like, so that the avalanche diode is widely applied.
The chinese patent application CN105810775A of invention proposes an NP type single photon avalanche diode based on CMOS image sensor process, which inevitably introduces dark counts caused by defects in STI due to the STI isolation process adopted in its structure, so that the overall dark counts are increased. Although the layout technology is adopted to reduce the dark count, the dark count caused by the defects in the STI cannot be fundamentally solved. To reduce the dark count caused by defects in the STI, only the spacing between the STI and the multiplication region is increased, thus increasing the area of the entire cell. In addition, the single photon avalanche diode structure is provided with four PN junctions along the junction depth direction, although the time resolution and the response of blue light can be improved, the implementation process is complex, the concentration gradient distribution of the four PN junctions is difficult to control, and the consistency and the repeatability of the device in the processing production process are difficult to guarantee.
Disclosure of Invention
The invention aims to overcome the defects in the prior art and provides a single photon avalanche diode detector structure and a manufacturing method thereof.
In order to achieve the purpose, the technical scheme of the invention is as follows:
the invention provides a single photon avalanche diode detector structure, which comprises the following components from bottom to top:
a P-type silicon substrate;
the deep N well and the deep P well are formed in the P-type silicon substrate in parallel;
the first deep groove is formed between the deep N well and the deep P well, and is filled with an isolation material which is used as isolation between a single photon avalanche diode region and a substrate potential leading-out region;
n is formed in the deep N well in sequence+Region and P+Region of said N+Region and P+The region is used for forming a multiplication region for absorbing photons; an annular second deep groove and an N-well region are sequentially formed around the multiplication region, an isolation material is filled in the second deep groove and is used for isolating the anode region and the cathode region of the single photon avalanche diode, and the N-well region is used for forming a single photon avalanche diode structure; an anode leading-out terminal of an avalanche diode is formed in the N well region, and the P is+A cathode leading-out end of the avalanche diode is formed in the region;
a P-well region is formed in the deep P-well, and a substrate leading-out end is formed in the P-well region;
and the protective layer covers the surfaces of the deep N well and the deep P well.
Preferably, lower ends of the first deep trench and the second deep trench are lower than lower ends of the deep N well and the deep P well.
Preferably, the P-type silicon substrate material is a P-type epitaxial silicon wafer, which includes a P-type substrate layer and a P-type epitaxial layer, and the deep N-well and the deep P-well are formed in the P-type epitaxial layer from the surface of the P-type epitaxial silicon wafer downward.
Preferably, the protective layer is further covered with an isolation layer, and contact holes for connecting the anode leading-out terminal, the cathode leading-out terminal and the substrate leading-out terminal with the metal connecting wire are formed in the isolation layer and the protective layer.
Preferably, the deep N well and the N well are N-An implanted region of said N+Region, anode leading-out terminal is n+An implantation region with P as deep P well and P well region-An implanted region of said P+Region, substrate terminal is p+And (4) implanting a region.
The invention also provides a manufacturing method of the single photon avalanche diode detector structure, which comprises the following steps:
step S01: forming a first deep groove and a second deep groove in a P-type silicon substrate by photoetching and dry etching methods;
step S02: filling isolation materials in the first deep groove and the second deep groove by adopting a chemical vapor deposition method to serve as isolation;
step S03: forming a deep N well and a deep P well in the P-type silicon substrate by photoetching and ion implantation methods;
step S04: growing a protective layer on the whole structure of the surfaces of the deep N well and the deep P well by a thermal oxidation method;
step S05: forming N of multiplication region for absorbing photon in deep N trap by photoetching and ion implantation method+Region and P+Region, P+The region contains a cathode leading-out terminal; forming an N-well region required by the avalanche diode structure, and forming an anode leading-out terminal in the N-well region;
step S06: by photolithography and ion implantation methods, a P-well region is formed in the deep P-well, and a substrate lead-out is formed in the P-well region.
Preferably, the method further comprises the following steps:
step S07: growing an isolation layer on the protective layer by adopting a chemical vapor deposition method;
step S08: forming contact holes on the isolation layer and the protective layer by adopting photoetching and etching methods;
step S09: growing a metal layer on the isolation layer by adopting a physical vapor deposition method, so that the metal of the metal layer is respectively connected with the anode leading-out end, the cathode leading-out end and the substrate leading-out end;
step S10: and defining and forming a metal connecting line pattern on the metal layer by adopting a photoetching and etching method.
Preferably, the isolation material is silicon dioxide or polysilicon.
Preferably, the deep N well and N well region adopt N-Injection of said N+N is adopted as region and anode leading-out terminal+Implanting, the deep P well and P well region adopt P-Implantation of the P+Region and substrate terminals using p+And (5) injecting.
Preferably, the P-type silicon substrate material is a P-type epitaxial silicon wafer comprising a P-type substrate layer and a P-type epitaxial layer, and the deep N-well and the deep P-well are formed in the P-type epitaxial layer from the surface of the P-type epitaxial silicon wafer downwards during ion implantation.
The invention has the following advantages:
1) the single photon avalanche diode detector has a simple structure, only has two PN junctions along the junction depth vertical direction, and the doping concentration gradient distribution of the PN junctions is simple and controllable.
2) The single photon avalanche diode detector structure adopts the deep groove structure for isolation, so that the edge breakdown resistance of the avalanche diode can be improved, and the working voltage of the single photon avalanche diode can be improved, thereby improving the photon detection efficiency.
Drawings
FIG. 1 is a schematic diagram of a single photon avalanche diode detector in accordance with a preferred embodiment of the present invention;
figures 2-9 are schematic process steps of a method for fabricating a single photon avalanche diode structure according to a preferred embodiment of the present invention.
Detailed Description
The following describes embodiments of the present invention in further detail with reference to the accompanying drawings.
In the following detailed description of the embodiments of the present invention, in order to clearly illustrate the structure of the present invention and to facilitate explanation, the structure shown in the drawings is not drawn to a general scale and is partially enlarged, deformed and simplified, so that the present invention should not be construed as limited thereto.
In the following description of the present invention, please refer to fig. 1, fig. 1 is a schematic structural diagram of a single photon avalanche diode detector according to a preferred embodiment of the present invention. As shown in fig. 1, a single photon avalanche diode detector structure of the present invention comprises, from bottom to top: p- type silicon substrates 1 and 2; a deep N well 4 and a deep P well 5 which are formed in the P-type silicon substrate in parallel; a first deep trench 31 formed between the deep N-well 4 and the deep P-well 5, a second deep trench 32 formed in the deep N-well 4; and a protective layer 6 and other main device parts covering the surfaces of the deep N well 4 and the deep P well 5.
Please refer to fig. 1. The P- type silicon substrates 1 and 2 may be formed using P-type epitaxial silicon wafers. The P-type epitaxial silicon wafer can comprise a P-type substrate layer (Psub)1 positioned at the lower layer and a P-type epitaxial layer (P-Epi)2 positioned on the P-type substrate layer; a deep N-well 4 and a deep P-well 5 are formed in the P-type epitaxial layer 2 from the surface of the P-type epitaxial silicon wafer down. The epitaxial layer can avoid the fluctuation of the device characteristics caused by the non-uniformity of the doping concentration of the substrate.
A deep groove (a first deep groove) 31 is adopted between the deep N well 4 and the deep P well 5 for isolation, the first deep groove 31 enters the P type epitaxial layer 2 from the surface of the P type epitaxial layer downwards and can approach or reach the P type substrate layer 1; the first deep trench 31 is filled with an isolation material. The first deep trench 31 serves as an isolation structure between the single photon avalanche diode region and the substrate potential extraction region to replace the conventional STI isolation structure.
In the deep N well 4, N is formed in sequence from bottom to top at a position approximately in the middle thereof+Regions 42 and P+A region 43; p+Region 43 is formed in deep N-well 4 from the surface of the P-type epitaxial silicon wafer down, and P+Region 43 and N+The regions 42 are connected one above the other. N is a radical of+ Regions 42 and P+Region 43 is used to form a multiplication region (hv) that absorbs photons.
And a ring-shaped second deep trench 32 and an N well region 41 are formed around the multiplication region from inside to outside in sequence. The second deep trench 32 also enters the P-type epitaxial layer 2 from the surface of the P-type epitaxial layer downward and can be close to or reach the P-type substrate layer 1; the second deep trench 32 is also filled with an isolation material. The second deep trench 32 serves as an isolation between the anode region and the cathode region of the single photon avalanche diode. An N-well region 41 is formed in the deep N-well 4 from the surface of the P-type epitaxial silicon wafer downwards; the N-well region 41 is used to form a single photon avalanche diode structure. The second deep trench 32 completely surrounds the multiplication region and is lower than N+The lower end of region 42. The second deep trench 32 isolates the multiplication region (cathode region) from the anode region. The lower ends of the first deep trench 31 and the second deep trench 32 are lower than the lower ends of the deep N-well 4 and the deep P-well 5 at the same time, so as to achieve a good isolation effect.
Please refer to fig. 1. An anode terminal 44 of an avalanche diode is formed in the N-well region 41; at P+A cathode terminal (not shown) of the avalanche diode is formed in the region 43; the cathode terminal is contained in P+In the region 43. A P-well region 51 is formed in the deep P-well 5, and the P-well region 51 is formed in the deep P-well 5 downward from the surface of the P-type epitaxial silicon wafer; a substrate lead 52 is formed in the P-well region 51.
Please continue to refer to fig. 1. The protective layer 6 may also be covered with a barrier layer 7. The protective layer 6 and the isolation layer 7 may be formed using the same dielectric, such as silicon dioxide. Contact holes 8 for connecting the anode lead-out terminal 44, the cathode lead-out terminal, the substrate lead-out terminal 52 and the metal connecting wire can be arranged in the isolation layer 7 and the protection layer 6. An anode 9 of the avalanche diode connected to the metal wiring, a cathode 10 of the avalanche diode, and a substrate extraction electrode 11 are respectively extracted from the contact hole 8.
Deep N well 4, deep P well 5, N well region 41, N described above+ Region 42, P+Region 43, anode lead 44, P-well region 51, substrate lead 52, etc. may be formed by ion implantation. For example, deep N-well 4, N-well region 41 may be N-An implantation region; n is a radical of+The area 42, the anode lead-out 44 may be n+An implantation region; deep P-well 5, P-well region 51 may be P-An implantation region; p+Region 43, substrate terminal 52 is p+Implant regions, etc.
The protective layer 6 can reduce the damage of the subsequent ion implantation process to the surface of the photon multiplication region of the avalanche diode. The isolation layer 7 serves as isolation between the avalanche diode device and the metal wiring.
The single photon avalanche diode detector has a simple structure, only has two PN junctions along the junction depth vertical direction, and the doping concentration gradient distribution of the PN junctions is simple and controllable. In addition, the single Photon avalanche diode detector structure adopts a deep groove structure for isolation, so that the edge breakdown resistance of the avalanche diode can be improved, and the working voltage of the single Photon avalanche diode can be improved, thereby improving the Photon Detection Efficiency (PDE).
The following describes in detail a method for manufacturing the single photon avalanche diode structure according to the present invention with reference to the following embodiments and accompanying drawings.
Referring to fig. 2-9, fig. 2-9 are schematic process steps of a method for fabricating a single photon avalanche diode structure according to a preferred embodiment of the invention. As shown in fig. 2 to 9, a method for manufacturing the single photon avalanche diode detector structure of the present invention may include the following steps:
step S01: and forming a first deep groove and a second deep groove in the P-type silicon substrate by photoetching and dry etching methods.
Please refer to fig. 2. The P- type silicon substrates 1 and 2 may be formed using P-type epitaxial silicon wafers. The P-type epitaxial silicon wafer can comprise a P-type substrate layer 1 positioned at the lower layer and a P-type epitaxial layer 2 positioned on the P-type substrate layer; the thickness of the P-type epitaxial layer 2 may be, for example, 5 μm. The epitaxial layer can avoid the fluctuation of the device characteristics caused by the non-uniformity of the doping concentration of the substrate.
First, a first deep trench 31 and a second deep trench 32 may be formed from the surface of the P-type epitaxial layer 2 into the P-type epitaxial layer by photolithography and dry etching. The trench depth of the first deep trench 31 and the second deep trench 32 may be, for example, 5 μm.
Step S02: and filling an isolation material in the first deep groove and the second deep groove by adopting a chemical vapor deposition method to serve as isolation.
Please refer to fig. 2. Then, a chemical vapor deposition method may be used to fill the first deep trench 31 and the second deep trench 32 with an isolation material as an isolation. The isolation material filled in the first deep trench 31 and the second deep trench 32 can be silicon dioxide (SiO), for example2) And the like. The second deep trench 32 serves as an isolation of the anode region and the cathode region of the single photon avalanche diode; the first deep trench 31 serves as an isolation of the single photon avalanche diode region and the substrate potential extraction region.
Step S03: and forming a deep N well and a deep P well in the P-type silicon substrate by photoetching and ion implantation methods.
Please refer to fig. 3. On a substrate by photolithography and ion implantationAnd forming a deep N well 4 and a deep P well 5 in the P-type epitaxial layer 2, and enabling the deep N well 4 and the deep P well 5 to be formed in the P-type epitaxial layer 2 from the surface of the P-type epitaxial silicon wafer downwards. Wherein, the doping concentration of the deep N well 4 can be 1012Atom/cm3The doping concentration of the deep P-well 5 may be, for example, 1012Atom/cm3. The deep N-well 4 and the deep P-well 5 are isolated by a first deep trench 31.
Step S04: and growing a protective layer on the whole structure on the surfaces of the deep N well and the deep P well by adopting a thermal oxidation method.
Please refer to fig. 4. A thermal oxidation method can be used to grow a silicon dioxide layer as a protective layer 6 on the whole structure to reduce the damage of the subsequent ion implantation process to the surface of the multiplication region of the avalanche diode photons. The silica layer may have a thickness of 0.2 microns to 0.5 microns.
Step S05: forming N of multiplication region for absorbing photon in deep N trap by photoetching and ion implantation method+Region and P+Region, P+The region contains a cathode leading-out terminal; an N-well region required for forming the avalanche diode structure, and an anode terminal in the N-well region.
Please refer to fig. 5. The N-well region 41 required for the avalanche diode structure can be formed in the deep N-well 4 by photolithography and ion implantation methods, and the N of the multiplication region for absorbing photons is formed+ Regions 42 and P+Region 43 and an anode lead-out 44 in the N-well region 41. At P+A cathode lead (not shown) is formed in the region 43.
Wherein the doping concentration of the N-well region 41 may be, for example, 1013Atom/cm3N forming a multiplication region for absorbing photons+The doping concentration of region 42 may be, for example, 1015Atom/cm3，P+The doping concentration of region 43 may be, for example, 1015Atom/cm3Anode lead-out terminal 44 (n) as anode lead-out+) May be, for example, 1015Atom/cm3。
Wherein N forming a multiplication region for absorbing photons+Region 42 is connected to and located at P+Under the region 43And are connected to each other.
Step S06: by photolithography and ion implantation methods, a P-well region is formed in the deep P-well, and a substrate lead-out is formed in the P-well region.
Please refer to fig. 6. P-well region 51 may be formed in deep P-well 5 by photolithography and ion implantation methods, and substrate lead-out 52 (P) may be formed in P-well region 51+). Wherein the doping concentration of the P-well 51 may be 1013Atom/cm3The doping concentration of the substrate terminal 52 region may be, for example, 1015Atom/cm3. This P is+The region serves as a lead-out for the substrate.
In summary, when ion implantation is performed, N implantation may be performed for the deep N well 4 and the N well region 41, and N may be performed for N+N is used for the region 42 and the anode lead-out terminal 44+Implanting using P for deep P well 5 and P well region 51-Implantation of P+Region 43, substrate terminal 52, is p+And (5) injecting.
Step S07: and growing an isolation layer on the protective layer by adopting a chemical vapor deposition method.
Please refer to fig. 7. Next, silicon dioxide may be grown by chemical vapor deposition as the isolation layer 7 between the avalanche diode device and the metal line. The thickness of the silicon dioxide layer may be 2 microns to 5 microns.
Step S08: and forming contact holes on the isolation layer and the protective layer by adopting photoetching and etching methods.
Please refer to fig. 8. Next, a contact hole 8 may be formed on the silicon dioxide isolation layer 7 and the protection layer 6 by using photolithography and etching methods.
Step S09: and growing a metal layer on the isolation layer by adopting a physical vapor deposition method, so that the metal of the metal layer is respectively connected with the anode leading-out end, the cathode leading-out end and the substrate leading-out end.
Please refer to fig. 8. Next, a metal layer may be grown on the isolation layer 7 by physical vapor deposition such that the metal layer is metal-connected to the anode terminal 44 in the N well region 41 as the anode 9 of the avalanche diode, the cathode terminal in the P + region 43 as the cathode 10 of the avalanche diode, and the substrate terminal 52 in the P well region 51 as the substrate terminal 11.
Step S10: and defining and forming a metal connecting line pattern on the metal layer by adopting a photoetching and etching method.
Please refer to fig. 8. Finally, photolithography and etching methods can be used to define and form metal wiring patterns on the metal layer.
Please refer to fig. 9, which shows another embodiment of forming a single photon avalanche diode detector structure according to the present invention by using polysilicon (Poly) as the isolation material filled in the first deep trench 31 and the second deep trench 32.
The above description is only for the preferred embodiment of the present invention, and the embodiment is not intended to limit the scope of the present invention, so that all the equivalent structural changes made by using the contents of the description and the drawings of the present invention should be included in the scope of the present invention.
Claims (6)
1. A manufacturing method of a single photon avalanche diode detector structure is characterized in that the single photon avalanche diode detector structure comprises the following components from bottom to top:
a P-type silicon substrate;
the deep N well and the deep P well are formed in the P-type silicon substrate in parallel;
the first deep groove is formed between the deep N well and the deep P well, and is filled with an isolation material which is used as isolation between a single photon avalanche diode region and a substrate potential leading-out region;
n is formed in the deep N well in sequence+Region and P+Region of said N+Region and P+The region is used for forming a multiplication region for absorbing photons; an annular second deep groove and an N-well region are sequentially formed around the multiplication region, an isolation material is filled in the second deep groove and is used for isolating the anode region and the cathode region of the single photon avalanche diode, and the N-well region is used for forming a single photon avalanche diode structure; an anode leading-out terminal of an avalanche diode is formed in the N well region, and the P is+A cathode leading-out end of the avalanche diode is formed in the region;
a P-well region is formed in the deep P-well, and a substrate leading-out end is formed in the P-well region;
the protective layer covers the surfaces of the deep N well and the deep P well;
the manufacturing method of the single photon avalanche diode detector structure comprises the following steps:
step S01: forming a first deep groove and a second deep groove in a P-type silicon substrate by photoetching and dry etching methods;
step S02: filling isolation materials in the first deep groove and the second deep groove by adopting a chemical vapor deposition method to serve as isolation;
step S03: forming a deep N well and a deep P well in the P-type silicon substrate by photoetching and ion implantation methods;
step S04: growing a protective layer on the whole structure of the surfaces of the deep N well and the deep P well by a thermal oxidation method;
step S05: forming N of multiplication region for absorbing photon in deep N trap by photoetching and ion implantation method+Region and P+Region, P+The region contains a cathode leading-out terminal; forming an N-well region required by the avalanche diode structure, and forming an anode leading-out terminal in the N-well region;
step S06: by photolithography and ion implantation methods, a P-well region is formed in the deep P-well, and a substrate lead-out is formed in the P-well region.
2. The method of fabricating a single photon avalanche diode structure according to claim 1, further comprising:
step S07: growing an isolation layer on the protective layer by adopting a chemical vapor deposition method;
step S08: forming contact holes on the isolation layer and the protective layer by adopting photoetching and etching methods;
step S09: growing a metal layer on the isolation layer by adopting a physical vapor deposition method, so that the metal of the metal layer is respectively connected with the anode leading-out end, the cathode leading-out end and the substrate leading-out end;
step S10: and defining and forming a metal connecting line pattern on the metal layer by adopting a photoetching and etching method.
3. The method of fabricating a single photon avalanche diode structure according to claim 1, wherein said isolation material is silicon dioxide or polysilicon.
4. The method of fabricating a single photon avalanche diode structure according to claim 1, wherein said deep N-well, N-well region is N-Injection of said N+N is adopted as region and anode leading-out terminal+Implanting, the deep P well and P well region adopt P-Implantation of the P+Region and substrate terminals using p+And (5) injecting.
5. The method of claim 1, wherein said P-type silicon substrate material is a P-type epitaxial silicon wafer comprising a P-type substrate layer and a P-type epitaxial layer, and said deep N-well and deep P-well are formed in said P-type epitaxial layer from the surface of said P-type epitaxial silicon wafer down during ion implantation.
6. The method of fabricating a single photon avalanche diode structure according to claim 1, wherein the lower ends of said first and second deep trenches are lower than the lower ends of the deep N-well and the deep P-well.
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| CN109935639B (en) * | 2019-03-15 | 2021-01-08 | 中国科学院半导体研究所 | Single photon detector array capable of reducing electrical crosstalk and preparation method thereof |
| CN110993710B (en) * | 2019-12-30 | 2021-11-02 | 上海集成电路研发中心有限公司 | Single-photon avalanche diode and preparation method thereof |
| CN111404494B (en) * | 2020-06-04 | 2020-09-15 | 微龛(广州)半导体有限公司 | Transimpedance amplifier chip and optical receiving module |
| CN112289882B (en) * | 2020-10-30 | 2024-06-11 | 无锡中微晶园电子有限公司 | Manufacturing method of avalanche photodiode |
| CN113224197B (en) * | 2021-04-30 | 2023-01-24 | 中国科学院微电子研究所 | Avalanche detector and preparation method thereof |
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| CN114520277A (en) * | 2022-02-17 | 2022-05-20 | 中国电子科技集团公司第五十八研究所 | Preparation method and structure of anti-irradiation silicon-based avalanche photodiode |
| CN116632097B (en) * | 2023-07-25 | 2023-09-22 | 苏州锴威特半导体股份有限公司 | High-efficiency photocell and manufacturing method thereof |
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