CN117936393A - Method for manufacturing heat dissipation cover on back of single chip and packaging method - Google Patents
Method for manufacturing heat dissipation cover on back of single chip and packaging method Download PDFInfo
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- CN117936393A CN117936393A CN202410328653.6A CN202410328653A CN117936393A CN 117936393 A CN117936393 A CN 117936393A CN 202410328653 A CN202410328653 A CN 202410328653A CN 117936393 A CN117936393 A CN 117936393A
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- 230000017525 heat dissipation Effects 0.000 title claims abstract description 54
- 238000000034 method Methods 0.000 title claims abstract description 51
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 27
- 238000004806 packaging method and process Methods 0.000 title claims abstract description 11
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 52
- 229910052751 metal Inorganic materials 0.000 claims abstract description 43
- 239000002184 metal Substances 0.000 claims abstract description 43
- 238000009713 electroplating Methods 0.000 claims abstract description 29
- 239000000463 material Substances 0.000 claims abstract description 7
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 22
- 239000000758 substrate Substances 0.000 claims description 16
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 13
- 229910052802 copper Inorganic materials 0.000 claims description 13
- 239000010949 copper Substances 0.000 claims description 13
- 238000005520 cutting process Methods 0.000 claims description 13
- 229910052759 nickel Inorganic materials 0.000 claims description 11
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 6
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 claims description 6
- 238000007747 plating Methods 0.000 claims description 5
- 238000004544 sputter deposition Methods 0.000 claims description 5
- 238000005530 etching Methods 0.000 claims description 4
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims description 3
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 3
- 239000003153 chemical reaction reagent Substances 0.000 claims description 3
- 229910052804 chromium Inorganic materials 0.000 claims description 3
- 239000011651 chromium Substances 0.000 claims description 3
- 239000010453 quartz Substances 0.000 claims description 3
- 239000011347 resin Substances 0.000 claims description 3
- 229920005989 resin Polymers 0.000 claims description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 3
- 229910052719 titanium Inorganic materials 0.000 claims description 3
- 239000010936 titanium Substances 0.000 claims description 3
- 229910052720 vanadium Inorganic materials 0.000 claims description 3
- LEONUFNNVUYDNQ-UHFFFAOYSA-N vanadium atom Chemical compound [V] LEONUFNNVUYDNQ-UHFFFAOYSA-N 0.000 claims description 3
- 238000011161 development Methods 0.000 abstract description 2
- 238000001259 photo etching Methods 0.000 description 4
- 238000012545 processing Methods 0.000 description 3
- 229910000679 solder Inorganic materials 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000005868 electrolysis reaction Methods 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 206010041662 Splinter Diseases 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000013043 chemical agent Substances 0.000 description 1
- 229910000365 copper sulfate Inorganic materials 0.000 description 1
- ARUVKPQLZAKDPS-UHFFFAOYSA-L copper(II) sulfate Chemical compound [Cu+2].[O-][S+2]([O-])([O-])[O-] ARUVKPQLZAKDPS-UHFFFAOYSA-L 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 239000003814 drug Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000007429 general method Methods 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 238000013007 heat curing Methods 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- JEIPFZHSYJVQDO-UHFFFAOYSA-N iron(III) oxide Inorganic materials O=[Fe]O[Fe]=O JEIPFZHSYJVQDO-UHFFFAOYSA-N 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 238000012536 packaging technology Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 230000002035 prolonged effect Effects 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 238000002310 reflectometry Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000007493 shaping process Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/02—Electroplating of selected surface areas
- C25D5/022—Electroplating of selected surface areas using masking means
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D7/00—Electroplating characterised by the article coated
- C25D7/12—Semiconductors
- C25D7/123—Semiconductors first coated with a seed layer or a conductive layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3736—Metallic materials
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electrochemistry (AREA)
- Organic Chemistry (AREA)
- Metallurgy (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Manufacturing & Machinery (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
The invention discloses a method for manufacturing a heat dissipation cover on the back of a single chip and a packaging method. In order to solve the technical problem of how to manufacture a heat dissipation cover with high precision and various shapes when a large-power-consumption flip chip is packaged, the invention manufactures the heat dissipation cover on the back of the chip by using an electroplating process, prepares a photomask plate according to the shape of the heat dissipation cover which is actually needed, and performs exposure and development on a first photoresist layer paved on the back of a wafer by using the photomask plate, then performs electroplating metal on the back of the wafer to form the needed shape of the heat dissipation cover, then removes redundant material layers, and finally cuts the wafer into single chips. The heat dissipation cover and the single chip are integrally formed, the shape of the heat dissipation cover can be conveniently adjusted according to requirements, and the heat dissipation cover is better in flexibility and higher in precision.
Description
Technical Field
The invention relates to the field of integrated circuit packaging, in particular to a method for manufacturing a heat dissipation cover on the back of a single chip by utilizing a photoetching electroplating process and a packaging method.
Background
The Flip Chip (FC) Chip with large power consumption can generate heat and has serious temperature rise during working. When the temperature rises to the highest junction temperature of the chip, the chip cannot work normally or even stops working, so that how to dissipate heat is needed to be considered when the flip chip package with high power consumption is carried out.
The general method in industry is to attach a metal heat dissipation cover on the back of a chip package, fig. 1 is a side view of the whole structure of a traditional heat dissipation cover, a chip and a substrate, the heat dissipation cover is attached on the back of a high-power-consumption flip chip, and the heat dissipation cover helps the high-power-consumption flip chip to effectively conduct heat, so that the temperature rise is controlled, and the chip can continuously and stably work. In addition, flip chip solder balls are arranged below the flip chip for electrical connection between the flip chip and the substrate, and substrate solder balls are arranged below the substrate for electrical connection between the substrate and the printed circuit board.
The traditional packaging technology is to manufacture a heat-dissipating cover finished product by mechanical processing, glue is dispensed on the back of a bare chip during packaging processing, and then a cover attaching machine grabs the heat-dissipating cover to attach to the back of the bare chip, and then heat curing and shaping are carried out.
However, the mechanically manufactured heat dissipation cover has regular shape, is inconvenient to flexibly adjust the shape according to actual conditions, and has difficulty in special-shaped heat dissipation covers. Meanwhile, the accuracy of the mounting process is limited to be more than 200 mu m, so that the mounting process is not tight, the problem of offset exists, the appearance is affected, and the mounting is affected under the condition that the external reserved space is narrow.
Therefore, how to manufacture a heat dissipation cover with high precision and conforming to various shapes is a problem to be solved in the art when packaging a flip chip with high power consumption.
Disclosure of Invention
In order to alleviate or partially alleviate the above technical problem, the solution of the present invention is as follows:
a method for manufacturing a heat dissipation cover on the back of a single chip comprises the following steps:
Step S1: manufacturing a photomask plate according to the arrangement of the single chips on the wafer and the shape of the heat dissipation cover required by each single chip;
step S2: sputtering a metal conductive seed layer on the back of the wafer;
Step S3: paving a photoresist layer on the back of the wafer to form a first photoresist layer, and paving a photoresist layer on the front of the wafer to form a second photoresist layer;
Step S4: exposing and developing the first photoresist layer on the back of the wafer by using the photomask plate;
step S5: electroplating metal on the back of the wafer to form a required heat dissipation cover shape;
step S6: removing the photoresist layer and the metal conductive seed layer;
Step S7: and cutting, namely cutting the wafer into single chips.
Further, the metal conductive seed layer plays a role in electroplating conductivity.
Further, the metal conductive seed layer material is one of titanium, nickel, vanadium and copper.
Further, the photomask plate is made of quartz, and is provided with a designed characteristic pattern, wherein the characteristic pattern is made of metal chromium.
Further, in step S4, the feature pattern is imprinted on the first photoresist layer to expose the area to be electroplated on the back surface of the wafer.
Further, in step S5, the plating metal is copper and nickel, wherein copper is a heat dissipating cover substrate, and nickel is plated on the surface of copper.
Further, after the electroplating is completed in step S5, the photoresist layer and the seed layer are removed by electrochemical etching.
Further, in step S6, the photoresist layer and the metal conductive seed layer are removed using hydrofluoric acid or hydrochloric acid reagent.
Further, in step S7, a laser grooving is first employed to release stress, and then a resin blade is used for dicing to obtain individual chips.
Further, each individual chip on the wafer is the same, or at least two individual chips on the wafer are different.
The invention also relates to a packaging method, which comprises the following steps:
Providing a substrate;
a single chip is mounted on a substrate, and the back surface of the single chip comprises a heat dissipation cover;
the heat dissipation cover is manufactured on the back of the single chip by the following steps:
Step S1: manufacturing a photomask plate according to the arrangement of the single chips on the wafer and the shape of the heat dissipation cover required by each single chip;
step S2: sputtering a metal conductive seed layer on the back of the wafer;
Step S3: paving a photoresist layer on the back of the wafer to form a first photoresist layer, and paving a photoresist layer on the front of the wafer to form a second photoresist layer;
Step S4: exposing and developing the first photoresist layer on the back of the wafer by using the photomask plate;
step S5: electroplating metal on the back of the wafer to form a required heat dissipation cover shape;
step S6: removing the photoresist layer and the metal conductive seed layer;
Step S7: and cutting, namely cutting the wafer into single chips.
Further, in step S4 of the packaging method, the feature pattern is imprinted on the first photoresist layer to expose the area to be electroplated on the back of the wafer.
The technical scheme of the invention has one or more of the following beneficial technical effects:
(1) According to the invention, a layer of metal is directly electroplated on the back of the chip by utilizing an electroplating process to replace the traditional heat dissipation cover, so that the heat dissipation cover is prevented from being manufactured by additional processing, and the heat dissipation cover manufactured by the invention is flexible in shape and can be adjusted adaptively;
(2) The invention can improve the precision of the heat radiation cover, and the precision is reduced to +/-5 um from more than 200um in the traditional mounting technology.
Furthermore, other advantageous effects that the present invention has will be mentioned in the specific embodiments.
Drawings
FIG. 1 is a side view of a conventional heat dissipating cover, chip and substrate overall structure;
FIG. 2 is a flow chart of a method for manufacturing a heat dissipating cover by using an electroplating process according to the present invention;
fig. 3 is a side view of a heat dissipating cover made by an electroplating process according to an embodiment of the present invention.
Reference numerals:
301-photo mask plate, 302-metal conductive seed layer, 303-substrate, 304-first photoresist layer, 305-second photoresist layer, 306-electroplated metal.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the present invention more apparent, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings, and it is apparent that the described embodiments are some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Numerous specific details are set forth in the following description in order to provide a better understanding of the invention. It will be understood by those skilled in the art that the present invention may be practiced without some of these specific details. In some instances, well known methods, procedures, components, and circuits have not been described in detail so as not to obscure the present invention.
Photolithography, an important step in the fabrication of semiconductor devices, uses exposure and development to pattern geometric structures in a photoresist layer, and then transfers the pattern on the photomask to the substrate by an etching process.
Electroplating, which is a process of plating a thin layer of other metals or alloys on the surface of some metals by utilizing the electrolysis principle, is a process of adhering a metal film on the surface of the metal or other material parts by utilizing the electrolysis, thereby playing roles of preventing oxidation (such as rust) of the metal, improving the wear resistance, conductivity, reflectivity, corrosion resistance (such as copper sulfate) and beautiful appearance, etc. According to the invention, the photoetching electroplating process is utilized to electroplate a layer of metal on the back of the chip to replace the traditional mounting of the finished heat-dissipating cover, so that the offset problem of the mounting process can be avoided, the allowable offset precision can be controlled within +/-5 um (the conventional prior art can reach more than 200 um), and the method can be effectively applied to the scene of mounting the heat-dissipating cover with high precision. Meanwhile, under the harsh external installation environment, the heat dissipation cover manufactured by the invention can be well compatible with high-precision high-power chips and other products, such as aviation and aerospace products with strict requirements on the chip size, the position and the like.
The invention can also customize and form the special-shaped heat dissipation cover, for example, certain large-power consumption chips have local light-sensitive areas, the areas need to be shaded or transparent, the invention can realize the coverage of the large-area heat dissipation cover and ensure the hollowness of certain specific areas, and the requirements of shading or transparent when heat dissipation is realized.
Fig. 2 is a flowchart of a method for manufacturing a heat dissipating cover by using an electroplating process, wherein the electroplating process is used for replacing the conventional heat dissipating cover mounting process, and the method comprises the following steps:
Step S1: and manufacturing a photomask plate.
And manufacturing a photomask plate (mask) according to the arrangement of the single chips (die) on the wafer and the shape of the heat dissipation cover required on each single chip. The photomask plate is provided with a designed characteristic pattern, when light irradiates the photomask plate, the characteristic pattern is shielded from light, and a blank area is transparent, so that the characteristic pattern can be imprinted on the photoresist material. In some cases, a single chip is also referred to as a wafer.
Alternatively, the individual chips on the wafer are the same, or at least two individual chips on the wafer are different.
Optionally, the photomask plate is made of quartz, and the photomask plate is provided with a designed characteristic pattern, wherein the characteristic pattern is made of metal chromium.
Step S2: sputtering a metal conductive seed layer. Specifically, a metal conductive seed layer is sputtered on the back of the wafer, and the metal conductive seed layer plays a role in electroplating and conducting.
Alternatively, the metallic conductive seed layer material may be titanium, nickel, vanadium, copper, or the like.
Step S3: and (5) paving a photoresist layer. Specifically, a first photoresist layer is formed by paving a photoresist layer on the back surface of the wafer, and a second photoresist layer is formed by paving a photoresist layer on the front surface of the wafer.
Step S4: the first photoresist layer on the back of the wafer is exposed and developed.
Specifically, the first photoresist layer on the back of the wafer is exposed and developed by using a photomask plate. At this time, the feature pattern is developed on the first photoresist layer to expose the area to be electroplated on the back surface of the wafer. Meanwhile, the front surface of the wafer is protected by the second photoresist layer, so that electroplating does not interfere with the solder balls on the front surface.
Wherein, the common light source is used for exposure, and the purple light in the common light source is optionally used for exposure.
Step S5: electroplating. Specifically, metal is electroplated on the back side of the wafer to form the desired heat sink cap shape on the back side.
Alternatively, the plating material is copper and nickel, wherein copper is a heat dissipating cover substrate, and nickel is plated on the surface of copper. Because copper is easy to oxidize, nickel is not easy to oxidize, nickel plating on the surface can effectively prevent the heat dissipation cover from oxidizing, and the service life of the heat dissipation cover is prolonged.
Step S6: and removing the photoresist layer and the metal conductive seed layer.
When electroplating is completed, the photoresist layer and the metal conductive seed layer are no longer needed. Optionally, the photoresist layer and the metal conductive seed layer are sequentially etched and removed by using chemical liquid medicine through electrochemical etching. Alternatively, the chemical agent is hydrofluoric acid, hydrochloric acid reagent.
Step S7: and cutting, namely cutting the wafer into single chips.
The laser grooving can be adopted to release stress firstly, then the resin blade is used for cutting, and defects such as layering and splinter in the cutting process can be effectively reduced.
Fig. 3 is a side view of a heat dissipating cover fabricated by an electroplating process according to an embodiment of the present invention, which uses a single chip as an example. Wherein 301 represents a photomask plate, 302 represents a metal conductive seed layer, 303 represents a substrate, 304 represents a first photoresist layer (photoresist layer on the back surface of the wafer), 305 represents a second photoresist layer (photoresist layer on the front surface of the wafer), and 306 represents electroplated metal.
The side view shown in fig. 3 corresponds to steps S1 to S6 of the method of manufacturing a heat dissipating cover using an electroplating process in fig. 2 according to the present invention. Practical measurement shows that the heat dissipation cover manufactured by the invention can avoid the offset problem of the traditional mounting process, and the offset precision can be controlled within +/-5 um.
The invention combines the photoetching electroplating process, firstly forms a special heat dissipation cover pattern by utilizing photoetching, can freely and flexibly complete pattern design according to requirements, and then can freely and flexibly complete the electroplating of the heat dissipation cover with certain thickness according to requirements by utilizing the electroplating process.
When the heat dissipation cover is manufactured, the heat dissipation cover and the single chip are integrally formed, and any graph can be designed by using an electroplating process, so that the shape of the heat dissipation cover is not limited, and the shape can be conveniently adjusted according to the requirement. In addition, the electroplating process is used for replacing the mounting process, so that the precision is higher, and the precision can be improved to within +/-5 mu m.
The foregoing is merely illustrative of the present invention, and the present invention is not limited thereto, and any person skilled in the art will readily recognize that variations or substitutions are within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (10)
1. The method for manufacturing the heat dissipation cover on the back of the single chip is characterized by comprising the following steps of:
Step S1: manufacturing a photomask plate according to the arrangement of the single chips on the wafer and the shape of the heat dissipation cover required by each single chip;
step S2: sputtering a metal conductive seed layer on the back of the wafer;
Step S3: paving a photoresist layer on the back of the wafer to form a first photoresist layer, and paving a photoresist layer on the front of the wafer to form a second photoresist layer;
Step S4: exposing and developing the first photoresist layer on the back of the wafer by using the photomask plate;
step S5: electroplating metal on the back of the wafer to form a required heat dissipation cover shape;
step S6: removing the photoresist layer and the metal conductive seed layer;
Step S7: and cutting, namely cutting the wafer into single chips.
2. The method for manufacturing a heat dissipation cap on a back surface of a single chip as claimed in claim 1, wherein:
The metal conductive seed layer plays a role in electroplating and conducting.
3. The method for manufacturing the heat dissipation cap on the back surface of the single chip as claimed in claim 2, wherein:
the metal conductive seed layer material is one of titanium, nickel, vanadium and copper.
4. The method for manufacturing a heat dissipation cap on a back surface of a single chip as claimed in claim 1, wherein:
The photomask plate is made of quartz, and is provided with a designed characteristic pattern, wherein the characteristic pattern is made of metal chromium.
5. The method for manufacturing a heat dissipation cap on a back surface of a single chip as defined in claim 4, wherein:
In step S4, the feature pattern is imprinted on the first photoresist layer to expose the area to be electroplated on the back surface of the wafer.
6. The method for manufacturing a heat dissipation cap on a back side of a single chip as defined in claim 5, wherein:
In step S5, the plating metal is copper and nickel, wherein copper is a heat dissipating cover substrate, and nickel is plated on the surface of copper.
7. The method for manufacturing a heat dissipating cover on the back side of a single chip as set forth in claim 6, wherein:
After the electroplating is completed in step S5, the photoresist layer and the seed layer are removed by electrochemical etching.
8. The method for manufacturing a heat dissipating cover on the back side of a single chip as set forth in claim 7, wherein:
In step S6, the photoresist layer and the metal conductive seed layer are removed using hydrofluoric acid or hydrochloric acid reagent.
9. The method for manufacturing the heat dissipation cap on the back surface of the single chip as claimed in claim 8, wherein:
In step S7, a laser grooving is first employed to release stress, and then a resin blade is used for cutting to obtain individual chips.
10. A packaging method, characterized in that the packaging method comprises:
Providing a substrate;
a single chip is mounted on the substrate, and the back of the single chip comprises a heat dissipation cover;
the heat dissipation cover is manufactured on the back of the single chip by the following steps:
Step S1: manufacturing a photomask plate according to the arrangement of the single chips on the wafer and the shape of the heat dissipation cover required by each single chip;
step S2: sputtering a metal conductive seed layer on the back of the wafer;
Step S3: paving a photoresist layer on the back of the wafer to form a first photoresist layer, and paving a photoresist layer on the front of the wafer to form a second photoresist layer;
Step S4: exposing and developing the first photoresist layer on the back of the wafer by using the photomask plate;
step S5: electroplating metal on the back of the wafer to form a required heat dissipation cover shape;
step S6: removing the photoresist layer and the metal conductive seed layer;
Step S7: and cutting, namely cutting the wafer into single chips.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202410328653.6A CN117936393A (en) | 2024-03-21 | 2024-03-21 | Method for manufacturing heat dissipation cover on back of single chip and packaging method |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202410328653.6A CN117936393A (en) | 2024-03-21 | 2024-03-21 | Method for manufacturing heat dissipation cover on back of single chip and packaging method |
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