CN117928769B - Method for determining channel carrier temperature of gallium nitride device - Google Patents
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- 229910002601 GaN Inorganic materials 0.000 title claims abstract description 37
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 title claims abstract description 31
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- 239000000758 substrate Substances 0.000 claims description 13
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- 238000000605 extraction Methods 0.000 claims description 3
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- 238000012216 screening Methods 0.000 claims description 3
- 230000000694 effects Effects 0.000 abstract description 7
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- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 2
- 238000000342 Monte Carlo simulation Methods 0.000 description 2
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Abstract
The invention relates to a method for determining channel carrier temperature of gallium nitride device, belonging to the technical field of microelectronics, wherein the method extracts and calculates threshold voltage drift curve and parasitic source resistance drift curve under different ambient temperatures, and substitutes the reduction value and transconductance value of saturated source leakage current under different source leakage voltages at room temperature into a formula to obtain channel temperature values of the device under different dissipation powers, thereby representing self-heating effect of the device during operation. The effective prediction of the channel temperature also has certain guiding significance in the aspects of optimizing the device structure, improving the heat dissipation efficiency of the device under the power level and the like.
Description
Technical Field
The invention relates to a method for determining the temperature of a channel carrier of a gallium nitride device, belonging to the technical field of microelectronics.
Background
As one of representative materials of the third generation wide bandgap semiconductor, gallium nitride (GaN) materials have excellent characteristics of high thermal conductivity, high breakdown field strength, high electron mobility, etc., and the devices thereof are widely used in high temperature, high voltage and high power fields such as radar, 5G communication, consumer product power supply, etc. However, the development and application of such devices has been limited due to some of the associated problems of device performance degradation and reliability. When the device works under high bias or high current to generate larger power dissipation, the thermal property of the device structure can limit the effective conduction of heat from the active region to the surrounding, the phenomenon that the local temperature of the device is overhigh is self-heating effect, the effect can cause the performance degradation of the device, the output power, transconductance, current gain cut-off frequency and maximum oscillation frequency of the device are affected, the overall heat dissipation of the device is reduced, and the device degradation is further caused. Semiconductor materials such as GaAs and Si are often used to fabricate integrated circuits in harsh environments because they have an optimal design for high temperature operation, but GaN materials have a higher upper limit on output power, and the opposite thermal design is more challenging, and reducing the self-heating effect of the device is also the focus of thermal optimization of GaN devices. Therefore, studying the channel temperature of GaN devices has important implications for device design and reliability optimization.
In the prior art, a Raman spectrum test method and a physical contact method can be used for measuring the channel carrier temperature of the gallium nitride device, wherein the Raman spectrum test method has higher spatial resolution, the test temperature is more accurate, but an optical path directly reaching the surface of the device is needed, so that the size and the structure of the device are limited, the test method has a complex process, is very time-consuming and has expensive test equipment; physical contact methods, such as scanning thermal microscopy, must be tested in contact with the device surface, which reduces test accuracy. There is a need for a simple, rapid, universal, highly accurate measurement method.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides a method for determining the channel carrier temperature of a gallium nitride device, and provides a simple, quick, universal and accurate method for characterizing and calculating the channel temperature by using a direct current test method, thereby providing guidance for device structural design and reliability optimization.
The invention adopts the following technical scheme:
a method of determining the channel carrier temperature of a gallium nitride device, comprising the steps of:
(1) Preparing a GaN device, wherein the GaN device comprises a substrate, an AlN nucleation layer, a GaN buffer layer, an AlN intermediate layer, an Al 0.2Ga0.8 N barrier layer, a GaN cap layer, a source electrode, a drain electrode and a grid electrode;
(2) The method is characterized in that a grid probe method is adopted to test R S, a source electrode is grounded in the test process, the drain voltage is changed under 0-1V, a grid source current I G is fixed to be a constant, I G is set to be 0.1-1mA, V G-IDS curves under different I G are obtained through the test respectively, V G represents the grid source voltage, I DS represents the drain source current, a linear relation exists between V G and I DS, V G is led to I DS, and the slope of the V G-IDS curve is the sum R S of source end ohmic contact resistance and channel resistance between grid sources:
RS= (VG/ IDS)× W （1）
Wherein W is the width of the gate;
(3) Performing transfer curve test on the device under the condition of different source drain voltages V DS at room temperature of 25 ℃ to obtain V DS-IDS curves of the device under different gate source voltages V G, screening out V DS-IDS curves of the device under the condition of V G =0V, and obtaining transconductance values g m under different V DS when V G =0V, wherein I DS is source drain current; extraction of g m and at different V DS Wherein I sat is the saturation current value of the device at the working point,/>A current reference value at room temperature of 25 ℃ is an intersection point between an extrapolated saturation current and an ordinate when V DS = 0V;
Performing device transfer characteristic test under the bias condition of V DS = 10V at a plurality of externally applied temperatures to obtain threshold voltage V th of the device at different temperatures (the threshold voltage V th refers to the condition that when the externally applied bias voltage makes the potential difference between the gate and the source reach a certain voltage level, the channel starts conducting) and R S values at different temperatures; then using polynomial fitting to obtain a function of R S=f(T)、Vth =f (T);
(4) The decreasing sum of the saturated currents of all parts is obtained by:
（2）
Wherein DeltaV sat is the electron velocity variation of the working temperature relative to the room temperature reference value, and is ignored; v D/Rsub represents the leakage current through the substrate, neglected, derived from equation (2):
（3）
In formula (3), ΔI sat is Δr S is the parasitic resistance change amount of R S with respect to room temperature, the value of which is the difference of R S =f (T) and R S at room temperature 25 ℃, and Δv th is the threshold voltage change amount with respect to room temperature, the value of which is the difference of V th =f (T) and V th at room temperature 25 ℃;
And (3) bringing Δi sat、gm、Isat at different source-drain voltages V DS and a functional relation ΔR S、ΔVth related to a variable T into a formula (3) for iterative solution to obtain channel temperature values T at different V DS.
Preferably, in the GaN device, the length of the gate is 2 μm, the gate-source spacing is 4 μm, and the gate-drain spacing is 4 μm.
Preferably, in step (2), the width w=100 μm=0.1 mm of the gate.
Preferably, in step (3), the device transfer characteristic test is performed under the bias condition of V DS = V at the applied temperature of 25 ℃, 75 ℃, 125 ℃, 175 ℃, 225 ℃ and 275 ℃ to obtain the threshold voltage V th of the device at different temperatures and the R S value at different temperatures, and then the function of R S=f(T)、Vth =f (T) is obtained by using polynomial fitting.
The invention is not exhaustive and can be seen in the prior art.
The beneficial effects of the invention are as follows:
1. Compared with a special test structure with large spacing between contacts required by a Raman spectrum test method, the method for acquiring the channel temperature by the direct current characterization test can be directly applied to various submicron devices, and is simpler, quicker and more accurate.
2. The extraction method of the invention can effectively predict the channel temperature of the device during operation, make expectations for the safety range of the device, reduce the problems of degradation and failure of the device, and prolong the service life of the device. The effective prediction of the channel temperature has certain guiding significance in the aspects of optimizing the device structure, improving the heat dissipation efficiency of the device under high power level and the like.
3. The invention can help understand the influence of gate length, gate-drain spacing and substrate material on the junction temperature in the device, has guiding significance on the aspects of device material selection and structure optimization, and effectively improves the reliability of the device.
Drawings
The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain the application.
FIG. 1 is a schematic diagram of a GaN device;
FIG. 2 is a schematic diagram of a test;
FIG. 3 is a V G-IDS curve at different I G;
FIG. 4 is a graph of R S at different I G;
Fig. 5 is a graph of the transconductance g m of a GaN device at V G =0V for V DS-IDS and at different V DS;
FIG. 6 shows the threshold voltage V th of a GaN device at different temperatures and the R S values at different temperatures;
fig. 7 is a transmission characteristic of the Power and the channel temperature T;
In the figure, 1-substrate, 2-AlN nucleation layer, 3-GaN buffer layer, 4-AlN intermediate layer, 5-Al 0.2Ga0.8 N barrier layer, 6-GaN cap layer, 7-drain, 8-gate, 9-source.
Detailed Description
In order to better understand the technical solutions in the present specification, the following description will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the drawings in the implementation of the present specification, but not limited thereto, and the present invention is not fully described and is according to the conventional technology in the art.
The calculation principle and the method are as follows:
The dependence of the parasitic source end on-resistance R S and the electron saturation speed V sat on temperature is considered, and the parasitic source end on-resistance R S and the electron saturation speed V sat can be used as temperature-sensitive parameters to measure the junction temperature of the device. The transistor R S consists of two parts, contact resistance, channel resistance between source and gate, respectively. As the device temperature increases, the low field electron mobility in the channel decreases and the channel resistance associated with R S increases. The voltage drop across R S changes the potential difference between the source and gate, so that the electron conduction path is interrupted. The portion of the saturation current I sat between the source and drain that results from the increase in the parasitic source-side on-resistance Rs is therefore denoted as I satgmΔRS. Where I sat is the saturation current value of the device at the operating point, g m is the transconductance value of the operating point, and Δr S is defined as the variation of the parasitic resistance of R S with respect to room temperature.
On the other hand, the electron velocity saturates in the channel under the gate. Monte Carlo simulation results indicate that V sat decreases with increasing temperature. Also, the threshold voltage variation Δv th (influenced by the two-dimensional electron gas concentration and the schottky barrier height) of the GaN device must be considered. Thus, the portion of the drop in saturation current I sat due to temperature and threshold voltage changes may be represented by the intrinsic parameter of the device as g mΔVth-IsatΔVsat/Vsat. Wherein DeltaV sat is the electron velocity variation of the working temperature relative to the room temperature reference value.
Since the dissipated power of the transistor determines the channel temperature of the device, both R S、Vsat and V th can be written as a function of drain voltage in the output characteristics of the transistor. For devices with high power and low substrate leakage, the saturation current may drop significantly and a negative differential resistance may occur as the drain voltage increases in the dc output characteristics. The decrease Δi sat of the saturation current is defined as follows:
；
wherein I sat is the saturation current value of the device at the operating point, The reference value for the current at room temperature is the intersection point with the ordinate when the saturation current is extrapolated to V DS =0V, as shown in fig. 5.
Adding the drops of the saturated currents of all the parts to obtain
（2）
Where g m is the transconductance value of the operating point, I sat is the saturation current value of the device at the operating point, Δr S is defined as the parasitic resistance change of R S relative to room temperature, Δv th is defined as the threshold voltage change of V th relative to room temperature, and Δv sat is the electron velocity change of the operating temperature relative to the room temperature reference. V D/Rsub represents the leakage current through the substrate and R sub can be determined by the output resistance of the transistor at low power when the self-heating effect is negligible (e.g., vg makes the channel cut). Since the leakage current of the substrate in the near-off state in this experiment was nearly 0 compared to the variation of other parameters of the device, the leakage current V D/Rsub on the substrate was ignored in this calculation.
Theoretical calculations show that the electron saturation velocity V sat in GaN is much less sensitive to temperature than gallium arsenide. And the strong polarization field in the GaN heterojunction further eliminates the dependence of electron mobility on temperature. The Monte Carlo simulation results show that: v sat in GaN was reduced by only 5.6% when the temperature was increased from 300K to 500K. Thus in this test calculation, vsat was considered constant, taking 1.5X10 7 cm/s, ignoring the effect of the variation in V sat on channel temperature.
In summary, if the function of R S =f (T) and V th =f (T) and other test values are obtained and brought into the formula (2) for iterative solution, the channel temperatures of different V DS can be obtained, i.e. the junction temperature values at different power levels can also be obtained.
Example 1
A method of determining the channel carrier temperature of a gallium nitride device, comprising the steps of:
(1) Preparing a GaN device comprising a substrate 1 (the calculation method is suitable for devices with different substrates having non-negligible self-heating effect under high power), an AlN nucleation layer 2, a GaN buffer layer 3, an AlN intermediate layer 4, an Al 0.2Ga0.8 N barrier layer 5, a GaN cap layer 6, a source electrode 9, a drain electrode 7 and a grid electrode 8; the length of the gate electrode 8 (gate length, also referred to as line width) was 2 μm, the gate-source pitch was 4 μm, and the gate-drain pitch was 4 μm.
(2) The method is characterized in that a grid probe method is adopted to test R S, a source electrode is grounded in the test process, the voltage of a drain electrode 7 is changed under 0-1V, a grid source current I G is fixed to be constant, as I G is invariable, the voltage drop on a Schottky barrier is invariable, research shows that the source resistance of a GaN device can be remarkably changed under a large signal, I G is set to be 0.1-1mA, V G-IDS curves under different I G are obtained through the test respectively, V G represents the grid source voltage, I DS represents the drain-source current, and FIG. 2 is a test schematic diagram of the device, wherein a parasitic source end on-state resistor R S is the sum of source end ohmic contact resistance (the source end contact resistance is the contact resistance of a source end metal and a semiconductor interface) and channel resistance between grid sources; the parasitic drain on-resistance R D is the sum of the drain ohmic contact resistance and the channel resistance between the gate and the drain;
Fig. 3 shows the relationship between V G and I DS obtained under different I G, and it can be seen that V G and I DS have a good linear relationship, V G is derived from I DS, and the slope of the V G-IDS curve is the sum R S of the source ohmic contact resistance and the gate-source channel resistance:
（1）
Where W is the width of the gate, the width of the gate w=100 μm=0.1 mm. The R S value (the unit of R S is omega mm) at different I G can be obtained through the iterative calculation of the formula, as shown in figure 4, the R S value at different temperatures in figure 6 can also be tested and calculated according to the method to obtain the Rs value.
(3) Performing transfer curve test on the device under the condition of different source-drain voltages V DS at room temperature of 25 ℃ to obtain a V DS-IDS curve of the device under the condition of different gate-source voltages V G, screening out a V DS-IDS curve of the device under the condition of V G =0V, and obtaining transconductance values g m of the device under different V DS when V G =0V, wherein the transconductance values are differential ratios between drain-source currents and gate-source voltages of the device under fixed drain-source bias, and are obtained by differential solution of V DS-IDS curves under different Vds, as shown in FIG. 5, wherein I DS is source-drain current; from FIG. 5 it can be seen that the current-voltage characteristics of the device show a significant drop in the saturation region at high dissipated power levels, from FIG. 5 it is possible to extract g m and g 3935 at different V DS Wherein I sat is the saturation current value of the device at the working point,/>For a current reference at room temperature of 25 c, for extrapolating the saturation current to the point of intersection with the ordinate at V DS =0V, for example V DS =20V,= 220.6-358 mA/mm；
Performing a device transfer characteristic test under the bias condition of V DS = 10V at an applied temperature of 25 ℃, 75 ℃, 125 ℃, 175 ℃, 225 ℃, 275 ℃ to obtain a threshold voltage V th of the device at different temperatures (the threshold voltage V th refers to the condition that when the applied bias voltage makes the potential difference between the gate and the source reach a certain voltage level, the channel starts conducting), and R S values at different temperatures, as shown in fig. 6; then using polynomial fitting to obtain a function of R S=f(T)、Vth =f (T);
(4) The decreasing sum of the saturated currents of all parts is obtained by:
（2）
Wherein ΔV sat is the electron velocity variation of the operating temperature with respect to the room temperature reference, which is negligible, i.e. the second part of equation (2) is approximately equal to 0; v D/Rsub represents the leakage current through the substrate, ignoring, i.e. the third part of equation (2) is approximately equal to 0, then deriving from equation (2):
（3）
In formula (3), ΔI sat is Δr S is the parasitic resistance change amount of R S with respect to room temperature, the value of which is the difference of R S =f (T) and R S at room temperature 25 ℃, and Δv th is the threshold voltage change amount with respect to room temperature, the value of which is the difference of V th =f (T) and V th at room temperature 25 ℃;
Using the above test data, a curve of T-R S,T-Vth is shown in fig. 6 (V th represents a threshold voltage), and then a polynomial fit is used to fit a function of R S=f(T)、Vth =f (T) to obtain two relations of R S=f(T)、Vth =f (T). Then Δr S is the difference between R S =f (T) and R S at room temperature 25 ℃. Δv th is the difference between V th =f (T) and V th at room temperature 25 ℃. I sat is the saturation current value of the device at the operating point, and the I sat values at different V DS can be obtained from fig. 5.ΔI sat is Is used for the difference in (a),The reference value of the current at room temperature is the intersection point between the extrapolated saturation current and the ordinate when V DS =0V, as shown in fig. 5Is 358mA/mm, so that specific values of DeltaI sat at different V DS can be determined. Specific values of g m at different V DS can be obtained from figure 5.
And (3) bringing Δi sat、gm、Isat at different source-drain voltages V DS and a functional relation ΔR S、ΔVth related to a variable T into a formula (3) for iterative solution to obtain channel temperature values T at different V DS.
By power=ui=v DS×IDS, the transmission characteristics of Power and channel temperature T can be finally obtained, as shown in fig. 7, where T represents the channel temperature, that is, the channel temperature value obtained by the above iterative solution.
While the foregoing is directed to the preferred embodiments of the present invention, it will be appreciated by those skilled in the art that various modifications and adaptations can be made without departing from the principles of the present invention, and such modifications and adaptations are intended to be comprehended within the scope of the present invention.
Claims (4)
1. A method for determining the channel carrier temperature of a gallium nitride device, comprising the steps of:
(1) Preparing a GaN device, wherein the GaN device comprises a substrate, an AlN nucleation layer, a GaN buffer layer, an AlN intermediate layer, an Al 0.2Ga0.8 N barrier layer, a GaN cap layer, a source electrode, a drain electrode and a grid electrode;
(2) The method is characterized in that a grid probe method is adopted to test R S, a source electrode is grounded in the test process, the drain voltage is changed under 0-1V, a grid source current I G is fixed to be a constant, I G is set to be 0.1-1mA, V G-IDS curves under different I G are obtained through the test respectively, V G represents the grid source voltage, I DS represents the drain source current, a linear relation exists between V G and I DS, V G is led to I DS, and the slope of the V G-IDS curve is the sum R S of source end ohmic contact resistance and channel resistance between grid sources:
（1）
Wherein W is the width of the gate;
(3) Performing transfer curve test on the device under the condition of different source drain voltages V DS at room temperature of 25 ℃ to obtain V DS-IDS curves of the device under different gate source voltages V G, screening out V DS-IDS curves of the device under the condition of V G =0V, and obtaining transconductance values g m under different V DS when V G =0V, wherein I DS is source drain current; extraction of g m and at different V DS Wherein I sat is the saturation current value of the device at the working point,/>A current reference value at room temperature of 25 ℃ is an intersection point between an extrapolated saturation current and an ordinate when V DS = 0V;
Performing device transfer characteristic test under the bias condition of V DS = 10V at a plurality of externally applied temperatures to obtain threshold voltage V th of the device at different temperatures and R S values at different temperatures; then using polynomial fitting to obtain a function of R S=f(T)、Vth =f (T);
(4) The decreasing sum of the saturated currents of all parts is obtained by:
（2）
Wherein DeltaV sat is the electron velocity variation of the working temperature relative to the room temperature reference value, and is ignored; v D/Rsub represents the leakage current through the substrate, neglected, derived from equation (2):
（3）
In formula (3), ΔI sat is Δr S is the parasitic resistance change amount of R S with respect to room temperature, the value of which is the difference of R S =f (T) and R S at room temperature 25 ℃, and Δv th is the threshold voltage change amount with respect to room temperature, the value of which is the difference of V th =f (T) and V th at room temperature 25 ℃;
And (3) bringing Δi sat、gm、Isat at different source-drain voltages V DS and a functional relation ΔR S、ΔVth related to a variable T into a formula (3) for iterative solution to obtain channel temperature values T at different V DS.
2. The method of determining the channel carrier temperature of a GaN device of claim 1, wherein the length of the gate is 2 μm, the gate-source spacing is 4 μm, and the gate-drain spacing is 4 μm.
3. A method of determining the channel carrier temperature of a gallium nitride device according to claim 2, wherein in step (2), the gate width W = 100 μm = 0.1 mm.
4. A method of determining the channel carrier temperature of a gallium nitride device according to claim 3, wherein in step (3), the device transfer characteristic test under the bias condition of V DS = 10V is performed at an applied temperature of 25 ℃, 75 ℃, 125 ℃, 175 ℃, 225 ℃, 275 ℃ to obtain the threshold voltage V th of the device at different temperatures and the R S value at different temperatures, and then a polynomial fit is used to obtain a function of R S=f(T)、Vth = f (T).
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