CN117926396A - Processing method for reducing oxidation induced stacking faults of large-size heavily-doped boron silicon wafer - Google Patents

Processing method for reducing oxidation induced stacking faults of large-size heavily-doped boron silicon wafer Download PDF

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CN117926396A
CN117926396A CN202410111926.1A CN202410111926A CN117926396A CN 117926396 A CN117926396 A CN 117926396A CN 202410111926 A CN202410111926 A CN 202410111926A CN 117926396 A CN117926396 A CN 117926396A
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silicon wafer
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doped boron
processing method
heavily
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范吉祥
马武祥
令狐铁兵
马三宝
寇文辉
方丽霞
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Mesk Electronic Materials Co ltd
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Mesk Electronic Materials Co ltd
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Abstract

A processing method for reducing oxidation induced stacking faults of a large-size heavily-doped boron silicon wafer comprises a crystal pulling process of the heavily-doped boron monocrystalline silicon crystal rod and a back sealing process of silicon wafer processing, wherein the crystal pulling process comprises material melting, stabilizing, crystal pulling, shouldering, shoulder turning, isodiametric and ending stages, and the back sealing process comprises a silicon wafer heating stage, a SiO 2 film generating stage and a silicon wafer cooling stage, and the pulling speed of the isodiametric stage is adjusted to be 1.0-1.2mm/min; and the back sealing process parameters are regulated to ensure that the heating speed of the silicon wafer in the heating stage is 140-160 ℃/min, the reaction temperature of the SiO 2 film in the generating stage is 420-450 ℃, the generating time is 7-10min, and the cooling speed of the silicon wafer in the cooling stage is 78-82 ℃/min. According to the invention, through adjusting the pulling speed at the constant diameter stage and adjusting the parameters of the back sealing process, the oxidation induced stacking fault in the large-size heavily-doped boron silicon wafer is reduced, so that the silicon wafer meets the production requirement, and the cost is reduced.

Description

Processing method for reducing oxidation induced stacking faults of large-size heavily-doped boron silicon wafer
Technical Field
The invention relates to the technical field of processing of heavily boron-doped monocrystalline silicon wafers, in particular to a processing method for reducing oxidation induced stacking faults of a large-size heavily boron-doped silicon wafer.
Background
Monocrystalline silicon occupies an increasingly important position in the semiconductor market, the quality requirement on a silicon wafer is higher and higher, and oxidation induced stacking faults are important quality parameters of the silicon wafer, which can increase the leakage rate of PN junctions, so that the yield of power devices (such as IGBT, MOSFET, display driving chip and the like) is reduced; particularly, large-size heavily-doped boron silicon wafers, which are generally silicon wafers of 8 inches and more than 8 inches, are more self-interstitial silicon atoms caused by heavily-doped boron atoms, and further more oxidation-induced stacking fault defects are caused.
At present, the pulling speed of the equal diameter stage is mainly adjusted to reduce the oxidation induced stacking fault of the silicon wafer, but the requirement cannot be met by only adjusting the pulling speed of the large-size heavily-doped boron silicon wafer, namely the qualification rate of the large-size heavily-doped boron silicon wafer is greatly reduced, and the production cost is increased. If the production qualification rate of the large-size heavily-doped boron silicon wafer is increased, the thermal field system of the single crystal furnace needs to be adjusted, the cost for adjusting the thermal field system is high, and the adjustment process is complex.
Disclosure of Invention
In order to solve the problem that the oxidation induced stacking fault of the heavily-doped boron silicon wafer cannot be reduced to the production requirement by adjusting the pulling speed under the condition of unchanged thermal field conditions in the prior art, the invention provides a processing method for reducing the oxidation induced stacking fault of the large-size heavily-doped boron silicon wafer, which can remarkably reduce the occurrence probability of the oxidation induced stacking fault defect of the heavily-doped boron silicon wafer under the condition of not adjusting the thermal field structure, thereby improving the processing qualification rate of the large-size heavily-doped boron silicon wafer and reducing the production cost of the large-size heavily-doped boron silicon wafer; the quality of the heavily boron-doped silicon wafer is improved with low cost.
In order to achieve the above purpose, the invention adopts the following specific scheme: a processing method for reducing oxidation induced stacking faults of a large-size heavily-doped boron silicon wafer comprises a crystal pulling process of the large-size heavily-doped boron monocrystalline silicon crystal rod and a back sealing process of the silicon wafer, wherein the crystal pulling process comprises the steps of material melting, stabilizing, seeding, shouldering, shoulder turning, isodiametric and ending, and the back sealing process comprises the steps of silicon wafer heating, siO 2 film generation and silicon wafer cooling, and the pulling speed of the isodiametric stage is adjusted to be 1.0-1.2mm/min; and the back sealing process parameters are regulated to ensure that the heating speed of the silicon wafer in the heating stage is 140-160 ℃/min, the reaction temperature of the SiO 2 film in the generating stage is 420-450 ℃, the generating time is 7-10min, and the cooling speed of the silicon wafer in the cooling stage is 78-82 ℃/min.
As an optimization scheme of the processing method for reducing oxidation induced stacking faults of the large-size heavily-doped boron silicon wafer, the method comprises the following steps: the argon flow in the constant diameter stage is 50-70slpm, and the furnace pressure is 20-40torr.
As an optimization scheme of the processing method for reducing oxidation induced stacking faults of the large-size heavily-doped boron silicon wafer, the method comprises the following steps: the furnace pressure in the material melting stage is 9-19torr, and the argon flow is 70-100slpm.
As another optimization scheme of the processing method for reducing oxidation induced stacking faults of the large-size heavily-doped boron silicon wafer, the method comprises the following steps: the furnace pressure in the seeding stage is 25-35torr, the argon flow is 60-70slpm, and the pulling speed is 2.5-3.5mm/min.
As another optimization scheme of the processing method for reducing oxidation induced stacking faults of the large-size heavily-doped boron silicon wafer, the method comprises the following steps: the furnace pressure in the shoulder stage is 25-35torr, the argon flow is 60-70slpm, and the pulling speed is 0.9-1.3mm/min.
As another optimization scheme of the processing method for reducing oxidation induced stacking faults of the large-size heavily-doped boron silicon wafer, the method comprises the following steps: the furnace pressure in the shoulder turning stage is 25-35torr, the argon flow is 50-70slpm, and the pulling speed is 1.3-1.6mm/min.
As another optimization scheme of the processing method for reducing oxidation induced stacking faults of the large-size heavily-doped boron silicon wafer, the method comprises the following steps: the ending time in the ending stage is 2.0-2.5h.
As another optimization scheme of the processing method for reducing oxidation induced stacking faults of the large-size heavily-doped boron silicon wafer, the method comprises the following steps: the silicon wafer is cooled by nitrogen at the cooling speed of 80 ℃/min.
As another optimization scheme of the processing method for reducing oxidation induced stacking faults of the large-size heavily-doped boron silicon wafer, the method comprises the following steps: the heating speed of the silicon wafer heating stage is 150 ℃/min, the reaction temperature of the SiO 2 film generating stage is 430 ℃, the generating time is 8min, and the cooling speed of the silicon wafer cooling stage is 81 ℃/min.
Compared with the prior art, the invention has the following beneficial effects: the invention provides a processing method for reducing oxidation induced stacking faults of a large-size heavily-doped boron silicon wafer, which obviously reduces the probability of occurrence of oxidation induced stacking faults by adjusting a crystal pulling process and combining with adjusting parameters of a back sealing process under the condition of not changing a thermal field structure, so that the processing qualification rate of the silicon wafer is improved, the defective rate of the silicon wafer is reduced, and the production cost of the large-size heavily-doped boron silicon wafer is reduced.
Detailed Description
The technical solutions of the present invention are further described in detail below with reference to specific embodiments, and the parts of the following embodiments of the present invention that are not specifically described and disclosed in the following embodiments should be understood as existing technologies known or should be known to those skilled in the art, such as a wire cutting process, a silicon wafer cleaning process, a silicon wafer lapping process, and the like.
Example 1
A processing method for reducing oxidation induced stacking faults of a large-size heavily-doped boron silicon wafer comprises a crystal pulling process of the heavily-doped boron monocrystalline silicon crystal rod and a back sealing process of the silicon wafer, and other processes (such as a cutting process, a cleaning process and the like) in the processing method are all of the prior art and are not described herein. Taking drawing of 8 inch heavily doped boron 100 silicon single crystal as an example, the crystal pulling process comprises the steps of material melting, stabilizing, crystal pulling, shouldering, shoulder turning, isodiametric and ending, and the following steps are specific:
And (3) material melting: raw materials enter a crucible of a single crystal furnace and are melted into liquid molten silicon; specifically, before the material melting process, the furnace needs to be disassembled to take out crystals in the furnace and remove volatile matters in the furnace; and after the cleaning is finished, the furnace body is assembled again, raw materials and doping agents are filled into the crucible, meanwhile, seed crystals are filled above the crucible, and a material melting process is performed. In this embodiment, the seed crystal is a single crystal which is precisely oriented, and can be rectangular or cylindrical, and has a diameter of 10-12mm and a length of 200-250mm; the normal direction of the cross section of the seed crystal is the growth direction of the Czochralski silicon single crystal. Chemical grinding is needed after seed crystal preparation to remove damage on the surface of the seed crystal and avoid dislocation in the surface damage from extending into the grown czochralski silicon single crystal. The furnace pressure in the material melting stage is 9-19torr, the argon flow is 70-100slpm, and the full play of impurities in the material melting process is ensured. In this example, the furnace pressure was 9torr and the argon flow was 70slpm.
Stabilization phase: the liquid level of the molten silicon is adjusted to be positioned below a guide cylinder of the single crystal furnace, the furnace pressure in the stabilizing stage is 25-35torr, the argon flow is 60-70slpm, in the embodiment, the furnace pressure in the stabilizing process is 25torr, the argon flow is 60slpm, and the liquid opening distance is 25mm.
And (3) seeding: the furnace pressure is 25-35torr, the argon flow is 60-70slpm, and the pulling speed is 2.5-3.5mm/min. In this example, the furnace pressure at the seeding stage was 25torr, the argon flow was 60slpm, and the pull rate was 2.5mm/min. After the silicon material is melted and stabilized, the seed crystal is reduced to be in contact with the molten material and sufficiently welded, necking is carried out, and specifically, the seed crystal is slowly reduced to be above the liquid level and 5-10mm away from the liquid level, so that the temperature of the seed crystal is as close to the temperature of the molten material as possible, and the thermal shock is reduced; the seed crystal is slowly immersed into the molten material to enable the lower end part of the seed crystal to be welded with the molten material in a small amount, a solid-liquid interface is formed between the seed crystal and the molten material, then the seed crystal is gradually raised, and the temperature of silicon connected with the seed crystal and separated from the solid-liquid interface is reduced to form the silicon single crystal. The seeding stage comprises necking, the length of the necking is 220-300mm, and the diameter of the necking is 4-5mm. The purpose of the neck is to allow dislocation in the seed crystal to slip away from the surface of the neck to be eliminated, thereby obtaining a dislocation-free silicon single crystal.
Shoulder placing stage: after the necking is finished, the growth speed of the crystal is smaller, and at the moment, the diameter of the silicon single crystal is rapidly increased, so that the diameter of the crystal rod is gradually increased to the required diameter, the furnace pressure in the shouldering stage is 25-35torr, the argon flow is 60-70slpm, and the pulling speed is 0.9-1.3mm/min. In this example, the furnace pressure in the shoulder-placing step was 25torr, the argon flow was 60slpm, and the pull rate was 0.9mm/min.
Shoulder turning stage: after the shouldering stage is completed, continuously drawing the crystal bar to enable the diameter of the crystal bar to continuously grow to the required diameter, wherein the furnace pressure in the shouldering stage is 25-35torr, the argon flow is 50-70slpm, and the pulling speed is 1.3-1.6mm/min. In this example, the furnace pressure in the shoulder-turning process was 30torr, the argon flow was 60slpm, and the pull rate was 1.3mm/min.
And (3) an isodiametric stage: argon flow is 50-70slpm, furnace pressure is 20-40torr, and pulling speed in the constant diameter stage is adjusted to be 1.0-1.2mm/min. In this example, the pull rate was 1.0mm/min, the furnace pressure was 20torr, and the argon flow was 50slpm. The crystal bar is pulled at the high pulling speed, so that oxidation induced stacking faults are reduced, annular OISF exists in the silicon wafer, the ratio of the annular OISF to the axial temperature gradient at the solid-liquid interface is related to the crystal growth speed, namely, the larger the ratio is, the larger the radius of the annular OISF is, the radius of the OISF can be increased by increasing the pulling speed, when the critical range is reached, the diameter of the OISF ring can be increased to exceed the diameter of the crystal bar, and the generation probability of the oxidation induced stacking faults is reduced by increasing the pulling speed and further reducing the concentration of the OISF.
And in the ending stage, controlling the ending time to be 2.0-2.5h. And after the ending stage is finished, entering a furnace stopping stage, wherein the argon flow in the furnace stopping stage is 70-90slpm, and the furnace pressure is 20-40torr.
The crystal bar obtained by drawing is subjected to processes such as wire cutting, cleaning, lapping and the like to obtain a silicon wafer, the silicon wafer after lapping is subjected to a back sealing process, the back sealing process comprises a silicon wafer heating stage, a SiO 2 film generation stage and a silicon wafer cooling stage, and specifically, the silicon wafer heating stage is carried out to heat the silicon wafer to 420-450 ℃, and the silicon wafer heating speed is 140-160 ℃/min; in the SiO 2 film generation stage, siH 4 and O 2 gases are blown to the surface of the silicon wafer, and a SiO 2 film is generated on the surface of the silicon wafer at the reaction temperature of 420-450 ℃ for 7-10min; and in the stage of cooling the silicon wafer, the silicon wafer is cooled by nitrogen at the cooling speed of 78-82 ℃/min. In the embodiment, the silicon wafer is heated to 420 ℃, and the heating speed of the silicon wafer is 140 ℃/min; in the SiO 2 film generation stage, siH 4 and O 2 gas are blown to the surface of the silicon wafer, and a SiO 2 film is generated on the surface of the silicon wafer at the reaction temperature of 420 ℃; and the generation time is 7min; and in the stage of cooling the silicon wafer, the silicon wafer is cooled by nitrogen at a cooling speed of 78 ℃/min. The back sealing process is combined with the crystal pulling process, so that the probability of nucleation of oxidation induced stacking faults in the silicon wafer is greatly reduced, the time for generating the SiO 2 film in the back sealing process is short, oxygen precipitation nucleation is insufficient for growth, and the probability of oxidation induced stacking faults in the silicon wafer is further reduced.
By adopting the process to process 250 batches of silicon wafers, the qualification rate (standard: OISF value is less than 10 pieces/cm < 2 >) of the silicon wafers is detected to be 100%.
Example 2
Taking drawing of 8 inch heavily doped boron silicon single crystal as an example, the crystal pulling process comprises the steps of material melting, stabilizing, crystal pulling, shoulder placing, shoulder turning, constant diameter and ending, and the following steps are specific:
And (3) material melting: the furnace pressure was 19torr and the argon flow was 100slpm.
Stabilization phase: the furnace pressure was 35torr and the argon flow was 70slpm.
And (3) seeding: the furnace pressure was 35torr, the argon flow was 70slpm, and the pull rate was 3.5mm/min.
Shoulder placing stage: the furnace pressure was 35torr, the argon flow was 70slpm, and the pull rate was 1.3mm/min.
Shoulder turning stage: the furnace pressure was 35torr, the argon flow was 70slpm, and the pull rate was 1.6mm/min.
And (3) an isodiametric stage: the argon flow was 70slpm, the furnace pressure was 40torr, and the pull rate was 1.2mm/min.
And in the ending stage, controlling the ending time to be 2.5h. And after the ending stage is finished, entering a furnace stopping stage, wherein the argon flow in the furnace stopping stage is 90slpm, and the furnace pressure is 40torr.
And (3) back sealing process: specifically, in the silicon wafer heating stage, the silicon wafer is heated to 450 ℃, and the silicon wafer heating speed is 160 ℃/min; in the SiO 2 film generation stage, siH 4 and O 2 gases are blown to the surface of a silicon wafer, and a SiO 2 film is generated on the surface of the silicon wafer at the reaction temperature of 450 ℃ for 10min; and in the cooling stage of the silicon wafer, the silicon wafer is cooled by nitrogen gas at a cooling speed of 82 ℃/min.
By adopting the process to process 230 batches of silicon wafers, the qualification rate of the detected silicon wafers OISF is 100%.
Example 3
Taking drawing of 8 inch heavily doped boron silicon single crystal as an example, the crystal pulling process comprises the steps of material melting, stabilizing, crystal pulling, shoulder placing, shoulder turning, constant diameter and ending, and the following steps are specific:
and (3) material melting: the furnace pressure was 15torr and the argon flow was 80slpm.
Stabilization phase: the furnace pressure was 30torr and the argon flow was 65slpm.
And (3) seeding: the furnace pressure was 30torr, the argon flow was 65slpm, and the pull rate was 3.0mm/min.
Shoulder placing stage: the furnace pressure was 30torr, the argon flow was 65slpm, and the pull rate was 1.1mm/min.
Shoulder turning stage: the furnace pressure was 30torr, the argon flow was 60slpm, and the pull rate was 1.5mm/min.
And (3) an isodiametric stage: argon flow is 60slpm, furnace pressure is 30torr, and pulling speed is 1.1mm/min.
And in the ending stage, controlling the ending time to be 2.3h. And after the ending stage is finished, entering a furnace stopping stage, wherein the argon flow in the furnace stopping stage is 90slpm, and the furnace pressure is 40torr.
And (3) back sealing process: specifically, in the silicon wafer heating stage, the silicon wafer is heated to 435 ℃, and the silicon wafer heating speed is 150 ℃/min; in the SiO 2 film generation stage, siH 4 and O 2 gas are blown to the surface of the silicon wafer, and a SiO 2 film is generated on the surface of the silicon wafer at the reaction temperature of 435 ℃ for 8min; and in the cooling stage of the silicon wafer, nitrogen is used for cooling, and the cooling speed is 80 ℃/min.
By adopting the process to process 245 batches of silicon wafers, the qualification rate of the detected silicon wafers OISF is 100%.
Comparative example 1
Taking drawing of 8 inch heavily doped boron silicon single crystal as an example, the crystal pulling process comprises the steps of material melting, stabilizing, crystal pulling, shoulder placing, shoulder turning, constant diameter and ending, and the following steps are specific:
and (3) material melting: the furnace pressure was 15torr and the argon flow was 80slpm.
Stabilization phase: the furnace pressure was 30torr and the argon flow was 65slpm.
And (3) seeding: the furnace pressure was 30torr, the argon flow was 65slpm, and the pull rate was 3.0mm/min.
Shoulder placing stage: the furnace pressure was 30torr, the argon flow was 65slpm, and the pull rate was 1.1mm/min.
Shoulder turning stage: the furnace pressure was 30torr, the argon flow was 60slpm, and the pull rate was 1.5mm/min.
And (3) an isodiametric stage: argon flow is 60slpm, furnace pressure is 30torr, and pulling speed is 1.1mm/min.
And in the ending stage, controlling the ending time to be 2.3h. And after the ending stage is finished, entering a furnace stopping stage, wherein the argon flow in the furnace stopping stage is 90slpm, and the furnace pressure is 40torr.
And (3) back sealing process: specifically, in the silicon wafer heating stage, the silicon wafer is heated to 680 ℃, and the silicon wafer heating speed is 150 ℃; in the generation stage of the SiO 2 film, TEOS gas is blown to the surface of the silicon wafer, and the SiO 2 film is generated on the surface of the silicon wafer at the reaction temperature of 680 ℃ for 120min; and in the cooling stage of the silicon wafer, nitrogen is used for cooling, and the cooling speed is 80 ℃/min.
By adopting the process to process 263 batches of silicon wafers, the qualification rate of the detected silicon wafers OISF is 55.1 percent.
Comparative example 2
Taking drawing of 8 inch heavily doped boron silicon single crystal as an example, the crystal pulling process comprises the steps of material melting, stabilizing, crystal pulling, shoulder placing, shoulder turning, constant diameter and ending, and the following steps are specific:
and (3) material melting: the furnace pressure was 15torr and the argon flow was 80slpm.
Stabilization phase: the furnace pressure was 30torr and the argon flow was 65slpm.
And (3) seeding: the furnace pressure was 30torr, the argon flow was 65slpm, and the pull rate was 3.0mm/min.
Shoulder placing stage: the furnace pressure was 30torr, the argon flow was 65slpm, and the pull rate was 1.1mm/min.
Shoulder turning stage: the furnace pressure was 30torr, the argon flow was 65slpm, and the pull rate was 1.5mm/min.
And (3) an isodiametric stage: argon flow is 60slpm, furnace pressure is 30torr, and pulling speed is 0.7mm/min.
And in the ending stage, controlling the ending time to be 2.3h. And after the ending stage is finished, entering a furnace stopping stage, wherein the argon flow in the furnace stopping stage is 90slpm, and the furnace pressure is 40torr.
And (3) back sealing process: specifically, in the silicon wafer heating stage, the silicon wafer is heated to 750 ℃, and the silicon wafer heating speed is 150 ℃/min; in the generation stage of the SiO 2 film, TEOS gas is blown to the surface of the silicon wafer, and the SiO 2 film is generated on the surface of the silicon wafer at the reaction temperature of 750 ℃ for 180min; and in the cooling stage of the silicon wafer, nitrogen is used for cooling, and the cooling speed is 80 ℃/min.
By adopting the process to process 209 batches of silicon wafers, the qualification rate of the detected silicon wafer OISF is 25.3 percent.
Comparative example 3
Taking drawing of 8 inch heavily doped boron silicon single crystal as an example, the crystal pulling process comprises the steps of material melting, stabilizing, crystal pulling, shoulder placing, shoulder turning, constant diameter and ending, and the following steps are specific:
and (3) material melting: the furnace pressure was 15torr and the argon flow was 80slpm.
Stabilization phase: the furnace pressure was 30torr and the argon flow was 65slpm.
And (3) seeding: the furnace pressure was 30torr, the argon flow was 65slpm, and the pull rate was 3.0mm/min.
Shoulder placing stage: the furnace pressure was 30torr, the argon flow was 65slpm, and the pull rate was 1.1mm/min.
Shoulder turning stage: the furnace pressure was 30torr, the argon flow was 65slpm, and the pull rate was 1.5mm/min.
And (3) an isodiametric stage: argon flow is 60slpm, furnace pressure is 30torr, and pulling speed is 0.7mm/min.
And in the ending stage, controlling the ending time to be 2.3h. And after the ending stage is finished, entering a furnace stopping stage, wherein the argon flow in the furnace stopping stage is 90slpm, and the furnace pressure is 40torr.
And (3) back sealing process: specifically, in the silicon wafer heating stage, the silicon wafer is heated to 435 ℃, and the silicon wafer heating speed is 150 ℃/min; in the SiO 2 film generation stage, siH 4 and O 2 gas are blown to the surface of the silicon wafer, and a SiO 2 film is generated on the surface of the silicon wafer at the reaction temperature of 435 ℃ for 7min; and cooling the silicon wafer after the heat treatment by nitrogen at the cooling speed of 80 ℃/min.
By adopting the process to process 209 batches of silicon wafers, the qualification rate of the detected silicon wafer OISF is 83.6 percent.
Comparative example 1 and example 3 were compared, and comparative example 1 was adjusted only in the drawing speed at the constant diameter stage, resulting in a silicon wafer yield of 55.1%.
Comparative example 2 and example 3, comparative example 2 did not adjust the isodiametric stage pull rate and back sealing process parameters, resulting in a silicon wafer yield of 25.3%.
Comparative example 3 compared with example 3, comparative example 3 only adjusted the back-sealing process, resulting in a silicon wafer yield of 83.6%.
In summary, parameters such as the pulling speed in the medium diameter stage of the crystal pulling process and the generation temperature of the SiO2 film in the back sealing process are adjusted simultaneously, the high single crystal growth speed can promote the self-gap silicon atoms to diffuse outwards from the center, the aggregation of the self-gap silicon atoms is reduced, meanwhile, the low-temperature back sealing process is combined, the self-gap silicon atoms released at the film interface in the film forming process are further reduced, the probability of OISF nucleation is greatly reduced under the combined action of the self-gap silicon atoms and the low-temperature back sealing process, and therefore the quality of products is improved, namely, the qualification rate of silicon wafers can be remarkably improved, the production cost is reduced, and raw materials are saved.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (9)

1. A processing method for reducing oxidation induced stacking faults of a large-size heavily-doped boron silicon wafer comprises a crystal pulling process of the large-size heavily-doped boron monocrystalline silicon crystal rod and a back sealing process of the silicon wafer, wherein the crystal pulling process comprises the steps of material melting, stabilizing, seeding, shouldering, shoulder turning, isodiametric and ending, and the back sealing process comprises the steps of silicon wafer heating, siO 2 film generation and silicon wafer cooling, and is characterized in that: adjusting the pulling speed at the constant diameter stage to be 1.0-1.2mm/min; and the back sealing process parameters are regulated to ensure that the heating speed of the silicon wafer in the heating stage is 140-160 ℃/min, the reaction temperature of the SiO 2 film in the generating stage is 420-450 ℃, the generating time is 7-10min, and the cooling speed of the silicon wafer in the cooling stage is 78-82 ℃/min.
2. The processing method for reducing oxidation induced stacking faults of a large-size heavily-doped boron silicon wafer according to claim 1, which is characterized by comprising the following steps: the argon flow in the constant diameter stage is 50-70slpm, and the furnace pressure is 20-40torr.
3. The processing method for reducing oxidation induced stacking faults of a large-size heavily-doped boron silicon wafer according to claim 1, which is characterized by comprising the following steps: the furnace pressure in the material melting stage is 9-19torr, and the argon flow is 70-100slpm.
4. The processing method for reducing oxidation induced stacking faults of a large-size heavily-doped boron silicon wafer according to claim 1, which is characterized by comprising the following steps: the furnace pressure in the seeding stage is 25-35torr, the argon flow is 60-70slpm, and the pulling speed is 2.5-3.5mm/min.
5. The processing method for reducing oxidation induced stacking faults of a large-size heavily-doped boron silicon wafer according to claim 1, which is characterized by comprising the following steps: the furnace pressure in the shoulder stage is 25-35torr, the argon flow is 60-70slpm, and the pulling speed is 0.9-1.3mm/min.
6. The processing method for reducing oxidation induced stacking faults of a large-size heavily-doped boron silicon wafer according to claim 1, which is characterized by comprising the following steps: the furnace pressure in the shoulder turning stage is 25-35torr, the argon flow is 50-70slpm, and the pulling speed is 1.3-1.6mm/min.
7. The processing method for reducing oxidation induced stacking faults of a large-size heavily-doped boron silicon wafer according to claim 1, which is characterized by comprising the following steps: the ending time in the ending stage is 2.0-2.5h.
8. The processing method for reducing oxidation induced stacking faults of a large-size heavily-doped boron silicon wafer according to claim 1, which is characterized by comprising the following steps: the silicon wafer is cooled by nitrogen at the cooling speed of 80 ℃/min.
9. The processing method for reducing oxidation induced stacking faults of a large-size heavily-doped boron silicon wafer according to claim 1, which is characterized by comprising the following steps: the heating speed of the silicon wafer heating stage is 150 ℃/min, the reaction temperature of the SiO 2 film generating stage is 430 ℃, the generating time is 8min, and the cooling speed of the silicon wafer cooling stage is 81 ℃/min.
CN202410111926.1A 2024-01-26 2024-01-26 Processing method for reducing oxidation induced stacking faults of large-size heavily-doped boron silicon wafer Pending CN117926396A (en)

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