CN117858157A - 5G communication data processing system and method - Google Patents
5G communication data processing system and method Download PDFInfo
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Abstract
The application discloses a 5G communication data processing system and method. The 5G communication data processing system is arranged at a 5G terminal and comprises: the physical layer processor is provided with a physical layer software module and is used for receiving the 5G communication signal sent by the base station through the physical layer software module, demodulating and descrambling the 5G communication signal to obtain first communication data; the functional entity is configured and scheduled by the physical layer software module, and is used for acquiring the first communication data through the system bus, performing low-density parity check, cyclic redundancy check and MAC header analysis processing on the first communication data to acquire second communication data and a processing identifier, and sending the second communication data and the processing identifier to the physical layer software module through the system bus so that the physical layer software module processes the second communication data according to the processing identifier. The embodiment of the invention can reduce the time consumption of the terminal for processing the data and the system bus bandwidth overhead.
Description
Technical Field
The application belongs to the field of mobile communication, and particularly relates to a 5G communication data processing system and method.
Background
In general, in a 5G mobile terminal, low density parity check (Low Density Parity Check Code, LDPC) decoding and cyclic redundancy check (Cyclic Redundancy Check, CRC) of a physical downlink shared channel (Physical Downlink Shared Channel, PDSCH) are functions of a physical layer, and after the physical layer LDPC decoding and CRC check are completed, correct downlink channel data is received, and then provided to a New Radio (NR) protocol stack MAC layer for MAC header analysis.
However, since the functions of performing the LDPC decoding/CRC check function and performing the MAC header parsing are serial operations, that is, the MAC header parsing function is performed after the LDPC decoding and CRC check functions are performed. And since the MAC control element (MAC Control Element, MAC CE) is information processed by the MAC layer, it is also required to apply for the MAC layer-to-physical layer communication once, which results in a long time consumption.
Disclosure of Invention
The embodiment of the application provides a 5G communication data processing system and a 5G communication data processing method, which can reduce the time consumption of terminal processing data and the system bus bandwidth overhead.
In a first aspect, an embodiment of the present application provides a 5G communication signal processing system, configured to a 5G terminal, where the 5G communication signal processing system includes: the physical layer processor is provided with a physical layer software module and is used for receiving the 5G communication signal sent by the base station through the physical layer software module, demodulating and descrambling the 5G communication signal to obtain first communication data; the functional entity is configured and scheduled by the physical layer software module, and is used for acquiring the first communication data through the system bus, performing low-density parity check, cyclic redundancy check and MAC header analysis processing on the first communication data to acquire second communication data and a processing identifier, and sending the second communication data and the processing identifier to the physical layer software module through the system bus so that the physical layer software module processes the second communication data according to the processing identifier.
According to an embodiment of the first aspect of the present application, the functional entity is specifically configured to: after the first communication data is acquired, performing low-density parity check on the first communication data to obtain a plurality of decoding blocks which are sequentially arranged; and performing cyclic redundancy check and MAC header analysis processing on the plurality of decoding blocks.
According to the foregoing embodiment of the first aspect of the present application, the functional entity is specifically configured to: meanwhile, performing cyclic redundancy check and MAC header analysis processing on the first decoding block, and performing MAC header analysis processing on the first decoding block to obtain a processing identifier and second communication data; when the first decoding block is subjected to cyclic redundancy check to obtain a correct check result, the processing identifier and the second communication data are sent to a physical layer software module through a system bus; performing cyclic redundancy check on the decoding blocks except the first decoding block to obtain third communication data; and sending the third communication data to the physical layer software module.
According to any of the foregoing embodiments of the first aspect of the present application, a 5G communication signal processing system includes: the memory is used for receiving and storing third communication data sent by the physical layer software module; and the protocol stack processor is provided with a MAC layer processing function module and is used for reading the memory to acquire third communication data and processing the third communication data.
According to any of the foregoing embodiments of the first aspect of the present application, the processing identifier includes a MAC control element, and the functional entity is specifically configured to: and sending the second communication data and the processing identifier to the physical layer software module through the system bus so that the physical layer software module processes the second communication data according to the MAC control element.
According to any of the foregoing embodiments of the first aspect of the present application, the processing identifier includes a MAC service packet, and the functional entity is specifically configured to: and sending the second communication data and the processing identifier to the physical layer software module through the system bus so that the physical layer software module submits the second communication data to the radio link control layer according to the MAC service data packet.
According to any of the foregoing embodiments of the first aspect of the present application, the processing identifier includes padding data, and the functional entity is specifically configured to: and sending the second communication data and the processing identifier to the physical layer software module through the system bus so that the physical layer software module does not process the second communication data according to the filling data.
In a second aspect, an embodiment of the present application provides a 5G communication signal processing method, which is applied to the 5G communication signal processing system according to any one of the first aspect, where the 5G communication signal processing method includes: acquiring first communication data through a system bus, wherein the first communication data is obtained by a physical layer processor through a physical layer software module receiving a 5G communication signal sent by a base station, and demodulating and descrambling the 5G communication signal; performing low-density parity check, cyclic redundancy check and MAC header analysis processing on the first communication data to obtain second communication data and a processing identifier; and sending the second communication data and the processing identifier to the physical layer software module through the system bus so that the physical layer software module processes the second communication data according to the processing identifier.
According to an embodiment of the second aspect of the present application, performing low density parity check, cyclic redundancy check and MAC header parsing on the first communication data to obtain second communication data and a processing identifier, including: performing low-density parity check on the first communication data to obtain a plurality of decoding blocks which are sequentially arranged; and performing cyclic redundancy check and MAC header analysis processing on the plurality of decoding blocks.
According to the foregoing embodiment of the second aspect of the present application, performing cyclic redundancy check and MAC header parsing on a plurality of decoding blocks includes: meanwhile, performing cyclic redundancy check and MAC header analysis processing on the first decoding block, and performing MAC header analysis processing on the first decoding block to obtain a processing identifier and second communication data; when the first decoding block is subjected to cyclic redundancy check to obtain a correct check result, the processing identifier and the second communication data are sent to a physical layer software module through a system bus; performing cyclic redundancy check on the decoding blocks except the first decoding block to obtain third communication data; and sending the third communication data to the physical layer software module.
The embodiment of the application provides a 5G communication data processing system and a method, wherein the processing system in the related art realizes low-density parity check (Low Density Parity Check Code, LDPC) decoding and cyclic redundancy check (Cyclic Redundancy Check, CRC) on a functional entity, realizes MAC header analysis on a protocol stack processor (MAC layer), and after the LDPC decoding and the CRC check are completed, the processed data is required to be stored in a memory through a system bus, and then the protocol stack processor reads the data through the system bus and completes header analysis. Thus, storing and reading memory takes a certain amount of time, and frequently using the system bus consumes a certain amount of bus overhead. The 5G communication data processing system has the functions of LDPC decoding, CRC checking and MAC head analysis through one functional entity, so that the first communication data is processed without crossing different entities and storing or taking out a memory, and the time consumption of data processing and the bandwidth overhead of a system bus are reduced.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments of the present application will be briefly described, and it is possible for a person skilled in the art to obtain other drawings according to these drawings without inventive effort.
Fig. 1 is a diagram of a protocol data unit at the time of downlink packet provided in the related art;
fig. 2 is a schematic diagram of a structure of a 5G communication signal processing system provided in the related art;
fig. 3 is another structural diagram of a 5G communication signal processing system provided in the related art;
fig. 4 is a schematic structural diagram of a 5G communication signal processing system according to an embodiment of the present application;
fig. 5 is another schematic structural diagram of a 5G communication signal processing system according to an embodiment of the present application;
fig. 6 is a schematic diagram of still another structure of a 5G communication signal processing system according to an embodiment of the present application;
fig. 7 is a schematic flow chart of a 5G communication signal processing method according to an embodiment of the present application;
fig. 8 is another flow chart of a 5G communication signal processing method according to an embodiment of the present application;
fig. 9 is a schematic communication interaction diagram of a 5G communication signal processing method according to an embodiment of the present application.
Detailed Description
Features and exemplary embodiments of various aspects of the present application are described in detail below to make the objects, technical solutions and advantages of the present application more apparent, and to further describe the present application in conjunction with the accompanying drawings and the detailed embodiments. It should be understood that the specific embodiments described herein are intended to be illustrative of the application and are not intended to be limiting. It will be apparent to one skilled in the art that the present application may be practiced without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the present application by showing examples of the present application.
The data acquisition, storage, use, processing and the like in the technical scheme meet the relevant regulations of national laws and regulations.
It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising … …" does not exclude the presence of other like elements in a process, method, article or apparatus that comprises the element.
It should be understood that the term "and/or" as used herein is merely one relationship describing the association of the associated objects, meaning that there may be three relationships, e.g., a and/or B, may represent: a exists alone, A and B exist together, and B exists alone. In addition, the character "/" herein generally indicates that the front and rear associated objects are an "or" relationship.
It will be apparent to those skilled in the art that various modifications and variations can be made in the present application without departing from the spirit or scope of the application. Accordingly, this application is intended to cover such modifications and variations of this application as fall within the scope of the appended claims (the claims) and their equivalents. The embodiments provided in the examples of the present application may be combined with each other without contradiction.
Before describing the technical solution provided by the embodiments of the present application, in order to facilitate understanding of the embodiments of the present application, the present application first specifically describes the problems existing in the related art:
in a 5G mobile terminal, LDPC decoding and CRC check of a Physical Downlink Shared Channel (PDSCH) are physical layer functions, after the physical layer LDPC decoding and CRC check are completed, correct downlink channel data (the CRC check of the whole transmission block data is correct) is received, and then submitted to an NR protocol stack MAC layer, header analysis of MAC is performed, various types of MAC sub PDU data are analyzed, and if the data sub PDU is a MAC CE, corresponding processing is triggered according to different MAC CEs. If a service data packet (MAC SDU) is contained, the MAC SDU is continued to be submitted to the radio link control layer (Radio Link Control, RLC) for processing, and if padding is not required.
Fig. 1 is a schematic diagram of a protocol data unit (MAC Protocol Date Unit, MAC PDU) provided in the related art when downlink is packetized, and as shown in fig. 1, MAC CEs are put together when downlink is packetized, and before MAC SDUs and padding.
There is only one MAC PDU per transport block (TB block). When physical layer data is transmitted, according to the size and configuration parameters of the TB block, CRC check of the TB block and segmentation of a coding block (CB block) and CRC check of the coding block are carried out.
Fig. 2 is a schematic diagram of a structure of a 5G communication signal processing system provided in the related art; as shown in fig. 2, the LDPC decoding and CRC check of the physical layer are typically implemented by a hardware module and scheduled by a physical layer processor, and the system workflow is as follows: the LDPC decoder/CRC checks to process data, the processed data is stored in a memory, the MAC header analysis (hardware) reads the data from the memory to analyze the MAC header, the analyzed data is sent to the physical layer processor, the physical layer processor processes according to the analyzed data type, and the physical layer processor sends a part of data to the MAC layer for processing by the MAC layer.
Fig. 3 is another structural diagram of a 5G communication signal processing system provided in the related art; as shown in fig. 3, the LDPC decoding and CRC checking of the physical layer may also be implemented by software, called a functional entity, in the physical layer. The header parsing of the MAC layer may be processed by software, and configured in the MAC layer, or may be implemented by a hardware module, which is called another functional entity, and fig. 3 shows that the header parsing is processed by software, and is implemented by processing in the MAC layer of the protocol stack. The two functions of LDPC decoding/CRC checksum MAC header parsing are separated into different protocol layers on the third generation partnership protocol (3rd Generation Partnership Project,3GPP) definition, typically on mobile terminal implementations, and also into different entities. The operation is similar to that of fig. 2, and will not be described here.
When different entities implement LDPC decoding/CRC checking and MAC layer header parsing, respectively, data between the LDPC decoding, CRC checking entities and MAC layer header parsing entities is typically transferred over a system bus on an on-chip or off-chip memory (memory).
The related art has the following four disadvantages:
in the first aspect, in the scheme of implementing LDPC decoding/CRC checking and MAC header parsing using different functional entities, the implementation of the two processing functions is performed serially, after LDPC decoding/CRC checking, the LDPC decoding/CRC needs to be written into a memory, and then the MAC header parsing functional module of the protocol stack reads data on the memory. Therefore, the MAC header analysis requires additional processing time, and also requires time overhead for reading from the memory again, and also requires system bus bandwidth overhead for reading from the system memory, so that the completion time of the MAC header analysis can be obtained after a period of processing time and memory reading time are compared with the transmission block CRC (cyclic redundancy check), and a certain time delay is provided.
In the second aspect, the MAC layer processing module transmits the parsed physical layer MAC CE information to the physical layer to perform physical layer MAC CE processing, and the physical layer needs to apply for communication from the MAC layer to the physical layer once, and only can receive the corresponding MAC CE information, and the physical layer processes the physical layer MAC CE with a certain delay.
In a third aspect, the data is submitted from the physical layer to the MAC layer only if the entire transport block CRC check is correct. Even if the MAC header is received correctly (the first decoded block CRC check is correct), the entire transport block CRC check is incorrect, and the MAC header is discarded, usually only the physical layer has the decoded block information.
In the fourth aspect, the data is interacted with the memory through the system bus, so that the processing of 2 functions can be completed, and certain system consumption exists.
In order to solve the above technical problems, embodiments of the present application provide a method, an apparatus, a device, and a readable storage medium for processing communication data, and a detailed description is first given below of a system and a method for processing 5G communication data provided in the embodiments of the present application.
Fig. 4 is a schematic structural diagram of a 5G communication signal processing system according to an embodiment of the present application. As shown in fig. 4, the 5G communication signal processing system 100 is disposed in a 5G terminal, and the present invention supports a mobile terminal in a 5G frequency division duplex (Frequency Division Duplex/duplex, FDD) mode and a time division duplex (Time Division Duplex, TDD) mode. Such as various types of terminals supporting 5G enhanced mobile broadband (Enhance Mobile Broadband, eMBB), low latency high reliability communications (URLLC), reduced capability/lightweight capability (Reduced Capability, redCap), industrial internet of things (Industrial Internet of Things, IIOT), and the like.
The 5G communication signal processing system 100 includes: a physical layer processor 401 and a functional entity 402.
Physical layer processor 401, physical layer processor 401 is provided with a physical layer software module, and physical layer processor 401 is configured to receive a 5G communication signal sent by a base station through the physical layer software module, and demodulate and descramble the 5G communication signal to obtain first communication data.
Where demodulation is the process of recovering a message from a modulated signal carrying the message. In various information transmission or processing systems, a sender modulates a carrier with a message to be transmitted, producing a signal carrying the message. The receiving end must recover the transmitted message to be utilized, i.e. demodulation. The physical layer demodulates and descrambles the 5G communication signal sent by the base station to obtain first communication data, and other functional modules of the subsequent terminals can process the received signal.
The functional entity 402 is configured and scheduled by the physical layer software module, and the functional entity 402 is configured to obtain first communication data through the system bus L, perform low density parity check (LDPC decoding), cyclic redundancy check (CRC check) and MAC header parsing processing on the first communication data to obtain second communication data and a processing identifier, and send the second communication data and the processing identifier to the physical layer software module through the system bus L, so that the physical layer software module processes the second communication data according to the processing identifier. The functional entity 402 performs low density parity check (LDPC decoding), cyclic redundancy check (CRC check), and MAC header parsing on the first communication data in detail, see the detailed explanation of fig. 5 section below.
In some embodiments, the process identification may include: MAC control element (MAC Control Element, MAC CE), MAC service data packet (MAC Service Date Unit, MAC SDU) and padding data (padding). Different processing identifications and different processing modes are corresponding to the physical layer software module.
In some embodiments, when the processing identity comprises a MAC control element (MAC Control Element, MAC CE), the functional entity 402 is specifically configured to: and sending the second communication data and the processing identifier to the physical layer software module through the system bus L so that the physical layer software module processes the second communication data according to the MAC CE.
In the related art, the MAC layer performs header parsing, after header parsing, the MAC CE information obtained by parsing needs to be transmitted to the physical layer software module to perform MAC CE processing, and the physical layer software module needs to apply for communication from the MAC layer to the physical layer once, so that the physical layer software module can receive the corresponding MAC CE information, and has a certain delay in processing the physical layer MAC CE by the physical layer software module. According to the method and the device, the physical layer software module directly dispatches the functional entity, and the functional entity can directly send the processed second communication data and the processed identification to the physical layer software module without applying for communication, so that time consumption is reduced.
In other embodiments, when the processing identifier includes a MAC service data packet (MAC Service Date Unit, MAC SDU), the functional entity 402 is specifically configured to: the second communication data and the processing identifier are sent to the physical layer software module through the system bus, so that the physical layer software module submits the second communication data to a radio link control layer (Radio Link Control, RLC layer) according to the MAC SDU.
In still other embodiments, the process identification includes padding data (padding), and the functional entity 402 is specifically configured to: and sending the second communication data and the processing identifier to the physical layer software module through the system bus so that the physical layer software module does not process the second communication data according to the padding.
The embodiment of the application provides a 5G communication data processing system, wherein the processing system in the related art realizes low-density parity check (Low Density Parity Check Code, LDPC) decoding and cyclic redundancy check (Cyclic Redundancy Check, CRC) on a functional entity, realizes MAC header analysis on a protocol stack processor (MAC layer), and after the LDPC decoding and the CRC are completed, the processed data are required to be stored in a memory through a system bus, and then the protocol stack processor reads the data through the system bus and completes header analysis. Thus, storing and reading memory takes a certain amount of time, and frequently using the system bus consumes a certain amount of bus overhead. The 5G communication data processing system has the functions of LDPC decoding, CRC checking and MAC head analysis through one functional entity, so that the first communication data is processed without crossing different entities and storing or taking out a memory, and the time consumption of data processing and the bandwidth overhead of a system bus are reduced.
Fig. 5 is another schematic structural diagram of a 5G communication signal processing system according to an embodiment of the present application, as shown in fig. 5, where a functional entity 402 is specifically configured to: after the first communication data is acquired, the first communication data is subjected to LDPC decoding to obtain a plurality of decoding blocks which are sequentially arranged. And then performing CRC and MAC header analysis processing on the plurality of decoding blocks.
With continued reference to fig. 5, in some embodiments, the functional entity 402 performs CRC check and MAC header parsing processing on the plurality of decoding blocks, specifically:
and simultaneously performing Cyclic Redundancy Check (CRC) and MAC header analysis processing on the first decoding block, and performing MAC header analysis processing on the first decoding block to obtain a processing identifier and second communication data.
And under the condition that the first decoding block is subjected to cyclic redundancy check (CRC check) to obtain a correct check result, the processing identifier and the second communication data are sent to the physical layer software module through the system bus.
And performing cyclic redundancy check (CRC check) on the decoding blocks except the first decoding block to obtain third communication data.
And sending the third communication data to the physical layer software module.
Compared with the related art, the related art is that three functions of LDPC decoding, CRC checking and MAC header analysis are executed in series, a plurality of decoding blocks are obtained after LDPC decoding, and the data can be submitted from a physical layer to an MAC layer only after all decoding blocks are CRC checked correctly. Even if the MAC header parsing is correct (the first decoded block CRC and check is correct), the entire transport block CRC check is incorrect and the MAC header parsing result is discarded. According to the embodiment of the application, the functional entity only carries out CRC check and MAC header analysis on the first decoding block at the same time, under the condition that the CRC check of the first decoding block is correct, the MAC header analysis result (the processing identifier and the second communication data) is reserved and sent to the physical layer, the decoding blocks except the first decoding block do not carry out header analysis, only carry out CRC check, and the CRC check result (the third communication data) is sent to the physical layer software module.
Fig. 6 is a schematic diagram of still another structure of a 5G communication signal processing system according to an embodiment of the present application; as shown in fig. 6, the 5G communication signal processing system may further include: memory 403 and a protocol stack processor 404 (MAC layer).
The memory 403, where the memory 403 is configured to receive and store third communication data sent by the physical layer software module.
A protocol stack processor (MAC layer) 404, where the protocol stack processor 404 is provided with a MAC layer processing function module, and the protocol stack processor is configured to read the memory to obtain third communication data, and process the third communication data.
The third communication data is a CRC check result, which is sent to the memory through the physical layer software module and read to the MAC layer 404 from the memory, and the physical layer software module does not perform any processing on the third communication data, and only plays a role of scheduling.
In the related art, the processing includes two accesses to the memory, the first data obtained after the LDPC decoding and CRC checking are completed is stored in the memory for the MAC header analysis (hardware) to read. And the second time, the data after the MAC header analysis is finished is stored into a memory for being read by a physical layer and processed according to the header analysis result. In the embodiment of the application, as one functional entity with the functions of LDPC decoding, CRC checking and MAC header analysis is adopted, the first access to the memory is omitted, the time is saved, and the power consumption of the terminal is also saved.
Based on the same technical conception as the 5G communication signal processing system provided in the above embodiment, the present application also provides a 5G communication signal processing method. See the examples below.
Fig. 7 is a schematic flow chart of a 5G communication signal processing method according to an embodiment of the present application, as shown in fig. 7, the 5G communication signal processing method 700 is applied to the above-mentioned 5G communication signal processing system, and the 5G communication signal processing method may include: s701 to S703.
S701, acquiring first communication data through a system bus, wherein the first communication data is obtained by a physical layer processor through a physical layer software module receiving a 5G communication signal sent by a base station, and demodulating and descrambling the 5G communication signal.
S702, performing low-density parity check, cyclic redundancy check and MAC header analysis processing on the first communication data to obtain second communication data and processing identification.
S703, the second communication data and the processing identifier are sent to the physical layer software module through the system bus, so that the physical layer software module processes the second communication data according to the processing identifier.
The embodiment of the application provides a 5G communication data processing system, wherein the processing system in the related art realizes low-density parity check (Low Density Parity Check Code, LDPC) decoding and cyclic redundancy check (Cyclic Redundancy Check, CRC) on a functional entity, realizes MAC header analysis on a protocol stack processor (MAC layer), and after the LDPC decoding and the CRC are completed, the processed data are required to be stored in a memory through a system bus, and then the protocol stack processor reads the data through the system bus and completes header analysis. Thus, storing and reading memory takes a certain amount of time, and frequently using the system bus consumes a certain amount of bus overhead. The 5G communication data processing system has the functions of LDPC decoding, CRC checking and MAC head analysis through one functional entity, so that the first communication data is processed without crossing different entities and storing or taking out a memory, and the time consumption of data processing and the bandwidth overhead of a system bus are reduced.
In some embodiments, S702, performing low density parity check, cyclic redundancy check, and MAC header parsing on the first communication data to obtain second communication data and a processing identifier, including: step one and step two.
And step one, performing low density parity check (LDPC decoding) on the first communication data to obtain a plurality of decoding blocks which are sequentially arranged.
And step two, performing cyclic redundancy check and MAC header analysis processing on the plurality of decoding blocks.
Fig. 8 is another flow chart of a 5G communication signal processing method provided in the embodiment of the present application, as shown in fig. 8, step two, performing cyclic redundancy check and MAC header parsing processing on a plurality of decoding blocks may include: s801 to S805.
S801, performing cyclic redundancy check and MAC header analysis processing on a first decoding block at the same time, wherein the first decoding block performs MAC header analysis processing to obtain a processing identifier and second communication data;
s802, when the first decoding block is subjected to cyclic redundancy check to obtain a correct check result, sending a processing identifier and second communication data to a physical layer software module through a system bus;
s803, performing cyclic redundancy check on the decoding blocks except the first decoding block to obtain third communication data;
s804, the third communication data is sent to the physical layer software module.
Compared with the related art, the related art is that three functions of LDPC decoding, CRC checking and MAC header analysis are executed in series, a plurality of decoding blocks are obtained after LDPC decoding, and the data can be submitted from a physical layer to an MAC layer only after all decoding blocks are CRC checked correctly. Even if the MAC header parsing is correct (the first decoded block CRC and check is correct), the entire transport block CRC check is incorrect and the MAC header parsing result is discarded. According to the embodiment of the application, the functional entity only carries out CRC check and MAC header analysis on the first decoding block at the same time, under the condition that the CRC check of the first decoding block is correct, the MAC header analysis result (the processing identifier and the second communication data) is reserved and sent to the physical layer, the decoding blocks except the first decoding block do not carry out header analysis, only carry out CRC check, and the CRC check result (the third communication data) is sent to the physical layer software module.
Fig. 9 is a schematic communication interaction diagram of a 5G communication signal processing method according to an embodiment of the present application, where, as shown in fig. 9, the 5G communication signal processing method may include: s901 to S909.
And S901, the base station transmits a 5G communication signal to the physical layer software module.
S902, the physical layer software module modulates and demodulates the 5G communication signal to obtain first communication data.
S903, the physical layer software module sends the first communication data to the functional entity.
S904, the functional entity performs LDPC decoding, CRC check and MAC header analysis processing on the first communication data to obtain second communication data, third communication data and processing identification.
S905, the functional entity sends the second communication data and the processing identifier to the physical layer software module.
S906, the physical layer software module processes the second communication data according to the processing identification.
S907, the functional entity sends third communication data to the MAC layer.
And S908, the physical layer software module sends the processed related information to the MAC layer.
In general, the present application has the advantage that in the first aspect, the function of MAC header parsing is completely integrated into an entity supporting the LDPC decoding and CRC checking functions, and is processed in parallel with the CRC checking functions, and the MAC header parsing process is completely parallel to the CRC checking process, so that the overall processing delay of the system is reduced. In the second aspect, the physical layer uses the physical layer MAC CE according to the first decoding block CRC check result and the parallel MAC header parsing result, so as to reduce the probability of discarding the physical layer MAC CE due to the whole transport block CRC check error. In a third aspect, physical layer software may quickly acquire and respond to a physical layer MAC CE. In the fourth aspect, the MAC header processing does not need to be read from the system memory through the system bus, thereby saving overhead and power consumption.
It should be clear that the present application is not limited to the particular arrangements and processes described above and illustrated in the drawings. For the sake of brevity, a detailed description of known methods is omitted here. In the above embodiments, several specific steps are described and shown as examples. However, the method processes of the present application are not limited to the specific steps described and illustrated, and those skilled in the art can make various changes, modifications, and additions, or change the order between steps, after appreciating the spirit of the present application.
The functional blocks shown in the above-described structural block diagrams may be implemented in hardware, software, firmware, or a combination thereof. When implemented in hardware, it may be, for example, an electronic circuit, an application specific integrated circuit (Application Specific Integrated Circuit, ASIC), suitable firmware, a plug-in, a function card, or the like. When implemented in software, the elements of the present application are the programs or code segments used to perform the required tasks. The program or code segments may be stored in a machine readable medium or transmitted over transmission media or communication links by a data signal carried in a carrier wave. A "machine-readable medium" may include any medium that can store or transfer information. Examples of machine-readable media include electronic circuitry, semiconductor Memory devices, read-Only Memory (ROM), flash Memory, erasable Read-Only Memory (Erasable Read Only Memory, EROM), floppy disks, compact discs (Compact Disc Read-Only Memory, CD-ROM), optical disks, hard disks, fiber optic media, radio Frequency (RF) links, and the like. The code segments may be downloaded via computer networks such as the internet, intranets, etc.
It should also be noted that the exemplary embodiments mentioned in this application describe some methods or systems based on a series of steps or devices. However, the present application is not limited to the order of the above-described steps, that is, the steps may be performed in the order mentioned in the embodiments, may be different from the order in the embodiments, or several steps may be performed simultaneously.
Aspects of the present disclosure are described above with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the disclosure. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, enable the implementation of the functions/acts specified in the flowchart and/or block diagram block or blocks. Such a processor may be, but is not limited to being, a general purpose processor, a special purpose processor, an application specific processor, or a field programmable logic circuit. It will also be understood that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware which performs the specified functions or acts, or combinations of special purpose hardware and computer instructions.
In the foregoing, only the specific embodiments of the present application are described, and it will be clearly understood by those skilled in the art that, for convenience and brevity of description, the specific working processes of the systems, modules and units described above may refer to the corresponding processes in the foregoing method embodiments, which are not repeated herein. It should be understood that the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive various equivalent modifications or substitutions within the technical scope of the present application, which are intended to be included in the scope of the present application.
Claims (10)
1. A 5G communication signal processing system, configured to a 5G terminal, comprising:
the physical layer processor is provided with a physical layer software module, and is used for receiving a 5G communication signal sent by a base station through the physical layer software module, demodulating and descrambling the 5G communication signal to obtain first communication data;
the functional entity is configured and scheduled by the physical layer software module, and is used for acquiring the first communication data through a system bus, performing low-density parity check, cyclic redundancy check and MAC header analysis processing on the first communication data to obtain second communication data and a processing identifier, and sending the second communication data and the processing identifier to the physical layer software module through the system bus so that the physical layer software module processes the second communication data according to the processing identifier.
2. The 5G communication signal processing system according to claim 1, wherein the functional entity is specifically configured to:
after the first communication data is acquired, performing low-density parity check on the first communication data to obtain a plurality of decoding blocks which are sequentially arranged;
and performing cyclic redundancy check and MAC header analysis processing on the plurality of decoding blocks.
3. The 5G communication signal processing system according to claim 2, wherein the functional entity is specifically configured to:
simultaneously, performing cyclic redundancy check and MAC header analysis processing on a first decoding block, wherein the first decoding block performs MAC header analysis processing to obtain the processing identifier and the second communication data;
when the first decoding block passes through the cyclic redundancy check and the check result is correct, the processing identifier and the second communication data are sent to the physical layer software module through the system bus;
performing cyclic redundancy check on the decoding blocks except the first decoding block to obtain third communication data;
and sending the third communication data to the physical layer software module.
4. A 5G communication signal processing system according to claim 3, characterized in that the system comprises:
the memory is used for receiving and storing the third communication data sent by the physical layer software module;
and the protocol stack processor is provided with a MAC layer processing function module and is used for reading the memory to acquire the third communication data and processing the third communication data.
5. The 5G communication signal processing system according to claim 1, wherein the processing identity comprises a MAC control element, and wherein the functional entity is specifically configured to:
and sending the second communication data and the processing identifier to the physical layer software module through the system bus, so that the physical layer software module processes the second communication data according to the MAC control element.
6. The 5G communication signal processing system of claim 1, wherein the processing identifier comprises a MAC service data packet, and wherein the functional entity is specifically configured to:
and sending the second communication data and the processing identifier to the physical layer software module through the system bus, so that the physical layer software module submits the second communication data to a radio link control layer according to the MAC service data packet.
7. The 5G communication signal processing system according to claim 1, wherein the processing identity comprises padding data, the functional entity being specifically configured to:
and sending the second communication data and the processing identifier to the physical layer software module through the system bus, so that the physical layer software module does not process the second communication data according to the filling data.
8. A 5G communication signal processing method, applied to a 5G communication signal processing system according to any one of claims 1 to 7, the method comprising:
acquiring first communication data through a system bus, wherein the first communication data is obtained by the physical layer processor through a physical layer software module receiving a 5G communication signal sent by a base station and demodulating and descrambling the 5G communication signal;
performing low-density parity check, cyclic redundancy check and MAC header analysis processing on the first communication data to obtain second communication data and a processing identifier;
and sending the second communication data and the processing identifier to the physical layer software module through the system bus, so that the physical layer software module processes the second communication data according to the processing identifier.
9. The method for processing a 5G communication signal according to claim 8, wherein the performing low density parity check, cyclic redundancy check, and MAC header parsing on the first communication data to obtain second communication data and a processing identifier includes:
performing low-density parity check on the first communication data to obtain a plurality of decoding blocks which are sequentially arranged;
and performing cyclic redundancy check and MAC header analysis processing on the plurality of decoding blocks.
10. The method of processing a 5G communication signal according to claim 9, wherein the performing cyclic redundancy check and MAC header parsing processing on the plurality of decoding blocks comprises:
simultaneously, performing cyclic redundancy check and MAC header analysis processing on a first decoding block, wherein the first decoding block performs MAC header analysis processing to obtain the processing identifier and the second communication data;
when the first decoding block passes through the cyclic redundancy check and the check result is correct, the processing identifier and the second communication data are sent to the physical layer software module through the system bus;
performing cyclic redundancy check on the decoding blocks except the first decoding block to obtain third communication data;
and sending the third communication data to the physical layer software module.
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