CN112583418A - CRC (Cyclic redundancy check) method and device - Google Patents

CRC (Cyclic redundancy check) method and device Download PDF

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CN112583418A
CN112583418A CN201910927889.0A CN201910927889A CN112583418A CN 112583418 A CN112583418 A CN 112583418A CN 201910927889 A CN201910927889 A CN 201910927889A CN 112583418 A CN112583418 A CN 112583418A
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crc
result
data
check
sampling point
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彭理健
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ZTE Corp
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ZTE Corp
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/09Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
    • H03M13/091Parallel or block-wise CRC computation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105Decoding

Abstract

The present disclosure provides a CRC check method, which performs a first CRC check on equalized data after data equalization and before LDPC decoding to obtain a first CRC check result. And if the first CRC result is wrong, the LDPC decoding operation is not executed any more, and the first CRC result is reported to the control plane entity. The method can identify the abnormity and report the abnormity before LDCP decoding, thereby avoiding CRC check misjudgment, greatly reducing the misjudgment probability of CRC check and increasing the stability and reliability of the system; and the CRC check node is advanced, the CRC check result is reported in advance when the data abnormality is found, and the decoding process is skipped, so that the occupation of the decoder is reduced, and the processing capacity and the bus bandwidth of the decoder are prevented from being wasted by abnormal data. The present disclosure also provides a CRC check device, a check apparatus, and a computer readable medium.

Description

CRC (Cyclic redundancy check) method and device
Technical Field
The present disclosure relates to the field of communications technologies, and in particular, to a CRC check method, an apparatus, a check device, and a computer readable medium.
Background
In the field of 5G (5th-Generation, fifth Generation mobile communication technology) wireless communication, a Protocol specifies that an LDPC (Low Density Parity Check Code) is used for Data encryption and decryption in a Data channel, and in a decoding process, an H matrix of the LDPC + CRC (cyclic Redundancy Check) is used for decoding Check, if the Check is passed, the CRC is determined to be correct, the Data and a CRC Check result are reported to an upper user plane for processing, and a user plane entity analyzes Data to obtain an MAC (Media Access Control) header, an RLC (Radio Link Control) header, a PDCP (Packet Data Convergence Protocol) header, a Packet Data Convergence Protocol) header, and the like, and sends the MAC (Media Access Control) header, the RLC (Radio Link Control) header, the PDCP (Packet Data Convergence Protocol) header, and the like to corresponding components for processing.
In a 5G communication system, the main process of processing an Uplink PUSCH (Physical Uplink Shared Channel) signal generally includes: empty data, IFFT (Inverse Fast Fourier Transform), time-frequency transformation, channel estimation, de-layer mapping, equalization, demodulation, descrambling, de-interleaving, rate de-matching, HARQ (Hybrid Automatic Repeat reQuest ), LDPC decoding, H matrix, CB (code block ) CRC decision, code block concatenation, TB (Transmit block, transport block) CRC check, and reporting of CRC check results and data. According to the above process, under different decoder configurations, there is a possibility of misjudgment, such as: if the check mode of the configured TB CRC is CRC16, the misjudgment probability is 1/(2^ 16); if the check mode is CRC24, the false judgment probability is 1/(2^ 24); if H + CRC check is adopted (H adopts all matrixes), the misjudgment probability is smaller than 1/(10^7), but the misjudgment probability required by a 5G system is smaller than 1/(10^6), even if the misjudgment probability is approximately calculated as 1/(10^7) according to an H + CRC check mode, the uplink 5ms frame format is adopted, and when a single UE (User Equipment) is in full irrigation, the time interval of the misjudgment is (10^7)/400s, which is about 7 hours, so that the reliability and the safety of the system are influenced.
Disclosure of Invention
The present disclosure provides a CRC check method, an apparatus, a check device, and a computer readable medium, which are used to solve the problems of high false positive probability of CRC check and poor stability and reliability of a system.
In a first aspect, an embodiment of the present disclosure provides a CRC check method, where after data equalization and before LDPC decoding is performed on low density parity check codes, a first cyclic redundancy check CRC is performed on the equalized data to obtain a first CRC check result;
and in response to the first CRC result being an error, not executing LDPC decoding operation any more, and reporting the first CRC result to a control plane entity.
Preferably, after the data equalization and before the LDPC decoding, performing a first cyclic redundancy check CRC on the equalized data to obtain a first CRC result, including:
after data equalization and before data demodulation, checking the power of each resource element RE sampling point of a transmission block TB to obtain a first checking result;
the first CRC check result is an error, including: the first check result is an error;
the method further comprises the following steps: and responding to the first CRC check result as correct, and performing data demodulation.
Preferably, after the data equalization and before the LDPC decoding, performing a first cyclic redundancy check CRC on the equalized data to obtain a first CRC result, including:
after data demodulation and before LDPC decoding, checking the value of soft information of each resource element RE sampling point of a transmission block TB to obtain a second checking result, wherein the soft information is the maximum likelihood probability value that the value of a transmission signal is 0 or 1 respectively;
the first CRC check result is an error, including: the second check result is an error;
the method further comprises the following steps: performing LDPC decoding in response to the second check result being correct.
Preferably, after the data equalization and before the LDPC decoding, performing a first cyclic redundancy check CRC on the equalized data to obtain a first CRC result, including:
after data equalization and before data demodulation, checking the power of each resource element RE sampling point of a transmission block TB to obtain a first checking result;
after data demodulation and before LDPC decoding, checking the value of soft information of each RE sampling point of the TB to obtain a second checking result, wherein the value of the soft information is the maximum likelihood probability value that the value of a transmission signal is 0 or 1 respectively; wherein the data demodulation is performed in response to the first check result being correct;
the first CRC check result is an error, including: the first check result or the second check result is an error.
Preferably, the checking the power of each resource element RE sample point of the transport block TB includes: judging whether the power of each RE sampling point of the TB meets a preset first condition or not;
the first check result is an error, including: the power of each RE sampling point of the TB satisfies the first condition;
the value of the soft information of each RE sampling point of the check transmission block TB comprises the following steps: judging whether the value of the soft information of each RE sampling point of the TB meets a preset second condition or not;
the second check result is an error, including: and the value of the soft information of each RE sampling point of the TB satisfies the second condition.
Preferably, the first condition includes at least one of:
the power of the whole RE sampling point is smaller than or equal to a preset first threshold value;
the power of the whole RE sampling point is larger than or equal to a preset second threshold value;
the power of the real part of the RE sampling point is less than or equal to a preset third threshold value;
the power of the imaginary part of the RE sampling point is smaller than or equal to a preset fourth threshold value;
wherein the first threshold is less than the second threshold.
Preferably, the second condition comprises one of:
the value of the soft information of the RE sampling point is 0;
the value of the soft information of the RE sampling point is a positive maximum value;
the value of the soft information of the RE sampling point is a negative maximum value.
Further, the CRC check method further includes:
after the LDPC decoding is carried out on the data, carrying out second CRC to obtain a second CRC result;
and in response to that the second CRC check result is correct, checking the decoded data of each RE sampling point of the TB to obtain a third CRC check result, and reporting the third CRC check result to a control plane entity.
Preferably, the verifying the decoded data of each RE sample of the TB includes: judging whether the decoded data of each RE sampling point of the TB conforms to a user plane protocol format or not;
and if the decoded data of each RE sample point of the TB conforms to the user plane protocol format, the third CRC check result is correct.
On the other hand, the embodiment of the present disclosure further provides a CRC checking apparatus, including: the first check module is used for performing first Cyclic Redundancy Check (CRC) on the equalized data after the decoding device performs data equalization and before the decoding device performs Low Density Parity Check (LDPC) decoding to obtain a first CRC check result;
and the processing module is used for responding to the first CRC result as an error, not executing LDPC decoding operation any more and reporting the first CRC result to a control plane entity.
In another aspect, an embodiment of the present disclosure further provides a verification apparatus, including: one or more processors and storage; the storage device stores one or more programs, and when the one or more programs are executed by the one or more processors, the one or more processors implement the CRC check method provided in the foregoing embodiments.
The disclosed embodiments also provide a computer readable medium, on which a computer program is stored, wherein the computer program, when executed, implements the CRC check method provided in the foregoing embodiments.
According to the CRC check method provided by the embodiment of the disclosure, after data equalization and before LDPC decoding, first CRC check is performed on the equalized data to obtain a first CRC check result. And if the first CRC result is wrong, the LDPC decoding operation is not executed any more, and the first CRC result is reported to the control plane entity. The method can identify the abnormity and report the abnormity before LDCP decoding, thereby avoiding CRC check misjudgment, greatly reducing the misjudgment probability of CRC check and increasing the stability and reliability of the system; and the CRC check node is advanced, the CRC check result is reported in advance when the data abnormality is found, and the decoding process is skipped, so that the occupation of the decoder is reduced, and the processing capacity and the bus bandwidth of the decoder are prevented from being wasted by abnormal data.
Drawings
FIG. 1 is a system architecture diagram provided by an embodiment of the present disclosure;
fig. 2 is a flowchart of a CRC check method provided by an embodiment of the present disclosure;
FIG. 3 is one of the flow charts provided by the embodiments of the present disclosure for performing a first CRC check;
fig. 4a is a schematic diagram of a distribution of normal RE samples provided by an embodiment of the present disclosure;
fig. 4b is a schematic diagram of a distribution of abnormal RE samples provided by the embodiment of the present disclosure;
fig. 5 is a second flowchart of performing a first CRC check according to the embodiment of the present disclosure;
FIG. 6 is a third flowchart of performing a first CRC check according to the embodiment of the present disclosure;
FIG. 7 is a flow chart for performing a second CRC check provided by embodiments of the present disclosure;
fig. 8 is a schematic structural diagram of a CRC check apparatus according to an embodiment of the present disclosure;
fig. 9 is a schematic structural diagram of a first verification module provided in the embodiment of the present disclosure;
fig. 10 is a schematic structural diagram of a CRC check apparatus according to another embodiment of the present disclosure.
Detailed Description
Example embodiments will be described more fully hereinafter with reference to the accompanying drawings, but which may be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
Embodiments described herein may be described with reference to plan and/or cross-sectional views in light of idealized schematic illustrations of the disclosure. Accordingly, the example illustrations can be modified in accordance with manufacturing techniques and/or tolerances. Accordingly, the embodiments are not limited to the embodiments shown in the drawings, but include modifications of configurations formed based on a manufacturing process. Thus, the regions illustrated in the figures have schematic properties, and the shapes of the regions shown in the figures illustrate specific shapes of regions of elements, but are not intended to be limiting.
Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
In the prior art, in a DCI virtual detection and no UE access scenario, a base station still issues a demodulation message to a decoder, and demodulated data is background noise, if the energy of the background noise data is low enough, it is misjudged that CRC check is correct, but the data is an unexpected value, which may cause abnormal processing of the data due to unsatisfied protocol regulations during user plane processing, and cause system instability.
In order to solve the above problem, an embodiment of the present disclosure provides a CRC checking method, which is applied to a system including a decoding apparatus and a CRC checking apparatus, as shown in fig. 1. The decoding device is used for carrying out physical layer symbol level processing and bit level decoding processing; the CRC check device is used for carrying out different CRC checks at different stages of the decoding and decoding processes.
The CRC check method according to the embodiment of the present disclosure is described in detail below with reference to fig. 2. As shown in fig. 2, the method comprises the steps of:
and 11, after data equalization and before LDPC decoding, performing first CRC on the equalized data to obtain a first CRC result.
Specifically, the first CRC check may be performed after data equalization and before data demodulation, or may be performed after data demodulation and before LDPC decoding, or may be performed after data equalization and before data demodulation and before LDPC decoding.
Subsequently, the specific implementation of the first CRC check will be described in detail with reference to fig. 3, 5, and 6 for the above three cases.
And step 12, in response to the first CRC result being an error, no LDPC decoding operation is performed any more, and the first CRC result is reported to the control plane entity.
In this step, once the data abnormality is found through the first CRC check result, the LDPC decoding operation is no longer performed, that is, the decoding process is interrupted, and the first CRC check result with the attribute being an error is reported to the control plane entity, and the relevant data is reported to the user plane entity.
As can be seen from steps 11 to 12, in the CRC check method provided in the embodiment of the present disclosure, after data equalization and before LDPC decoding are performed, first CRC check is performed on the equalized data, so as to obtain a first CRC check result. And if the first CRC result is wrong, the LDPC decoding operation is not executed any more, and the first CRC result is reported to the control plane entity. In the prior art, under the condition of DCI virtual detection and no UE access, a base station still sends a demodulation message to a decoder, and the demodulation data is background noise, if the energy of the background noise data is low enough, the base station misjudges that the CRC check is correct, but the data is not an expected value, so that the data is processed abnormally due to the fact that the protocol regulation is not met when the data is processed on a user plane, and the system is unstable; the method can identify the abnormity and report the abnormity before LDCP decoding, thereby avoiding CRC check misjudgment, greatly reducing the misjudgment probability of CRC check and increasing the stability and reliability of the system; and the CRC check node is advanced, the CRC check result is reported in advance when the data abnormality is found, and the decoding process is skipped, so that the occupation of the decoder is reduced, and the processing capacity and the bus bandwidth of the decoder are prevented from being wasted by abnormal data.
In another embodiment of the present disclosure, as shown in fig. 3, after data equalization and before LDPC decoding, a first CRC check is performed on the equalized data to obtain a first CRC check result (i.e., step 11), which specifically includes the following steps:
step 111, after data equalization and before data demodulation, checking power of each RE (Resource Element) sampling point of the TB to obtain a first checking result.
In this step, checking the power of each RE sample of the TB includes: and judging whether the power of each RE sampling point of the TB meets a preset first condition. That is, the power of each RE sample of the TB is detected with the time slot as a cycle, and it is determined whether the first check result is correct or incorrect by respectively determining whether the power of each RE sample of the TB satisfies a preset first condition.
The first checking that the result is an error comprises: the power of each RE sample point of the TB satisfies the first condition, that is, when each RE sample point in the TB satisfies the first condition, it is determined that the first check result is an error; and when at least one RE sampling point in the TB does not meet the first condition, determining that the first check result is correct.
In some embodiments of the present disclosure, the first condition may include at least one of (1) to (4):
(1) the power of the whole RE sampling point is smaller than or equal to a preset first threshold value;
(2) the power of the whole RE sampling point is larger than or equal to a preset second threshold, wherein the first threshold is smaller than the second threshold;
(3) the power of the real part of the RE samples is less than or equal to a preset third threshold, e.g., 0 or close to 0;
(4) the power of the imaginary part of the RE samples is less than or equal to a preset fourth threshold, e.g., 0 or close to 0.
Fig. 4a is a schematic diagram of energy (power) distribution of normal RE samples, and as shown in fig. 4a, the power of the real part and the power of the imaginary part of the normal RE samples are modulo unequal to 0, i.e. are not concentrated in the zero point. Fig. 4b is a schematic diagram of the energy (power) distribution of the abnormal RE sample, and as shown in fig. 4b, the power of the real part and the power of the imaginary part of the abnormal RE sample are modulo equal to 0 or close to 0, i.e. concentrated near the zero point.
Step 112, determining whether the first check result is an error, if yes, executing step 12; otherwise, data demodulation is performed.
In this step, if the first check result is an error, the first CRC check result is considered to be an error, and at this time, the LDPC decoding operation is not performed any more, and the first CRC check result is reported to the control plane entity (i.e., step 12 is performed). And if the first check result is correct, the first CRC check result is considered to be correct, and at the moment, the operations of data demodulation, LDPC decoding, conventional CRC check and the like are sequentially executed.
As can be seen from step 111-112, for the equalized data, it is first determined whether the power of the RE sample point of the TB meets a set threshold condition (i.e., a first condition), if the power meets the threshold condition, the next data demodulation processing is performed, and if the power does not meet the threshold condition, a first CRC result with an error attribute is reported to the control plane entity, hard determination is forcibly completed in advance, subsequent decoding processing is skipped, and hard determination data is reported to the user plane entity.
In another embodiment of the present disclosure, as shown in fig. 5, after data equalization and before LDPC decoding, a first CRC check is performed on the equalized data to obtain a first CRC check result (i.e., step 11), which specifically includes the following steps:
and step 111', after data demodulation and before LDPC decoding, checking the value of the soft information of each RE sampling point of the TB to obtain a second checking result.
The value of the soft information is the maximum likelihood probability value that the value of the transmission signal is 0 or 1 respectively.
The data demodulation is actually a statistical process, that is, when a received signal is counted as y, a maximum likelihood probability value P (bm | y) of a transmitted signal being bm (bm takes values of b0 and b1, respectively representing that b is 0 and b is 1) is counted, and the probability value P is soft information after data demodulation. Theoretically, the probability value should satisfy normal distribution of an AWGN (Additive White Gaussian Noise) channel, so that CRC check can be implemented by detecting and judging whether an obvious abnormal value exists in the value of the soft information of each RE sample point of the TB block.
In this step, the checking the value of the soft information of each RE sample point of the TB includes: and judging whether the value of the soft information of each RE sampling point of the TB meets a preset second condition. That is, the time slot is taken as a cycle, the value of the soft information of each RE sample point of the TB is detected, and whether the value of the soft information of each RE sample point of the TB meets the preset second condition is respectively judged, so that the second check result is determined to be correct or wrong.
The second check result being an error includes: the value of the soft information of each RE sampling point of the TB meets a second condition, namely, when each RE sampling point in the TB meets the second condition, the second check result is determined to be an error; and when at least one RE sampling point in the TB does not meet the second condition, determining that the second check result is correct.
In some embodiments of the present disclosure, the second condition includes one of the following (1) to (3):
(1) the value of the soft information of the RE sampling point is 0;
(2) the value of the soft information of the RE sampling point is a positive maximum value;
(3) the value of the soft information of the RE sampling point is a negative maximum value.
The soft information values of all RE samples in the TB are all 0, which means that the probability that the transmission signal bm of all RE samples takes the value b0 or b1 is 50% respectively. The soft information values of all RE samples in the TB are positive maximum values, which means that the values of the sending signals bm of all RE samples are b 1. The soft information values of all RE samples in the TB are negative maximum values, which means that the values of the sending signals bm of all RE samples are b 0.
Step 112', determining whether the second check result is an error, if yes, executing step 12; otherwise, performing LDPC decoding.
In this step, if the second check result is an error, the first CRC check result is considered to be an error, and at this time, the LDPC decoding operation is not performed any more, and the first CRC check result is reported to the control plane entity (i.e., step 12 is performed). And if the first check result is correct, the first CRC check result is considered to be correct, and at the moment, operations such as LDPC decoding, CRC check and the like are sequentially executed.
Through steps 111 '-112', it can be seen that, for the demodulated data, it is first determined whether the value of the soft information of the RE sampling point of the TB meets a set second condition, if the value meets the second condition, the next LDPC decoding process is performed, and if the value does not meet the second condition, the first CRC check result with the attribute being wrong is reported to the control plane entity, the hard decision is forcibly completed in advance, the subsequent decoding process is skipped, and the hard decision data is reported to the user plane entity.
In another embodiment of the present disclosure, as shown in fig. 6, after data equalization and before LDPC decoding, a first CRC check is performed on the equalized data to obtain a first CRC check result (i.e., step 11), which specifically includes the following steps:
and step 111, after data equalization and before data demodulation, checking the power of each RE sampling point of the TB to obtain a first checking result.
Step 112, determining whether the first check result is an error, if yes, executing step 12; otherwise, step 111' is performed.
And step 111', after data demodulation and before LDPC decoding, checking the value of the soft information of each RE sampling point of the TB to obtain a second checking result.
Step 112', determining whether the second check result is an error, if yes, executing step 12; otherwise, performing LDPC decoding.
The specific implementation of the steps 111-112 and 111 '-112' is as described above, and will not be described herein again.
As can be seen from step 111-112', for the equalized data, it is first determined whether the power of the RE sample point of the TB meets a set threshold condition (i.e., a first condition), if the power meets the threshold condition, the next data demodulation processing is performed, and if the power does not meet the threshold condition, the first CRC result with the attribute of error is reported to the control plane entity, the hard determination is forcibly completed in advance, the subsequent decoding processing is skipped, and the hard determination data is reported to the user plane entity. And aiming at the demodulated data, firstly judging whether the value of the soft information of the RE sample point of the TB accords with a set second condition, if so, carrying out the next LDPC decoding processing, if not, reporting a first CRC result with the attribute of error to a control plane entity, forcibly completing hard judgment in advance, jumping out the subsequent decoding processing, and reporting hard judgment data to a user plane entity. That is, in this embodiment, before LDPC decoding, CRC check is performed once after data equalization and before data demodulation to obtain a first check result, and CRC check is performed once after data demodulation and before LDPC decoding to obtain a second check result, and if any one of the first check result and the second check result is an error, the first CRC check result is considered as an error, and LDPC decoding is no longer performed.
In another embodiment of the present disclosure, as shown in fig. 7, the CRC checking method may further include the steps of:
and step 21, after the data is subjected to LDPC decoding, performing second CRC to obtain a second CRC result.
In this step, the second CRC check may be performed in a conventional CRC check manner, which is not described herein again.
Step 22, determining whether the second CRC result is an error, if yes, executing step 25; otherwise, step 23 is executed.
In this step, if the second CRC result is an error, the second CRC result is directly reported to the control plane entity (i.e., step 25 is executed), and the related data is reported to the user plane entity. If the second CRC check result is correct, the decoded data of each RE sample of the TB is further checked (i.e., step 23 is executed).
And step 23, checking the decoded data of each RE sampling point of the TB to obtain a third CRC check result.
According to the protocol specification of the wireless system, TB data that is decoded and sent to the user plane entity needs to conform to the formats of various MAC (Media Access Control) headers, RLC (Radio Link Control protocol) headers, PDCP headers, and the like of the protocol specification, and therefore, this step determines whether the decoded data (the decoded data is opposite to the data before decoding, also referred to as hard bit data) of each RE sample of the decoded TB conforms to the format of the protocol.
If the decoded data of at least one RE sampling point of the TB does not conform to the user plane protocol format, the third CRC check result is an error; and if the decoded data of each RE sample point of the TB conforms to the user plane protocol format, the third CRC check result is correct. In some embodiments, it may be determined whether the decoded data of each RE sample point of the TB is all 0, that is, whether the decoded data meets the user plane protocol format (i.e., is an unexpected value) or not, that is, if the decoded data of at least one RE sample point of the TB is all 0, it is considered that the decoded data does not meet the user plane protocol format, and the third CRC check result is an error; and if the decoded data of each RE sample point of the TB is not all 0, determining that the data accords with the user plane protocol format, and determining that the third CRC check result is correct.
If the conventional CRC result (i.e., the second CRC result) is correct, in this step, the decoded data check result (i.e., the third CRC result) of each RE sampling point of the TB is an error, the third CRC result with the attribute of being an error is reported to the control plane entity, so that the check result is turned over forcibly.
And 24, reporting the third CRC result to the control plane entity.
This step is the final CRC check step, so that the third CRC check result is reported to the control plane entity no matter whether the third CRC check result is correct or incorrect.
And step 25, reporting the second CRC result to the control plane entity.
In this step, a second CRC result with an error attribute is reported to the control plane entity.
It can be seen from steps 21-25 that, by further adding a step of checking the decoded data of each RE sampling point of the TB after the conventional CRC check step and under the condition that the conventional CRC check result is correct, the error rate of LDPC decoding can be further reduced, and the stability and reliability of the system can be improved.
In this embodiment, for equalized data, it is first determined whether the power of an RE sample point of a TB meets a set threshold condition (i.e., a first condition), and if the power meets the threshold condition, the next data demodulation processing is performed, and if the power does not meet the threshold condition, a first CRC check result with an incorrect attribute is reported to a control plane entity, hard determination is forcibly completed in advance, subsequent decoding processing is skipped, and hard determination data is reported to a user plane entity. And aiming at the demodulated data, firstly judging whether the value of the soft information of the RE sample point of the TB accords with a set second condition, if so, carrying out the next LDPC decoding processing, if not, reporting a first CRC result with the attribute of error to a control plane entity, forcibly completing hard judgment in advance, jumping out the subsequent decoding processing, and reporting hard judgment data to a user plane entity. And after the LDPC decoding, performing second CRC (namely conventional CRC) check, if the second CRC check result is correct, determining data after the RE sampling point decoding of the TB, and reporting the CRC result (namely a third CRC check result) of this time. That is to say, in this embodiment, if any one of the first CRC result (including the first check result and the second check result), the second CRC result, and the third CRC result is an error, the check result with the attribute of the error is reported. If the hard judgment data exists, reporting the error data after the hard judgment; if no hard judgment data exists, the hard judgment is forcibly completed in advance, and the subsequent decoding processing is skipped.
It should be noted that, in another embodiment of the present disclosure, the CRC check method may not include the first CRC check step (that is, neither the power of the RE samples of the check TB nor the value of the soft information of the RE samples of the check TB is included), the second CRC check step, and after performing the conventional CRC check, the third CRC check step is directly performed. The scheme can also reduce the error rate of LDPC decoding and improve the stability and reliability of the system.
In the embodiment of the disclosure, in a decoding link, different monitoring conditions are set for several key monitoring points, and corresponding abnormal alarms are reported. The stage and monitoring content of the set monitoring point comprise one or any combination of the following steps:
a. aiming at data after equalization and before demodulation, monitoring the power of each RE sampling point of the whole TB block;
b. monitoring the value of soft information of each RE sampling point of a TB block aiming at data after demodulation and before LDPC decoding;
c. and aiming at the data of each RE sampling point after LDPC decoding, monitoring whether the data conforms to a user plane protocol format.
If any one of a and b detects the abnormity, reporting the CRC result with the attribute of error in advance, and skipping the decoding processing of the subsequent TB block, thereby reducing the occupation of the decoder and improving the stability and reliability of the system.
Based on the same technical concept, an embodiment of the present disclosure further provides a CRC checking apparatus, as shown in fig. 8, the CRC checking apparatus includes: the first check module 100 is configured to perform a first Cyclic Redundancy Check (CRC) on the equalized data after data equalization and before Low Density Parity Check (LDPC) decoding by the decoding apparatus, so as to obtain a first CRC result.
The processing module 200 is configured to, in response to that the first CRC result is an error, not perform LDPC decoding operation any more, and report the first CRC result to the control plane entity.
In some embodiments of the present disclosure, the first checking module 100 includes a first checking unit or a second checking unit, where the first checking unit is configured to check power of each resource element RE sample point of the transport block TB after data equalization and before data demodulation by the decoding apparatus, so as to obtain a first checking result.
The processing module 200 is configured to, in response to that the first check result is an error, not perform LDPC decoding operation any longer, and report the first CRC check result to the control plane entity; and indicating a decoding device to demodulate data in response to the first CRC check result being correct.
And the second check unit is used for checking the value of the soft information of each resource element RE sampling point of the transmission block TB after the decoding device performs data demodulation and before the LDPC decoding to obtain a second check result, wherein the soft information is the maximum likelihood probability value that the value of the transmission signal is 0 or 1 respectively.
The processing module 200 is configured to determine that the first CRC result is an error when the first check result is an error; and in response to the second check result being correct, instructing the decoding apparatus to perform LDPC decoding.
In some embodiments of the present disclosure, as shown in fig. 9, the first checking module 100 includes a first checking unit 101 and a second checking unit 102, where the first checking unit 101 is configured to check power of each resource element RE sample point of the transport block TB after data equalization and before data demodulation by the decoding apparatus, so as to obtain a first checking result.
The second checking unit 102 is configured to check, after the decoding apparatus performs data demodulation and before performing LDPC decoding, a value of soft information of each RE sample point of the TB to obtain a second checking result, where the value of the soft information is a maximum likelihood probability value that a value of a transmission signal is 0 or 1, respectively; wherein the data demodulation is performed in response to the first check result being correct.
The processing module 200 is configured to determine that the first CRC result is an error when the first check result or the second check result is an error.
In some embodiments of the present disclosure, the first checking unit 101 is configured to determine whether the power of each RE sample of the TB satisfies a preset first condition.
The processing module 200 is configured to determine that the first check result is an error when the power of each RE sample point of the TB satisfies the first condition.
The second checking unit 102 is configured to determine whether a value of the soft information of each RE sampling point of the TB satisfies a preset second condition.
The processing module 200 is configured to determine that the second check result is an error when the value of the soft information of each RE sampling point of the TB satisfies the second condition.
In some embodiments of the present disclosure, the first condition comprises at least one of:
the power of the whole RE sampling point is smaller than or equal to a preset first threshold value;
the power of the whole RE sampling point is larger than or equal to a preset second threshold value;
the power of the real part of the RE sampling point is less than or equal to a preset third threshold value;
the power of the imaginary part of the RE sampling point is smaller than or equal to a preset fourth threshold value;
wherein the first threshold is less than the second threshold.
In some embodiments of the present disclosure, the second condition comprises one of:
the value of the soft information of the RE sampling point is 0;
the value of the soft information of the RE sampling point is a positive maximum value;
the value of the soft information of the RE sampling point is a negative maximum value.
In some embodiments of the present disclosure, as shown in fig. 10, the CRC checking apparatus may further include a second checking module 300 and a third checking module 400, where the processing module 200 is configured to instruct the second checking module to perform a second CRC check after the decoding apparatus performs LDPC decoding on the data, so as to obtain a second CRC check result; and in response to that the second CRC result is correct, instructing the third check module to check the decoded data of each RE sampling point of the TB to obtain a third CRC result, and reporting the third CRC result to the control plane entity.
In some embodiments, the third checking module 400 is configured to determine whether the decoded data of each RE sample of the TB conforms to a user plane protocol format.
The processing module 200 is configured to determine that the third CRC check result is correct when the decoded data of each RE sampling point of the TB all conform to the user plane protocol format.
The embodiment of the present disclosure further provides a calibration apparatus, which includes: one or more processors and storage; the storage device stores one or more programs, and when the one or more programs are executed by the one or more processors, the one or more processors implement the task scheduling method provided in the foregoing embodiments.
The disclosed embodiments also provide a computer readable medium, on which a computer program is stored, wherein the computer program, when executed, implements the task scheduling method provided in the foregoing embodiments.
It will be understood by those of ordinary skill in the art that all or some of the steps of the methods disclosed above, functional modules/units in the apparatus, may be implemented as software, firmware, hardware, and suitable combinations thereof. In a hardware implementation, the division between functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components; for example, one physical component may have multiple functions, or one function or step may be performed by several physical components in cooperation. Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media). The term computer storage media includes volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data, as is well known to those of ordinary skill in the art. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, Digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can accessed by a computer. In addition, communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media as known to those skilled in the art.
Example embodiments have been disclosed herein, and although specific terms are employed, they are used and should be interpreted in a generic and descriptive sense only and not for purposes of limitation. In some instances, features, characteristics and/or elements described in connection with a particular embodiment may be used alone or in combination with features, characteristics and/or elements described in connection with other embodiments, unless expressly stated otherwise, as would be apparent to one skilled in the art. It will, therefore, be understood by those skilled in the art that various changes in form and details may be made therein without departing from the scope of the invention encompassed by the appended claims.

Claims (13)

1. A CRC check method, the method comprising:
after data equalization and before low-density parity check (LDPC) decoding, performing first Cyclic Redundancy Check (CRC) on the equalized data to obtain a first CRC check result;
and in response to the first CRC result being an error, not executing LDPC decoding operation any more, and reporting the first CRC result to a control plane entity.
2. The method of claim 1, wherein performing a first Cyclic Redundancy Check (CRC) on the equalized data after the data equalization and before the LDPC decoding to obtain a first CRC result comprises:
after data equalization and before data demodulation, checking the power of each resource element RE sampling point of a transmission block TB to obtain a first checking result;
the first CRC check result is an error, including: the first check result is an error;
the method further comprises the following steps: and responding to the first CRC check result as correct, and performing data demodulation.
3. The method of claim 1, wherein performing a first Cyclic Redundancy Check (CRC) on the equalized data after the data equalization and before the LDPC decoding to obtain a first CRC result comprises:
after data demodulation and before LDPC decoding, checking the value of soft information of each resource element RE sampling point of a transmission block TB to obtain a second checking result, wherein the soft information is the maximum likelihood probability value that the value of a transmission signal is 0 or 1 respectively;
the first CRC check result is an error, including: the second check result is an error;
the method further comprises the following steps: performing LDPC decoding in response to the second check result being correct.
4. The method of claim 1, wherein performing a first Cyclic Redundancy Check (CRC) on the equalized data after the data equalization and before the LDPC decoding to obtain a first CRC result comprises:
after data equalization and before data demodulation, checking the power of each resource element RE sampling point of a transmission block TB to obtain a first checking result;
after data demodulation and before LDPC decoding, checking the value of soft information of each RE sampling point of the TB to obtain a second checking result, wherein the value of the soft information is the maximum likelihood probability value that the value of a transmission signal is 0 or 1 respectively; wherein the data demodulation is performed in response to the first check result being correct;
the first CRC check result is an error, including: the first check result or the second check result is an error.
5. The method of claim 2 or 4,
the checking the power of each Resource Element (RE) sampling point of the Transport Block (TB) comprises the following steps: judging whether the power of each RE sampling point of the TB meets a preset first condition or not;
the first check result is an error, including: the power of each RE sample of the TB satisfies the first condition.
6. The method of claim 5, wherein the first condition comprises at least one of:
the power of the whole RE sampling point is smaller than or equal to a preset first threshold value;
the power of the whole RE sampling point is larger than or equal to a preset second threshold value;
the power of the real part of the RE sampling point is less than or equal to a preset third threshold value;
the power of the imaginary part of the RE sampling point is smaller than or equal to a preset fourth threshold value;
wherein the first threshold is less than the second threshold.
7. The method of claim 3 or 4,
the value of the soft information of each RE sampling point of the check transmission block TB comprises the following steps: judging whether the value of the soft information of each RE sampling point of the TB meets a preset second condition or not;
the second check result is an error, including: and the value of the soft information of each RE sampling point of the TB satisfies the second condition.
8. The method of claim 7, wherein the second condition comprises one of:
the value of the soft information of the RE sampling point is 0;
the value of the soft information of the RE sampling point is a positive maximum value;
the value of the soft information of the RE sampling point is a negative maximum value.
9. The method of any of claims 1-4, further comprising:
after the LDPC decoding is carried out on the data, carrying out second CRC to obtain a second CRC result;
and in response to that the second CRC check result is correct, checking the decoded data of each RE sampling point of the TB to obtain a third CRC check result, and reporting the third CRC check result to a control plane entity.
10. The method of claim 9, wherein the verifying the decoded data for each RE sample of the TB comprises: judging whether the decoded data of each RE sampling point of the TB conforms to a user plane protocol format or not;
and if the decoded data of each RE sample point of the TB conforms to the user plane protocol format, the third CRC check result is correct.
11. A CRC check apparatus comprising: the first check module is used for performing first Cyclic Redundancy Check (CRC) on the equalized data after the decoding device performs data equalization and before the decoding device performs Low Density Parity Check (LDPC) decoding to obtain a first CRC check result;
and the processing module is used for responding to the first CRC result as an error, not executing LDPC decoding operation any more and reporting the first CRC result to a control plane entity.
12. A verification device, comprising:
one or more processors;
a storage device having one or more programs stored thereon;
the one or more programs, when executed by the one or more processors, cause the one or more processors to implement the CRC check method of any of claims 1-10.
13. A computer-readable medium, on which a computer program is stored, wherein said program, when executed, implements a CRC check method as claimed in any one of claims 1-10.
CN201910927889.0A 2019-09-27 2019-09-27 CRC (Cyclic redundancy check) method and device Pending CN112583418A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117858157A (en) * 2024-03-06 2024-04-09 芯昇科技有限公司 5G communication data processing system and method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117858157A (en) * 2024-03-06 2024-04-09 芯昇科技有限公司 5G communication data processing system and method

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