CN117810346A

CN117810346A - Wiring substrate, preparation method thereof, light-emitting panel, backlight module and display device

Info

Publication number: CN117810346A
Application number: CN202211167926.0A
Authority: CN
Inventors: 张冰; 秦建伟; 汤海; 高亮
Original assignee: BOE Technology Group Co Ltd; Hefei BOE Ruisheng Technology Co Ltd
Current assignee: BOE Technology Group Co Ltd; Hefei BOE Ruisheng Technology Co Ltd
Priority date: 2022-09-23
Filing date: 2022-09-23
Publication date: 2024-04-02

Abstract

The embodiment of the disclosure provides a wiring substrate, a preparation method thereof, a light-emitting panel, a backlight module and a display device. A wiring substrate comprising: a substrate; the metal wires are positioned on one side of the substrate; the orthographic projection of the heightening structure layer on the substrate falls into the orthographic projection of the metal wire on the substrate, the orthographic projection of the heightening structure layer on the substrate defines a bonding pad area, and each film layer arranged in a lamination manner in the bonding pad area forms a bonding pad; the surface of one side of keeping away from the substrate of reflecting structure layer is located the metal wire, and reflecting structure layer is provided with first trompil, and the surface of one side of keeping away from the substrate of pad is exposed to first trompil. The wiring substrate can improve the die bonding yield.

Description

Wiring substrate, preparation method thereof, light-emitting panel, backlight module and display device

Technical Field

The disclosure relates to the technical field of display, in particular to a packaging cover plate, a manufacturing method of the packaging cover plate, a display panel, a backlight module and a display device.

Background

Organic light emitting diode display (OLED) is a new generation of display technology following liquid crystal display LCDs, and the technology is already mature. Mini LEDs (sub-millimeter light emitting diode chips) and Micro LEDs (Micro light emitting diode chips) have excellent performances of lower power consumption, faster reaction, longer service life, better color saturation contrast and the like. With technological breakthroughs, mini LEDs and Micro LEDs will become the next generation display technology following LCDs, OLEDs.

The Mini LED backlight can be applied to display products such as televisions, monitors and computers, and the base materials of the Mini LED backlight products can be divided into glass base materials and PCB base materials. The LED wiring board with the glass substrate has a problem of high die bonding failure rate.

Disclosure of Invention

Embodiments of the present disclosure provide a wiring substrate, a manufacturing method thereof, a light emitting panel, a backlight module, and a display device, so as to solve or alleviate one or more technical problems in the prior art.

As a first aspect of the embodiments of the present disclosure, the embodiments of the present disclosure provide a wiring substrate including:

a substrate;

the metal wires are positioned on one side of the substrate;

the orthographic projection of the heightening structure layer on the substrate falls into the orthographic projection of the metal wire on the substrate, the orthographic projection of the heightening structure layer on the substrate defines a bonding pad area, and each film layer arranged in a lamination manner in the bonding pad area forms a bonding pad;

The surface of one side of keeping away from the substrate of reflecting structure layer is located the metal wire, and reflecting structure layer is provided with first trompil, and the surface of one side of keeping away from the substrate of pad is exposed to first trompil.

In some possible implementations, the elevated structural layer is located on a side of the metal trace facing away from the substrate.

In some possible implementations, the material of the elevated structural layer is a conductive material, and the surface of the elevated structural layer on the side remote from the substrate is curved or planar.

In some possible implementations, the elevated structural layer is located between the substrate and the metal trace, and the elevated structural layer is made of an organic material.

In some possible implementations, the step difference between the reflective structure layer and the pad is less than or equal to 10 μm; and/or the thickness of the raised structural layer ranges from 45 μm to 55 μm.

In some possible implementations, the wiring substrate includes a pad set including at least two pads, each pad in the pad set being for coupling with the same electronic component, the first opening exposing a surface of the at least two pads in the pad set on a side away from the substrate.

In some possible implementations, the wiring substrate further includes a first insulating layer, the first insulating layer is located between the metal trace and the reflective structure layer, the first insulating layer is provided with a second opening, and the orthographic projection of the raised structure layer on the substrate falls into the orthographic projection of the second opening on the substrate.

In some of the possible implementations of the present invention,

the reflective structure layer is made of white ink; or,

the reflective structure layer comprises a second insulating layer and a reflective layer which are arranged in a laminated mode, and the second insulating layer is close to the substrate.

As a second aspect of the embodiments of the present disclosure, the embodiments of the present disclosure provide a method for manufacturing a wiring substrate, including:

forming a plurality of metal wires, a heightening structure layer and a reflecting structure layer on one side of a substrate;

the orthographic projection of the pad structural layer on the substrate falls into orthographic projection of the metal wire on the substrate, the orthographic projection of the pad structural layer on the substrate defines a bonding pad area, and each film layer arranged in a lamination manner in the bonding pad area forms a bonding pad; the reflective structure layer is located on one side of the metal wire away from the substrate, and is provided with a first opening exposing the surface of the pad on one side away from the substrate.

In some possible implementations, forming a plurality of metal traces, a raised structural layer, and a reflective structural layer on one side of a substrate includes:

forming a plurality of metal wires on one side of a substrate;

forming a reflecting structure layer on one side of the metal wire away from the substrate, wherein the reflecting structure layer is provided with a first opening, and part of the surface of the metal wire is exposed by the first opening;

And forming a pad structure layer on the surface of the metal wire exposed through the first opening by adopting an electroless plating process, wherein the bonding pad comprises the pad structure layer and the metal wire positioned in the bonding pad area.

forming a plurality of metal wires on one side of a substrate;

forming a pad structure layer on one side of the metal wire away from the substrate by adopting a printing process, wherein the pad comprises the pad structure layer and the metal wire positioned in a pad area;

a reflective structure layer is formed on a side of the substrate where the elevated structure layer is formed.

In some possible implementations, forming a raised structural layer on a side of the metal trace facing away from the substrate using a printing process includes:

printing solder paste on one side of the metal wire, which is far away from the substrate, by adopting a printing process, wherein the orthographic projection of the solder paste on the substrate falls into the orthographic projection of the metal wire on the substrate;

and (3) adopting a reflow soldering process to solder and connect the solder paste with the metal wire, wherein the pad-up structural layer comprises the solder paste.

Forming a heightening structure layer on one side of the substrate, wherein the heightening structure layer is made of an organic material;

forming a plurality of metal wires on one side of the substrate, on which the pad structure layer is formed, wherein the pad comprises the pad structure layer and the metal wires positioned in the pad area;

and forming a reflecting structure layer on one side of the metal wire away from the substrate.

In some possible implementations, the reflective structure layer is white ink, and the reflective structure layer is formed on a side of the metal trace facing away from the substrate, including:

and forming white ink on the side of the metal wire away from the substrate by adopting a screen printing process.

As a third aspect of the embodiments of the present disclosure, the embodiments of the present disclosure provide a light emitting panel, including any one of the wiring substrates of the embodiments of the present disclosure, further including a light emitting diode chip, the light emitting diode chip being correspondingly coupled with the bonding pad.

As a fourth aspect of the embodiments of the present disclosure, the embodiments of the present disclosure provide a backlight module including the light emitting panel in the embodiments of the present disclosure.

As a fifth aspect of the embodiments of the present disclosure, the embodiments of the present disclosure provide a display device including the light emitting panel or the backlight module in the embodiments of the present disclosure.

According to the technical scheme, the step difference between the reflecting structure layer and the bonding pad can be reduced, printing uniformity during printing of solder paste can be improved, the shape, printing quantity and position of the solder paste can be controlled more effectively, and the die bonding yield is improved.

The foregoing summary is for the purpose of the specification only and is not intended to be limiting in any way. In addition to the illustrative aspects, embodiments, and features described above, further aspects, embodiments, and features of the present disclosure will become apparent by reference to the drawings and the following detailed description.

Drawings

In the drawings, the same reference numerals refer to the same or similar parts or elements throughout the several views unless otherwise specified. The figures are not necessarily drawn to scale. It is appreciated that these drawings depict only some embodiments according to the disclosure and are not to be considered limiting of its scope.

Fig. 1 is a schematic plan view of a wiring substrate;

FIG. 2 is a schematic plan view of the corresponding lamp area and first bonding pad group of FIG. 1;

FIG. 3 is an enlarged schematic view of portion M of FIG. 2;

FIG. 4 is a schematic view of section A-A' of FIG. 3 in a related art;

FIG. 5 is a schematic cross-sectional view of A-A' of FIG. 3 in another related art;

FIG. 6a is a first printing process of printing solder paste;

FIG. 6b is a second printing process of printing solder paste;

FIG. 6c is a third printing process of printing solder paste;

FIG. 7 is a schematic diagram of printing solder paste onto a wiring substrate according to an embodiment of the present disclosure;

FIG. 8 is a schematic cross-sectional view of A-A' of FIG. 3 in a wiring substrate according to an embodiment of the present disclosure;

FIG. 9 is a schematic cross-sectional view of A-A' of FIG. 3 in a wiring substrate according to another embodiment of the present disclosure;

FIG. 10 is a schematic cross-sectional view of A-A' of FIG. 3 in a wiring substrate according to another embodiment of the present disclosure;

FIG. 11a is a schematic cross-sectional view of a wiring substrate according to an embodiment of the present disclosure after forming a first insulating layer;

FIG. 11b is a schematic diagram of a wiring substrate according to an embodiment of the present disclosure after a reflective structure layer is formed;

FIG. 12 is a schematic view of a wiring substrate according to another embodiment of the present disclosure after a bump structure layer is formed;

FIG. 13a is a schematic cross-sectional view of a wiring substrate after a raised structural layer is formed in accordance with another embodiment of the present disclosure;

fig. 13b is a schematic cross-sectional view of a wiring substrate according to another embodiment of the present disclosure after forming a first insulating layer;

fig. 14 is a schematic cross-sectional structure of a backlight module according to an embodiment of the disclosure.

Reference numerals illustrate:

10. a substrate; 12. a metal wiring; 13. a first insulating layer; 131. a second opening; 14. a reflective structure layer; 141. a first opening; 15. raising the structural layer; 21. a steel mesh; 22. a scraper; 30. and (5) solder paste.

Detailed Description

Hereinafter, only certain exemplary embodiments are briefly described. As will be recognized by those of skill in the pertinent art, the described embodiments may be modified in various different ways, and the different embodiments may be combined arbitrarily without conflict, without departing from the spirit or scope of the present disclosure. Accordingly, the drawings and description are to be regarded as illustrative in nature and not as restrictive.

Herein, the light emitting diode chip may be a sub-millimeter light emitting diode (Mini Light Emitting Diode, abbreviated as Mini LED) chip, or may be a Micro light emitting diode (Micro Light Emitting Diode, abbreviated as Micro LED) chip.

In the related art, the substrate provided with the light emitting diode chip may be an FR4 type Printed Circuit Board (PCB), or may be any one of a glass substrate, a quartz substrate, a sapphire substrate, a ceramic substrate, and the like. Wherein, several LED chips are divided into several lamp areas, each lamp area can be controlled independently, thus it realizes fine local light modulation and better High Dynamic Range (HDR) effect with liquid crystal display panel.

Specifically, each light zone may be driven by a micro-driving chip.

In the LED backlight process, electronic components such as a light emitting diode chip and a micro driving chip need to be bonded to a pad of a wiring substrate by a die bonding process. The die bonding process comprises solder paste printing, die bonding and reflow soldering. The printing solder paste has strict requirements on printing quantity, position accuracy, solder paste morphology and uniformity. The inventors found through research that, in addition to the parameters of the printing apparatus, the level difference between the reflective structure layer and the bonding pad on the substrate is an important factor affecting the printing effect. The larger the level difference between the reflective structure layer and the bonding pad is, the less easy the control of the printing solder paste formation is. The step between the pad and the reflective structure layer is a distance between a surface of the pad on the substrate side and a surface of the reflective structure layer on the substrate side.

In the wiring substrate of the PCB substrate, a copper coating process is adopted in the preparation of the metal wire, and the minimum thickness of the metal wire is about 36 mu m. The reflective structure layer may be a white ink, and the thickness of the reflective structure layer is 55±5 μm, i.e., the thickness of the reflective structure layer is 50 μm to 60 μm. In the wiring substrate of the PCB substrate, the step difference between the bonding pad and the reflective structure layer is 15+ -5 μm. The step difference is smaller, the position accuracy and the appearance are easier to control when the solder paste is printed, and the die bonding yield is higher.

Fig. 1 is a schematic plan view of a wiring substrate; FIG. 2 is a schematic plan view of the corresponding lamp area and first bonding pad group of FIG. 1; fig. 3 is an enlarged view of a portion M of fig. 2, fig. 4 is a cross-sectional view of A-A 'of fig. 3 in one related art, and fig. 5 is a cross-sectional view of A-A' of fig. 3 in another related art. As shown in fig. 1 to 5, the wiring board includes a substrate 10 and a plurality of metal traces 12 on one side of the substrate 10. The metal wiring 12 may include a first voltage line 112, a second voltage line 111, a power signal line 103, an address signal line 108, a cascade line 109, and a feedback signal line 110. As shown in fig. 1, the wiring substrate is provided with a plurality of columns of element arrangement regions, each of which is provided with a plurality of lamp regions 104. Each light region 104 corresponds to one first bonding pad group 102, and each light region 104 includes one or at least two second bonding pad groups 104'. Illustratively, the first padset 102 is used to couple with a micro-drive chip. Each second pad set 104 'includes a first pad 41 and a second pad 42, and the second pad set 104' is for coupling with a light emitting diode chip.

As shown in fig. 4 and 5, in the wiring substrate of the glass base material, a sputtering process copper plating or copper plating process is used to form the metal wiring 12. The thickness of the metal trace 12 may be 1 μm to 3 μm. The reflective structure layer 14 may be white ink, and the thickness of the reflective structure layer 14 is 55±5 μm, that is, the thickness of the reflective structure layer 14 is 50 μm to 60 μm. The reflective structure layer 14 is provided with a first opening 141, and the area of the metal trace 12 exposed through the first opening 141 may be called a pad. As shown in fig. 5, the first insulating layer 13 is disposed between the reflective structure layer 14 and the metal trace 12, and the thickness of the first insulating layer 13 is in the form of a meter, so that the thickness of the first insulating layer 13 is negligible when the step difference between the pad and the reflective structure layer 14 is calculated. Therefore, at the first opening 141, the step d between the pad and the reflective structure layer 14 is the distance between the upper surface of the reflective structure layer 14 and the upper surface of the metal trace 12. The step d between the pad and the reflective structure layer 14 in fig. 5 is 50±5 μm. Such a large step may result in uncontrollable printing amount and morphology of the solder paste 30 in the subsequent die bonding process, poor uniformity, and influence the die bonding yield.

In one embodiment, the cross-sectional shape of the first opening 141 may be stepped as shown in fig. 4, or the cross-sectional shape of the first opening 141 may be rectangular as shown in fig. 5. It is understood that the cross-sectional shape of the first opening 141 is not limited to a stepped shape and a rectangular shape. In other embodiments, the cross-sectional shape of the first aperture 141 may be a ramp-like shape or the like. The distance d between the surface of the reflective structure layer 14 on the side remote from the substrate 10 and the surface of the metal trace 12 on the side remote from the substrate ranges in size from several tens of micrometers.

Fig. 6a to 6c are schematic diagrams illustrating a process of printing solder paste onto a wiring substrate in a related art die bonding process, wherein fig. 6a is a first printing process of printing solder paste, fig. 6b is a second printing process of printing solder paste, and fig. 6c is a third printing process of printing solder paste. A first gap H1 between the steel mesh 21 and the reflective structure layer 14 and a second gap H2 between the steel mesh 21 and the bonding pads are shown in fig. 6 c. In the related art, after the first gap H1 is adjusted to 0, the second gap H2 is a step between the reflective structure layer 14 and the pad, and the second gap H2 is 50±5 μm. During printing of the solder paste 30, the doctor blade 22 brushes the solder paste 30 from the openings of the steel mesh 21 onto the pads, as shown in fig. 6 a-6 c. Because the step difference between the reflective structure layer 14 and the bonding pad is large, the lower part of the solder paste 30 cannot contact with the wiring substrate after tin brushing, so that the solder paste 30 is not printed on the bonding pad, but the solder paste 30 is equivalent to dripping from the opening of the steel mesh 21 to the bonding pad. The solder paste 30 drops to the bonding pad, so that the shape of the solder paste 30 is difficult to control, the printing amount, uniformity and the like of the solder paste 30 are poor, and the die bonding yield is further affected.

The embodiment of the disclosure provides a wiring substrate. The wiring substrate comprises a substrate, a plurality of metal wires, a heightening structure layer and a reflecting structure layer. Wherein the plurality of metal traces are located on one side of the substrate. The pad structure layer is positioned on one side of the substrate facing the metal wire, the orthographic projection of the pad structure layer on the substrate falls into the orthographic projection of the metal wire on the substrate, the orthographic projection of the pad structure layer on the substrate defines a bonding pad area, and each film layer arranged in a lamination mode in the bonding pad area forms a bonding pad. The reflecting structure layer is positioned on one side of the metal wire, which is away from the substrate, and the surface of the reflecting structure layer, which is away from the substrate, can reflect light. The reflective structure layer is provided with a first opening exposing a surface of the pad on a side remote from the substrate.

In the related art, as shown in fig. 5, the thickness of the first insulating layer 13 in the wiring substrate is small relative to the thickness of the reflective structure layer 14, typically several thousand meters, so that the thickness of the first insulating layer 13 can be ignored in calculating the step difference between the reflective structure layer 14 and the pad. Therefore, in the related-art wiring substrate, the step difference between the reflective structure layer 14 and the pad is about the difference between the thickness of the reflective structure layer 14 and the thickness of the metal trace 12.

Fig. 7 is a schematic diagram of printing solder paste onto a wiring substrate according to an embodiment of the present disclosure. In the wiring substrate of the embodiment of the present disclosure, as shown in fig. 7, the thickness of the pad includes the thickness of the pad-up structural layer 15 and the thickness of the metal trace 12, and therefore, the thickness of the pad is greatly increased compared to that of the pad in the related art (as shown in fig. 6 c), and thus, the level difference between the reflective structural layer 14 and the pad can be reduced, so that the level difference between the reflective structural layer 14 and the pad in fig. 7 is much smaller than the level difference d1 between the reflective structural layer 14 and the pad in fig. 6 c. After adjusting the first gap H1 in fig. 7 and 6c to 0, the second gap H2' in fig. 7 will be much smaller than the second gap H2 in fig. 6 c. Therefore, in fig. 7, when printing solder paste, the distance from the opening of the steel mesh 21 to the bonding pad of the solder paste 30 is greatly reduced, which is beneficial to improving the printing uniformity when printing solder paste, and can more effectively control the shape, the printing quantity and the position of solder paste and improve the die bonding yield.

In one embodiment, the step difference between the reflective structure layer 14 and the pad is less than or equal to 10 μm. By reasonably setting the thickness of the pad-up structure layer 15, it is possible to realize a step difference between the reflective structure layer 14 and the pad of less than or equal to 10 μm. When the wiring substrate is used for printing the solder paste, the solder paste 30 can be directly brushed on the surface of the bonding pad from the holes of the steel mesh 21, so that the printing uniformity during the printing of the solder paste is greatly improved, the shape and the printing quantity controllability of the solder paste are improved, and the die bonding yield is improved.

Fig. 8 is a schematic cross-sectional view of A-A 'of fig. 3 in a wiring substrate according to an embodiment of the present disclosure, and fig. 9 is a schematic cross-sectional view of A-A' of fig. 3 in a wiring substrate according to another embodiment of the present disclosure. In one embodiment, as shown in fig. 8 and 9, the wiring substrate includes a substrate 10, a plurality of metal wirings 12, a pad structure layer 15, and a reflective structure layer 14. A plurality of metal traces 12 are located on one side of the substrate 10. The elevated structure layer 15 is located on the side of the metal tracks 12 facing away from the substrate 10. The front projection of the elevated structure layer 15 onto the substrate 10 falls within the front projection of the metal tracks 12 onto the substrate 10. The orthographic projection of the elevated structural layer 15 on the substrate 10 defines a land area, and each of the film layers disposed in the stack in the land area forms a land.

The reflective structure layer 14 is located on the side of the metal trace 12 facing away from the substrate 10. The reflective structure layer 14 is provided with a first aperture 141. The first opening 141 exposes a surface of the pad on a side remote from the substrate 10.

Illustratively, in the embodiment shown in fig. 8 and 9, the pad includes the metal trace 12 and the elevated structural layer 15 in the pad region, and the thickness of the pad includes the thickness of the metal trace 12 and the thickness of the elevated structural layer 15. The first opening 141 exposes a surface of the elevated structural layer 15 on a side remote from the substrate 10.

In one embodiment, as shown in fig. 8 and 9, the material of the elevated structural layer 15 may be a conductive material. Since the pad structure layer 15 is located above the metal trace 12, the pad structure layer 15 is provided with a conductive material, and after the electronic component is coupled to the pad, the electronic component can be connected to the metal trace 12 through the pad structure layer 15.

In one embodiment, as shown in fig. 9, the surface of the elevated structural layer 15 on the side remote from the substrate 10 may be curved. Illustratively, the elevated structural layer 15 may be formed using a printing process, and thus the elevated structural layer 15 may be a printed metal layer. For example, before forming the reflective structure layer 14, a printing process is used to print the solder paste 30 on the exposed surface of the metal trace 12, and the solder paste 30 is soldered to the metal trace 12 by reflow soldering. The printed solder paste 30 forms the elevated structural layer 15, and thus, the material of the elevated structural layer 15 may include tin. The upper surface of the raised structural layer 15 formed by the printing process is a curved surface. In the case where the metal material content in the printing material is different, the upper surface of the elevated structural layer 15 may be a convex curved surface or a concave curved surface.

In one embodiment, as shown in fig. 8, the surface of the elevated structural layer 15 on the side remote from the substrate 10 may be planar. Illustratively, an electroless plating process may be employed to form the elevated structural layer 15 on the metal trace 12, such that the elevated structural layer 15 may be an electroless metal layer. The material of the metal trace 12 may include copper, and the material of the pad structure layer 15 may also include copper. The upper surface of the pad structure layer 15 formed by the electroless plating process is a plane.

Fig. 10 is a schematic cross-sectional view of A-A' of fig. 3 in a wiring substrate according to another embodiment of the present disclosure. In one embodiment, as shown in fig. 10, the wiring substrate includes a substrate 10, a plurality of metal wirings 12, a pad structure layer 15, and a reflective structure layer 14. A plurality of metal traces 12 are located on one side of the substrate 10. The elevated structure layer 15 is located between the substrate 10 and the metal tracks 12. The front projection of the elevated structure layer 15 onto the substrate 10 falls within the front projection of the metal tracks 12 onto the substrate 10. The orthographic projection of the elevated structural layer 15 on the substrate 10 defines a land area, and each of the film layers disposed in the stack in the land area forms a land.

Illustratively, in the embodiment shown in fig. 10, the pad includes a raised structural layer 15 and a metal trace 12 located in the pad region, and the thickness of the pad includes the thickness of the metal trace 12 and the thickness of the raised structural layer 15. The first opening 141 exposes a surface of the metal trace 12 located in the pad region.

In fig. 8, 9, and 10, the pad region corresponding to the cascade line 109 is a pad region a, and the pad region corresponding to the address signal line 108 is a pad region b. The pads in the pad region a are output pads Out, and the pads in the pad region b are address pads Di.

In one embodiment, as shown in fig. 10, the material of the elevated structural layer 15 may include at least one of a metal material and an insulating material. Illustratively, the insulating material may be silicon nitride, silicon oxide, silicon oxynitride, an organic material, or the like.

In one embodiment, the material of the elevated structural layer 15 may be an organic material. The raised structural layer 15 is formed by adopting an organic material, so that the raised structural layer 15 with a larger thickness range can be obtained, the raised structural layer 15 meeting the thickness requirement can be prepared according to the requirement, an etching process can be omitted, and the preparation process of the wiring substrate is simplified.

The specific material of the organic material may be selected as needed, for example, the organic material may include one of photoresist, polyimide, and the like.

In one embodiment, the thickness of the elevated structural layer 15 can range from 45 μm to 55 μm (inclusive). Illustratively, the thickness of the elevated structural layer 15 may be any value from 45 μm to 55 μm, for example, the thickness of the elevated structural layer 15 may be 45 μm, 50 μm, or 55 μm. Setting the thickness of the pad-up structure layer 15 to 45 μm to 55 μm can ensure a level difference between the reflective structure layer 14 and the pad of 10 μm or less.

In one embodiment, the wiring substrate may include a pad group including at least two pads. Each pad in the pad set is for coupling with the same electronic component. As shown in fig. 8, 9 and 10, the first opening 141 exposes a surface of at least two pads of the pad group on a side away from the substrate 10. That is, in the same pad group, surfaces of at least two pads on a side away from the substrate 10 are exposed through the same first opening 141.

It will be appreciated that the spacing between adjacent leads in electronic components such as light emitting diode chips and micro-driver chips is relatively small, and if a reflective structure layer 14 is to be provided between each of the bonding pads in the bonding pad set, then a smaller first opening 141 size is required, which requires an increased accuracy of the first opening 141 in order to preserve the reflective structure layer 14 material between adjacent bonding pads during the fabrication of the reflective structure layer 14. An increase in the accuracy of the first openings 141 results in an increase in the cost of the reflective structure layer 14.

In the embodiment of the disclosure, the first opening 141 exposes the surface of at least two bonding pads in the bonding pad group, which is far away from the side of the substrate 10, so that the size of the first opening 141 can be increased, the accuracy of the first opening 141 can be reduced, and the preparation cost of the reflective structure layer 14 can be reduced.

In one embodiment, as shown in fig. 8 to 10, the wiring substrate may further include a first insulating layer 13. The first insulating layer 13 is located between the metal trace 12 and the reflective structure layer 14. The first insulating layer 13 is provided with a second opening 131, and the orthographic projection of the raised structure layer 15 on the substrate 10 falls into the orthographic projection of the second opening 131 on the substrate 10. The second opening 131 exposes the pad. Therefore, the second opening 131 can completely expose the area of the metal wire 12 serving as a bonding pad, so that the raised structure layer 15 is conveniently prepared in the area of the second opening 131, and convenience is provided for preparing the raised structure layer 15.

In one embodiment, as shown in fig. 8 to 10, the reflective structure layer 14 is made of white ink. Such a reflective structure layer 14 may be formed using white ink, and the thickness requirement of the reflective structure layer 14 may be met.

In one embodiment, the reflective structure layer 14 may include a second insulating layer and a reflective layer disposed in a stack, the reflective layer being located on a side of the second insulating layer facing away from the substrate 10. The material of the second insulating layer can be an organic material, and the material of the reflecting layer can be a material layer with a reflecting function.

Illustratively, the material of the substrate 10 may include glass. For example, the substrate 10 may be made of glass.

In one embodiment, the wiring substrate is provided with a plurality of pad groups, one of which may be coupled with one electronic component, and as shown in fig. 2 to 3, the wiring substrate may include a first pad group 102 and a second pad group 104'.

In one embodiment, as shown in fig. 1, 2 and 3, the wiring substrate may include a first pad group 102, a lamp region 104, and the lamp region 104 includes one or at least two second pad groups 104'. The first pad group 102 includes a power supply pad Pwr and an output pad Out. Optionally, the first padset 102 is coupled to a micro-driver chip. The power signal line 103 is coupled to the power supply pad Pwr. The second pad set 104' is coupled to the light emitting diode chip. The lamp region 104 includes a plurality of second pad groups 104 'electrically connected to each other, each of the second pad groups 104' including at least a first pad 41 and a second pad 42, the first pad 41 may be a positive electrode, and the second pad 42 may be a negative electrode. The first pad 41 of the first one of the plurality of second pad groups 104 'in each of the lamp regions 104 is coupled with the first voltage line 112, and the second pad 42 of the last one of the plurality of second pad groups 104' in each of the lamp regions 104 is coupled with the output pad Out of the first pad group 102 corresponding to the lamp region. The power supply pads Pwr of the respective first pad groups 102 in each column element arrangement region are connected to the same power supply signal line 103.

Illustratively, as shown in fig. 3, the first pad group 102 further includes an address pad Di and a ground pad Gnd, the address pad Di belonging to the same first pad group 102 being disposed at intervals in a first direction X with a power supply pad Pwr and being disposed at intervals in a second direction Y with an output pad Out, the second direction Y being perpendicular to the first direction X. The ground pad Gnd is spaced apart from the power supply pad Pwr in the second direction Y and spaced apart from the output pad Out in the first direction X. Also shown in fig. 3 are a pad region a corresponding to the output pad Out and a pad region b corresponding to the address pad Di. Correspondingly, in fig. 4 and 5, the portion of the cascade line 109 located in the pad region a is the output pad Out, and the portion of the address signal line 108 located in the pad region b is the address pad Di.

Alternatively, each first bonding pad set 102 may be coupled with one micro driving chip, and each second bonding pad set 104' may be coupled with a plurality of light emitting diode chips. In some embodiments, address pads Di may receive address signals for gating the micro-drive chips for the corresponding addresses. The power supply pad Pwr may provide the micro-driving chip with a first operating voltage and communication data that may be used to control the light emitting brightness of the corresponding light emitting element. The output pad Out may output a relay signal and a driving signal respectively in different periods, alternatively, the relay signal is an address signal provided to the address pad Di in the first pad group 102 of the next stage, and the driving signal is a driving current for driving the light emitting element coupled to the first pad group 102 where the output pad Out is located to emit light. The ground pad Gnd receives a common voltage signal.

In some embodiments, as shown in fig. 2, the metal traces 12 further include address signal lines 108, one address signal line 108 may be coupled to an address pad Di of the first pad group 102.

As shown in fig. 2, the metal wiring 12 further includes a cascade line 109, the number of the first pad groups 102 being plural, the cascade line 109 being configured to connect the output pad Out of the nth stage first pad group 102 and the address pad Di of the (n+1) th stage first pad group 102 of the same column element arrangement region, n being a positive integer, to supply the relay signal output from the output pad Out of the nth stage first pad group 102 to the address pad Di of the (n+1) th stage first pad group 102 through the cascade line 109.

As shown in fig. 2, the metal trace 12 further includes a feedback signal line (FB) 110, and one feedback signal line (FB) 110 is coupled to the output pad Out of the last first pad group 102 in the multi-stage first pad group 102.

As shown in fig. 1 and 2, one second voltage line (GND) 111 is coupled to the ground pads GND of all the first pad group 102 in one column of the element arrangement region.

In fig. 1 and 2, the power signal line 103, the address signal line 108, the cascade line 109, the feedback signal line 110, the first voltage line 112, and the second voltage line 111 are illustrated with different fills, and the power signal line 103, the address signal line 108, the cascade line 109, the feedback signal line 110, the first voltage line 112, and the second voltage line 111 are simultaneously formed by the same process.

The embodiment of the disclosure also provides a preparation method of the wiring substrate. The method for manufacturing the wiring substrate may include: forming a plurality of metal wires, a heightening structure layer and a reflecting structure layer on one side of a substrate; the orthographic projection of the pad structural layer on the substrate falls into orthographic projection of the metal wire on the substrate, the orthographic projection of the pad structural layer on the substrate defines a bonding pad area, and each film layer arranged in a lamination manner in the bonding pad area forms a bonding pad; the reflective structure layer is located one side of the metal wiring, which is away from the substrate, and is provided with a first opening, the first opening exposes the surface of the bonding pad, which is far away from the substrate, and the step difference between the reflective structure layer and the bonding pad is smaller than or equal to 10 mu m.

In one embodiment, forming a plurality of metal traces, a raised structural layer, and a reflective structural layer on one side of a substrate includes:

s11, forming a plurality of metal wires on one side of a substrate;

s12, forming a reflecting structure layer on one side of the metal wire away from the substrate, wherein the reflecting structure layer is provided with a first opening, and part of the surface of the metal wire is exposed by the first opening;

s13, forming a pad structure layer on the surface of the metal wire exposed through the first opening by adopting an electroless plating process, wherein the bonding pad comprises the pad structure layer and the metal wire positioned in the bonding pad area.

s21, forming a plurality of metal wires on one side of a substrate;

s22, forming a pad structure layer on one side of the metal wire away from the substrate by adopting a printing process, wherein the pad comprises the pad structure layer and the metal wire positioned in a pad area;

s23, forming a reflecting structure layer on one side of the substrate, on which the pad structure layer is formed.

In one embodiment, a raised structure layer is formed on a side of a metal trace facing away from a substrate by a printing process, including: printing solder paste on one side of the metal wire, which is far away from the substrate, by adopting a printing process, wherein the orthographic projection of the solder paste on the substrate falls into the orthographic projection of the metal wire on the substrate; and (3) adopting a reflow soldering process to solder and connect the solder paste with the metal wire, wherein the pad-up structural layer comprises the solder paste.

s31, forming a heightening structure layer on one side of the substrate, wherein the heightening structure layer is made of an organic material;

s32, forming a plurality of metal wires on one side of the substrate, on which the pad structure layer is formed, wherein the pad comprises the pad structure layer and the metal wires positioned in the pad area;

S33, forming a reflecting structure layer on one side of the metal wire away from the substrate.

In one embodiment, the reflective structure layer is white ink, and the reflective structure layer is formed on the side of the metal trace facing away from the substrate, and includes:

The technical solutions of the embodiments of the present disclosure are further described below through the manufacturing processes of the wiring substrate shown in fig. 8, 9 and 10, respectively. It should be understood that, as used herein, the term "patterning" includes processes such as photoresist coating, mask exposure, development, etching, photoresist stripping, etc. when the patterned material is inorganic or metal, and processes such as mask exposure, development, etc. when the patterned material is organic, evaporation, deposition, coating, etc. are all well-known processes in the related art.

In the embodiment shown in fig. 8, a plurality of metal wirings 12, a pad structure layer 15, and a reflective structure layer 14 are formed on one side of a substrate 10, including the processes of S11 to S13.

S11: a plurality of metal traces 12 are formed on one side of the substrate 10 as shown in fig. 11 a. Fig. 11a is a schematic cross-sectional view of a wiring substrate according to an embodiment of the present disclosure after forming a first insulating layer. This step may include: forming a metal layer on one side of the substrate 10, and patterning the metal layer to form a plurality of metal wires 12; a first insulating layer 13 is deposited on the substrate 10 on which the metal trace 12 is formed, the first insulating layer 13 is patterned, and the material of the first insulating layer 13 at the position of the second opening 131 is removed to form the second opening 131, and the second opening 131 exposes a part of the surface of the metal trace 12, as shown in fig. 11 a. Illustratively, the orthographic projection of the second aperture 131 onto the substrate 10 coincides with the orthographic projection of the first aperture 141 onto the substrate 10.

S12: a reflective structure layer 14 is formed on a side of the metal trace 12 facing away from the substrate 10, the reflective structure layer 14 is provided with a first opening 141, and the first opening 141 exposes a portion of a surface of the metal trace 12, as shown in fig. 11b, fig. 11b is a schematic diagram of the wiring substrate after the reflective structure layer is formed in an embodiment of the disclosure. This step may be to form a reflective structure layer 14 on the side of the first insulating layer 13 facing away from the base plate of the substrate 10. In the case where the reflective structure layer 14 is white ink, this step may include: a screen printing process is used to form white ink on the side of the first insulating layer 13 facing away from the substrate 10, the white ink being provided with first openings 141. Illustratively, the orthographic projection of the first aperture 141 onto the substrate 10 is within the orthographic projection of the second aperture 131 onto the substrate 10. Illustratively, the orthographic projection of the first aperture 141 onto the substrate 10 may coincide with the orthographic projection of the second aperture 131 onto the substrate 10.

S13: an electroless plating process is used to form a pad structure layer 15 on the surface of the metal trace 12 exposed through the first opening 141. The orthographic projection of the elevated structural layer 15 on the substrate defines a pad region, the pad including the elevated structural layer 15 and the metal trace 12 located in the pad region, as shown in fig. 8.

In the embodiment shown in fig. 9, a plurality of metal wirings 12, a pad structure layer 15, and a reflective structure layer 14 are formed on one side of a substrate 10, including the processes of S21 to S23.

S21: a plurality of metal traces 12 are formed on one side of the substrate 10. This step is the same as S11 and will not be described here again.

S22: a raised structural layer 15 is formed on a side of the metal trace 12 facing away from the substrate 10 by a printing process, and a pad group is defined by orthographic projection of the raised structural layer 15 on the substrate 10, where the pad includes the raised structural layer 15 and the metal trace 12 located in a pad area, as shown in fig. 12, and fig. 12 is a schematic diagram of a wiring substrate according to another embodiment of the disclosure after the raised structural layer is formed. Illustratively, the material of the elevated structural layer 15 may include tin. This step may include:

the side of the metal tracks 12 facing away from the substrate 10 is printed with solder paste by a printing process, and the orthographic projection of the solder paste on the substrate 10 falls within the orthographic projection of the metal tracks 12 on the substrate 10. Illustratively, a printing process is used to print solder paste on the surface of the metal trace 12 exposed through the second aperture 131.

Solder paste is soldered to the metal traces 12 using a reflow process, and the bump structure layer 15 comprises solder paste.

It is understood that the material of the first insulating layer 13 includes at least one of silicon nitride, silicon oxide, and silicon oxynitride. The thickness of the first insulating layer 13 is relatively thin. Therefore, at the position of the second opening 131, the step difference between the first insulating layer 13 and the metal trace 12 is small. Therefore, when the solder paste 30 is printed at the position of the second opening 131, the printing uniformity, morphology and printing amount of the solder paste are relatively easy to control, which corresponds to printing the solder paste on the flat surface, and the solder paste is not affected by the level difference between the first insulating layer 13 and the metal trace 12, so that the desired elevated structural layer 15 can be obtained.

Illustratively, in forming the elevated structural layer 15, the thickness of the steel mesh 21 used may be substantially the same as the thickness of the reflective structural layer 14, so that the elevated structural layer 15 is obtained with a thickness substantially the same as the thickness of the reflective structural layer 14, and the level difference between the reflective structural layer 14 and the bonding pad may be greatly reduced. In this way, in the die bonding process, there is basically no step difference between the reflective structure layer 14 and the bonding pad, and when the solder paste 30 is printed, the printing uniformity, morphology and printing quantity are not affected by the step difference between the reflective structure layer 14 and the bonding pad, so that the die bonding yield is improved.

S23: the reflective structure layer 14 is formed on the side of the substrate 10 where the pad structure layer 15 is formed. In the case where the reflective structure layer 14 is white ink, this step may include: a screen printing process is used to form white ink on the side of the first insulating layer 13 facing away from the substrate 10, the white ink being provided with first openings 141. The first opening 141 exposes a surface of the elevated structural layer 15 on a side remote from the substrate 10. In fig. 9, the first opening 141 exposes the upper surface of the pad structure layer 15.

In the embodiment shown in fig. 10, a plurality of metal wirings 12, a pad structure layer 15, and a reflective structure layer 14 are formed on one side of a substrate 10, including the processes of S31 to S33.

S31: a raised structural layer 15 is formed on one side of the substrate 10, and the material of the raised structural layer 15 is an organic material, as shown in fig. 13 a. Fig. 13a is a schematic cross-sectional view of a wiring substrate according to another embodiment of the present disclosure after a pad structure layer is formed. This step may include: an organic solution is coated on one side of the substrate 10, an organic film is formed after the organic solution is cured, the organic film is exposed and developed, the organic film at a position other than the elevated structural layer 15 is removed, and the remaining organic film forms the elevated structural layer 15.

S32: a plurality of metal traces 12 are formed on one side of the substrate 10 where the elevated structural layer 15 is formed, and the pad includes the elevated structural layer 15 and the metal traces 12 located in the pad region, as shown in fig. 13 b. Fig. 13b is a schematic cross-sectional view of a wiring substrate according to another embodiment of the present disclosure after forming a first insulating layer. This step may include:

depositing a metal layer on one side of the substrate 10 where the elevated structure layer 15 is formed, the metal layer covering the elevated structure layer 15; the metal layer is patterned to form a plurality of metal traces 12. The front projection of the elevated structure layer 15 onto the substrate 10 is located within the front projection of the metal tracks 12 onto the substrate 10. The orthographic projection of the elevated structural layer 15 on the substrate 10 defines a pad area. The pad includes a raised structural layer 15 and metal traces 12 in the pad area.

A first insulating layer 13 is deposited on the substrate 10 with the metal trace 12 formed thereon, the first insulating layer 13 is patterned, and the material of the first insulating layer 13 at the location of the second opening 131 is removed to form a second opening 131, and the second opening 131 exposes a surface of the pad on a side away from the substrate 10, as shown in fig. 13 b. In fig. 13b, the second opening 131 exposes the upper surface of the metal trace 12 above the pad structure layer 15. Illustratively, the orthographic projection of the second aperture 131 onto the substrate 10 may coincide with the orthographic projection of the first aperture 141 onto the substrate 10.

S33: a reflective structure layer 14 is formed on the side of the metal trace 12 facing away from the substrate 10. This step may be to form a reflective structure layer 14 on the side of the first insulating layer 13 facing away from the base plate of the substrate 10. In the case where the reflective structure layer 14 is white ink, this step may include: a screen printing process is used to form white ink on the side of the first insulating layer 13 facing away from the substrate 10, the white ink being provided with first openings 141. Illustratively, the orthographic projection of the first aperture 141 onto the substrate 10 may coincide with the orthographic projection of the second aperture 131 onto the substrate 10.

The embodiment of the disclosure also provides a light-emitting panel, which may include the wiring substrate in any embodiment of the disclosure, and further includes a light-emitting diode chip, where the light-emitting diode chip corresponds to the bonding pad.

The embodiment of the disclosure also provides a backlight module, which comprises the light-emitting panel in any embodiment of the disclosure.

Fig. 14 is a schematic cross-sectional structure of a backlight module according to an embodiment of the disclosure. In one embodiment, as shown in fig. 14, the backlight module may further include a light emitting panel 50, a support column 51, a diffusion plate 52, a quantum dot film 53, a diffusion sheet 54, and a composite film 55. The diffusion plate 52, the quantum dot film 53, the diffusion sheet 54, and the composite film 55 are sequentially laminated on the light emitting side of the light emitting panel 50. The support column 51 is disposed between the light emitting panel 50 and the diffusion plate 52. The diffusion plate 52 and the diffusion sheet 54 can eliminate the lamp shadow and improve the uniformity of the display device. The composite film 55 can increase brightness.

The light emitting panel may include a blue light emitting diode chip. The quantum dot film 53 may convert blue light into white light under excitation of the blue light.

Illustratively, the light emitting panel may further include white glue and a protective glue. It will be appreciated that in order to expose the diode chip through the first opening, the first opening is typically sized larger than the light emitting diode chip. After the light emitting diode chip is bound on the wiring substrate, white glue is generally added along the edge of the first opening, and the light utilization rate is provided through reflection of the white glue and the reflective structure layer. The protective adhesive covers the light emitting diode chip and is used for containing the light emitting diode chip. The light emitting panel may further include a Chip On Film (COF) or a control circuit board (PCB), and the COF or the PCB may control the light emitting diode Chip on the light emitting panel to emit light.

The supporting column 51 may be fixed on the wiring substrate by glue, and is used for supporting the diffusion plate 52, so that a set light mixing distance is kept between the diffusion plate 52 and the wiring substrate, thereby being beneficial to eliminating the lamp shadow.

Illustratively, a first set of pads 102 in the wiring substrate may be coupled with the micro-driver chip and a second set of pads 104' in the wiring substrate may be coupled with the light emitting diode chip.

The embodiment of the disclosure also provides a display device, which comprises the light-emitting panel or the backlight module in any embodiment of the disclosure.

The light emitting panel in the embodiment of the disclosure may be mounted in a display device as a display panel, or may be mounted in a display device as a light source, and the display device may be: electronic paper, mobile phone, tablet computer, television, display, notebook computer, digital photo frame, navigator, wearable display device, etc.

The luminescent panel in the embodiments of the present disclosure may also be used as a luminescent light source in a lighting product.

In the description of the present specification, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings are merely for convenience in describing the present disclosure and simplifying the description, and do not indicate or imply that the device or element being referred to must have a specific orientation, be configured and operated in a specific orientation, and therefore should not be construed as limiting the present disclosure.

Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present disclosure, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.

In the present disclosure, unless explicitly specified and limited otherwise, the terms "mounted," "connected," "secured," and the like are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally formed; the device can be mechanically connected, electrically connected and communicated; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. The specific meaning of the terms in this disclosure will be understood by those of ordinary skill in the art as the case may be.

In this disclosure, unless expressly stated or limited otherwise, a first feature being "above" or "below" a second feature may include both the first and second features being in direct contact, as well as the first and second features not being in direct contact but being in contact with each other by way of additional features therebetween. Moreover, a first feature being "above," "over" and "on" a second feature includes the first feature being directly above and obliquely above the second feature, or simply indicating that the first feature is higher in level than the second feature. The first feature being "under", "below" and "beneath" the second feature includes the first feature being directly above and obliquely above the second feature, or simply indicating that the first feature is less level than the second feature.

The above disclosure provides many different embodiments or examples for implementing different structures of the disclosure. The components and arrangements of specific examples are described above in order to simplify the present disclosure. Of course, they are merely examples and are not intended to limit the present disclosure. Furthermore, the present disclosure may repeat reference numerals and/or letters in the various examples, which are for the purpose of brevity and clarity, and which do not themselves indicate the relationship between the various embodiments and/or arrangements discussed.

The above is merely a specific embodiment of the disclosure, but the protection scope of the disclosure is not limited thereto, and any person skilled in the art can easily think of various changes or substitutions within the technical scope of the disclosure, which should be covered in the protection scope of the disclosure. Therefore, the protection scope of the present disclosure shall be subject to the protection scope of the claims.

Claims

1. A wiring substrate, comprising:

a substrate;

a plurality of metal wires positioned on one side of the substrate;

the elevation structure layer is positioned on one side of the substrate facing the metal wire, the orthographic projection of the elevation structure layer on the substrate falls into the orthographic projection of the metal wire on the substrate, the orthographic projection of the elevation structure layer on the substrate defines a bonding pad area, and each film layer arranged in a lamination manner in the bonding pad area forms a bonding pad;

The reflection structure layer is positioned on one side, away from the substrate, of the metal wire, the surface, away from one side of the substrate, of the reflection structure layer can reflect light rays, the reflection structure layer is provided with a first opening, and the first opening exposes the surface, away from one side of the substrate, of the bonding pad.

2. The wiring substrate of claim 1, wherein the elevated structural layer is located on a side of the metal trace facing away from the substrate.

3. The wiring substrate according to claim 2, wherein a material of the elevated structure layer is a conductive material, and a surface of the elevated structure layer on a side away from the substrate is curved or planar.

4. The wiring substrate according to claim 1, wherein the elevated structural layer is located between the substrate and the metal wiring, and a material of the elevated structural layer is an organic material.

5. The wiring substrate according to claim 1, wherein a step difference between the reflective structure layer and the pad is less than or equal to 10 μm; and/or the thickness of the pad structure layer ranges from 45 mu m to 55 mu m.

6. The wiring substrate according to any one of claims 1 to 5, wherein the wiring substrate comprises a pad group including at least two of the pads, each of the pads in the pad group being for coupling with the same electronic component, the first opening exposing a surface of at least two of the pads in the pad group on a side away from the substrate.

7. The wiring substrate of any one of claims 1-5, further comprising a first insulating layer between the metal trace and the reflective structure layer, the first insulating layer being open with a second aperture, an orthographic projection of the elevated structure layer onto the substrate falling within an orthographic projection of the second aperture onto the substrate.

8. The wiring substrate according to any one of claims 1 to 5, wherein,

the reflective structure layer is made of white ink; or,

9. A method for producing a wiring board, comprising:

the orthographic projection of the pad structure layer on the substrate falls into the orthographic projection of the metal wire on the substrate, the orthographic projection of the pad structure layer on the substrate defines a pad area, and each film layer arranged in a lamination manner in the pad area forms a pad; the reflective structure layer is located on one side of the metal wire away from the substrate, and is provided with a first opening exposing the surface of the bonding pad on one side away from the substrate.

10. The method of claim 9, wherein forming a plurality of metal traces, a raised structural layer, and a reflective structural layer on one side of the substrate comprises:

forming a plurality of metal wirings on one side of the substrate;

forming the reflecting structure layer on one side of the metal wire away from the substrate, wherein the reflecting structure layer is provided with the first opening, and part of the surface of the metal wire is exposed by the first opening;

and forming the pad structure layer on the surface of the metal wire exposed through the first opening by adopting an electroless plating process, wherein the bonding pad comprises the pad structure layer and the metal wire positioned in the bonding pad region.

11. The method of claim 9, wherein forming a plurality of metal traces, a raised structural layer, and a reflective structural layer on one side of the substrate comprises:

forming a plurality of metal wirings on one side of the substrate;

forming the raised structure layer on one side of the metal wire away from the substrate by adopting a printing process, wherein the bonding pad comprises the raised structure layer and the metal wire positioned in the bonding pad area;

and forming the reflecting structure layer on one side of the substrate, on which the pad structure layer is formed.

12. The method of claim 11, wherein forming the elevated structural layer on a side of the metal trace facing away from the substrate using a printing process comprises:

and adopting a reflow soldering process to solder and connect the solder paste with the metal wire, wherein the pad-up structural layer comprises the solder paste.

13. The method of claim 9, wherein forming a plurality of metal traces, a raised structural layer, and a reflective structural layer on one side of the substrate comprises:

forming the heightening structure layer on one side of the substrate, wherein the heightening structure layer is made of an organic material;

forming a plurality of metal wires on one side of the substrate, on which the pad structure layer is formed, wherein the pad comprises the pad structure layer and the metal wires in the pad region;

and forming the reflecting structure layer on one side of the metal wire away from the substrate.

14. The method of any of claims 10-13, wherein the reflective structure layer is white ink, the reflective structure layer being formed on a side of the metal trace facing away from the substrate, comprising:

And forming the white ink on the side, away from the substrate, of the metal wire by adopting a screen printing process.

15. A light-emitting panel comprising the wiring substrate of any one of claims 1-8, further comprising a light-emitting diode chip correspondingly coupled to the bonding pad.

16. A backlight module comprising the light-emitting panel of claim 15.

17. A display device comprising the light-emitting panel of claim 15 or the backlight module of claim 16.