CN117810308A - Solar cell manufacturing method, solar cell and photovoltaic module - Google Patents
Solar cell manufacturing method, solar cell and photovoltaic module Download PDFInfo
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- CN117810308A CN117810308A CN202311868934.2A CN202311868934A CN117810308A CN 117810308 A CN117810308 A CN 117810308A CN 202311868934 A CN202311868934 A CN 202311868934A CN 117810308 A CN117810308 A CN 117810308A
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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Abstract
The application relates to a preparation method of a solar cell, the solar cell and a photovoltaic module, the preparation method of the solar cell comprises the steps of forming a heavily doped region with a first preset width in a substrate, forming an atomic film layer on the surface of the substrate, preparing a grid line electrode with a second preset width in the heavily doped region, enabling the grid line electrode to penetrate through at least part of the atomic film layer, forming a sintering region along the edge of the grid line electrode to prepare the solar cell, wherein the second preset width is smaller than the first preset width, ensuring that the printing position of the grid line electrode can be controlled in the heavily doped region even if the printing of the grid line electrode deviates, and the third preset width is smaller than or equal to the difference value between the first preset width and the second preset width and is larger than 0, so that the sintering region is prevented from exceeding the heavily doped region, and further, the auxiliary sintering of the grid line electrode can be ensured to be completed, and meanwhile, the damage to more non-heavily doped regions can be avoided.
Description
Technical Field
The application relates to the technical field of photovoltaic cells, in particular to a preparation method of a solar cell, the solar cell and a photovoltaic module.
Background
In the technical field of photovoltaic cells, the traditional mode adopted by the industry at present is also the mode of screen printing and chain sintering, because the thickness of a glass layer is thickened easily due to the fact that the front sintering temperature is too high, the thicker glass layer causes less carrier transportation, current and voltage loss is caused, efficiency loss is further caused, and therefore the sintering temperature of a front grid line of a battery needs to be reduced.
At present, the contact between metal and a silicon substrate is increased by processing a metal grid line through laser-assisted sintering, so that the problem of battery efficiency loss caused by overhigh temperature can be avoided, but the cooperation of laser-assisted sintering and a previous process is immature, the damage to a battery piece is easy to cause, and the loss of solar battery efficiency can also be caused.
Disclosure of Invention
In view of the foregoing, it is desirable to provide a method for manufacturing a solar cell, and a photovoltaic module, which can reduce damage to a battery sheet.
In a first aspect, the present application provides a method for manufacturing a solar cell, including:
forming a substrate;
forming a heavily doped region with a first preset width in the substrate;
forming an atomic film layer on the surface of the substrate; at least part of the atomic film layer covers the heavily doped region;
preparing a gate line electrode with a second preset width in the heavily doped region; the grid line electrode passes through at least part of the atomic film layer; the second preset width is smaller than the first preset width;
forming a sintering region along the edge of the grid line electrode to manufacture a solar cell, wherein the sintering region is a region with a third preset width from the edge of the grid line electrode in the heavily doped region; the third preset width is smaller than or equal to the difference value between the first preset width and the second preset width and is larger than 0.
In one embodiment, the forming a heavily doped region of a first predetermined width in the substrate includes:
and forming a heavily doped region with a first preset width at the target depth of the substrate by adopting a first preset laser with target power and target speed, wherein the doping concentration of the heavily doped region is the target doping concentration.
In one embodiment, the forming a sintering region along the edge of the gate line electrode includes:
and forming a sintering area with target current density along the edge of the grid line electrode by adopting second preset laser with target voltage.
In one embodiment, the forming a substrate includes:
providing a battery piece;
texturing is carried out on one surface of the battery piece;
preparing a borosilicate glass layer on one surface of the battery piece after texturing to form the substrate; the heavily doped region is formed within the borosilicate glass layer.
In one embodiment, the surface of the substrate comprises a front surface and a back surface which are arranged opposite to each other, wherein the surface on which the borosilicate glass layer is formed is used as the front surface of the substrate; and forming an atomic film layer on the surface of the substrate, wherein the atomic film layer comprises the following components:
preparing a tunneling layer on the back surface of the substrate;
preparing a conductive doping layer on one surface of the tunneling layer, which is away from the back surface of the substrate; the conductive doped layer is doped with phosphorus atoms;
preparing a passivation layer on the front surface of the substrate;
preparing a positive and negative reflection reducing layer on one surface of the passivation layer, which is away from the front surface of the substrate;
preparing a back antireflection layer on one surface of the conductive doping layer, which is away from the tunneling layer;
the tunneling layer, the conductive doping layer, the passivation layer, the forward antireflection layer and the back antireflection layer jointly form the atomic film layer.
In one embodiment, the substrate is further provided with a side adjacent to the surface; before preparing the tunneling layer on the back surface of the substrate, the method further comprises:
oxidizing the front surface of the substrate;
and removing the borosilicate glass layer which is wound on the back surface and the side surface.
In one embodiment, the substrate is further provided with a side adjacent to the surface; before preparing the passivation layer on the front surface of the substrate, the method further comprises:
removing the conductive doping layers around the front surface and the side surface;
etching the phosphosilicate glass layers of the front surface and the side surface; the phosphosilicate glass layer is a film layer formed on the front surface and the side surface when the conductive doped layer is doped with phosphorus atoms.
In a second aspect, the present application also provides a solar cell, the solar cell comprising:
the substrate is internally provided with a heavily doped region with a first preset width;
an atomic film layer formed on the surface of the substrate; at least part of the atomic film layer covers the heavily doped region; the heavily doped region is formed with a gate line electrode with a second preset width, and the gate line electrode penetrates through at least part of the atomic film layer; the second preset width is smaller than the first preset width; the heavily doped region is also formed with a sintering region with a third preset width from the edge of the grid line electrode; the third preset width is smaller than or equal to the difference value between the first preset width and the second preset width and is larger than 0.
In one embodiment, the surface of the substrate includes a front side and a back side disposed opposite each other; the substrate comprises:
a battery sheet;
and the borosilicate glass layer is arranged on one surface of the battery piece, and the heavily doped region is arranged in the borosilicate glass layer.
In one embodiment, the atomic film layer includes:
the tunneling layer is arranged on the back surface of the substrate;
the conductive doping layer is arranged on one surface of the tunneling layer, which is away from the back surface of the substrate; the conductive doped layer is doped with phosphorus atoms;
the passivation layer is arranged on the front surface of the substrate;
the positive anti-reflection layer is arranged on one surface of the passivation layer, which is away from the front surface of the substrate;
the back anti-reflection layer is arranged on one surface of the conductive doped layer, which is away from the tunneling layer.
In one embodiment, the solar cell comprises a TOPcon cell.
In a third aspect, the present application also provides a photovoltaic module comprising a solar cell prepared by the method for preparing a solar cell as described above or a solar cell as described above.
The preparation method of the solar cell comprises the steps of forming a heavily doped region with a first preset width in a substrate, forming an atomic film layer on the surface of the substrate, preparing a grid line electrode with a second preset width in the heavily doped region, enabling the grid line electrode to penetrate through at least part of the atomic film layer, forming a sintering region along the edge of the grid line electrode to prepare the solar cell, wherein the second preset width is smaller than the first preset width, ensuring that the printing position of the grid line electrode can be controlled in the heavily doped region even if the printing of the grid line electrode deviates, and enabling the third preset width to be smaller than or equal to the difference value between the first preset width and the second preset width and larger than 0, so that the sintering region is prevented from exceeding the heavily doped region, and further ensuring that damage to more non-heavily doped regions is avoided while auxiliary sintering of the grid line electrode is completed.
Drawings
FIG. 1 is a schematic flow chart of a method for manufacturing a solar cell according to an embodiment;
FIG. 2 is a cross-sectional view of the positional relationship among heavily doped regions, gate line electrodes, and sintered regions in one embodiment;
FIG. 3 is a schematic flow chart of forming a substrate in one embodiment;
FIG. 4 is a schematic flow chart of an embodiment for forming an atomic film layer on a surface of a substrate;
FIG. 5 is a schematic flow chart of an embodiment before preparing a tunneling layer on the back side of a substrate;
FIG. 6 is a schematic flow chart of an embodiment before a passivation layer is prepared on the front surface of a substrate;
FIG. 7 is a second flow chart of a method of fabricating a solar cell according to one embodiment;
FIG. 8 is a schematic diagram of a solar cell in one embodiment;
FIG. 9 is a schematic diagram of an atomic film layer structure in one embodiment.
Detailed Description
In order to facilitate an understanding of the disclosed embodiments, the disclosed embodiments are described more fully below with reference to the accompanying drawings. Preferred embodiments of the presently disclosed embodiments are shown in the drawings. However, the disclosed embodiments may be embodied in many different forms and are not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which embodiments of this disclosure belong. The terminology used in the description of the embodiments of the disclosure herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the embodiments of the disclosure. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
In the description of the embodiments of the present disclosure, it should be understood that the terms "upper," "lower," "vertical," "horizontal," "inner," "outer," and the like indicate orientations or positional relationships based on the methods or positional relationships shown in the drawings, merely to facilitate describing the embodiments of the present disclosure and to simplify the description, and do not indicate or imply that the devices or elements being referred to must have a particular orientation, be configured and operated in a particular orientation, and thus should not be construed as limiting the embodiments of the present disclosure.
It will be understood that the terms "first," "second," and the like, as used in this disclosure, may be used herein to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another element. For example, the first preset width may be referred to as a second preset width or a third preset width, and similarly, the second preset width may be referred to as a first preset width or a third preset width, and the third preset width may also be referred to as a first preset width or a second preset width, without departing from the scope of the present disclosure. The first preset width, the second preset width and the third preset width are all characterization width amounts, the specific data amounts of the first preset width, the second preset width and the third preset width can be equal or unequal, but the objects of the width amounts characterized by the first preset width, the second preset width and the third preset width are different.
A solar cell is a device for converting solar energy into electric energy, and its core part is composed of a series of grid line electrodes. The gate electrode is a wire for collecting and transmitting current, and its width has an important influence on the performance of the solar cell. The width of the first and gate line electrodes can directly influence the light absorption capacity of the prepared solar cell. When the width of the grid line electrode is narrower, the light absorption area of the surface of the battery can be increased, the opportunity of light energy conversion is increased, and therefore the photoelectric conversion efficiency of the battery is improved. When the width of the grid line electrode is too wide, the incidence of sunlight is shielded, the absorption of light energy is reduced, and the conversion efficiency of the battery is reduced. Therefore, in the preparation of a solar cell, the width of the gate line electrode should be selected to ensure the light absorption effect of the prepared solar cell. The width of the second, gate line electrode also affects the current collection capability of the fabricated solar cell. When the width of the gate line electrode is narrow, the path of current passing through the gate line electrode is relatively long, and the resistance is relatively large, so that the concentration and transmission of current are limited to a certain extent, and the output current of the battery is reduced. When the width of the gate line electrode is too wide, the concentration and transmission capability of current are improved, thereby increasing the output current of the battery. Therefore, the current collection needs to be comprehensively considered in selecting the width of the gate line electrode. The width of the third, gate line electrode is also related to the detailed structure and fabrication process of the solar cell. The width of the gate line electrode is selected during fabrication to allow for process feasibility and cost effectiveness. Narrower gate line electrode widths may require higher manufacturing accuracy and more complex process steps, increasing manufacturing costs. Therefore, the balance between the width of the gate line electrode and the manufacturing process needs to be comprehensively considered in actual production. Fourth, the width of the gate line electrode is also related to the reliability and stability of the solar cell. The narrower width of the gate line electrode may cause the gate line electrode to be increased in vulnerability and to be easily broken or damaged by the external environment, thereby affecting the service life and stability of the battery. The wider width of the grid line electrode can improve the stability and reliability of the battery and reduce the energy loss caused by the breakage of the grid line electrode.
In the preparation process of the solar cell, the laser-assisted sintering essentially separates two key steps of erosion and contact formation of a passivation layer in the high-temperature sintering process by utilizing the high-energy concentration and controllable characteristics of laser, so that the sintering process is further accurately regulated and controlled. In principle, the current formed by laser is transmitted along a low contact resistance path, and silver silicon diffusion is induced, so that the contact resistance is reduced; the duration of the whole sintering process is matched with the service life of the carriers, and the laser is stopped rapidly after the laser, so that the maximum reservation of the original passivation layer is realized, and the carrier recombination caused by direct contact of the metal-silicon substrate is avoided. Laser assisted sintering is suitable for sintering processes in all high temperature type through-fired silver paste, such as those used in the preparation of PERC (Passivated Emitter and Rear Contact, emitter passivation and Back Contact) cells, TOPcon (Tunnel Oxide Passivated Contact solar cell, tunnel oxide passivation Contact solar cell) cells, and xBC (X Back Contact) cells, among others. For TOPCon batteries, the front and back surfaces of the TOPCon batteries are both made of burning-through slurry, and the laser-assisted sintering can remarkably improve the photoelectric conversion efficiency of the batteries. The sintering process can be accurately controlled by laser-assisted sintering, so that the difficulty in thinning poly (polysilicon material) on the back of the TOPCon battery is reduced, and the photoelectric conversion efficiency of the battery can be improved by reducing parasitic absorption.
Therefore, the auxiliary sintering and the setting of the width of the gate electrode are important to improve the photoelectric conversion efficiency of the solar cell and to ensure the quality of the solar cell.
In one embodiment, the present application provides a method for manufacturing a solar cell, such as one of the flow charts of the method for manufacturing a solar cell shown in fig. 1, the method for manufacturing a solar cell includes the following steps 102 to 110.
Step 102, forming a substrate.
The substrate may be a combination substrate including a battery plate, a diffusion layer and a borosilicate glass layer.
Step 104, forming a heavily doped region with a first preset width in the substrate.
The heavily doped region may be formed by laser doping. The laser doping irradiates high-energy laser beams on the surface of the material, and introduces some high-energy particles into the material to correspondingly change the particles, so that the purpose of changing the material performance is achieved. During laser doping, the high energy of the laser may cause some atoms or molecules of the material to be excited, thereby creating various chemical reactions. These reactions can alter the crystal structure, chemical and electrical properties of the material, etc., making it better performing. For example, in the process of manufacturing a solar cell, heavy doping is performed at the contact portion of the gate line electrode and the cell sheet by laser doping, while light doping (low concentration doping) is maintained at a position other than the gate line electrode. The battery piece is provided with a surface and another surface which are oppositely arranged, the surface of the substrate comprises a front surface and a back surface which are oppositely arranged, a borosilicate glass layer is sequentially arranged on one surface of the battery piece, one surface on which the borosilicate glass layer is formed is used as the front surface of the substrate, and the other surface is used as the back surface of the substrate. And then removing the corresponding BSG layer by a mode of laser film opening in a preset area, so that a boron heavy diffusion area with a first preset width can be formed only in different areas of the area without the BSG layer, a boron selective emitter is obtained, and the setting of the boron selective emitter can improve the open circuit voltage and the power generation efficiency of the solar cell.
Step 106, forming an atomic film layer on the surface of the substrate; at least a portion of the atomic film layer overlies the heavily doped region.
Wherein the surface of the substrate comprises a front side and a back side disposed opposite each other, the atomic film layer may comprise any functional film layer in the constituent parts of the solar cell, such as a passivation layer, an anti-reflection layer, a mask layer, a tunneling layer, and the like. Each film layer may be partially disposed on the front surface of the substrate, and another portion disposed on the back surface of the substrate.
Step 108, preparing a gate line electrode with a second preset width in the heavily doped region; the grid line electrode passes through at least part of the atomic film layer; the second preset width is smaller than the first preset width.
Illustratively, a part of the atomic film layer is arranged on the front surface of the substrate, another part of the atomic film layer is arranged on the back surface of the substrate, and if the heavily doped region is arranged on the front surface of the substrate, the grid line electrode passes through the part of the atomic film layer arranged on the front surface of the substrate; if the heavily doped region is disposed on the back surface of the substrate, the gate line electrode passes through another portion of the atomic film layer disposed on the back surface of the substrate.
Step 110, forming a sintering area along the edge of the grid electrode to manufacture a solar cell, wherein the sintering area is an area with a third preset width from the edge of the grid electrode in the heavily doped area; the third preset width is smaller than or equal to the difference value between the first preset width and the second preset width and is larger than 0.
Specifically, referring to a cross-sectional view of the positional relationship between the heavily doped region 811, the gate line electrode 830 and the sintering region 840 as shown in fig. 2, the two tops of the gate line electrode 830 are aligned with the two tops of the sintering region 840, the edge direction of the gate line electrode 830 is perpendicular to the top direction of the gate line electrode 830, the sintering region 840 formed along the edge of the gate line electrode 830 may be a region along both edge sides of the gate line electrode 830 within the heavily doped region 811, at which time the number of the sintering regions 840 is two, and the widths of the two sintering regions 840 may be the same or different; the sintering region 840 formed along the edge of the gate line electrode 830 in a direction perpendicular to the top direction of the gate line electrode 830 may be a region along either edge side of the gate line electrode 830 within the heavily doped region 811. Fig. 2 shows a case where the sintering regions 840 are regions located along both edge sides of the gate line electrode 830 within the heavily doped region 811, and the widths of the two sintering regions 840 are different (the third preset width of one of the sintering regions 840 is d3, and the third preset width of the other sintering region 840 is d 3').
Illustratively, if the first preset width is between X1 μm and X2 μm (X2 > X1 and X1 > 0), the second preset width is between Y1 μm and Y2 μm (Y2 > Y1 and 0 < Y2 < X1), the third preset width is between (X1-Y2) μm and (X2-Y1). Still further exemplary, the first preset width may be any width between 80 μm and 90 μm, such as 80 μm, 81 μm, 82 μm, 83 μm, 84 μm, 85 μm, 86 μm, 87 μm, 88 μm, 89 μm, 90 μm, etc.; the second preset width may be any width between 20 μm and 30 μm, such as 20 μm, 21 μm, 22 μm, 23 μm, 24 μm, 25 μm, 26 μm, 27 μm, 28 μm, 29 μm, 30 μm, etc.; correspondingly, the third preset width range may be any width between 50 μm and 70 μm, such as 50 μm, 51 μm, 52 μm, 53 μm, 54 μm, 55 μm, 56 μm, 57 μm, 58 μm, 59 μm, 60 μm, 65 μm, 70 μm, etc.
In the preparation method of the solar cell, the heavily doped region with the first preset width is formed in the substrate, the atomic film layer is formed on the surface of the substrate, the grid line electrode with the second preset width is prepared in the heavily doped region, the grid line electrode penetrates through at least part of the atomic film layer, the sintering region is formed along the edge of the grid line electrode to prepare the solar cell, wherein the second preset width is smaller than the first preset width, the printing position of the grid line electrode can be controlled in the heavily doped region even if the printing of the grid line electrode is deviated, and the third preset width is smaller than or equal to the difference value between the first preset width and the second preset width and is larger than 0, so that the sintering region is prevented from exceeding the heavily doped region, and the auxiliary sintering of the grid line electrode can be ensured, and meanwhile, the damage to more heavily doped regions is avoided.
In one embodiment, forming a heavily doped region of a first predetermined width in a substrate includes: and forming a heavily doped region with a first preset width at a target depth of the substrate by adopting a first preset laser with target power and target speed, wherein the doping concentration of the heavily doped region is the target doping concentration.
The target power and the target speed can be flexibly set according to actual needs, and further, the target power and the target speed are set according to the needs of the target depth and the target doping concentration. The first preset laser with the target power and the target speed refers to that the equipment emitting the first preset laser emits the first preset laser at the target speed under the action of the target power.
It will be appreciated that the purpose of the heavy doping is to form heavily doped regions within the substrate, thereby improving the photoelectric conversion efficiency of the fabricated solar cell. The doped elements are also different in the preparation of different solar cells, for example, the PERC cell laser doping is phosphorus element, the TOPCon cell laser doping is boron element, and the boron is more difficult to dope into silicon because the separation coefficient of boron and phosphorus is easier to diffuse from silicon dioxide into silicon, boron is easier to diffuse from silicon into silicon dioxide, more energy is needed to advance doping, and the silicon wafer is easily damaged due to the overlarge laser energy. Compared with the traditional boron diffusion, the TOPCon battery superposition SE (laser doping) technology can theoretically achieve improvement of efficiency. The method can meet the requirements of the doping depth and the doping concentration of the heavily doped region, so that the doping quality of the heavily doped region is ensured, and the prepared solar cell can have better power generation efficiency.
In one embodiment, forming a sintered region along an edge of the gate line electrode includes: and forming a sintering region with target current density along the edge of the grid line electrode by adopting second preset laser with target voltage.
The second preset laser adopting the target voltage refers to the device emitting the second preset laser under the action of the target voltage, wherein the target voltage refers to the reverse bias voltage, so that the area where the grid line electrode is contacted with the substrate forms high current density, and high temperature is generated in the area where the grid line electrode is contacted with the substrate in the highly doped area in an extremely short time, and the contact between the grid line electrode and the substrate is improved. The first preset laser and the second preset laser have different spot widths, speeds and intensities, but the spot types of the first preset laser and the second preset laser can be the same.
In one embodiment, as shown in the flowchart of fig. 3, forming a substrate includes the following steps 302-306.
In step 302, a battery plate is provided.
The battery piece is provided with a surface and another surface which are opposite, and taking a TOPCon battery as an example, the surface and the other surface of the battery piece can be used for receiving incident light rays and generating photo-generated carriers, and one surface of the surface and the other surface can be understood as a surface opposite to solar rays, namely a light receiving surface; the other side is understood to be the surface facing away from the sun rays, also called the backlight side. Optionally, the battery piece can be a silicon wafer doped with an N-type element or a P-type element; the N-type element may be any one of phosphorus, arsenic and antimony, and the P-type element may be boron, for example.
Step 304, texturing is performed on a surface of the battery piece.
The surface of the battery piece is textured, so that surface damage caused in the process of cutting the battery piece can be removed, and the surface area of the battery piece is increased. The reflectivity of the surface of the battery piece is reduced, and as the texturing process step comprises acid washing, the adopted hydrogen fluoride can remove greasy dirt on the surface of the battery piece, and the hydrogen chloride can remove metal impurities on the surface of the battery piece, so that the light trapping effect of one surface of the battery piece is enhanced. Because of the difference of the single-crystal and multi-crystal structures of the battery pieces, the efficiency factor is considered, and the multi-crystal is commonly used for acid texturing and the single-crystal is commonly used for alkali texturing. The polycrystalline texture surface is an irregular concave-convex surface, and the single crystal texture surface is a regular pyramid-like structure. The process steps of the wool making can be wool making groove, water washing, alkali washing, water washing, acid washing, water washing and blow drying.
Step 306, preparing a borosilicate glass layer on one surface of the battery piece after texturing to form a substrate; the heavily doped region is formed within the borosilicate glass layer.
Taking the TOPCon cell as an example for explanation, the cell is an N-type silicon wafer doped with phosphorus atoms, and the main function of step 306 is to prepare a P-N junction (i.e. space charge region) by boron diffusion, so that boron diffusion is performed on one surface of the N-type doped silicon wafer to form a P+ layer on one surface of the N-type silicon wafer. In particular, a boron source (e.g., BBr) at a concentration, temperature, pressure and time 3 、BCl 3 ) After vaporization in boron expansion equipment (such as a tube furnace), a series of chemical reactions are carried out on the surface of the N-type silicon wafer to obtain proper doping concentration, junction depth and sheet resistance. According to the different technical routes of the TOPcon battery laser doping process, according to the different times of entering the boron expanding device, the primary boron expansion and the secondary boron expansion can be sequentially performed, and according to the different use modes of the first laser, the step 306 can be specifically performed by two boron expansion+laser grooving, two boron expansion+laser doping or one laser doping.
In one embodiment, the surface of the substrate comprises a front surface and a back surface disposed opposite each other, wherein the side on which the borosilicate glass layer is formed acts as the front surface of the substrate; as shown in fig. 4, the process of forming an atomic film on the surface of a substrate includes the following steps 402 to 410.
In step 402, a tunneling layer is prepared on the back side of the substrate.
The purpose of preparing the tunneling layer on the back side of the substrate is to take advantage of the tunneling effect, when electrons are confined to a very thin interface, it is possible to pass through the interface by forbidden band gaps, thus becoming easier to transport. The tunneling layer in this embodiment can be made of a material with a thickness of several nanometers, such as germanium, silicon, carbon, etc., preferably SiO can be prepared 2 As a tunneling layer. Further, the tunneling layer may be prepared by PECVD (plasma enhanced chemical vapor deposition, chemical vapor deposition). The tunneling layer is the "very thin interface" described above, so that when light is emittedElectrons on one side are excited and pushed towards the tunneling layer as they enter the solar cell. In the tunneling layer, electrons will pass through the forbidden band by tunneling effect to the other side. These electrons can generate a current or voltage, thereby converting light energy into electrical energy. The tunneling layer can improve charge transport efficiency.
Step 404, preparing a conductive doping layer on one surface of the tunneling layer away from the back surface of the substrate; the conductive doped layer is doped with phosphorus atoms.
The conductive layer doped layer has good conductivity and insulativity. Specifically, a conductive doping layer is prepared on one surface of the penetrating layer, which is away from the back surface of the substrate, and phosphorus doping is carried out on the conductive doping layer, so that the conductive doping layer doped with phosphorus atoms is obtained. The conductive doped layer in step 404 may be Poly-Si and the phosphorus doped Poly-Si layer may be prepared by a PECVD process to provide field effect passivation and carrier selectivity.
At step 406, a passivation layer is prepared on the front side of the substrate.
Among them, there are various ways to prepare the passivation layer, for example, to prepare the TOPcon battery, and the passivation layer may be prepared by LPCVD (Low Pressure Chemical Vapor Deposition ), PECVD, PVD (Physical Vapor Deposition, physical vapor deposition), ALD (Atomic Layer Deposition ), and the like, and preferably, may be prepared by ALD. The passivation layer may be a film layer made of silicon oxide, aluminum oxide, silicon nitride, silicon oxynitride, or the like, and preferably may be an aluminum oxide layer. The passivation layer can be prepared to improve the absorption rate of the front side of the solar cell to sunlight.
At step 408, a positive anti-reflection layer is prepared on a side of the passivation layer facing away from the front side of the substrate.
In step 410, a back anti-reflection layer is prepared on a side of the conductive doped layer facing away from the tunneling layer. The tunneling layer, the conductive doping layer, the passivation layer, the forward antireflection layer and the back antireflection layer form an atomic film layer together.
Wherein, the front side and the back side of the solar cell can be respectively prepared with a PECVD method, wherein, the front side and the back side of the solar cell are respectively provided with a positive antireflection layer and a back antireflection layerCan be made of SiN X The material preparation, the anti-reflection layer can reduce the Fresnel reflection of the gas-solid interface of the solar cell, thereby improving the photoelectric conversion efficiency of the solar cell.
In one embodiment, the substrate is further provided with a side adjacent to the surface; as shown in fig. 5, the process before preparing the tunneling layer on the back surface of the substrate further includes the following steps 502 to 504 before preparing the tunneling layer on the back surface of the substrate.
Step 502, oxidizing the front side of the substrate.
Specifically, the front surface of the substrate is subjected to oxidation treatment to reduce the concentration of the front surface of the substrate, so that preparation is made for preparing a passivation layer on the front surface of the substrate further, and the photoelectric conversion efficiency of the whole solar cell is improved.
At step 504, the borosilicate glass layer around the back and sides is removed.
It will be appreciated that during the boron diffusion process for preparing the borosilicate glass layer, it is inevitable that the borosilicate glass layer is wound on the back surface and the side surface adjacent to the back surface of the substrate, and the borosilicate glass layer wound on the side surface is easy to form a short circuit, and the borosilicate glass layer formed on the back surface is easy to influence subsequent passivation, so that the borosilicate glass layer wound on the back surface and the side surface needs to be removed to improve the quality of the solar cell.
In one embodiment, the substrate is further provided with a side adjacent to the surface; as shown in fig. 6, the process flow before the passivation layer is formed on the front surface of the substrate further includes the following steps 602 to 604 before the passivation layer is formed on the front surface of the substrate.
Step 602, removing the conductive doped layer around the front and side surfaces.
Step 604, etching the front and side phosphosilicate glass layers; the phosphosilicate glass layer is a film layer formed on the front and side surfaces when the conductive doped layer is doped with phosphorus atoms.
In the embodiment, the conductive doping layers around plating on the front surface and the side surface are removed, and the phosphosilicate glass layers formed on the front surface and the side surface when the conductive doping layers are doped with phosphorus atoms are etched, so that the influence of the unnecessary conductive doping layers and the phosphosilicate glass layers on the solar cell can be effectively avoided.
In one embodiment, as shown in fig. 7, the second flow chart of the method for manufacturing a solar cell includes the following steps 702 to 726.
In step 702, a battery plate is provided.
At step 704, texturing is performed on a surface of the battery plate.
And 706, preparing a borosilicate glass layer on one surface of the battery piece after texturing.
At step 708, a heavily doped region of a first predetermined width is formed in the borosilicate glass layer.
At step 710, an oxidation treatment is performed on the borosilicate glass layer.
And 712, removing the borosilicate glass layer which is wound on the other surface and the side surface of the battery piece.
Step 714, a tunneling layer is prepared with the other surface of the battery sheet.
Step 716, preparing a conductive doping layer on one surface of the tunneling layer away from the other surface of the battery piece; the conductive doped layer is doped with phosphorus atoms.
Step 718, removing the conductive doped layer around the front and side surfaces.
Step 720, etching the front and side phosphosilicate glass layers; the phosphosilicate glass layer is a film layer formed on the front surface when the conductive doped layer is doped with phosphorus atoms.
In step 722, a passivation layer is prepared on the side of the borosilicate glass layer facing away from the surface of the battery cell.
In step 724, a positive and negative reflection preventing layer is prepared on one surface of the passivation layer facing away from the battery piece.
In step 726, a back anti-reflection layer is formed on a side of the doped conductive layer facing away from the tunneling layer.
The method for manufacturing the solar cell in this embodiment can ensure that the auxiliary sintering of the gate line electrode is completed while avoiding damage to more non-heavily doped regions, and can effectively increase contact between the gate line electrode and the heavily doped layer region under the cooperation of laser auxiliary sintering and laser doping, thereby increasing photoelectric conversion efficiency of the solar cell.
It should be understood that, although the steps in the flowcharts related to the embodiments described above are sequentially shown as indicated by arrows, these steps are not necessarily sequentially performed in the order indicated by the arrows. The steps are not strictly limited to the order of execution unless explicitly recited herein, and the steps may be executed in other orders. Moreover, at least some of the steps in the flowcharts described in the above embodiments may include a plurality of steps or a plurality of stages, which are not necessarily performed at the same time, but may be performed at different times, and the order of the steps or stages is not necessarily performed sequentially, but may be performed alternately or alternately with at least some of the other steps or stages.
In one embodiment, the solar cell shown in fig. 8 may be prepared by the method for preparing a solar cell according to any of the above embodiments. The solar cell 800 includes a substrate 810 and an atomic layer 820. Referring to fig. 2, a heavily doped region 811 having a first predetermined width d1 is formed in the substrate 810; at least a portion of the atomic film layer overlies a heavily doped region 811; the heavily doped region 811 is formed with a gate line electrode 830 of a second preset width d2, the gate line electrode 830 passing through at least part of the atomic film layer; the second preset width d2 is smaller than the first preset width d1; the heavily doped region 811 is further formed with a sintering region 840 having a third preset width (d 3 and d3 ') from the edge of the gate line electrode 830, the third preset width (d 3 and d 3') being less than or equal to the difference between the first preset width d1 and the second preset width d2 and greater than 0.
In this embodiment, the second preset width d2 is smaller than the first preset width d1, so that the printing position of the gate electrode 830 can be controlled within the heavily doped region 811 even if the printing of the gate electrode 830 is offset, and the third preset widths (d 3 and d 3') are smaller than or equal to the difference between the first preset width d1 and the second preset width d2 and greater than 0, so that the sintering region 840 is prevented from exceeding the heavily doped region 811, and damage to more non-heavily doped regions can be avoided while completing the auxiliary sintering of the gate electrode 830.
In one embodiment, the surface of substrate 811 includes a front side and a back side disposed opposite each other; with continued reference to the schematic structure of the solar cell shown in fig. 7, the substrate includes a cell 812 and a borosilicate glass layer 813, the borosilicate glass layer 813 is disposed on a surface of the cell 812, and a heavily doped region 811 is disposed within the borosilicate glass layer 813.
In one embodiment, as schematically illustrated in the structure of atomic film 820 in fig. 9, atomic film 820 includes tunneling layer 821, conductive doped layer 822, passivation layer 823, forward anti-reflection layer 824, and back anti-reflection layer 825. Tunneling layer 821 is disposed on the back side of substrate 810; the conductive doped layer 822 is disposed on a side of the tunneling layer 821 facing away from the back surface of the substrate 810; conductive doped layer 822 is doped with phosphorus atoms; passivation layer 823 is disposed on the front side of substrate 810; the positive anti-reflection layer 824 is arranged on one surface of the passivation layer 823 facing away from the front surface of the substrate 810; the back anti-reflection layer 825 is disposed on a side of the conductive doped layer 822 facing away from the tunneling layer 821.
In one embodiment, the solar cells include TOPCon cells, PERC cells, xBC cells, and the like, photovoltaic cells that require heavy doping and sintering assistance.
In one embodiment, the present application also provides a photovoltaic module including a solar cell prepared by the method of preparing a solar cell as in any of the embodiments described above or a solar cell as in any of the embodiments described above. Based on the preparation method of the solar cell in the foregoing embodiment, the photovoltaic module in this embodiment has good photoelectric characteristics, and can perform efficient photoelectric conversion.
The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples only represent a few embodiments of the present application, which are described in more detail and are not to be construed as limiting the scope of the present application. It should be noted that it would be apparent to those skilled in the art that various modifications and improvements could be made without departing from the spirit of the present application, which would be within the scope of the present application. Accordingly, the scope of protection of the present application shall be subject to the appended claims.
Claims (12)
1. A method of manufacturing a solar cell, comprising:
forming a substrate;
forming a heavily doped region with a first preset width in the substrate;
forming an atomic film layer on the surface of the substrate; at least part of the atomic film layer covers the heavily doped region;
preparing a gate line electrode with a second preset width in the heavily doped region; the grid line electrode passes through at least part of the atomic film layer; the second preset width is smaller than the first preset width;
forming a sintering region along the edge of the grid line electrode to manufacture a solar cell, wherein the sintering region is a region with a third preset width from the edge of the grid line electrode in the heavily doped region; the third preset width is smaller than or equal to the difference value between the first preset width and the second preset width and is larger than 0.
2. The method of claim 1, wherein forming a heavily doped region of a first predetermined width in the substrate comprises:
and forming a heavily doped region with a first preset width at the target depth of the substrate by adopting a first preset laser with target power and target speed, wherein the doping concentration of the heavily doped region is the target doping concentration.
3. The method of claim 1, wherein forming a sintered region along the edge of the gate electrode comprises:
and forming a sintering area with target current density along the edge of the grid line electrode by adopting second preset laser with target voltage.
4. The method of claim 1, wherein forming a substrate comprises:
providing a battery piece;
texturing is carried out on one surface of the battery piece;
preparing a borosilicate glass layer on one surface of the battery piece after texturing to form the substrate; the heavily doped region is formed within the borosilicate glass layer.
5. The method of manufacturing a solar cell according to claim 4, wherein the surface of the substrate includes a front surface and a back surface disposed opposite to each other, and wherein the side on which the borosilicate glass layer is formed is the front surface of the substrate; and forming an atomic film layer on the surface of the substrate, wherein the atomic film layer comprises the following components:
preparing a tunneling layer on the back surface of the substrate;
preparing a conductive doping layer on one surface of the tunneling layer, which is away from the back surface of the substrate; the conductive doped layer is doped with phosphorus atoms;
preparing a passivation layer on the front surface of the substrate;
preparing a positive and negative reflection reducing layer on one surface of the passivation layer, which is away from the front surface of the substrate;
preparing a back antireflection layer on one surface of the conductive doping layer, which is away from the tunneling layer;
the tunneling layer, the conductive doping layer, the passivation layer, the forward antireflection layer and the back antireflection layer jointly form the atomic film layer.
6. The method of claim 5, wherein the substrate is further provided with a side adjacent to the surface; before preparing the tunneling layer on the back surface of the substrate, the method further comprises:
oxidizing the front surface of the substrate;
and removing the borosilicate glass layer which is wound on the back surface and the side surface.
7. The method of manufacturing a solar cell according to claim 5 or 6, wherein the substrate is further provided with a side surface adjacent to the surface; before preparing the passivation layer on the front surface of the substrate, the method further comprises:
removing the conductive doping layers around the front surface and the side surface;
etching the phosphosilicate glass layers of the front surface and the side surface; the phosphosilicate glass layer is a film layer formed on the front surface and the side surface when the conductive doped layer is doped with phosphorus atoms.
8. A solar cell, the solar cell comprising:
the substrate is internally provided with a heavily doped region with a first preset width;
an atomic film layer formed on the surface of the substrate; at least part of the atomic film layer covers the heavily doped region; the heavily doped region is formed with a gate line electrode with a second preset width, and the gate line electrode penetrates through at least part of the atomic film layer; the second preset width is smaller than the first preset width; the heavily doped region is also formed with a sintering region with a third preset width from the edge of the grid line electrode; the third preset width is smaller than or equal to the difference value between the first preset width and the second preset width and is larger than 0.
9. The solar cell of claim 8, wherein the surface of the substrate comprises a front side and a back side disposed opposite each other; the substrate comprises:
a battery sheet;
and the borosilicate glass layer is arranged on one surface of the battery piece, and the heavily doped region is arranged in the borosilicate glass layer.
10. The solar cell according to claim 8 or 9, wherein the atomic film layer comprises:
the tunneling layer is arranged on the back surface of the substrate;
the conductive doping layer is arranged on one surface of the tunneling layer, which is away from the back surface of the substrate; the conductive doped layer is doped with phosphorus atoms;
the passivation layer is arranged on the front surface of the substrate;
the positive anti-reflection layer is arranged on one surface of the passivation layer, which is away from the front surface of the substrate;
the back anti-reflection layer is arranged on one surface of the conductive doped layer, which is away from the tunneling layer.
11. The solar cell of claim 8, wherein the solar cell comprises a TOPcon cell.
12. A photovoltaic module comprising a solar cell produced by the production method of the solar cell according to any one of claims 1 to 7 or a solar cell according to any one of claims 8 to 11.
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