CN117792939A - Processing method and device based on network card debugging information - Google Patents
Processing method and device based on network card debugging information Download PDFInfo
- Publication number
- CN117792939A CN117792939A CN202311824768.6A CN202311824768A CN117792939A CN 117792939 A CN117792939 A CN 117792939A CN 202311824768 A CN202311824768 A CN 202311824768A CN 117792939 A CN117792939 A CN 117792939A
- Authority
- CN
- China
- Prior art keywords
- network card
- debugging
- debug
- chip
- information
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000003672 processing method Methods 0.000 title claims abstract description 21
- 238000012545 processing Methods 0.000 claims abstract description 67
- 230000002159 abnormal effect Effects 0.000 claims abstract description 31
- 238000013144 data compression Methods 0.000 claims description 67
- 238000000034 method Methods 0.000 claims description 40
- 238000007726 management method Methods 0.000 claims description 32
- 238000007906 compression Methods 0.000 claims description 20
- 230000006835 compression Effects 0.000 claims description 20
- 238000004590 computer program Methods 0.000 claims description 16
- 238000012544 monitoring process Methods 0.000 claims description 12
- 238000004806 packaging method and process Methods 0.000 claims description 6
- 230000017525 heat dissipation Effects 0.000 abstract description 13
- 238000009423 ventilation Methods 0.000 abstract description 5
- 230000002452 interceptive effect Effects 0.000 abstract description 2
- 238000012216 screening Methods 0.000 abstract description 2
- 238000000926 separation method Methods 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 21
- 238000013461 design Methods 0.000 description 12
- 238000013473 artificial intelligence Methods 0.000 description 7
- 230000005856 abnormality Effects 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 5
- 230000006870 function Effects 0.000 description 5
- 230000008569 process Effects 0.000 description 4
- 230000009471 action Effects 0.000 description 3
- 238000012423 maintenance Methods 0.000 description 3
- 238000011160 research Methods 0.000 description 3
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 230000004075 alteration Effects 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Landscapes
- Debugging And Monitoring (AREA)
Abstract
The embodiment of the invention provides a processing method and a processing device based on network card debugging information, which acquire a debugging information set of a network card chip under the condition that the network card chip is abnormal; identifying the debug information set, and determining effective debug information from the debug information set according to the identification result; and then compress the effective debug information, and send the effective debug information after compressing to the debug port to carry on the exception handling, has realized screening and compressing the debug information data of the debug port of the network card, has reduced the interactive debug information data volume on the debug port of the network card, thus no longer need to use the debug port of the large-scale as the channel of the debug data, and then has avoided occupying the space of the great IO separation blade, has promoted the efficiency of heat dissipation and ventilation, and has offered the expandable precious space for the increase of the data channel of the network port.
Description
Technical Field
The present invention relates to the field of computer cards, and in particular, to a method and apparatus for processing debug information based on a network card.
Background
AI (Artificial Intelligence ) technology is one of the most popular technological directions at present, and major companies in the industry are investing a great deal of resources to conduct research and application of AI technology; the key direction of the current AI field is an AI large model, and all companies at home and abroad can bet resources, so that whether the application of the AI large model is landed as soon as possible can be finished, and whether the preemption of the technology in the future commercial market can be determined; however, research and deployment of AI large model technology relies on GPU (Graphics Processing Unit, graphics processor) to provide computational support. Current GPU servers each support 8 GPU cards. In addition, based on the design architecture of the current GPU card, besides the GPU server, each GPU needs to be configured with a 400G (400 Gigabits (per second), 400gigabit (per second)) network card to provide an interaction channel for data traffic; therefore, the 400G network card is also a popular research direction in the current data center.
However, in the 400G network card in the related art, since the data interacted on the debug port of the network card is relatively large, large-sized debug ports such as Type-C and RJ45 (Registered Jack-45) are required to be used as channels for debugging data, and a large space of an Input/Output (IO) baffle is occupied, so that the heat dissipation and ventilation efficiency is affected, the heat dissipation performance of the network card is poor, and the whole machine needs to consume more power consumption to provide larger air quantity; secondly, the number of the debugging ports on the network card is large, other precious space is occupied, and the design concept of large channel and large bandwidth of the current 400G is contrary to that of the network port data channel is limited.
Disclosure of Invention
In view of the foregoing, a method and apparatus for processing network card debug information based on a network card are provided, which overcome or at least partially solve the foregoing problems, and include:
the method is applied to a data compression control chip, wherein the data compression control chip is respectively connected with the network card chip and a debugging port, and the method comprises the following steps:
acquiring a debugging information set of the network card chip under the condition that the network card chip is abnormal;
Identifying the debugging information set, and determining effective debugging information from the debugging information set according to an identification result;
and compressing the effective debugging information, and sending the compressed effective debugging information to the debugging port for exception processing.
Optionally, the data compression control chip includes a data identification unit, a data search matching unit and a data execution unit, where identifying the debug information set, and determining valid debug information from the debug information set according to the identification result includes:
splitting the debugging information set into table entries containing complete information tuples according to a first preset business rule by the data identification unit, and sending the table entries containing the complete information tuples to the data searching and matching unit;
checking keywords in the table items containing the complete information tuples according to a second preset business rule through the data searching and matching unit, and judging whether the table items containing the complete information tuples with high risk exist or not;
if the high-risk table entry containing the complete information tuple exists, sending the high-risk table entry containing the complete information tuple to the data execution unit;
The compressing the effective debugging information and sending the compressed effective debugging information to the debugging port for exception processing comprises the following steps:
compressing the high-risk table items containing the complete information tuples through the data execution unit, and packaging;
and sending the packaged and processed table items containing the complete information tuples with high risk to the debugging port for exception handling.
Optionally, the debug port is an integrated circuit bus debug port, and sending the compressed effective debug information to the debug port for exception handling includes:
and sending the compressed effective debugging information to target equipment through the integrated circuit bus debugging port for exception handling.
The method is applied to a management chip, wherein the management chip is respectively connected with a data compression control chip and a network card chip, and the method comprises the following steps:
monitoring the working state of the network card chip;
if the network card chip is detected to be abnormal, collecting a debugging information set of the network card chip;
The method comprises the steps of sending a debugging information set to a data compression control chip, wherein the data compression control chip is used for obtaining the debugging information set of the network card chip under the condition that the network card chip is abnormal, identifying the debugging information set, determining effective debugging information from the debugging information set according to an identification result, compressing the effective debugging information, and sending the compressed effective debugging information to a debugging port for abnormal processing.
Optionally, the working state of the network card chip is displayed through a light emitting diode.
Optionally, before the monitoring the working state of the network card chip, the method further includes:
initializing the network card.
A processing device based on network card debugging information, the device is applied to a data compression control chip, the data compression control chip is respectively connected with a network card chip and a debugging port, and the device comprises:
the network card comprises a debugging information set acquisition module, a debugging information set acquisition module and a data processing module, wherein the debugging information set acquisition module is used for acquiring the debugging information set of a network card chip under the condition that the network card chip is abnormal;
the effective debugging information determining module is used for identifying the debugging information set and determining effective debugging information from the debugging information set according to an identification result;
The compression processing module is used for carrying out compression processing on the effective debugging information and sending the compressed effective debugging information to the debugging port for carrying out exception processing.
A processing apparatus based on network card debugging information, the apparatus being applied to a management chip, the management chip being connected to a data compression control chip and a network card chip, respectively, the apparatus comprising:
the network card monitoring module is used for monitoring the working state of the network card chip;
the debug information set collection module is used for collecting the debug information set of the network card chip if the network card chip is detected to be abnormal;
the data compression control chip is used for acquiring the debugging information set of the network card chip under the condition that the network card chip is abnormal, identifying the debugging information set, determining effective debugging information from the debugging information set according to an identification result, compressing the effective debugging information, and transmitting the compressed effective debugging information to the debugging port for abnormal processing.
An electronic device comprising a processor, a memory and a computer program stored on the memory and capable of running on the processor, which when executed by the processor implements a method of processing network card based debug information as described above.
A computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements a method of processing network card debug information as described above.
The embodiment of the invention has the following advantages:
in the embodiment of the invention, the debug information set of the network card chip is obtained under the condition that the network card chip is abnormal; identifying the debug information set, and determining effective debug information from the debug information set according to the identification result; and then compress the effective debug information, and send the effective debug information after compressing to the debug port to carry on the exception handling, has realized screening and compressing the debug information data of the debug port of the network card, has reduced the interactive debug information data volume on the debug port of the network card, thus no longer need to use the debug port of the large-scale as the channel of the debug data, and then has avoided occupying the space of the great IO separation blade, has promoted the efficiency of heat dissipation and ventilation, and has offered the expandable precious space for the increase of the data channel of the network port.
Drawings
In order to more clearly illustrate the technical solutions of the present invention, the drawings that are needed in the description of the present invention will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings may be obtained according to these drawings without inventive effort to a person skilled in the art.
FIG. 1 is a schematic diagram of a debug port of a conventional network card provided by the present invention;
FIG. 2 is a block diagram of a conventional network card debug port provided by the present invention;
FIG. 3 is a flowchart illustrating a processing method based on network card debug information according to an embodiment of the present invention;
FIG. 4 is a block diagram of a data compression control chip according to an embodiment of the present invention;
FIG. 5 is a flowchart illustrating a processing method based on network card debug information according to an embodiment of the present invention;
FIG. 6 is a diagram of a debug port design architecture of a processing method based on network card debug information provided by the invention;
FIG. 7 is a debug port workflow diagram of a method for processing network card debug information based provided by the invention;
FIG. 8 is a flowchart illustrating another method for processing debug information based on a network card according to an embodiment of the present invention;
FIG. 9 is a flowchart illustrating another processing method based on network card debug information according to an embodiment of the present invention;
fig. 10 is a schematic structural diagram of a processing device based on network card debug information according to an embodiment of the present invention;
fig. 11 is a schematic structural diagram of a processing device based on network card debug information according to an embodiment of the present invention.
Detailed Description
In order that the above-recited objects, features and advantages of the present invention will become more readily apparent, a more particular description of the invention will be rendered by reference to the appended drawings and appended detailed description. It will be apparent that the described embodiments are some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Aiming at the design thought of the 400G network card in the related technology, the main design difficulty is as follows: firstly, because the port bandwidth of the 400G network card is high, the sizes of the chip and the port connector are generally large, and the 400G network card needs to be finished by relying on the 400G optical module when the signal on the 400G network card interacts with other equipment, so that more modules with larger occupied space are required to be placed on the IO baffle of the network card, and further, the space on the IO baffle is limited, and other debugging ports are difficult to place. Secondly, because the 400G network card has larger power consumption, especially when the signal rate increases, the power consumption is often increased, which causes higher requirements on the heat dissipation of the network card, and an important key point for determining the heat dissipation performance of the network card is the ventilation efficiency of the network card, if more larger debugging ports are placed on the IO baffle, the ventilation efficiency is blocked, thereby influencing the heat dissipation of the network card.
For example, as shown in fig. 1, a schematic diagram of a debug port of a conventional network card includes a network port LED (1), a network port radiator a (2), a network port radiator B (3), a network port LED (4), an ethernet port a (5), a PCB substrate (6), an ethernet port B (7), a TypeC debug port (8) and an RJ45 debug port (9). As can be seen from fig. 1, the space on the debug port panel is now almost fully occupied and no additional space is available.
Further, as shown in fig. 2, a structural block diagram of a conventional network card debug port is shown, where an interface of the network card chip that is directly out includes: the LED lamp is used for indicating the working state of the net opening; (2) The network port 1 and the network port 2 are used as main service channels for transmitting signals of the 400G network card; (3) The Type-C debugging port is used as a debugging channel and externally connected with a debugger to acquire fault information of the network card chip; (4) The RJ45 debugging port is used as a debugging channel, is externally connected with a network cable, and can log in a network card chip in a remote mode to execute a debugging command. In fact, the traditional network card debugging interface is designed by directly leading the Type-C debugging port and the RJ45 debugging port of the network card out of the network card chip, and distributing corresponding spaces for placement on the IO baffle plates, so that the traditional network card debugging interface occupies a large space and affects a heat dissipation air duct. In addition, for the scenes such as the dual-port 400G network card, the size of the network card debugging port in the scene is quite large, so that for the network card with certain specifications, no space is left on the panel of the network card, and the large-size debugging port is put again, which brings design challenges.
In order to solve the above problems, the present invention improves the processing method based on the network card debug information in the related art based on the data compression control chip, and the present invention will be described in detail with reference to the accompanying drawings.
For the processing method based on the network card debugging information (applied to the data compression control chip):
referring to fig. 3, a step flow chart of a processing method based on network card debug information provided by an embodiment of the present invention is shown, where the method is applied to a data compression control chip, and the data compression control chip is respectively connected to a network card chip and a debug port, and specifically may include the following steps:
step 301, acquiring a debug information set of the network card chip under the condition that the network card chip is abnormal;
in specific implementation, the system can be initialized, the working state of the network card is monitored in real time through the management chip, when the abnormality of the network card chip is identified, the debugging information set of the network card chip can be collected through the management chip, and the collected debugging information set of the network card chip is sent to the data compression control chip, so that the data compression control chip can acquire the relevant debugging information set for subsequent processing.
Step 302, identifying the debug information set, and determining effective debug information from the debug information set according to the identification result;
in practical application, the data compression control chip can identify and retain effective debug information in the debug information set, for example, the data compression control chip can comprise a data identification unit, a data searching and matching unit and a data executing unit, and further, the debug information set can be split into table items containing complete information tuples according to corresponding preset service rules through the data identification unit, and the table items containing complete information tuples are sent to the data searching and matching unit; the data searching and matching unit can check keywords in the list items according to corresponding preset business rules to judge whether the list items with high risk exist or not; and when the high-risk table entry exists, the high-risk table entry can be sent to a data execution unit so as to carry out subsequent compression packaging and sending processing flows.
In some embodiments of the present invention, the data compression control chip includes a data identification unit, a data search matching unit and a data execution unit, where identifying the debug information set, and determining valid debug information from the debug information set according to the identification result includes:
Splitting the debugging information set into table entries containing complete information tuples according to a first preset business rule by the data identification unit, and sending the table entries containing the complete information tuples to the data searching and matching unit;
checking keywords in the table items containing the complete information tuples according to a second preset business rule through the data searching and matching unit, and judging whether the table items containing the complete information tuples with high risk exist or not;
if the high-risk table entry containing the complete information tuple exists, sending the high-risk table entry containing the complete information tuple to the data execution unit;
the compressing the effective debugging information and sending the compressed effective debugging information to the debugging port for exception processing comprises the following steps:
compressing the high-risk table items containing the complete information tuples through the data execution unit, and packaging;
and sending the packaged and processed table items containing the complete information tuples with high risk to the debugging port for exception handling.
In a specific implementation, fig. 4 is a block diagram of a data compression control chip according to an embodiment of the present invention, where the data compression control chip may include a data identification unit, a data search matching unit, and a data execution unit. The data identification unit can split the input debugging information set into table entries according to the corresponding business rule, and each table entry can comprise a complete information tuple. The data identification unit can send the split information tuple to the data searching and matching unit; the data searching and matching unit can further check keywords in the table entry according to rules preset by a user, and after the table entry is matched with the suspected high-risk table entry, the table entry can be sent to the data executing unit. The data execution unit can recompress and package the filtered list items into messages of corresponding protocols, and sends the messages to a downlink interface to be processed by a user.
According to the above, the data compression control chip can screen and filter the debug information set sent by the network card, and only compress the most effective data information and send the compressed data information to external debugging equipment, so that the data capacity is reduced, the problem that the debug channel occupies a large space is solved, more space is released for the data channel and the heat dissipation channel, the layout problem of the network card is solved, the heat dissipation performance of the network card is improved, and the power consumption of the whole server is reduced.
And 303, performing compression processing on the effective debugging information, and sending the compressed effective debugging information to the debugging port for exception processing.
In practical application, after the high-risk table entry is sent to the data execution unit, the high-risk table entry can be compressed by the data execution unit and packaged; the packed high-risk table items can be further sent to the debugging port for exception handling, and specifically, the table items can be sent to related operation and maintenance personnel for exception handling through an I2C (Inter-Integrated Circuit, integrated circuit bus) debugging port; in fact, because the I2C signal is very compact, with only 2 signal PINs (PINs), the I2C debug port is well suited as a small-sized debug channel. However, the I2C debug port has a low rate, and the bandwidth of the signal is low, so that large-capacity data information cannot be transmitted, and therefore, the I2C debug port cannot be directly used as a traditional debug channel.
In some embodiments of the present invention, the debug port is an integrated circuit bus debug port, and the sending the valid debug information after the compression processing to the debug port for exception handling includes:
and sending the compressed effective debugging information to target equipment through the integrated circuit bus debugging port for exception handling.
In a specific implementation, the debug port can adopt an integrated circuit bus (I2C) debug port, and the compressed effective debug information can be sent to the target equipment through the integrated circuit bus debug port for exception handling; therefore, on the basis of ensuring that effective debugging information is completely transmitted, the space occupation of the debugging port is reduced through the application of the I2C debugging port, the occupation of the debugging data on business data is reduced, more space is released for the heat dissipation design and business flow of the network card, and the bottleneck point of the current high-bandwidth network card design is solved.
For the processing method based on the network card debugging information (applied to the management chip):
referring to fig. 5, a step flow chart of a processing method based on network card debug information provided by an embodiment of the present invention is shown, where the method is applied to a management chip, and the management chip is respectively connected to a data compression control chip and a network chip, and specifically may include the following steps:
Step 501, monitoring the working state of the network card chip;
in a specific implementation, the working state of the network card chip can be monitored through the management chip, specifically, the working state of the network card chip can be indicated through the LED (Light Emitting Diode ), the management chip can directly monitor the working state of the network card chip, and the working state of the network card chip can also be monitored in real time through the indication information of the LED.
In some embodiments of the present invention, the working state of the network card chip is displayed by a light emitting diode.
In practical application, the working state of the network card chip can be indicated by the LED, the management chip can directly monitor the working state of the network card chip, and the working state of the network card chip can be monitored in real time by the indication information of the LED, so that the invention is not limited to the working state.
In some embodiments of the present invention, before the monitoring the working state of the network card chip, the method further includes:
initializing the network card.
In a specific implementation, the system may be initialized first for subsequent corresponding processing steps.
Step 502, if it is detected that the network card chip is abnormal, collecting a debug information set of the network card chip;
In practical application, the system can be initialized, the working state of the network card is monitored in real time through the management chip, when the abnormality of the network card chip is identified, the debugging information set of the network card chip can be collected through the management chip, and the collected debugging information set of the network card chip is sent to the data compression control chip, so that the data compression control chip can acquire the relevant debugging information set for subsequent processing.
Step 503, the debug information set is sent to a data compression control chip, where the data compression control chip is configured to obtain the debug information set of the network card chip when the network card chip is abnormal, identify the debug information set, determine valid debug information from the debug information set according to the identification result, perform compression processing on the valid debug information, and send the compressed valid debug information to the debug port for performing abnormal processing.
In a specific implementation, the collected debug information set of the network card chip can be sent to the data compression control chip, so that the data compression control chip obtains the relevant debug information set, identifies the debug information set, determines effective debug information from the debug information set according to an identification result, compresses the effective debug information, and sends the compressed effective debug information to the debug port for exception handling.
On the basis of the above, in order to facilitate understanding and more detailed description of the technical solution of the present invention, referring to fig. 6, a debug port design architecture diagram of a processing method based on network card debug information provided by the present invention is shown, where the diagram includes the following parts: the system comprises a network card chip, an LED, a network port 1, a network port 2, an I2C debugging port, a data compression control chip and a management chip; the network card chip is a main control chip of the whole card, and is interconnected with an external LED, a network port 1, a network port 2, a data compression control chip and a management chip, so that basic network functions are provided; the LED is used for indicating the working state of the network port; the network port 1 and the network port 2 are 400G network port ports and provide a data external channel; the I2C debugging port is a debugging channel in the current architecture; because the I2C signals are very simple and only 2 signal PIN are provided, the I2C debugging port is very suitable for being used as a small-size debugging channel; however, since the speed of the I2C debug port and the bandwidth of the signal are low, large-capacity data information cannot be transmitted, and thus the device cannot be directly used as a traditional debug channel. On the basis, the invention adopts the data compression control chip to screen and filter the debugging information set sent by the network card, so that only the most effective data information is compressed and sent to the external debugging equipment, the data capacity can be reduced, and the problem of larger occupation of a debugging channel is solved.
Furthermore, on the basis of the above, as shown in fig. 7, the present invention further provides a debug port workflow diagram of a processing method based on network card debug information, specifically, after starting, the system is initialized, then the management chip monitors the working state of the network card, and when it is identified that the network card chip is abnormal, the management chip collects the debug information of the network card chip and sends the debug information to the data compression control chip. The data compression control chip can identify and retain effective debugging information, then compress the effective debugging information based on a compression algorithm and send the compressed effective debugging information to operation and maintenance personnel through an I2C debugging port so as to locate and analyze abnormal problems.
The invention provides the debugging port design architecture and the debugging port workflow. Compared with the traditional design of the network card debugging port, the method realizes the idea based on data compression, and combines the current data compression algorithm to provide a small-size debugging port solution based on the data compression algorithm, thereby solving the problems of overlarge panel space occupation caused by large data flow and large debugging port size in the traditional network card debugging port design, releasing more space for a data channel and a heat dissipation channel, greatly improving the space of the network card, solving the layout problem of the network card, improving the heat dissipation performance of the network card and reducing the power consumption of the whole server; the operation income of the data center is improved.
Referring to fig. 8, a flowchart illustrating steps of another processing method based on network card debug information according to an embodiment of the present invention is shown, where the method is applied to a data compression control chip, and the data compression control chip is respectively connected to a network card chip and a debug port, and specifically may include the following steps:
step 801, acquiring a debug information set of the network card chip under the condition that the network card chip is abnormal;
in specific implementation, the system can be initialized, the working state of the network card is monitored in real time through the management chip, when the abnormality of the network card chip is identified, the debugging information set of the network card chip can be collected through the management chip, and the collected debugging information set of the network card chip is sent to the data compression control chip, so that the data compression control chip can acquire the relevant debugging information set for subsequent processing.
Step 802, identifying the debug information set, and determining effective debug information from the debug information set according to the identification result;
in practical application, the data compression control chip can identify and retain effective debug information in the debug information set, for example, the data compression control chip can comprise a data identification unit, a data searching and matching unit and a data executing unit, and further, the debug information set can be split into table items containing complete information tuples according to corresponding preset service rules through the data identification unit, and the table items containing complete information tuples are sent to the data searching and matching unit; the data searching and matching unit can check keywords in the list items according to corresponding preset business rules to judge whether the list items with high risk exist or not; and when the high-risk table entry exists, the high-risk table entry can be sent to a data execution unit so as to carry out subsequent compression packaging and sending processing flows.
Step 803, performing compression processing on the effective debug information, and sending the compressed effective debug information to the debug port for performing exception processing, where the debug port is an integrated circuit bus debug port, and sending the compressed effective debug information to the debug port for performing exception processing includes:
and sending the compressed effective debugging information to target equipment through the integrated circuit bus debugging port for exception handling.
In practical application, after the high-risk table entry is sent to the data execution unit, the high-risk table entry can be compressed by the data execution unit and packaged; the packed high-risk table items can be further sent to the debugging port for exception handling, and particularly, the table items can be sent to related operation and maintenance personnel for exception handling through the I2C debugging port; in fact, because the I2C signal is very compact, with only 2 signal PINs, the I2C debug port is well suited as a small-sized debug channel. However, the I2C debug port has a low rate, and the bandwidth of the signal is low, so that large-capacity data information cannot be transmitted, and therefore, the I2C debug port cannot be directly used as a traditional debug channel.
Referring to fig. 9, a flowchart of steps of another processing method based on network card debug information according to an embodiment of the present invention is shown, where the method is applied to a management chip, and the management chip is respectively connected to a data compression control chip and a network chip, and specifically may include the following steps:
step 901, initializing the network card;
in a specific implementation, the system may be initialized first for subsequent corresponding processing steps.
Step 902, monitoring the working state of the network card chip;
in a specific implementation, the working state of the network card chip can be monitored through the management chip, specifically, the working state of the network card chip can be indicated through the LED, the management chip can directly monitor the working state of the network card chip, and the working state of the network card chip can be monitored in real time through the indication information of the LED.
Step 903, if it is detected that the network card chip is abnormal, collecting a debug information set of the network card chip;
in practical application, the system can be initialized, the working state of the network card is monitored in real time through the management chip, when the abnormality of the network card chip is identified, the debugging information set of the network card chip can be collected through the management chip, and the collected debugging information set of the network card chip is sent to the data compression control chip, so that the data compression control chip can acquire the relevant debugging information set for subsequent processing.
Step 904, sending the debug information set to a data compression control chip, where the data compression control chip is configured to obtain the debug information set of the network card chip when the network card chip is abnormal, identify the debug information set, determine valid debug information from the debug information set according to an identification result, perform compression processing on the valid debug information, and send the compressed valid debug information to the debug port for performing abnormal processing.
In a specific implementation, the collected debug information set of the network card chip can be sent to the data compression control chip, so that the data compression control chip obtains the relevant debug information set, identifies the debug information set, determines effective debug information from the debug information set according to an identification result, compresses the effective debug information, and sends the compressed effective debug information to the debug port for exception handling.
It should be noted that, for simplicity of description, the method embodiments are shown as a series of acts, but it should be understood by those skilled in the art that the embodiments are not limited by the order of acts, as some steps may occur in other orders or concurrently in accordance with the embodiments. Further, those skilled in the art will appreciate that the embodiments described in the specification are presently preferred embodiments, and that the acts are not necessarily required by the embodiments of the invention.
Referring to fig. 10, a schematic structural diagram of a processing device based on network card debug information according to an embodiment of the present invention is shown, where the device is applied to a data compression control chip, and the data compression control chip is respectively connected to a network card chip and a debug port, and may specifically include the following modules:
the debug information set obtaining module 1001 is configured to obtain a debug information set of a network card chip when the network card chip is abnormal;
an effective debug information determining module 1002, configured to identify the debug information set, and determine effective debug information from the debug information set according to an identification result;
and the compression processing module 1003 is configured to perform compression processing on the valid debug information, and send the compressed valid debug information to the debug port for exception processing.
In another embodiment of the present invention, the data compression control chip includes a data identification unit, a data search matching unit and a data execution unit, and the valid debug information determining module 802 includes:
the debugging information set splitting module is used for splitting the debugging information set into table entries containing complete information tuples according to a first preset service rule through the data identification unit and sending the table entries containing the complete information tuples to the data searching and matching unit;
The high risk table item judging sub-module is used for checking the keywords in the table item containing the complete information tuple according to a second preset business rule through the data searching matching unit and judging whether the table item containing the complete information tuple with high risk exists or not;
a high risk table entry sending sub-module, configured to send, if there is the table entry including the complete information tuple at the high risk, the table entry including the complete information tuple at the high risk to the data execution unit;
the compression processing module 1003 includes:
the table item compression processing sub-module is used for carrying out compression processing on the table item containing the complete information tuple with high risk through the data execution unit and carrying out packaging processing;
and the exception handling sub-module is used for sending the packaged and processed table item containing the complete information tuple with high risk to the debugging port for exception handling.
In another embodiment of the present invention, the debug port is an integrated circuit bus debug port, and the compression processing module 1003 includes:
and the effective debugging information sending sub-module is used for sending the compressed effective debugging information to the target equipment through the integrated circuit bus debugging port for exception handling.
Referring to fig. 11, a schematic structural diagram of a processing device based on network card debug information according to an embodiment of the present invention is shown, where the device is applied to a management chip, and the management chip is respectively connected to a data compression control chip and a network card chip, and may specifically include the following modules:
the network card monitoring module 1101 is configured to monitor a working state of the network card chip;
the debug information set collection module 1102 is configured to collect a debug information set of the network card chip if an abnormality is detected in the network card chip;
the debug information set sending module 1103 is configured to send the debug information set to a data compression control chip, where the data compression control chip is configured to obtain the debug information set of the network card chip when the network card chip is abnormal, identify the debug information set, determine valid debug information from the debug information set according to an identification result, perform compression processing on the valid debug information, and send the compressed valid debug information to the debug port for performing abnormal processing.
In another embodiment of the present invention, the apparatus further comprises:
And the initialization module is used for initializing the network card.
An embodiment of the present invention further provides an electronic device, which may include a processor, a memory, and a computer program stored in the memory and capable of running on the processor, where the computer program when executed by the processor implements a processing method based on the network card debug information as described above.
An embodiment of the present invention further provides a computer readable storage medium, where a computer program is stored, where the computer program when executed by a processor implements a processing method based on network card debug information as described above.
For the device embodiments, since they are substantially similar to the method embodiments, the description is relatively simple, and reference is made to the description of the method embodiments for relevant points.
In this specification, each embodiment is described in a progressive manner, and each embodiment is mainly described by differences from other embodiments, and identical and similar parts between the embodiments are all enough to be referred to each other.
It will be apparent to those skilled in the art that embodiments of the present invention may be provided as a method, apparatus, or computer program product. Accordingly, embodiments of the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, embodiments of the invention may take the form of a computer program product on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) having computer-usable program code embodied therein.
Embodiments of the present invention are described with reference to flowchart illustrations and/or block diagrams of methods, terminal devices (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing terminal device to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing terminal device, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. It is therefore intended that the following claims be interpreted as including the preferred embodiment and all such alterations and modifications as fall within the scope of the embodiments of the invention.
Finally, it is further noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or terminal that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or terminal. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article or terminal device comprising the element.
The above provides a method and apparatus for processing debug information based on a network card, and specific examples are applied to illustrate the principles and embodiments of the present invention, where the above description of the embodiments is only for helping to understand the method and core ideas of the present invention; meanwhile, as those skilled in the art will vary in the specific embodiments and application scope according to the idea of the present invention, the present disclosure should not be construed as limiting the present invention in summary.
Claims (10)
1. The processing method based on the network card debugging information is characterized by being applied to a data compression control chip, wherein the data compression control chip is respectively connected with the network card chip and a debugging port, and the method comprises the following steps:
acquiring a debugging information set of the network card chip under the condition that the network card chip is abnormal;
identifying the debugging information set, and determining effective debugging information from the debugging information set according to an identification result;
and compressing the effective debugging information, and sending the compressed effective debugging information to the debugging port for exception processing.
2. The method of claim 1, wherein the data compression control chip includes a data identification unit, a data search matching unit, and a data execution unit, wherein the identifying the debug information set, and determining valid debug information from the debug information set according to the identification result, includes:
splitting the debugging information set into table entries containing complete information tuples according to a first preset business rule by the data identification unit, and sending the table entries containing the complete information tuples to the data searching and matching unit;
checking keywords in the table items containing the complete information tuples according to a second preset business rule through the data searching and matching unit, and judging whether the table items containing the complete information tuples with high risk exist or not;
if the high-risk table entry containing the complete information tuple exists, sending the high-risk table entry containing the complete information tuple to the data execution unit;
the compressing the effective debugging information and sending the compressed effective debugging information to the debugging port for exception processing comprises the following steps:
Compressing the high-risk table items containing the complete information tuples through the data execution unit, and packaging;
and sending the packaged and processed table items containing the complete information tuples with high risk to the debugging port for exception handling.
3. The method according to claim 1 or 2, wherein the debug port is an integrated circuit bus debug port, and the sending the valid debug information after the compression processing to the debug port for exception handling comprises:
and sending the compressed effective debugging information to target equipment through the integrated circuit bus debugging port for exception handling.
4. The processing method based on the network card debugging information is characterized by being applied to a management chip, wherein the management chip is respectively connected with a data compression control chip and a network chip, and the method comprises the following steps:
monitoring the working state of the network card chip;
if the network card chip is detected to be abnormal, collecting a debugging information set of the network card chip;
the method comprises the steps of sending a debugging information set to a data compression control chip, wherein the data compression control chip is used for obtaining the debugging information set of the network card chip under the condition that the network card chip is abnormal, identifying the debugging information set, determining effective debugging information from the debugging information set according to an identification result, compressing the effective debugging information, and sending the compressed effective debugging information to a debugging port for abnormal processing.
5. The method of claim 4, wherein the operating status of the network card chip is displayed by a light emitting diode.
6. The method according to claim 4 or 5, wherein before monitoring the operation state of the network card chip, further comprises:
initializing the network card.
7. The utility model provides a processing apparatus based on network card debugging information, its characterized in that, the device is applied to data compression control chip, data compression control chip links to each other with network card chip and debugging mouth respectively, the device includes:
the network card comprises a debugging information set acquisition module, a debugging information set acquisition module and a data processing module, wherein the debugging information set acquisition module is used for acquiring the debugging information set of a network card chip under the condition that the network card chip is abnormal;
the effective debugging information determining module is used for identifying the debugging information set and determining effective debugging information from the debugging information set according to an identification result;
the compression processing module is used for carrying out compression processing on the effective debugging information and sending the compressed effective debugging information to the debugging port for carrying out exception processing.
8. The device is applied to a management chip, wherein the management chip is respectively connected with a data compression control chip and a network card chip, and the device comprises:
The network card monitoring module is used for monitoring the working state of the network card chip;
the debug information set collection module is used for collecting the debug information set of the network card chip if the network card chip is detected to be abnormal;
the data compression control chip is used for acquiring the debugging information set of the network card chip under the condition that the network card chip is abnormal, identifying the debugging information set, determining effective debugging information from the debugging information set according to an identification result, compressing the effective debugging information, and transmitting the compressed effective debugging information to the debugging port for abnormal processing.
9. An electronic device comprising a processor, a memory and a computer program stored on the memory and capable of running on the processor, which when executed by the processor implements a method of processing network card debug information based on any of claims 1 to 6.
10. A computer-readable storage medium, wherein a computer program is stored on the computer-readable storage medium, and when executed by a processor, the computer program implements the network card debug information-based processing method according to any one of claims 1 to 6.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311824768.6A CN117792939A (en) | 2023-12-27 | 2023-12-27 | Processing method and device based on network card debugging information |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311824768.6A CN117792939A (en) | 2023-12-27 | 2023-12-27 | Processing method and device based on network card debugging information |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN117792939A true CN117792939A (en) | 2024-03-29 |
Family
ID=90394076
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202311824768.6A Pending CN117792939A (en) | 2023-12-27 | 2023-12-27 | Processing method and device based on network card debugging information |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN117792939A (en) |
-
2023
- 2023-12-27 CN CN202311824768.6A patent/CN117792939A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN111131379B (en) | Distributed flow acquisition system and edge calculation method | |
| CN111459665A (en) | Distributed edge computing system and distributed edge computing method | |
| CN114050983B (en) | Flow self-adaptive acquisition method and device, storage medium and electronic equipment | |
| CN112162829B (en) | Resource monitoring data preprocessing system under edge computing scene | |
| CN112995337B (en) | High-performance processor chip-based high-performance Internet of things hardware platform and method | |
| CN103763143A (en) | Method and system for equipment abnormality alarming based on storage server | |
| CN114070709A (en) | Alarm correlation analysis method and device | |
| CN112487265B (en) | Data processing method and device, computer storage medium and electronic equipment | |
| CN114490280A (en) | Log processing method, device, equipment and medium | |
| CN115712646A (en) | Alarm strategy generation method, device and storage medium | |
| CN117792939A (en) | Processing method and device based on network card debugging information | |
| CN112688924A (en) | Network protocol analysis system | |
| CN115334001B (en) | Data resource scheduling method and device based on priority relation | |
| CN116346959A (en) | DPU scene elastic network card efficient implementation method and device | |
| CN114598731B (en) | Cluster log acquisition method, device, equipment and storage medium | |
| CN111343047A (en) | Method and system for monitoring IB network flow | |
| CN116594840A (en) | Log fault acquisition and analysis method, system, equipment and medium based on ELK | |
| CN115964418A (en) | Multi-source heterogeneous data access system and method for Internet of things | |
| CN107766497A (en) | The method and terminal of Data Collection based on container | |
| CN114513553A (en) | Data processing method and device, electronic equipment and storage medium | |
| CN106878340B (en) | Comprehensive safety monitoring analysis system based on network flow | |
| CN113630288A (en) | Intelligent network card fault information collection method, device, terminal and storage medium | |
| CN103905223A (en) | Data packet acquisition method, system and device | |
| CN111352776A (en) | Device and method for capturing BIOS (basic input output System) and BMC (baseboard management controller) serial port data through FPGA (field programmable gate array) | |
| CN107239125A (en) | A kind of computer system for being used to automatically control monitoring |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |