CN117768359A - Method, device and equipment for positioning quality degradation of circuit based on soft probe technology - Google Patents
Method, device and equipment for positioning quality degradation of circuit based on soft probe technology Download PDFInfo
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Abstract
The invention provides a method, a device and equipment for positioning circuit quality degradation based on a soft probe technology, wherein the method comprises the following steps: creating a monitoring task, and sending the monitoring task to a designated circuit quality test probe; the circuit quality test probe analyzes the received monitoring task and sends a test instruction to a specified circuit quality feedback device; the circuit quality feedback device analyzes after receiving the test instruction, acquires the related information participating in the test, and sends a test reply message to the test probe; the circuit quality test probe extracts relevant information in each message after receiving the test reply message; after receiving the reply message, the circuit quality test probe enters a monitoring task queue for caching, and sends monitoring task return information to the circuit quality monitoring platform according to a task number; after receiving the return information, the circuit quality monitoring platform calculates and analyzes the relevant index of the test, and stores the test result in a warehouse. In this way, the circuit in which the fault is located can be autonomously analyzed and located.
Description
Technical Field
Embodiments of the present invention generally relate to the field of circuit quality monitoring technologies, and in particular, to a method, an apparatus, and a device for positioning degradation of circuit quality based on a soft probe technology.
Background
In an IP (Internet Protocol ) network, a large number of network devices are distributed, and the network devices are interconnected through a link of an aggregation group, so that the quality condition of a circuit in the link of the aggregation group is more and more concerned by operators and users carrying services, and the complexity of a quality analysis technology of a certain circuit in the aggregation group brings great challenges to the monitoring of service quality and the positioning of service faults for relevant operation and maintenance personnel, so that operators and end users all wish to have means for quality monitoring, fault diagnosis and root cause analysis on the circuit in the link of the aggregation group, and further discover and eliminate hidden danger and quickly position the fault cause in time, and keep the network stably running.
Disclosure of Invention
In order to solve the problems, the invention initiates active test on the service link by using the soft probe, and automatically locates the circuit where the fault is located by acquiring the related index and performing autonomous analysis, thereby helping network operation and maintenance personnel to quickly locate the fault of the service, reducing the working pressure of the network operation and maintenance personnel, improving the operation and maintenance efficiency and improving the use experience of users.
According to the embodiment of the invention, a method, a device and equipment for positioning circuit quality degradation based on soft probe technology are provided.
In a first aspect of the invention, a method of circuit quality degradation localization based on soft probe technology is provided. The method comprises the following steps:
s01: the circuit quality monitoring platform creates a monitoring task according to service maintenance requirements, and sends the monitoring task to a designated circuit quality test probe, wherein the content of the monitoring task comprises: monitoring task number, probe number (IP address), feedback device aggregation group number, physical port number in feedback device aggregation group, test time stamp, test type and test times, wherein the test type comprises: time delay test and packet loss rate test;
s02: after receiving the monitoring task, the circuit quality test probe analyzes the test information of the monitoring task, and sends a test instruction to a specified circuit quality feedback device according to the test type;
s03: after receiving the test instruction, the circuit quality feedback device analyzes the test instruction, acquires aggregation group information participating in the test and physical port information appointed in the aggregation group, and controls the physical port to send a test reply message to the test probe;
s04: the circuit quality test probe receives test reply messages sent by each physical port in the appointed aggregation group of the circuit quality feedback device and then extracts relevant information in each message;
s05: after receiving the test reply message sent by the circuit quality feedback device, the circuit quality test probe enters a monitoring task queue buffer according to the task number of the monitoring task, and sends monitoring task return information to the circuit quality monitoring platform according to the task number;
s06: after receiving the monitoring task information returned by the test probe, the circuit quality monitoring platform calculates and analyzes the index of each physical circuit in the appointed aggregation group on the circuit quality feedback device of the current test, stores the test result in a warehouse, and presents the test result through a graphical interface.
Further, the content of the request message of the test instruction in S02 is:
time delay test instruction: filling an IP header with a designated feedback device number in a monitoring task as an IP destination, searching a corresponding aggregation group and physical ports in the aggregation group according to the configuration opposite-end feedback device number, the feedback device aggregation group number and the physical port number in the feedback device aggregation group, forwarding a request message of a time delay test instruction on the designated physical ports in the designated aggregation group, and recording time stamps of the request message of the time delay test instruction to each physical port;
packet loss rate test instruction: filling an IP header into a designated feedback device number in a monitoring task to serve as an IP destination, searching a corresponding aggregation group and physical ports in the aggregation group according to the configuration opposite-end feedback device number, the feedback device aggregation group number and the physical port number in the feedback device aggregation group, forwarding request messages of the packet loss rate test instruction on the designated physical ports in the designated aggregation group, determining the sending quantity of the request messages of the packet loss rate test instruction according to the test times in the monitoring task, and recording the sending quantity of the messages as P1.
Further, the content of the test reply message in S03 is:
and (3) time delay test reply message: filling a test probe number appointed in a monitoring task into an IP head to serve as an IP destination, and carrying a circuit quality feedback device number, a feedback device aggregation group number, a physical port number in the feedback device aggregation group and time stamp field information, wherein the time stamp field information comprises a time stamp of a request message of a time delay test instruction received by each physical port in the aggregation group and a time stamp of a time delay test reply message sent by each physical port in the aggregation group;
packet loss rate test reply message: the IP head is filled with the test probe number appointed in the monitoring task as the destination of the IP and carries the number of the circuit quality feedback device, the number of the feedback device aggregation group and the physical port number field information in the feedback device aggregation group.
Further, the related information in the message described in S04 is:
if the time delay test is performed, the related information includes: the method comprises the steps of time delay testing circuit quality feedback device number, feedback device aggregation group number, physical port number in the feedback device aggregation group and time stamp field information;
if the packet loss rate test is performed, the related information includes: circuit quality feedback number, feedback aggregation group number, and physical port number field information in the feedback aggregation group.
Further, after extracting the relevant information in each message in S04, if the relevant information is a delay test, the receiving time stamp of the delay test reply message is recorded, and if the relevant information is a packet loss rate test, the receiving number of the messages is recorded as P2.
Further, the monitoring task return information in S05 is:
if the time delay test is performed, the task monitoring return information comprises: monitoring task numbers, probe numbers, feedback device aggregation group numbers, physical port numbers in the feedback device aggregation group, test time stamps, test types and test sequence numbers;
if the packet loss rate test is performed, the monitoring task return information comprises: the method comprises the steps of monitoring task numbers, probe numbers, feedback device aggregation group numbers, physical port numbers in the feedback device aggregation group, test time stamps, test types and test message return numbers.
Further, in the step S06, the calculation and analysis are performed to analyze the index of each physical circuit in the designated aggregation group on the circuit quality feedback device of the current test, and if the current test is a time delay test, the calculation rule of the time delay test is as follows:
circuit delay calculation rule corresponding to the nth physical port in the aggregation group: delayn= "T2-N" - "T1-N" - ("T2-N" - "T1-N") where "DelayN": circuit delay indexes corresponding to the Nth physical port in the aggregation group; "T2-N": the circuit quality test probe receives a time stamp of a time delay test reply message sent by a physical port N in the appointed aggregation group of the circuit quality feedback device; "T1-N": the circuit quality test probe sends a time stamp of a physical port N in the appointed aggregation group to the circuit quality feedback device; "t2-N": the circuit quality feedback device designates a time stamp of a time delay test reply message sent by a physical port N in the aggregation group; "t1-N": the circuit quality feedback device designates the timestamp of the request message of the delay test instruction received by the physical port N in the aggregation group;
the circuit jitter index calculation rule corresponding to the nth physical port in the aggregation group is as follows: jiitten= | "DelayN-1" - "DelayN-2" |, where "Jiitten": circuit jitter index corresponding to the nth physical port in the aggregation group; "DelayN-1": aggregating circuit delay indexes corresponding to the Nth physical port in the group at a certain moment; "DelayN-2": circuit delay indexes corresponding to the N-th physical port in the same aggregation group in adjacent periods;
if the test is a packet loss rate test, the calculation rule of the circuit packet loss rate corresponding to the nth physical port in the aggregation group is as follows: lossn= ("P1-N" - "P2-N")/"P1-N", where "LossN": circuit packet loss rate corresponding to the Nth physical port in the aggregation group; "P1-N": the circuit quality test probe sends the message quantity of the physical port N in the appointed aggregation group to the circuit quality feedback device; "P2-N": the circuit quality test probe receives the quantity of packet loss rate test reply messages sent by the physical port N in the appointed aggregation group of the circuit quality feedback device.
In a second aspect of the invention, an apparatus for circuit quality degradation localization based on soft probe technology is provided. The device comprises:
the task creation module: the circuit quality monitoring platform is used for creating a monitoring task according to service maintenance requirements and sending the monitoring task to a designated circuit quality test probe, wherein the content of the monitoring task comprises the following components: monitoring task numbers, probe numbers, feedback device aggregation group numbers, physical port numbers in the feedback device aggregation group, test time stamps, test types and test times, wherein the test types comprise: time delay test and packet loss rate test;
the instruction sending module: the circuit quality testing probe is used for analyzing the testing information of the monitoring task after receiving the monitoring task, and sending a testing instruction to the appointed circuit quality feedback device according to the testing type;
message reply module: the circuit quality feedback device is used for analyzing the test instruction after receiving the test instruction, acquiring aggregation group information participating in the test and physical port information appointed in the aggregation group, and controlling the physical port to send a test reply message to the test probe;
and the information extraction module is used for: the circuit quality testing probe is used for extracting relevant information in each message after receiving test reply messages sent by each physical port in the appointed aggregation group of the circuit quality feedback device;
the task return module: after receiving the test reply message sent by the circuit quality feedback device, the circuit quality test probe enters a monitoring task queue buffer according to the task number of the monitoring task, and sends monitoring task return information to the circuit quality monitoring platform according to the task number;
and a result preservation module: after receiving the monitoring task information returned by the test probe, the circuit quality monitoring platform calculates and analyzes the index of each physical circuit in the appointed aggregation group on the circuit quality feedback device of the current test, stores the test result in a warehouse, and presents the test result through a graphical interface.
In a third aspect of the invention, an electronic device is provided. The electronic device includes: a memory and a processor, the memory having stored thereon a computer program, the processor implementing a method according to the first aspect of the invention when executing the program.
In a fourth aspect of the invention, there is provided a computer readable storage medium having stored thereon a computer program which when executed by a processor implements a method as according to the first aspect of the invention.
According to the invention, the soft probe is utilized to initiate active test on the service link, and the circuit where the fault is located is automatically located by acquiring the related index and performing autonomous analysis, so that network operation and maintenance personnel are helped to quickly locate the service fault, the working pressure of the network operation and maintenance personnel is reduced, the operation and maintenance efficiency is improved, and the use experience of users is improved.
It should be understood that the description in this summary is not intended to limit the critical or essential features of the embodiments of the invention, nor is it intended to limit the scope of the invention. Other features of the present invention will become apparent from the description that follows.
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The above and other features, advantages and aspects of embodiments of the present invention will become more apparent by reference to the following detailed description when taken in conjunction with the accompanying drawings. Wherein:
FIG. 1 illustrates a method flow diagram for soft probe technology based circuit quality degradation localization in accordance with an embodiment of the present invention;
FIG. 2 shows an apparatus block diagram of soft probe technology based circuit quality degradation localization in accordance with an embodiment of the present invention;
FIG. 3 shows a schematic diagram of an apparatus for soft probe technology based circuit quality degradation localization in accordance with an embodiment of the present invention;
fig. 4 shows a schematic diagram of a residential home broadband user connection according to an embodiment of the invention.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
According to the embodiment of the invention, the method, the device and the equipment for positioning the quality degradation of the circuit based on the soft probe technology are provided, the soft probe is utilized to initiate active test on the service link, and the circuit where the fault is located is automatically positioned by acquiring the related index and performing autonomous analysis, so that network operation and maintenance personnel can be helped to quickly locate the service fault, the working pressure of the network operation and maintenance personnel is reduced, the operation and maintenance efficiency is improved, and the use experience of a user is improved.
The principles and spirit of the present invention are explained in detail below with reference to several representative embodiments thereof.
FIG. 1 is a flow chart of a method for positioning circuit quality degradation based on soft probe technology according to an embodiment of the invention. The method comprises the following steps:
s01: the circuit quality monitoring platform creates a monitoring task according to service maintenance requirements, and sends the monitoring task to a designated circuit quality test probe, wherein the content of the monitoring task comprises: monitoring task numbers, probe numbers, feedback device aggregation group numbers, physical port numbers in the feedback device aggregation group, test time stamps, test types and test times, wherein the test types comprise: time delay test and packet loss rate test;
s02: after receiving the monitoring task, the circuit quality test probe analyzes the test information of the monitoring task, and sends a test instruction to a specified circuit quality feedback device according to the test type;
s03: after receiving the test instruction, the circuit quality feedback device analyzes the test instruction, acquires aggregation group information participating in the test and physical port information appointed in the aggregation group, and controls the physical port to send a test reply message to the test probe;
s04: the circuit quality test probe receives test reply messages sent by each physical port in the appointed aggregation group of the circuit quality feedback device and then extracts relevant information in each message;
s05: after receiving the test reply message sent by the circuit quality feedback device, the circuit quality test probe enters a monitoring task queue buffer according to the task number of the monitoring task, and sends monitoring task return information to the circuit quality monitoring platform according to the task number;
s06: after receiving the monitoring task information returned by the test probe, the circuit quality monitoring platform calculates and analyzes the index of each physical circuit in the appointed aggregation group on the circuit quality feedback device of the current test, stores the test result in a warehouse, and presents the test result through a graphical interface.
It should be noted that although the operations of the method of the present invention are described in a particular order in the above embodiments and the accompanying drawings, this does not require or imply that the operations must be performed in the particular order or that all of the illustrated operations be performed in order to achieve desirable results. Additionally or alternatively, certain steps may be omitted, multiple steps combined into one step to perform, and/or one step decomposed into multiple steps to perform.
In order to more clearly explain the above method for locating the degradation of the circuit quality based on the soft probe technique, a specific embodiment is described below, however, it should be noted that this embodiment is only for better illustrating the present invention and is not meant to limit the present invention unduly.
The method of locating circuit quality degradation based on soft probe technology is further described in more detail below with one specific example:
a telecommunications carrier often receives a failure report from a home broadband user in a zone, and the zone is checked to have two routers down to which all home broadband users in the zone are attached, as shown in fig. 4. Operation and maintenance personnel create a monitoring task through the circuit quality monitoring platform, and the monitoring task comprises a monitoring task number: JC20231025, probe number: 10.10.10.10, feedback number: 20.20.20.20, feedback set number: aggregation group a, the feedback device aggregates physical port numbers within the group: port a, port B, port C and port D of aggregation group a of router a, test type: packet loss rate, number of tests: 5 times. And sending the monitoring task to the designated circuit quality test probe: the IP address is 10.10.10.10.
The test probe which receives the monitoring task analyzes the test information of the monitoring task, and according to the test type: the packet loss rate sends a packet loss rate test instruction to the router A, and a request message of the packet loss rate test instruction is as follows:
the test probe firstly constructs a packet loss rate test request message, and fills the IP address of the router A in the IP header: 20.20.20.20 as destination address of IP, carry aggregation group number of router A: aggregation group A, physical port number within aggregation group: port a, port B, port C and port D, test times: 5 times field information.
Through route forwarding, the router A receives the packet loss rate test request message, and identifies the corresponding aggregation group A of the device and physical ports in the aggregation group by analyzing the message: port a, port B, port C and port D, the packet loss rate test request message is forwarded on the designated physical ports, port a, port B, port C and port D, in the designated aggregation group a, and 5 times of packet loss rate test request messages are sent according to the number of tests in the monitoring task, we mark the message sending number as P1, the number of packet loss rate test request messages sent to the physical port a is marked as "P1-a=5", the number of packet loss rate test request messages sent to the physical port B is marked as "P1-b=5", the number of packet loss rate test request messages sent to the physical port C is marked as "P1-c=5", and the number of packet loss rate test request messages sent to the physical port D is marked as "P1-d=5".
After the packet loss rate test request message is forwarded by each physical port in the aggregation group, the router A sends a packet loss rate test reply message to the test probe, wherein the packet loss rate test reply message is as follows:
test probe number specified in the IP header fill-in monitoring task: 10.10.10.10 as destination for IP and carries the circuit quality feedback number: 20.20.20.20, feedback set number: aggregation group a and feedback devices aggregate intra-group physical port numbers: port a, port B, port C and port D field information.
After receiving the packet loss rate test reply message, the test probe extracts the number of the router A in the message: 20.20.20.20, polymeric group number: aggregation group a and physical port number: port a, port B, port C and port D field information, and record the number of received messages as P2: the number of packet loss test reply messages of the received physical port a is denoted as "P2-a=5", the number of packet loss test reply messages of the received physical port B is denoted as "P2-b=0", the number of packet loss test reply messages of the received physical port C is denoted as "P2-c=5", and the number of packet loss test reply messages of the received physical port D is denoted as "P2-d=5".
After receiving the packet loss rate test reply message, the test probe enters a monitoring task queue buffer according to the task number of the monitoring task, and sends monitoring task return information to the circuit quality monitoring platform according to the task number, wherein the monitoring task return information comprises the monitoring task number: JC20231025, probe number: 10.10.10.10, feedback number: 20.20.20.20, feedback set number: aggregation group a, the feedback device aggregates physical port numbers within the group: port a, port B, port C and port D, test type: packet loss rate, test packet number: 5.
after receiving the monitoring task information returned by the test probe, the circuit quality monitoring platform calculates and analyzes packet loss rate indexes of a physical port A, a physical port B, a physical port C and a physical port D in an aggregation group A on a router A tested at the time by extracting the monitoring task number, the probe number, the feedback device aggregation group number, the physical port number in the feedback device aggregation group, the test type and the test message reply number information, stores the test result in a warehouse, and displays the test result through a graphical interface.
After calculation of packet loss rates of 4 physical ports, the result is as follows:
packet loss rate lossa= (5-5)/5=0% of physical port a
Packet loss rate lossb= (5-0)/5=100% of physical port B
Packet loss rate lossc= (5-5)/5=0% of physical port C
Packet loss rate lossd= (5-5)/5=0% of physical port D
The circuit quality monitoring platform gives an early warning to prompt that the packet loss of the physical port B in the aggregation group A of the router A is serious, which is the reason for abnormal Internet surfing of the home broadband user hung under the router.
Based on the same inventive concept, the invention also provides a device for positioning the circuit quality degradation based on the soft probe technology. The implementation of the device can be referred to as implementation of the above method, and the repetition is not repeated. As shown in fig. 2, the apparatus 100 includes:
task creation module 101: the circuit quality monitoring platform is used for creating a monitoring task according to service maintenance requirements and sending the monitoring task to a designated circuit quality test probe, wherein the content of the monitoring task comprises the following components: monitoring task numbers, probe numbers, feedback device aggregation group numbers, physical port numbers in the feedback device aggregation group, test time stamps, test types and test times, wherein the test types comprise: time delay test and packet loss rate test;
instruction sending module 102: the circuit quality testing probe is used for analyzing the testing information of the monitoring task after receiving the monitoring task, and sending a testing instruction to the appointed circuit quality feedback device according to the testing type;
message reply module 103: the circuit quality feedback device is used for analyzing the test instruction after receiving the test instruction, acquiring aggregation group information participating in the test and physical port information appointed in the aggregation group, and controlling the physical port to send a test reply message to the test probe;
the information extraction module 104: the circuit quality testing probe is used for extracting relevant information in each message after receiving test reply messages sent by each physical port in the appointed aggregation group of the circuit quality feedback device;
task return module 105: after receiving the test reply message sent by the circuit quality feedback device, the circuit quality test probe enters a monitoring task queue buffer according to the task number of the monitoring task, and sends monitoring task return information to the circuit quality monitoring platform according to the task number;
the result saving module 106: after receiving the monitoring task information returned by the test probe, the circuit quality monitoring platform calculates and analyzes the index of each physical circuit in the appointed aggregation group on the circuit quality feedback device of the current test, stores the test result in a warehouse, and presents the test result through a graphical interface.
It will be clear to those skilled in the art that, for convenience and brevity of description, specific working procedures of the described modules may refer to corresponding procedures in the foregoing method embodiments, which are not described herein again.
As shown in fig. 3, the apparatus includes a Central Processing Unit (CPU) that can perform various suitable actions and processes according to computer program instructions stored in a Read Only Memory (ROM) or computer program instructions loaded from a storage unit into a Random Access Memory (RAM). In the RAM, various programs and data required for the operation of the device can also be stored. The CPU, ROM and RAM are connected to each other by a bus. An input/output (I/O) interface is also connected to the bus.
A plurality of components in a device are connected to an I/O interface, comprising: an input unit such as a keyboard, a mouse, etc.; an output unit such as various types of displays, speakers, and the like; a storage unit such as a magnetic disk, an optical disk, or the like; and communication units such as network cards, modems, wireless communication transceivers, and the like. The communication unit allows the device to exchange information/data with other devices via a computer network, such as the internet, and/or various telecommunication networks.
The processing unit performs the respective methods and processes described above, for example, the methods S01 to S06. For example, in some embodiments, methods S01-S06 may be implemented as a computer software program tangibly embodied on a machine-readable medium, such as a storage unit. In some embodiments, part or all of the computer program may be loaded and/or installed onto the device via the ROM and/or the communication unit. When the computer program is loaded into RAM and executed by the CPU, one or more steps of the methods S01 to S06 described above may be performed. Alternatively, in other embodiments, the CPU may be configured to perform methods S01-S06 in any other suitable manner (e.g., by means of firmware).
The functions described above herein may be performed, at least in part, by one or more hardware logic components. For example, without limitation, exemplary types of hardware logic components that may be used include: a Field Programmable Gate Array (FPGA), an Application Specific Integrated Circuit (ASIC), an Application Specific Standard Product (ASSP), a system on a chip (SOC), a load programmable logic device (CPLD), etc.
Program code for carrying out methods of the present invention may be written in any combination of one or more programming languages. These program code may be provided to a processor or controller of a general purpose computer, special purpose computer, or other programmable data processing apparatus such that the program code, when executed by the processor or controller, causes the functions/operations specified in the flowchart and/or block diagram to be implemented. The program code may execute entirely on the machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.
In the context of the present invention, a machine-readable medium may be a tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. The machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
Moreover, although operations are depicted in a particular order, this should be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. In certain circumstances, multitasking and parallel processing may be advantageous. Likewise, while several specific implementation details are included in the above discussion, these should not be construed as limiting the scope of the invention. Certain features that are described in the context of separate embodiments can also be implemented in combination in a single implementation. Conversely, various features that are described in the context of a single implementation can also be implemented in multiple implementations separately or in any suitable subcombination.
Although the subject matter has been described in language specific to structural features and/or methodological acts, it is to be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are example forms of implementing the claims.
Claims (10)
1. A method for locating circuit quality degradation based on soft probe technology, which is characterized in that the method comprises the following steps:
s01: the circuit quality monitoring platform creates a monitoring task according to service maintenance requirements, and sends the monitoring task to a designated circuit quality test probe, wherein the content of the monitoring task comprises: monitoring task numbers, probe numbers, feedback device aggregation group numbers, physical port numbers in the feedback device aggregation group, test time stamps, test types and test times, wherein the test types comprise: time delay test and packet loss rate test;
s02: after receiving the monitoring task, the circuit quality test probe analyzes the test information of the monitoring task, and sends a test instruction to a specified circuit quality feedback device according to the test type;
s03: after receiving the test instruction, the circuit quality feedback device analyzes the test instruction, acquires aggregation group information participating in the test and physical port information appointed in the aggregation group, and controls the physical port to send a test reply message to the test probe;
s04: the circuit quality test probe receives test reply messages sent by each physical port in the appointed aggregation group of the circuit quality feedback device and then extracts relevant information in each message;
s05: after receiving the test reply message sent by the circuit quality feedback device, the circuit quality test probe enters a monitoring task queue buffer according to the task number of the monitoring task, and sends monitoring task return information to the circuit quality monitoring platform according to the task number;
s06: after receiving the monitoring task information returned by the test probe, the circuit quality monitoring platform calculates and analyzes the index of each physical circuit in the appointed aggregation group on the circuit quality feedback device of the current test, stores the test result in a warehouse, and presents the test result through a graphical interface.
2. The method for positioning circuit quality degradation based on soft probe technology according to claim 1, wherein the request message content of the test instruction in S02 is:
time delay test instruction: filling an IP header with a designated feedback device number in a monitoring task as an IP destination, searching a corresponding aggregation group and physical ports in the aggregation group according to the configuration opposite-end feedback device number, the feedback device aggregation group number and the physical port number in the feedback device aggregation group, forwarding a request message of a time delay test instruction on the designated physical ports in the designated aggregation group, and recording time stamps of the request message of the time delay test instruction to each physical port;
packet loss rate test instruction: filling an IP header into a designated feedback device number in a monitoring task to serve as an IP destination, searching a corresponding aggregation group and physical ports in the aggregation group according to the configuration opposite-end feedback device number, the feedback device aggregation group number and the physical port number in the feedback device aggregation group, forwarding request messages of the packet loss rate test instruction on the designated physical ports in the designated aggregation group, determining the sending quantity of the request messages of the packet loss rate test instruction according to the test times in the monitoring task, and recording the sending quantity of the messages as P1.
3. The method for positioning circuit quality degradation based on soft probe technology according to claim 1, wherein the content of the test reply message in S03 is:
and (3) time delay test reply message: filling a test probe number appointed in a monitoring task into an IP head to serve as an IP destination, and carrying a circuit quality feedback device number, a feedback device aggregation group number, a physical port number in the feedback device aggregation group and time stamp field information, wherein the time stamp field information comprises a time stamp of a request message of a time delay test instruction received by each physical port in the aggregation group and a time stamp of a time delay test reply message sent by each physical port in the aggregation group;
packet loss rate test reply message: the IP head is filled with the test probe number appointed in the monitoring task as the destination of the IP and carries the number of the circuit quality feedback device, the number of the feedback device aggregation group and the physical port number field information in the feedback device aggregation group.
4. The method for positioning circuit quality degradation based on soft probe technology according to claim 1, wherein the relevant information in the message in S04 is:
if the time delay test is performed, the related information includes: the method comprises the steps of time delay testing circuit quality feedback device number, feedback device aggregation group number, physical port number in the feedback device aggregation group and time stamp field information;
if the packet loss rate test is performed, the related information includes: circuit quality feedback number, feedback aggregation group number, and physical port number field information in the feedback aggregation group.
5. The method for positioning circuit quality degradation based on soft probe technology according to claim 1, wherein after extracting the relevant information in each message in S04, if the time delay test is performed, the receiving time stamp of the message returned by the time delay test is recorded, and if the time delay test is performed, the receiving number of the messages is recorded as P2.
6. The method for locating circuit quality degradation based on soft probe technology according to claim 1, wherein the monitoring task return information in S05 is:
if the time delay test is performed, the task monitoring return information comprises: monitoring task numbers, probe numbers, feedback device aggregation group numbers, physical port numbers in the feedback device aggregation group, test time stamps, test types and test sequence numbers;
if the packet loss rate test is performed, the monitoring task return information comprises: the method comprises the steps of monitoring task numbers, probe numbers, feedback device aggregation group numbers, physical port numbers in the feedback device aggregation group, test time stamps, test types and test message return numbers.
7. The method for positioning circuit quality degradation based on soft probe technology according to claim 1, wherein the calculating and analyzing in S06 the index of each physical circuit in the designated aggregation group on the circuit quality feedback device tested at this time, if the test at this time is a time delay test, the calculation rule of the time delay test is:
circuit delay calculation rule corresponding to the nth physical port in the aggregation group: delayn= "T2-N" - "T1-N" - ("T2-N" - "T1-N") where "DelayN": circuit delay indexes corresponding to the Nth physical port in the aggregation group; "T2-N": the circuit quality test probe receives a time stamp of a time delay test reply message sent by a physical port N in the appointed aggregation group of the circuit quality feedback device; "T1-N": the circuit quality test probe sends a time stamp of a physical port N in the appointed aggregation group to the circuit quality feedback device; "t2-N": the circuit quality feedback device designates a time stamp of a time delay test reply message sent by a physical port N in the aggregation group; "t1-N": the circuit quality feedback device designates the timestamp of the request message of the delay test instruction received by the physical port N in the aggregation group;
the circuit jitter index calculation rule corresponding to the nth physical port in the aggregation group is as follows: jiitten= | "DelayN-1" - "DelayN-2" |, where "Jiitten": circuit jitter index corresponding to the nth physical port in the aggregation group; "DelayN-1": aggregating circuit delay indexes corresponding to the Nth physical port in the group at a certain moment; "DelayN-2": circuit delay indexes corresponding to the N-th physical port in the same aggregation group in adjacent periods;
if the test is a packet loss rate test, the calculation rule of the circuit packet loss rate corresponding to the nth physical port in the aggregation group is as follows: lossn= ("P1-N" - "P2-N")/"P1-N", where "LossN": circuit packet loss rate corresponding to the Nth physical port in the aggregation group; "P1-N": the circuit quality test probe sends the message quantity of the physical port N in the appointed aggregation group to the circuit quality feedback device; "P2-N": the circuit quality test probe receives the quantity of packet loss rate test reply messages sent by the physical port N in the appointed aggregation group of the circuit quality feedback device.
8. An apparatus for locating quality degradation of a circuit based on a soft probe technique, the apparatus comprising:
the task creation module: the circuit quality monitoring platform is used for creating a monitoring task according to service maintenance requirements and sending the monitoring task to a designated circuit quality test probe, wherein the content of the monitoring task comprises the following components: monitoring task numbers, probe numbers, feedback device aggregation group numbers, physical port numbers in the feedback device aggregation group, test time stamps, test types and test times, wherein the test types comprise: time delay test and packet loss rate test;
the instruction sending module: the circuit quality testing probe is used for analyzing the testing information of the monitoring task after receiving the monitoring task, and sending a testing instruction to the appointed circuit quality feedback device according to the testing type;
message reply module: the circuit quality feedback device is used for analyzing the test instruction after receiving the test instruction, acquiring aggregation group information participating in the test and physical port information appointed in the aggregation group, and controlling the physical port to send a test reply message to the test probe;
and the information extraction module is used for: the circuit quality testing probe is used for extracting relevant information in each message after receiving test reply messages sent by each physical port in the appointed aggregation group of the circuit quality feedback device;
the task return module: after receiving the test reply message sent by the circuit quality feedback device, the circuit quality test probe enters a monitoring task queue buffer according to the task number of the monitoring task, and sends monitoring task return information to the circuit quality monitoring platform according to the task number;
and a result preservation module: after receiving the monitoring task information returned by the test probe, the circuit quality monitoring platform calculates and analyzes the index of each physical circuit in the appointed aggregation group on the circuit quality feedback device of the current test, stores the test result in a warehouse, and presents the test result through a graphical interface.
9. An electronic device comprising a memory and a processor, the memory having stored thereon a computer program, characterized in that the processor, when executing the program, implements the method of any of claims 1-7.
10. A computer readable storage medium, on which a computer program is stored, characterized in that the program, when being executed by a processor, implements the method according to any one of claims 1-7.
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| CN202311532801.8A CN117768359A (en) | 2023-11-17 | 2023-11-17 | Method, device and equipment for positioning quality degradation of circuit based on soft probe technology |
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| CN202311532801.8A CN117768359A (en) | 2023-11-17 | 2023-11-17 | Method, device and equipment for positioning quality degradation of circuit based on soft probe technology |
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