CN117766658A - Symmetrical LED chip and preparation method thereof - Google Patents
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- CN117766658A CN117766658A CN202311837252.5A CN202311837252A CN117766658A CN 117766658 A CN117766658 A CN 117766658A CN 202311837252 A CN202311837252 A CN 202311837252A CN 117766658 A CN117766658 A CN 117766658A
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- 238000002360 preparation method Methods 0.000 title claims abstract description 15
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Abstract
The invention discloses a symmetrical LED chip and a preparation method thereof, and relates to the technical field of LED chips. A symmetrical LED chip comprises an inner core, an insulating layer, an N electrode and a P electrode; the P electrode penetrates through a through hole formed in the middle of the inner core; the N electrodes are positioned on two sides of the extension of the inner core and are symmetrically arranged; an insulating layer is further arranged between the inner core and the N electrode and between the inner core and the P electrode. According to the symmetrical LED chip, the LED chip structure is optimized, so that the LED chip structure is symmetrical, the N electrode and the P electrode can be in eutectic contact under the condition of positive or reverse placement, the directivity requirement is avoided, the preparation process is more efficient and convenient, and the application range is wider.
Description
Technical Field
The invention relates to the technical field of LED chips, in particular to a symmetrical LED chip and a preparation method thereof.
Background
The Micro LED display technology is a display technology in which self-luminous Micro LEDs are used as light-emitting pixel units, and the light-emitting pixel units are assembled on a driving panel to form a high-density LED array. Due to the characteristics of small size, high integration level, self-luminescence and the like of the micro LED chip, the micro LED chip has larger advantages in the aspects of brightness, resolution, contrast ratio, energy consumption, service life, response speed, thermal stability and the like compared with the LCD and the OLED in the aspect of display.
Micro-LED Display integrates Micro-LEDs into each pixel-addressable LED Display drive circuit to form an LED array for LED Micro-Display. In micro LED transfer, there is a way to self-assemble the fluid, placing the back plate and the LEDs in the fluid, and allowing the LEDs to fall into designed holes in the back plate by flow or oscillation, etc. After filling corresponding LEDs in each hole for a plurality of times, die bonding is performed.
At present, the structure of the LED is directional, so if the directions of the LEDs entering the holes are not opposite, the LEDs cannot be electrically connected, and the LEDs need to be screened out in the incorrect directions and then put into the holes again; specifically, such as a front-mounted LED structure and a flip-chip LED structure.
Therefore, the current LED chip structure has directivity in the laser transfer process, needs to increase inspection steps, and has low manufacturing efficiency and narrow application range.
Disclosure of Invention
The invention aims to solve the technical problems that the existing LED chip structure has directivity in the laser transfer process, the inspection step is required to be added, the manufacturing efficiency is low, and the application range is narrow.
In order to solve the technical problems, the aim of the invention is realized by the following technical scheme: the LED chip is symmetrical, the structure of the LED chip is optimized, the LED chip is symmetrical, the N electrode and the P electrode can be in eutectic contact no matter in the positive or reverse placement condition, the directivity requirement is avoided, the preparation process is more efficient and convenient, and the application range is widened.
Specifically, the invention discloses a symmetrical LED chip, which comprises an inner core, an insulating layer, an N electrode and a P electrode; the P electrode penetrates through a through hole formed in the middle of the inner core; the N electrodes are positioned on two sides of the extension of the inner core and are symmetrically arranged; an insulating layer is further arranged between the inner core and the N electrode and between the inner core and the P electrode.
Preferably, the symmetrical LED chips are in an axisymmetric structure, and the middle through hole is taken as an axis.
Preferably, the N electrode is selected from at least one of Ni, au, cr, pd, al, ti.
Preferably, the P electrode is selected from at least one of Ni, au, cr, pd, al, ti.
Preferably, the insulating layer is at least one selected from SiNx and SiO2.
Preferably, the thickness of the N electrode is equal to the thickness of the P electrode.
Preferably, the inner core comprises a transparent conductive layer, a P-type gallium nitride layer, a multiple quantum well structure layer and an N-type gallium nitride layer; the multiple quantum well structure layer is positioned between the N-type gallium nitride layer and the P-type gallium nitride layer; the P-type gallium nitride layer is positioned between the transparent conductive layer and the multiple quantum well structure layer.
The invention also discloses a preparation method of the symmetrical LED chip, which comprises the following steps:
s1, raw material preparation: preparing a core comprising a substrate;
s2, punching a through hole: punching a through hole in the middle of the inner core;
s3, primary treatment of an insulating layer: adding a first insulating section at the epitaxy of the inner core and the through hole;
s4, electrode primary treatment: a first electrode section is added to the epitaxy of the inner core, and a second electrode section is added at the position of the through hole;
s5, substrate processing: adding an auxiliary substrate at one end of the inner core far away from the substrate, and stripping the original substrate of the inner core;
s6, secondary treatment of the insulating layer: adding a second insulation section at the end of the inner core without the substrate;
s7, secondary treatment of the electrode: adding a third electrode section and a fourth electrode section on the second insulating section to prepare symmetrical LED chips;
the insulating layer consists of a first insulating section and a second insulating section;
the P electrode consists of a second electrode section and a fourth electrode section which are positioned at the through hole;
the N electrode consists of a first electrode section and a third electrode section which are positioned at two sides of the inner core.
Preferably, after the step S7, the auxiliary substrate needs to be peeled off.
Preferably, a step S21 is formed between the step S1 and the step S2; and step S21 is to etch the surface of the P-type gallium nitride layer until the N-type gallium nitride layer is exposed.
The beneficial effects are that:
according to the symmetrical LED chip, the LED chip structure is optimized, so that the structure is symmetrical, the N electrode and the P electrode can be in eutectic contact under the condition of square or inverted placement, the directivity requirement is avoided, the preparation process is more efficient and convenient, and the symmetrical structure can be suitable for different application scenes, so that the application range is widened; and the prepared symmetrical LED chip has good electrical property and heat dissipation performance.
Meanwhile, the preparation method of the symmetrical LED chip is simple and easy to operate, and can be used for mass production.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic diagram of a symmetrical LED chip according to embodiment 1 of the present invention;
fig. 2 is a schematic diagram of a method for manufacturing a symmetrical LED chip according to embodiment 1 of the present invention;
fig. 3 is a schematic view of an LED chip of the front-loading structure of comparative example 1.
The attached drawings are identified:
1-an inner core; a 101-N type gallium nitride layer; 102-a multiple quantum well structure layer; a 103-P-type gallium nitride layer; 104-a transparent conductive layer; 2-a substrate; 21-an auxiliary substrate; 3-an insulating layer; 301-a first insulating segment; 302-a second insulation segment; a 4-N electrode; 401-a first electrode segment; 402-a third electrode segment; a 5-P electrode; 500-through holes; 501-a second electrode segment; 502-fourth electrode segment.
Detailed Description
The technical solutions of the present invention will be clearly and completely described in conjunction with the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
It should be understood that the terms "comprises" and "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It is also to be understood that the terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in this specification and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It should be further understood that the term "and/or" as used in the present specification and the appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes such combinations.
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention. The components of the embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the invention, as presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
A symmetrical LED chip comprises an inner core, an insulating layer, an N electrode and a P electrode.
The P electrode penetrates through a through hole formed in the middle of the inner core; the N electrodes are positioned on two sides of the extension of the inner core and symmetrically arranged. I.e. the distances from the N electrode to the P electrode on the two sides of the extension of the inner core are equal.
An insulating layer is arranged between the inner core and the N electrode and between the inner core and the P electrode; the insulating layer does not affect the interconnection between the inner core and the N electrode and between the inner core and the P electrode.
The symmetrical LED chips are of axisymmetric structures, and specifically, the middle through holes are taken as axes.
As shown in fig. 1, a through hole 500 is provided in the middle of the inner core 1, an insulating layer 3 is epitaxially provided on the inner core 1, and an N electrode 4 and a P electrode 5 are epitaxially provided on the insulating layer 3.
The N electrodes 4 are located at two sides of the extension of the inner core 1, and are symmetrically arranged, specifically, are located at two sides of the through hole 500 of the inner core 1; and the P electrode 5 penetrates through the through hole 500 provided in the middle of the core 1. An insulating layer 3 is also arranged between the inner core 1 and the N electrode 4 and between the inner core 1 and the P electrode 5; the insulating layer 3 does not affect the interconnection between the core 1 and the N electrode 4, and between the core 1 and the P electrode 5. Specifically, the inner core 1 may include a transparent conductive layer 104, a P-type gallium nitride layer 103, a multiple quantum well structure layer 102, and an N-type gallium nitride layer 101; the multiple quantum well structure layer 102 is located between the N-type gallium nitride layer 101 and the P-type gallium nitride layer 103, and the P-type gallium nitride layer 103 is located between the transparent conductive layer 104 and the multiple quantum well structure 102 layer.
The N electrode is preferably at least one selected from Ni, au, cr, pd, al, ti, preferably a Ni/Au mixed metal layer, a Cr/Pd/Au mixed metal layer, an Al/Ni/Au mixed metal layer, or a Ti/Al/Ti/Au mixed metal layer. The thickness of the Ni/Au mixed metal layer is usually 100nm/500nm, the thickness of the Cr/Pd/Au mixed metal layer is usually 20nm/50nm/500nm, the thickness of the Al/Ni/Au mixed metal layer is usually 500nm/100nm/500nm, and the thickness of the Ti/Al/Ti/Au mixed metal layer is usually 20nm/200nm/20nm/200nm.
The P electrode is preferably at least one selected from Ni, au, cr, pd, al, ti, preferably a Ni/Au mixed metal layer, a Cr/Pd/Au mixed metal layer, an Al/Ni/Au mixed metal layer, or a Ti/Al/Ti/Au mixed metal layer. The thickness of the Ni/Au mixed metal layer is usually 100nm/500nm, the thickness of the Cr/Pd/Au mixed metal layer is usually 20nm/50nm/500nm, the thickness of the Al/Ni/Au mixed metal layer is usually 500nm/100nm/500nm, and the thickness of the Ti/Al/Ti/Au mixed metal layer is usually 20nm/200nm/20nm/200nm.
The N electrode and the P electrode can be made of different materials, and preferably, the thickness of the N electrode is equal to that of the P electrode.
The insulating layer is made of common insulating material, specifically SiNx, siO 2 At least one of which has a thickness of 50-500nm.
The inner core of the LED is of a common LED layer structure and can comprise a transparent conductive layer, a P-type gallium nitride layer, a multiple quantum well structure layer and an N-type gallium nitride layer; the multi-quantum well structure layer is positioned between the N-type gallium nitride layer and the P-type gallium nitride layer, and the P-type gallium nitride layer is positioned between the transparent conductive layer and the multi-quantum well structure layer.
Wherein the thickness of the N-type gallium nitride layer (N-GaN) is preferably 2-8 μm; the multi-quantum well structure layer (MQWs) is preferably 3-10 pairs of InGaN/GaN periodic structures, and the total thickness is 30-150nm; the thickness of the P-type gallium nitride layer (P-GaN) is preferably 100nm to 200nm, and the thickness of the transparent conductive layer (ITO) is preferably 50 to 150nm.
The LED core may be a conventional commercial product such as a 4 inch/6 inch/8 inch sapphire GaN-based Lan Luguang wafer, a 4 inch/6 inch/8 inch Si substrate GaN-based Lan Luguang wafer, a 4 inch/6 inch/8 inch GaAs substrate AlInGaP red light wafer, etc. from a die mill.
The preparation method of the symmetrical LED chip, as shown in FIG. 2, comprises the following steps:
s1, raw material preparation: preparing a core 1 containing a substrate 2;
s2, punching a through hole: a through hole 500 is drilled in the middle of the inner core 1;
s3, primary treatment of an insulating layer: adding a first insulating section 301 at the core 1 extension and via 500;
s4, electrode primary treatment: a first electrode segment 401 is added to the inner core 1 in an epitaxial manner, and a second electrode segment 501 is added at the through hole 500;
s5, substrate processing: an auxiliary substrate 21 is added at one end of the inner core 1 far away from the substrate 2, and the original substrate 2 of the inner core 1 is peeled off; the auxiliary substrate 21 may be added by using a parylene CVD coating technique or a UV glue coating technique, and different coating techniques may be used for adding different auxiliary substrates 21, specifically, a quartz substrate (as auxiliary substrate 21) +uv glue, saphire (as auxiliary substrate 21) +parylene.
S6, secondary treatment of the insulating layer: adding a second insulation section 302 at the end of the inner core 1 without the substrate 2;
s7, secondary treatment of the electrode: adding a third electrode segment 402 and a fourth electrode segment 502 on the second insulating segment 302 to prepare a symmetrical LED chip;
wherein the insulating layer 3 is composed of a first insulating section 301 and a second insulating section 302; the first insulating section 301 and the second insulating section 302 may employ parylene CVD plating techniques.
The P-electrode 5 is composed of a second electrode segment 501 and a fourth electrode segment 502 at the through hole 500; the N-electrode 4 is composed of a first electrode segment 401 and a third electrode segment 402 located on both sides of the through hole 500 of the inner core 1.
The first electrode segment 401, the third electrode segment 402, the second electrode segment 501 and the fourth electrode segment 502 can be added on the inner core 1 or the insulating segment (comprising the first insulating segment 301 and the second insulating segment 302) by adopting an electron beam evaporation mode.
Preferably, after step S7, the auxiliary substrate 21 is also required to be peeled off. The substrate 2 and the auxiliary substrate 21 may be peeled off by a laser peeling technique.
Preferably, a step S11 is formed between the step S1 and the step S2; the step S11 is to etch the surface of the P-type gallium nitride layer 103 until the N-type gallium nitride layer 101 is exposed.
Specifically, the step S11 may also be disposed between the step S2 and the step S3. That is, the step S11 may be disposed between the step S1 and the step S2, or may be disposed between the step S2 and the step S3, and may be adjusted according to the actual situation.
Example 1
A symmetrical LED chip comprises an inner core, an insulating layer, an N electrode and a P electrode.
The P electrode penetrates through a through hole formed in the middle of the inner core; the N electrodes are positioned on two sides of the extension of the inner core and symmetrically arranged. I.e. the distances from the N electrode to the P electrode on the two sides of the extension of the inner core are equal.
An insulating layer is arranged between the inner core and the N electrode and between the inner core and the P electrode; the insulating layer does not affect the interconnection between the inner core and the N electrode and between the inner core and the P electrode.
The symmetrical LED chips are of axisymmetric structures, and specifically, the middle through holes are taken as axes.
The specific structure is shown in figure 1.
Wherein the N electrode is an Al/Ni/Au mixed metal layer with the thickness of 500nm/100nm/500nm.
The material of the P electrode is the same as that of the N electrode, and the P electrode is an Al/Ni/Au mixed metal layer with the thickness of 500nm/100nm/500nm.
The insulating layer may be made of a common insulating material, specifically SiNx, and has a thickness of 200nm.
The inner core of the LED is of a common LED layer structure and can comprise a transparent conductive layer, a P-type gallium nitride layer, a multiple quantum well structure layer and an N-type gallium nitride layer; the multi-quantum well structure layer is positioned between the N-type gallium nitride layer and the P-type gallium nitride layer, and the P-type gallium nitride layer is positioned between the transparent conductive layer and the multi-quantum well structure layer.
Specifically, the inner core of the LED was a conventional commercial product, a 6 inch sapphire GaN-based Lan Luguang wafer from the chip manufacturer.
The preparation method, as shown in fig. 2, comprises the following steps:
s1, raw material preparation: preparing a core comprising a substrate; the general structure is substrate/n-type layer/active layer (light emitting layer)/p-type layer/ITO transparent conductive layer
S11, manufacturing steps, namely etching the surface of the P-type gallium nitride layer until the N-type gallium nitride layer is exposed; etching is performed by ICP etching;
s2, punching a through hole: punching a through hole in the middle of the inner core; manufacturing a mask by utilizing a photoetching process, and etching by ICP etching; meanwhile, the LED chips are separated in the step;
s3, primary treatment of an insulating layer: adding a first insulating section at the epitaxy of the inner core and the through hole; deposition of SiNx or SiO2, etc. by CVD
S4, electrode primary treatment: a first electrode section is added to the epitaxy of the inner core, and a second electrode section is added at the position of the through hole; the first electrode segment and the second electrode segment may be completed at one time or separately; vapor plating metal such as electron beam vapor plating or PVD (physical vapor deposition) to obtain a pattern through a photoetching process; the metal is an electrode such as NiAu;
s5, substrate processing: adding an auxiliary substrate at one end of the inner core far away from the substrate, and stripping the original substrate of the inner core; the auxiliary substrate is added by quartz+UV glue or sapphire substrate+UV glue;
s6, secondary treatment of the insulating layer: adding a second insulation section at the end of the inner core without the substrate; a method such as a first insulating segment;
s7, secondary treatment of the electrode: adding a third electrode section and a fourth electrode section on the second insulating section to prepare symmetrical LED chips; the third electrode segment and the fourth electrode segment may be completed at one time or separately; vapor plating metal such as electron beam vapor plating or PVD (physical vapor deposition) to obtain a pattern through a photoetching process; the metal is NiAu electrode
S8, stripping the substrate: the auxiliary substrate is peeled off.
The insulation layer consists of a first insulation section and a second insulation section; the first insulating section and the second insulating section adopt a CVD coating technology to deposit SiNx or SiO2.
The P electrode consists of a second electrode section and a fourth electrode section which are positioned at the through hole; the N electrode is composed of a first electrode section and a third electrode section which are positioned at two sides of the through hole of the inner core.
The first electrode section, the third electrode section, the second electrode section and the fourth electrode section can be added on the inner core or the insulating section (comprising the first insulating section and the second insulating section) in an electron beam evaporation mode.
Example 2
A symmetrical LED chip comprises an inner core, an insulating layer, an N electrode and a P electrode.
The P electrode penetrates through a through hole formed in the middle of the inner core; the N electrodes are positioned on two sides of the extension of the inner core and symmetrically arranged. I.e. the distances from the N electrode to the P electrode on the two sides of the extension of the inner core are equal.
An insulating layer is arranged between the inner core and the N electrode and between the inner core and the P electrode; the insulating layer does not affect the interconnection between the inner core and the N electrode and between the inner core and the P electrode.
The symmetrical LED chips are of axisymmetric structures, and specifically, the middle through holes are taken as axes.
The specific structure is shown in figure 1.
Wherein the N electrode is a Cr/Pd/Au mixed metal layer with the thickness of 20nm/50nm/400nm.
The material of the P electrode is different from that of the N electrode, and the P electrode is a Ti/Al/Ti/Au mixed metal layer with the thickness of 20nm/200nm/20nm/200nm.
The insulating layer may be selected from conventional insulating materials, in particular SiO 2 The thickness was 500nm.
The inner core of the LED is of a common LED layer structure and can comprise a transparent conductive layer, a P-type gallium nitride layer, a multiple quantum well structure layer and an N-type gallium nitride layer; the multi-quantum well structure layer is positioned between the N-type gallium nitride layer and the P-type gallium nitride layer, and the P-type gallium nitride layer is positioned between the transparent conductive layer and the multi-quantum well structure layer.
Specifically, the inner core of the LED is a conventional commercial product, namely a 6-inch Si substrate GaN-based Lan Luguang wafer of a chip manufacturer.
Comparative example 1
As shown in fig. 3, the LED chip with the conventional forward structure includes an inner core, an insulating layer, an N electrode, and a P electrode.
A P electrode is arranged on the left side above the LED inner core, and an N electrode is arranged on the right side; and the rest parts of the inner core epitaxy are provided with insulating layers except the lower part and the connecting parts of the P electrode and the N electrode.
Specifically, the same core, insulating layer, N electrode and P electrode as in example 1 were used.
The structure of the LED chip with the normal structure of the comparative example 1 is simpler, and the manufacturing process is relatively mature. The P, N electrode of the forward LED structure is arranged on the same side of the LED, and current needs to transversely flow through the n-GaN layer, so that current is crowded, a large amount of heat is locally generated, and driving current is limited; and the factors such as temperature and humidity can lead to electrode metal migration, and as the chip size is reduced, the distance between the positive electrode and the negative electrode is reduced, so that the problem of short circuit can occur.
Meanwhile, the LED chip of the front-mounted structure of comparative example 1 has directivity as compared with that of example 1, and cannot be applied to a specific occasion. For example, in micro led fluid mass transfer, bonding cannot be performed without alignment, and for example, in micro led laser mass transfer, because of alignment problem, the chip needs to be flipped again, so that the process steps are increased.
While the invention has been described with reference to certain preferred embodiments, it will be understood by those skilled in the art that various changes and substitutions of equivalents may be made and equivalents will be apparent to those skilled in the art without departing from the scope of the invention. Therefore, the protection scope of the invention is subject to the protection scope of the claims.
Claims (10)
1. The symmetrical LED chip is characterized by comprising an inner core, an insulating layer, an N electrode and a P electrode; the P electrode penetrates through a through hole formed in the middle of the inner core; the N electrodes are positioned on two sides of the extension of the inner core and are symmetrically arranged; an insulating layer is further arranged between the inner core and the N electrode and between the inner core and the P electrode.
2. The symmetrical LED chip of claim 1, wherein said symmetrical LED chip is axisymmetric with the middle through hole as the axis.
3. The symmetrical LED chip of claim 2, wherein said N-electrode is selected from at least one of Ni, au, cr, pd, al, ti.
4. The symmetrical LED chip of claim 3, wherein said P-electrode is selected from at least one of Ni, au, cr, pd, al, ti.
5. The symmetrical LED chip of claim 4, wherein said insulating layer is selected from SiNx, siO 2 At least one of them.
6. The symmetrical LED chip of claim 5, wherein the thickness of the N electrode and the thickness of the P electrode are equal.
7. The symmetrical LED chip of claim 6, wherein said inner core comprises a transparent conductive layer, a P-type gallium nitride layer, a multiple quantum well structure layer, an N-type gallium nitride layer; the multiple quantum well structure layer is positioned between the N-type gallium nitride layer and the P-type gallium nitride layer; the P-type gallium nitride layer is positioned between the transparent conductive layer and the multiple quantum well structure layer.
8. The method of manufacturing a symmetrical LED chip as claimed in any one of claims 1-7, comprising the steps of:
s1, raw material preparation: preparing a core comprising a substrate;
s2, punching a through hole: punching a through hole in the middle of the inner core;
s3, primary treatment of an insulating layer: adding a first insulating section at the epitaxy of the inner core and the through hole;
s4, electrode primary treatment: a first electrode section is added to the epitaxy of the inner core, and a second electrode section is added at the position of the through hole;
s5, substrate processing: adding an auxiliary substrate at one end of the inner core far away from the substrate, and stripping the original substrate of the inner core;
s6, secondary treatment of the insulating layer: adding a second insulation section at the end of the inner core without the substrate;
s7, secondary treatment of the electrode: adding a third electrode section and a fourth electrode section on the second insulating section to prepare symmetrical LED chips;
the insulating layer consists of a first insulating section and a second insulating section;
the P electrode consists of a second electrode section and a fourth electrode section which are positioned at the through hole;
the N electrode consists of a first electrode section and a third electrode section which are positioned at two sides of the inner core.
9. The method of manufacturing a symmetrical LED chip as recited in claim 8, wherein after said step S7, the auxiliary substrate is further peeled off.
10. The method for manufacturing the symmetrical LED chip as recited in claim 8, wherein a step of step S11 is further included between the step S1 and the step S2; and step S11 is to etch the surface of the P-type gallium nitride layer until the N-type gallium nitride layer is exposed.
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