CN117750659A - Processing method of circuit board with fully-coated bonding pad side wall - Google Patents
Processing method of circuit board with fully-coated bonding pad side wall Download PDFInfo
- Publication number
- CN117750659A CN117750659A CN202311688598.3A CN202311688598A CN117750659A CN 117750659 A CN117750659 A CN 117750659A CN 202311688598 A CN202311688598 A CN 202311688598A CN 117750659 A CN117750659 A CN 117750659A
- Authority
- CN
- China
- Prior art keywords
- gold
- bonding pad
- plated
- copper
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000003672 processing method Methods 0.000 title claims abstract description 24
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 52
- 229910052802 copper Inorganic materials 0.000 claims abstract description 52
- 239000010949 copper Substances 0.000 claims abstract description 52
- 239000000758 substrate Substances 0.000 claims abstract description 46
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims abstract description 29
- 239000010931 gold Substances 0.000 claims abstract description 29
- 229910052737 gold Inorganic materials 0.000 claims abstract description 29
- 238000007747 plating Methods 0.000 claims abstract description 28
- 238000005553 drilling Methods 0.000 claims abstract description 6
- 238000005530 etching Methods 0.000 claims abstract description 5
- 238000000034 method Methods 0.000 claims description 29
- 239000011347 resin Substances 0.000 claims description 13
- 229920005989 resin Polymers 0.000 claims description 13
- 238000009713 electroplating Methods 0.000 claims description 12
- 238000011049 filling Methods 0.000 claims description 7
- 238000000227 grinding Methods 0.000 claims description 2
- 238000005253 cladding Methods 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 8
- 239000002184 metal Substances 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 238000001465 metallisation Methods 0.000 description 2
- 230000007704 transition Effects 0.000 description 2
- 238000003466 welding Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000003486 chemical etching Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000003801 milling Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
The invention belongs to the technical field of PCB (printed circuit board), and discloses a processing method of a circuit board with fully-coated bonding pad side walls. The processing method comprises the following steps: s1, etching a gold-plated pad area on the top layer of a substrate, drilling blind holes in positions of the bottom layer of the substrate corresponding to the gold-plated pad area, and exposing bottom copper of the gold-plated pad area at the bottoms of the blind holes; s2, metallizing the blind holes; s3, pasting a dry film on the bottom layer and the top layer of the substrate, and windowing at the position of the gold-plated bonding pad area; s4, carrying out gold plating treatment on the gold-plated pad area; s5, removing the dry film, and removing hole copper of the blind hole to obtain the circuit board with the fully-coated gold side wall of the bonding pad. According to the processing method provided by the invention, the gold-plated bonding pad and the back surface copper are conducted through the transitional blind hole, and then the gold-plated layer is electroplated, so that the design of full gold cladding of the side wall of the gold-plated bonding pad can be realized, copper exposure is avoided, and no technological wire residue exists at the connection position of the side wall of the bonding pad and the wire.
Description
Technical Field
The invention belongs to the technical field of PCB boards, and particularly relates to a processing method of a circuit board with fully-coated bonding pad side walls.
Background
The bonding pad plays a vital role in component installation, can ensure reliable connection between components and the PCB, and can provide better mechanical strength and thermal stability.
At present, many gold-plated circuit boards require a gold-plated layer to wrap the side wall of a bonding pad, so that only when patterns are etched, a process wire is designed to connect the gold-plated bonding pad with a frame copper sheet to form a conductive network, and the process wire is treated after the bonding pad is gold-plated. The specific process is as follows: etching a gold-plated bonding pad on the substrate, designing a gold-plated wire, and connecting the frame with the bonding pad; then the whole board is stuck with a dry film, and the position of the gold-plated bonding pad is made into a windowing effect, and the dry film windowing is required to be larger than the gold-plated bonding pad, so that the gold-plated bonding pad is not covered by the anti-gold-plated dry film due to alignment deviation, and the partial exposure of a lead connected with the gold-plated bonding pad is also caused; after windowing, carrying out gold plating treatment on the welding disc (the gold plating welding disc is conducted through frame surface copper and a process wire); finally, the gold-plating-resistant dry film is removed, and the process wire is processed. The circuit board prepared by the process usually adopts a chemical etching mode to remove the process wires when the number of the process wires is large, and adopts a manual mode to remove the process wires by a nicking tool or adopts a drilling and milling machine to mechanically remove the process wires when the number of the process wires is small and the process wires are long. In any mode, the bonding pad and the wire connecting position have the residual technological wires, and the copper exposure phenomenon can occur at the wire port, so that the full cladding of the side wall in the true sense can not be realized.
Therefore, it is needed to provide a processing method of a circuit board, which can realize full encapsulation of the side wall of the bonding pad, no copper leakage, and no residue of the process wire at the connection position of the bonding pad and the wire.
Disclosure of Invention
In order to overcome the defects of the prior art, the invention aims to provide a processing method of a circuit board with fully-coated bonding pad side walls. The circuit board manufactured by the processing method provided by the invention can realize full gold coating of the side wall of the bonding pad without copper leakage, and no residue of a process wire exists at the connection position of the bonding pad and the wire.
The invention provides a processing method of a circuit board with fully-covered bonding pad side walls.
Specifically, the processing method of the circuit board with the fully-coated bonding pad side wall comprises the following steps:
s1, etching a gold-plated bonding pad area on the top layer of a substrate, drilling blind holes in positions of the bottom layer of the substrate corresponding to the gold-plated bonding pad area, and exposing bottom copper of the gold-plated bonding pad area at the bottom of the blind holes;
s2, metallizing the blind holes;
s3, pasting a dry film on the bottom layer of the substrate and the top layer of the substrate, and windowing the positions of the gold-plated bonding pad areas;
s4, carrying out gold plating treatment on the gold-plated bonding pad area;
s5, removing the dry film, removing hole copper of the blind hole, and obtaining the circuit board with the fully-coated gold side wall of the bonding pad.
Preferably, in step S2, the blind holes are metallized by electroplating. The surface copper of the bottom layer of the substrate is connected with the gold-plated bonding pad area through the metallized blind holes, and metallization conduction is realized.
Preferably, in step S3, the dry film is a gold plating resistant dry film.
Preferably, in step S3, the position of the opening further includes a position of an electroplating nip at the border of the bottom layer of the substrate.
Preferably, in step S4, the gold plating process is as follows: and carrying out gold plating treatment by electroplating clamping points at the bottom frame of the substrate, bottom surface copper and conducting the metallized blind holes.
Preferably, in step S5, the hole copper of the blind hole is removed by means of a depth-controlled drill.
Preferably, in step S5, the step of removing the hole copper of the blind hole further includes the following steps: and filling resin in the blind holes, and then paving copper and plating copper at the positions of the substrate bottom layer corresponding to the gold-plated bonding pad areas.
Preferably, in step S5, after the step of filling the resin, a process of flattening the resin of the blind hole orifice is further included.
Compared with the prior art, the invention has the beneficial effects that:
according to the processing method of the circuit board with the fully-coated gold side wall of the bonding pad, the gold-plated bonding pad is conducted with the back surface copper through the transition blind hole, and then the gold-plated layer is electroplated, so that the fully-coated gold design of the side wall of the gold-plated bonding pad can be realized, no copper is exposed, and no technological wire remains at the connection position of the side wall of the bonding pad and the wire. The circuit board manufactured by the processing method provided by the invention has the advantages of high dimensional accuracy of the bonding pad and stable and reliable circuit board.
The invention is described in further detail below with reference to the drawings and the detailed description.
Drawings
FIG. 1 is a process flow diagram of a circuit board with fully-encapsulated side walls of bonding pads according to an embodiment of the invention;
FIG. 2 is a schematic view of a substrate in a processing method according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of step S1 in the processing method according to the embodiment of the present invention;
FIG. 4 is a schematic diagram of step S2 in the processing method according to the embodiment of the present invention;
FIG. 5 is a schematic diagram of step S3 in the processing method according to the embodiment of the present invention;
FIG. 6 is a schematic diagram of step S4 in the processing method according to the embodiment of the present invention;
FIG. 7 is a schematic diagram of the processing method according to the embodiment of the present invention after removing hole copper in step S5;
FIG. 8 is a schematic view of the processing method according to the embodiment of the present invention after step S5 of resin filling and copper plating;
FIG. 9 is a schematic diagram of a fully encapsulated circuit board with solder pad sidewalls processed in accordance with an embodiment of the present invention;
FIG. 10 is a schematic diagram of a fully encapsulated circuit board with pad sidewalls prepared using process wire gold-plated pads;
reference numerals illustrate:
the substrate comprises the following components of, by weight, a substrate 100, a substrate top layer 110, a substrate bottom layer 120, a gold-plated pad area 130, a blind hole 200, a metal layer 210, an electroplating clamping point 211, a dry film 300, a gold layer 131, a resin 400 and a copper layer 410.
Detailed Description
In order to make the technical solutions of the present invention more apparent to those skilled in the art, the following examples will be presented. It should be noted that the following examples do not limit the scope of the invention.
Referring to fig. 1, an embodiment of the invention provides a method for processing a circuit board with fully-covered pad side walls, which comprises the following steps:
s1, etching a gold-plated pad area 130 on a substrate top layer 110, drilling a blind hole 200 at a position of a substrate bottom layer 120 corresponding to the gold-plated pad area 130, and exposing bottom copper of the gold-plated pad area 130 at the bottom of the blind hole 200;
s2, metallizing the blind holes 200;
s3, pasting a dry film 300 on the substrate bottom layer 120 and the substrate top layer 110, and windowing at the position of the gold-plated bonding pad region 130;
s4, performing gold plating treatment on the gold-plated pad area 130;
s5, removing the dry film 300, and removing hole copper of the blind hole 200 to obtain the circuit board with the fully-coated gold side wall of the bonding pad.
Further, in step S2, the blind holes 200 are metallized by electroplating. The metallized blind via 200 connects the surface copper of the substrate base layer 120 with the gold-plated pad region 130 and provides metallized conduction.
Further, in step S3, the dry film 300 is a gold plating resistant dry film.
Further, in step S3, the position of the opening further includes the position of the electroplating nip 211 at the border of the substrate bottom layer 120.
Further, in step S4, the gold plating process is as follows: the gold plating treatment is performed through the electroplating clamping points 211 at the frame of the substrate bottom layer 120, the bottom layer surface copper and the conduction of the metallized blind holes 200.
Further, in step S5, the hole copper of the blind hole 200 is removed by means of a controlled depth drill.
Further, in step S5, the method further includes the following steps after removing the copper in the blind hole 200: the blind holes 200 are filled with resin 400, and then copper and copper plating are performed on the substrate bottom layer 120 at positions corresponding to the gold-plated pad regions 130.
Further, in step S5, after the step of filling the resin 400, a process of flattening the resin of the orifice of the blind hole 200 is further included.
Referring to fig. 2-8, an embodiment of the present invention provides a more specific processing method, which specifically includes the following steps:
s1, referring to fig. 2 and 3, a substrate 100 on which gold-plated pads are to be formed is provided after the steps such as inner layer wiring production are completed. One side of the substrate 100 where the gold-plated pads are to be fabricated is defined as a substrate top layer 110 and the opposite side is defined as a substrate bottom layer 120. The gold-plated pad region 130 is etched on the substrate top layer 110, a blind hole 200 is drilled at a position of the substrate bottom layer 120 corresponding to the gold-plated pad region 130, and the bottom copper of the gold-plated pad region 130 is exposed out of the bottom of the blind hole 200, so that the copper on the surface of the subsequent substrate bottom layer 120 can be conducted with the gold-plated pad region 130, and preparation is made for gold plating treatment.
S2, referring to FIG. 4, the blind holes 200 are metallized by electroplating, and a metal layer 210 is formed on the walls of the blind holes 200 and the substrate bottom layer 120, wherein the metal layer 210 is preferably a copper layer. The metallized blind via 200 connects the surface copper of the substrate base layer 120 with the gold-plated pad region 130 to achieve metallization conduction.
S3, referring to FIG. 5, pasting a dry film 300 on the substrate bottom layer 120 and the substrate top layer 110, and windowing at the position of the gold-plated bonding pad region 130 and the position of the electroplating clamping point 211 at the frame of the substrate bottom layer 120; the dry film 300 is selected to resist gold plating, and protects the copper side of the circuit board and other areas where gold plating is not required during gold plating.
S4, referring to FIG. 6, through the conduction of the electroplating clamping points 211, the bottom layer surface copper and the metallized blind holes 200 at the frame of the substrate bottom layer 120, the gold-plating pad area 130 is subjected to gold-plating treatment, and a gold layer 131 is formed on the top surface and the side wall of the gold-plating pad;
s5, referring to FIG. 7 and FIG. 8, the dry film is removed, and the hole copper of the blind hole 200 is removed by means of depth control drilling, more specifically, the hole copper can be the copper on the hole wall of the blind hole 200, if the influence of partial copper remained at the hole bottom of the blind hole 200 on the circuit board is small, the complete removal is not required. Then filling resin 400 in the blind holes 200 from which the hole copper is removed, and grinding the resin 400 at the orifice of the blind holes 200 after cooling; and then copper is spread and plated on the position of the substrate bottom layer 120 corresponding to the gold-plated pad region 130 to form a copper layer 410, so as to obtain the circuit board with the fully-coated pad side wall.
According to the processing method of the circuit board with the fully-coated side wall of the bonding pad, provided by the embodiment of the invention, the gold-plated bonding pad is conducted with the back surface copper through the transition blind hole, and then the gold-plated layer is electroplated, so that the fully-coated design of the side wall of the gold-plated bonding pad is realized. As shown in FIG. 9, the fully-coated circuit board of the pad side wall manufactured by the embodiment of the invention has no copper exposing phenomenon on the pad, no residual technical wires at the connection position of the pad side wall and the wires, and higher size precision of the pad compared with the fully-coated circuit board of the pad side wall (shown in FIG. 10) manufactured by adopting the technical wires to gold-coat the pad.
It should be noted that in the description of the present invention, if an azimuth or positional relationship is indicated in relation to an azimuth description, for example, up, down, front, rear, left, right, etc., the azimuth or positional relationship is based on that shown in the drawings, only for convenience of describing the present invention and simplifying the description, and does not indicate or imply that the apparatus or element to be referred to must have a specific azimuth, be configured or operated in a specific azimuth, and should not be construed as limiting the present invention.
In the description of the present invention, the meaning of a plurality is one or more, the meaning of a plurality is two or more, and greater than, less than, exceeding, etc. are understood to exclude the present number, and above, below, within, etc. are understood to include the present number. If any, first or second, etc. are described for the purpose of distinguishing between technical features only and not for the purpose of indicating or implying a relative importance or implicitly indicating the number of technical features indicated or implicitly indicating the precedence of the technical features indicated.
In the description of the invention, unless explicitly defined otherwise, terms such as arrangement, mounting, connection, etc. should be construed broadly and the specific meaning of the terms in the invention can be reasonably determined by a person skilled in the art in combination with the specific content of the technical solution.
The foregoing examples illustrate only a few embodiments of the invention and are described in detail herein without thereby limiting the scope of the invention. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the invention, which are all within the scope of the invention. Accordingly, the scope of protection of the present invention is to be determined by the appended claims.
Claims (8)
1. The processing method of the circuit board with the fully-coated side wall of the bonding pad is characterized by comprising the following steps of:
s1, etching a gold-plated bonding pad area on the top layer of a substrate, drilling blind holes in positions of the bottom layer of the substrate corresponding to the gold-plated bonding pad area, and exposing bottom copper of the gold-plated bonding pad area at the bottom of the blind holes;
s2, metallizing the blind holes;
s3, pasting a dry film on the bottom layer of the substrate and the top layer of the substrate, and windowing the positions of the gold-plated bonding pad areas;
s4, carrying out gold plating treatment on the gold-plated bonding pad area;
s5, removing the dry film, removing hole copper of the blind hole, and obtaining the circuit board with the fully-coated gold side wall of the bonding pad.
2. The method according to claim 1, characterized in that in step S2 the blind holes are metallized by electroplating.
3. The processing method according to claim 1 or 2, wherein in step S3, the dry film is a gold plating resistant dry film.
4. The method of claim 3, wherein in step S3, the open window position further includes a position of a plating nip at the bottom border of the substrate.
5. The method according to claim 1, wherein in step S4, the gold plating process is performed by: and carrying out gold plating treatment by electroplating clamping points at the bottom frame of the substrate, bottom surface copper and conducting the metallized blind holes.
6. The method according to claim 1, characterized in that in step S5, the copper of the blind hole is removed by means of a controlled depth drill.
7. The method according to claim 5, wherein in step S5, the step of removing the copper in the blind hole further comprises the steps of: and filling resin in the blind holes, and then paving copper and plating copper at the positions of the substrate bottom layer corresponding to the gold-plated bonding pad areas.
8. The method of claim 7, further comprising the step of grinding the resin of the blind hole openings after the step of filling the resin in step S5.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202311688598.3A CN117750659A (en) | 2023-12-08 | 2023-12-08 | Processing method of circuit board with fully-coated bonding pad side wall |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202311688598.3A CN117750659A (en) | 2023-12-08 | 2023-12-08 | Processing method of circuit board with fully-coated bonding pad side wall |
Publications (1)
Publication Number | Publication Date |
---|---|
CN117750659A true CN117750659A (en) | 2024-03-22 |
Family
ID=90251925
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202311688598.3A Pending CN117750659A (en) | 2023-12-08 | 2023-12-08 | Processing method of circuit board with fully-coated bonding pad side wall |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN117750659A (en) |
-
2023
- 2023-12-08 CN CN202311688598.3A patent/CN117750659A/en active Pending
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR100733253B1 (en) | High density printed circuit board and manufacturing method thereof | |
CN1873935B (en) | Method of fabricating wiring board and method of fabricating semiconductor device | |
EP1848257A1 (en) | Multilayer printed wiring board | |
US20060180346A1 (en) | High aspect ratio plated through holes in a printed circuit board | |
US8383950B1 (en) | Metal etch stop fabrication method and structure | |
CN102165582B (en) | Leadframe substrate, method for manufacturing same, and semiconductor device | |
KR20090104142A (en) | Multilayer printed wiring board | |
KR20060106766A (en) | Method of production of circuit board utilizing electroplating | |
KR100463442B1 (en) | Ball grid array substrate and method for preparing the same | |
JP2000294677A (en) | High-density thin film wiring board and its manufacture | |
CN110944454A (en) | Circuit board production process | |
CN117750659A (en) | Processing method of circuit board with fully-coated bonding pad side wall | |
US20230010115A1 (en) | Cyclic cooling embedded packaging substrate and manufacturing method thereof | |
US6740222B2 (en) | Method of manufacturing a printed wiring board having a discontinuous plating layer | |
CN115103513A (en) | PCB (printed circuit board) with high-depth-aperture-ratio metal blind hole plug-in hole and manufacturing process thereof | |
CN114927493A (en) | Manufacturing method of embedded packaging substrate and embedded packaging substrate | |
US20040141299A1 (en) | Burrless castellation via process and product for plastic chip carrier | |
KR20160085120A (en) | Printed circuit board and method of manufacturing the same, and electronic component module | |
JP2925609B2 (en) | Method for manufacturing semiconductor device | |
CN114158193B (en) | Manufacturing process of PCB upper hole | |
CN213847133U (en) | Reduce multilayer circuit board structure of thickness | |
KR20030072855A (en) | The method for plating bump pads of printed circuit board for flip chip BGA semiconductor package | |
US7951697B1 (en) | Embedded die metal etch stop fabrication method and structure | |
CN117279214A (en) | Circuit board back drilling processing method | |
CN117750644A (en) | Manufacturing method of printed circuit board with fully-coated side wall of bonding pad |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination |