CN117747680A - Tunneling oxide passivation contact battery and preparation method thereof - Google Patents

Tunneling oxide passivation contact battery and preparation method thereof Download PDF

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Publication number
CN117747680A
CN117747680A CN202311842316.0A CN202311842316A CN117747680A CN 117747680 A CN117747680 A CN 117747680A CN 202311842316 A CN202311842316 A CN 202311842316A CN 117747680 A CN117747680 A CN 117747680A
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layer
tunneling oxide
phosphorus
doped polysilicon
oxide layer
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刘苗
李景
董彦萌
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Jingao Solar Co Ltd
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Ja Solar Co Ltd
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Abstract

The application provides a tunneling oxide passivation contact battery and a preparation method thereof. The tunnel oxide passivation contact cell provided by the application comprises: the tunneling passivation contact structure is arranged on the silicon substrate and comprises a tunneling oxide layer and a phosphorus doped polysilicon layer arranged on one side of the tunneling oxide layer, which is opposite to the silicon substrate; and the phosphorus silicon glass layer is arranged between the tunneling oxide layer and the phosphorus doped polysilicon layer and is used for preventing phosphorus atoms in the phosphorus doped polysilicon layer from diffusing into the tunneling oxide layer. According to the phosphorus silicon glass layer, the quality of the tunneling oxide layer is guaranteed, the phosphorus doping concentration in the phosphorus doped polysilicon layer is improved, the filling factor is improved, the conversion efficiency of the battery is improved, and the conductivity of the battery is optimized.

Description

Tunneling oxide passivation contact battery and preparation method thereof
Technical Field
The application relates to the technical field of solar cells, in particular to a tunneling oxide passivation contact cell and a preparation method thereof.
Background
The tunneling oxide layer passivation contact (TOPCO) battery technology adopts an N-type silicon wafer to carry out boron expansion and back surface alkali polishing, and then adopts a PECVD mode to deposit a tunneling oxide layer and a doped polysilicon layer on the back surface of the silicon wafer to carry out back surface passivation. Polycrystalline silicon is formed by linking small grains through grain boundaries, the grains being the inner atomic circumferences of a single crystalPeriodic arrangement, while the grain boundary atomic arrangement is disordered. When the polysilicon is doped with phosphorus, the diffusion coefficient of phosphorus at the grain boundary is far greater than that at the crystal grain, so that the phosphorus concentration in the polysilicon is difficult to be high, otherwise, the passivation performance of the tunneling oxide layer is poor due to two reasons: firstly, the tunneling oxide layer SiO is caused by the excessive doping of phosphorus x Structural changes lead to stable SiO 2 Fewer bonds; secondly, the stress difference between the doped poly-Si (polysilicon) and the substrate Si is larger to cause a tunneling oxide layer SiO x More holes are generated, and the open-circuit voltage of the battery piece can be greatly reduced, so that the conversion efficiency of the battery is affected.
However, in TOPCon cells, it is often desirable to increase the phosphorus doping concentration in the polysilicon layer, which can reduce the contact resistance between the polysilicon layer and the metal electrode layer, thereby improving the fill factor.
Therefore, there is a need for a tunneling oxide passivation contact cell that combines improved phosphorus doping concentration in the polysilicon layer with guaranteed tunneling oxide passivation performance.
Disclosure of Invention
A first aspect of the present application provides a tunneling oxide passivation contact cell, comprising:
a silicon substrate having a silicon-based layer,
the tunneling passivation contact structure is arranged on the silicon substrate and comprises a tunneling oxide layer and a phosphorus doped polysilicon layer arranged on one side of the tunneling oxide layer, which is opposite to the silicon substrate;
and the phosphorus silicon glass layer is arranged between the tunneling oxide layer and the phosphorus doped polysilicon layer and is used for preventing phosphorus atoms in the phosphorus doped polysilicon layer from diffusing into the tunneling oxide layer.
The phosphorosilicate glass layer in the first aspect of the application plays a passivation role between the tunneling oxide layer and the phosphorus doped polysilicon layer, is similar to thickening the tunneling oxide layer, and avoids the tunneling oxide layer SiO caused by larger stress difference between the doped poly-Si (polysilicon) and the substrate Si x More holes are generated; further, the phosphorus is doped in the phosphosilicate glass layer, so that the diffusion of the phosphorus doped in the phosphorus doped polysilicon layer to the tunneling oxide layer is prevented, the passivation effect is improved, and the phosphosilicate glass layer is opposite to the tunneling oxide layerThe protection of the tunneling oxide layer can promote the phosphorus doping concentration in the phosphorus doped polysilicon layer to be further improved, so that the contact resistance between the phosphorus doped polysilicon layer and the metal electrode layer is reduced, and the filling factor is improved; furthermore, the phosphorus contained in the phosphosilicate glass layer ensures smooth electron transmission, prevents electron transmission from being blocked, and further ensures conductivity.
In some alternative embodiments of the first aspect of the present application, the thickness of the phosphosilicate glass layer is 3nm to 5nm.
In some alternative embodiments of the first aspect of the present application, the phosphorus doped polysilicon layer has a thickness of 120nm to 160nm.
In some optional embodiments of the first aspect of the present application, the tunneling oxide layer has a thickness of 1nm to 3nm.
In some optional embodiments of the first aspect of the present application, the phosphorus doping concentration of the surface of the phosphorus doped polysilicon layer is greater than or equal to 5.5 x 10 20 atoms/cm 3
In some optional embodiments of the first aspect of the present application, the difference between the phosphorus doping concentration of the phosphosilicate glass layer and the phosphorus doping concentration of the phosphorus doped polysilicon layer is 5.5 x 10 20 atoms/cm 3 ~9.0╳10 20 atoms/cm 3
The second aspect of the present application provides a method for preparing a tunneling oxide passivation contact battery, including:
forming a tunneling oxide layer on a silicon substrate;
forming a phosphosilicate glass layer on the tunneling oxide layer;
and forming a phosphorus doped polysilicon layer on the surface of the phosphosilicate glass layer facing away from the tunneling oxide layer.
According to the preparation method of the tunneling oxide passivation contact battery, the tunneling oxide, the phosphosilicate glass layer and the phosphorus doped polysilicon layer are sequentially formed on the silicon substrate, so that the stability of the tunneling oxide structure can be guaranteed, excessive holes are avoided from being generated in the tunneling oxide, the phosphorus doping concentration in the phosphorus doped polysilicon layer is improved under the condition of improving the passivation quality of the tunneling oxide, the open-circuit voltage of the battery is improved, and the conversion efficiency of the battery is further improved.
In some alternative embodiments of the second aspect of the present application, the tunnel oxide layer, the phosphosilicate glass layer, and the phosphorus doped polysilicon layer are all deposited by PECVD.
In some alternative embodiments of the second aspect of the present application, the phosphosilicate glass layer is deposited from a gas source using silane, phosphane, and an oxygen source gas, including oxygen, ozone, and laughing gas.
In some optional embodiments of the second aspect of the present application, the phosphosilicate glass layer is deposited using a source of silane, phosphane, and laughing gas, wherein the source of oxygen includes oxygen, ozone, and laughing gas in a volume flow ratio of 6500 to 7500: 1550-1650: 145-155.
In some optional embodiments of the second aspect of the present application, the deposition time of the gas source deposition is controlled according to the preset thickness of the phosphosilicate glass layer, and the deposition time of the gas source deposition is 1min to 1.5min.
In some alternative embodiments of the second aspect of the present application, the vapor deposition chamber temperature during the vapor deposition process is 410 ℃ to 420 ℃ and the vapor deposition chamber pressure is 1650 to 1750mtorr.
In some alternative embodiments of the second aspect of the present application, the thickness of the phosphosilicate glass layer is between 3nm and 5nm.
In some alternative embodiments of the second aspect of the present application, the phosphorus doped polysilicon layer has a thickness of 120nm to 160nm.
In some optional embodiments of the second aspect of the present application, the tunneling oxide layer has a thickness of 1nm to 3nm.
In some optional embodiments of the second aspect of the present application, before the step of forming the tunnel oxide layer on the silicon substrate, the method further comprises:
selecting a raw material silicon wafer with the resistivity of 0.3-3 omega cm;
texturing a raw silicon wafer to form a first pre-manufactured piece with textured surfaces;
performing diffusion sintering on the first prefabricated sheet to obtain a second prefabricated sheet;
and cleaning the back surface of the second pre-manufactured sheet by a wet method and performing alkali polishing treatment on the back surface to obtain the silicon substrate.
In some alternative embodiments of the second aspect of the present application, the tunnel oxide layer is formed on the back side of the silicon substrate.
In some optional embodiments of the second aspect of the present application, after the step of re-forming the phosphorus doped polysilicon layer on the surface of the phosphosilicate glass layer facing away from the tunnel oxide layer, the method further comprises:
washing the film around the front surface of the silicon substrate by using hydrofluoric acid and sodium hydroxide, wherein the film comprises a tunneling oxide layer, a phosphosilicate glass layer and a phosphorus doped polycrystalline layer;
depositing an alumina passivation film on the front surface of the silicon substrate;
depositing a front silicon nitride/silicon oxynitride laminated passivation film on one side of the aluminum oxide passivation film, which is opposite to the silicon substrate;
depositing a back silicon nitride/silicon oxynitride laminated passivation film on one side of the phosphorus doped polysilicon layer, which is back to the silicon substrate;
the metallization forms the electrodes.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic view of a partial layer structure of a tunneling oxide passivation contact cell in an embodiment of the present application;
reference numerals illustrate:
a silicon substrate-1; tunneling oxide layer-2; phosphorosilicate glass layer-3; a phosphorus doped polysilicon layer-4; suede-5.
Detailed Description
The following description of the embodiments of the present application will be made apparent and fully in view of the accompanying drawings, in which some, but not all embodiments of the invention are shown. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present disclosure.
In the description of the present application, it should be noted that the directions or positional relationships indicated by the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. are based on the directions or positional relationships shown in the drawings, are merely for convenience of description of the present application and to simplify the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present application, it should be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communication between two elements. The specific meaning of the terms in this application will be understood by those of ordinary skill in the art in a specific context.
In addition, the technical features described below in the different embodiments of the present application may be combined with each other as long as they do not collide with each other.
The tunneling oxide passivation contact cell in the first aspect of the present application comprises:
a silicon substrate having a silicon-based layer,
the tunneling passivation contact structure is arranged on the silicon substrate and comprises a tunneling oxide layer and a phosphorus doped polysilicon layer arranged on one side of the tunneling oxide layer, which is opposite to the silicon substrate;
and the phosphorus silicon glass layer is arranged between the tunneling oxide layer and the phosphorus doped polysilicon layer and is used for preventing phosphorus atoms in the phosphorus doped polysilicon layer from diffusing into the tunneling oxide layer.
The phosphosilicate glass layer in the first aspect of the application is arranged on the tunneling oxide layer and the phosphorusPassivation effect is achieved between doped polysilicon layers, and similar to thickening of a tunneling oxide layer, the tunneling oxide layer SiO caused by larger stress difference between doped poly-Si (polysilicon) and substrate Si is avoided x More holes are generated; further, the phosphorus is doped in the phosphorus-silicon glass layer, so that the phosphorus doped in the phosphorus-doped polysilicon layer is prevented from diffusing to the tunneling oxide layer, the passivation effect is improved, the phosphorus doped concentration in the phosphorus-doped polysilicon layer can be further improved by the protection of the phosphorus-silicon glass layer on the tunneling oxide layer, and the contact resistance between the phosphorus-doped polysilicon layer and the metal electrode layer is further reduced, so that the filling factor is improved; furthermore, the phosphorus contained in the phosphosilicate glass layer ensures smooth electron transmission, prevents electron transmission from being blocked, and further ensures conductivity.
In some alternative embodiments of the first aspect of the present application, the thickness of the phosphosilicate glass layer is 3nm to 5nm. In these embodiments, the thickness of the phosphosilicate glass layer is within the range, so that the tunneling oxide layer can be protected from generating more holes, and the number of phosphorus atoms doped in the phosphorus doped polysilicon layer diffusing to the tunneling oxide layer can be controlled, so that the stability of the tunneling oxide layer structure is ensured.
In some alternative embodiments of the first aspect of the present application, the phosphorus doped polysilicon layer has a thickness of 120nm to 160nm.
In some optional embodiments of the first aspect of the present application, the tunneling oxide layer has a thickness of 1nm to 3nm.
In some optional embodiments of the first aspect of the present application, the phosphorus doping concentration of the surface of the phosphorus doped polysilicon layer is greater than or equal to 5.5 x 10 20 atoms/cm 3
In some optional embodiments of the first aspect of the present application, a difference between the phosphorus doping concentration of the phosphosilicate glass layer and the phosphorus doping concentration of the phosphorus doped polysilicon layer is 5.5 x 10 20 atoms/cm 3 ~9.0╳10 20 atoms/cm 3 . In these embodiments, the phosphorus doping concentration of the phosphorus-doped polysilicon layer is different from the phosphorus doping concentration of the phosphorus-doped polysilicon layer, the concentration difference prevents the phosphorus doped in the phosphorus-doped polysilicon layer from diffusing to the tunneling oxide layer, the passivation effect is improved, and the phosphorus-silicon glassThe protection of the tunneling oxide layer by the glass layer can promote the further increase of the phosphorus doping concentration in the phosphorus doped polysilicon layer, thereby reducing the contact resistance between the phosphorus doped polysilicon layer and the metal electrode layer and improving the filling factor.
The second aspect of the present application provides a method for preparing a tunneling oxide passivation contact battery, including:
s10: forming a tunneling oxide layer on a silicon substrate;
s20: forming a phosphosilicate glass layer on the tunneling oxide layer;
s30: and forming a phosphorus doped polysilicon layer on the surface of the phosphosilicate glass layer facing away from the tunneling oxide layer.
According to the preparation method of the tunneling oxide passivation contact battery, the tunneling oxide, the phosphosilicate glass layer and the phosphorus doped polysilicon layer are sequentially formed on the silicon substrate, so that the stability of the tunneling oxide structure can be guaranteed, excessive holes are avoided from being generated in the tunneling oxide, the phosphorus doping concentration in the phosphorus doped polysilicon layer is improved under the condition of improving the passivation quality of the tunneling oxide, the open-circuit voltage of the battery is improved, and the conversion efficiency of the battery is further improved.
In some alternative embodiments of the second aspect of the present application, the tunnel oxide layer, the phosphosilicate glass layer, and the phosphorus doped polysilicon layer are all deposited by PECVD. In these embodiments, the tunneling oxide layer, the phosphosilicate glass layer, and the phosphorus doped polysilicon layer may be formed in the same process, so as to improve the electrical performance of the battery cell and improve the conversion efficiency of the battery without increasing the production line equipment and the process.
In some alternative embodiments of the second aspect of the present application, the phosphosilicate glass layer is deposited from a gas source using silane, phosphane, and an oxygen source gas, including oxygen, ozone, and laughing gas.
In some optional embodiments of the second aspect of the present application, the phosphosilicate glass layer is deposited using a source of silane, phosphane, and laughing gas, wherein the source of oxygen includes oxygen, ozone, and laughing gas in a volume flow ratio of 6500 to 7500: 1550-1650: 145-155.
In some optional embodiments of the second aspect of the present application, the deposition time of the gas source deposition is controlled according to the preset thickness of the phosphosilicate glass layer, and the deposition time of the gas source deposition is 1min to 1.5min.
In some alternative embodiments of the second aspect of the present application, the vapor deposition chamber temperature during the vapor deposition process is 410 ℃ to 420 ℃ and the vapor deposition chamber pressure is 1650 to 1750mtorr.
In some alternative embodiments of the second aspect of the present application, the thickness of the phosphosilicate glass layer is between 3nm and 5nm.
In some optional embodiments of the second aspect of the present application, the phosphorus doped polysilicon layer has a thickness of 120nm to 160nm;
in some optional embodiments of the second aspect of the present application, the tunneling oxide layer has a thickness of 1nm to 3nm.
In some alternative embodiments of the second aspect of the present application,
the step S10 of forming a tunneling oxide layer on the silicon substrate further includes:
s01: selecting a raw material silicon wafer with the resistivity of 0.3-3 omega cm to control the doping concentration;
s02: texturing a raw material silicon wafer to form a first pre-manufactured piece with a textured surface, and pre-cleaning and texturing by using a groove type texturing machine;
s03: diffusion bonding is performed on the first preform to obtain a second preform, in some examples, BCl is used for the textured silicon wafer 3 Preparing a P/N junction by high-temperature diffusion of oxygen, wherein the P/N junction is formed on the side of the suede;
s04: and cleaning the back surface of the second pre-manufactured sheet by a wet method and performing alkali polishing treatment on the back surface to obtain the silicon substrate.
In some alternative embodiments of the second aspect of the present application, the tunnel oxide layer is formed on the back side of the silicon substrate.
In some optional embodiments of the second aspect of the present application, after the step S30 of forming the phosphorus doped polysilicon layer on the surface of the phosphosilicate glass layer facing away from the tunnel oxide layer, the method further includes:
s40: washing the film around the front surface of the silicon substrate by using hydrofluoric acid and sodium hydroxide, wherein the film comprises a tunneling oxide layer, a phosphosilicate glass layer and a phosphorus doped polycrystalline layer;
s50: depositing an aluminum oxide passivation film on the front side of the silicon substrate, and in some examples, depositing the aluminum oxide passivation film in an atomic layer manner;
s60: depositing a front silicon nitride/silicon oxynitride stacked passivation film on the side of the aluminum oxide passivation film facing away from the silicon substrate, and in some examples, depositing the front silicon nitride/silicon oxynitride stacked passivation film by adopting a plate or tube PECVD method;
s70: depositing a back side silicon nitride/silicon oxynitride stacked passivation film on the side of the phosphorus doped polysilicon layer facing away from the silicon substrate, and in some examples, depositing the back side silicon nitride/silicon oxynitride stacked passivation film by plate or tube PECVD;
s80: the metallization forms the electrodes, and in some examples, the metallization includes screen printing a conductive paste followed by sintering to form the electrodes.
S90: the battery prepared after step S80 was subjected to electrical property sorting, EL (battery luminescence) test and color sorting.
As shown in fig. 1, the tunnel oxide passivation contact battery prepared by the preparation method of the tunnel oxide passivation contact battery provided in the second aspect of the present application has a silicon substrate 1, and a tunnel oxide layer 2, a phosphosilicate glass layer 3 and a phosphorus doped polysilicon layer 4 are sequentially laminated on the back surface of the silicon substrate 1. The front surface of the silicon substrate 1 is textured to form a textured surface 5.
The foregoing is merely a specific embodiment of the present application, but the scope of the present application is not limited thereto, and any changes or substitutions easily conceivable by those skilled in the art within the technical scope of the present application should be covered in the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (10)

1. A tunneling oxide passivation contact cell, comprising:
a silicon substrate having a silicon-based layer,
the tunneling passivation contact structure is arranged on the silicon substrate and comprises a tunneling oxide layer and a phosphorus doped polysilicon layer arranged on one side of the tunneling oxide layer, which is opposite to the silicon substrate;
and the phosphorus silicon glass layer is arranged between the tunneling oxide layer and the phosphorus doped polysilicon layer and is used for preventing phosphorus atoms in the phosphorus doped polysilicon layer from diffusing into the tunneling oxide layer.
2. The tunnel oxide passivation contact cell of claim 1, wherein the thickness of the phosphosilicate glass layer is 3nm to 5nm.
3. The tunnel oxide passivation contact cell of claim 1, wherein the phosphorus doped polysilicon layer has a thickness of 120nm to 160nm;
preferably, the thickness of the tunneling oxide layer is 1 nm-3 nm.
4. The tunnel oxide passivation contact cell of claim 1, wherein the phosphorus doped polysilicon layer has a surface phosphorus doping concentration greater than or equal to 5.5 x 10 20 atoms/cm 3
Preferably, the difference between the phosphorus doping concentration of the phosphosilicate glass layer and the phosphorus doping concentration of the phosphorus doped polysilicon layer is 5.5 x 10 20 atoms/cm 3 ~9.0╳10 20 atoms/cm 3
5. The preparation method of the tunneling oxide passivation contact battery is characterized by comprising the following steps of:
forming a tunneling oxide layer on a silicon substrate;
forming a phosphosilicate glass layer on the tunneling oxide layer;
and forming a phosphorus doped polysilicon layer on the surface of the phosphosilicate glass layer, which is opposite to the tunneling oxide layer.
6. The method of claim 5, wherein the tunnel oxide layer, the phosphosilicate glass layer, and the phosphorus doped polysilicon layer are deposited by PECVD.
7. The method of claim 6, wherein the phosphosilicate glass layer is deposited by using silane, phosphine, and oxygen source gases including oxygen, ozone, and laughing gas.
8. The method for preparing a tunneling oxide passivation contact cell according to claim 7, wherein the phosphosilicate glass layer is deposited by using silane, phosphane and laughing gas as gas sources, and the oxygen source gas comprises oxygen, ozone and laughing gas in a volume flow ratio of 6500-7500: 1550-1650: 145-155;
preferably, the deposition time of the air source deposition is controlled according to the preset thickness of the phosphosilicate glass layer, and the deposition time of the air source deposition is 1 min-1.5 min;
preferably, the temperature of the vapor deposition chamber in the vapor deposition process is 410-420 ℃, and the pressure of the vapor deposition chamber is 1650-1750 mtorr.
9. The method for manufacturing a tunneling oxide passivation contact cell according to claim 5, wherein the thickness of said phosphosilicate glass layer is 3nm to 5nm;
preferably, the thickness of the phosphorus doped polysilicon layer is 120 nm-160 nm;
preferably, the thickness of the tunneling oxide layer is 1 nm-3 nm.
10. The method of claim 5, wherein,
the step of forming the tunneling oxide layer on the silicon substrate further comprises the following steps:
selecting a raw material silicon wafer with the resistivity of 0.3-3 omega cm;
texturing the raw silicon wafer to form a first pre-manufactured piece with textured surfaces;
performing diffusion sintering on the first prefabricated piece to obtain a second prefabricated piece;
wet cleaning the back surface of the second pre-manufactured sheet and performing alkali polishing treatment on the back surface to obtain a silicon substrate;
preferably, the tunneling oxide layer is formed on the back surface of the silicon substrate;
preferably, after the step of forming the phosphorus doped polysilicon layer on the surface of the phosphosilicate glass layer facing away from the tunneling oxide layer, the method further comprises:
washing the film wound on the front surface of the silicon substrate by using hydrofluoric acid and sodium hydroxide, wherein the film comprises a tunneling oxide layer, a phosphosilicate glass layer and a phosphorus doped polycrystalline layer;
depositing an alumina passivation film on the front surface of the silicon substrate;
depositing a front silicon nitride/silicon oxynitride laminated passivation film on one side of the aluminum oxide passivation film, which is opposite to the silicon substrate;
depositing a back silicon nitride/silicon oxynitride laminated passivation film on one side of the phosphorus doped polysilicon layer, which is opposite to the silicon substrate;
the metallization forms the electrodes.
CN202311842316.0A 2023-12-29 2023-12-29 Tunneling oxide passivation contact battery and preparation method thereof Pending CN117747680A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202311842316.0A CN117747680A (en) 2023-12-29 2023-12-29 Tunneling oxide passivation contact battery and preparation method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202311842316.0A CN117747680A (en) 2023-12-29 2023-12-29 Tunneling oxide passivation contact battery and preparation method thereof

Publications (1)

Publication Number Publication Date
CN117747680A true CN117747680A (en) 2024-03-22

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