CN117729830A - Semiconductor refrigerator ceramic integrated circuit and preparation method thereof - Google Patents

Semiconductor refrigerator ceramic integrated circuit and preparation method thereof Download PDF

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Publication number
CN117729830A
CN117729830A CN202410179736.3A CN202410179736A CN117729830A CN 117729830 A CN117729830 A CN 117729830A CN 202410179736 A CN202410179736 A CN 202410179736A CN 117729830 A CN117729830 A CN 117729830A
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China
Prior art keywords
integrated circuit
layer
ceramic substrate
ceramic
solder
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Pending
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CN202410179736.3A
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Chinese (zh)
Inventor
孙世刚
肖亚飞
徐健
杜晶
郑思原
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Coreway Optech Co ltd
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Coreway Optech Co ltd
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Priority to CN202410179736.3A priority Critical patent/CN117729830A/en
Publication of CN117729830A publication Critical patent/CN117729830A/en
Pending legal-status Critical Current

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Abstract

The invention discloses a semiconductor refrigerator ceramic integrated circuit and a preparation method thereof, belonging to the field of integrated circuit manufacture, comprising the following steps: a ceramic substrate and a small welding unit; and the blind hole extends from the front surface to the back surface of the ceramic substrate, the bottom surface of the small welding unit is connected with the bottom surface of the blind hole, the side surface of the small welding unit is connected with the side wall of the blind hole, and the top surface of the small welding unit is not higher than the front surface of the ceramic substrate. The invention reduces the height of the semiconductor refrigerator ceramic integrated circuit, is more suitable for size miniaturization, and solves the problem of outward spreading of solder.

Description

Semiconductor refrigerator ceramic integrated circuit and preparation method thereof
Technical Field
The present invention relates to the field of integrated circuit fabrication, and more particularly, to a semiconductor refrigerator ceramic integrated circuit and a method of fabricating the same.
Background
At present, with the development of miniaturization, light weight, thinning, high performance, increase of I/O terminal number and functional diversification of electronic products, the conventional semiconductor packaging technology cannot well meet the requirements, so that the welding of the miniature ultra-miniature semiconductor refrigerator becomes a problem and challenge to be solved.
A semiconductor refrigerator (TEC) is an electronic device that utilizes the Peltier effect (Peltier effect) of semiconductor materials to achieve refrigeration. The principle is that semiconductor crystal grains are arranged in a certain sequence and fixed between two insulated metallized ceramic substrates, so TEC consists of semiconductor crystal grains, a heat-conducting insulating material substrate, a wire, solder and the like. Since the ceramic substrate has high heat conductivity, good insulation performance and high strength and can provide a flat surface, ceramic substrates such as alumina and aluminum nitride are widely used as heat conductive and insulating substrates of semiconductor refrigeration devices.
Semiconductor refrigerators generally use a well-wettable tin solder to solder semiconductor particles to the surface of a metallized ceramic substrate, which is in a liquid state and has fluidity during use.
Fig. 1 is a schematic top view of a conventional TEC integrated circuit, in fig. 1, a ceramic substrate 11 is distributed with a plurality of small soldering units 10, fig. 2 is a schematic cross-sectional view, and in fig. 2, the small soldering units 10 are connected to an outer surface of the ceramic substrate 11. During the process of soldering semiconductor crystal grains (also called components) onto the soldering small unit 10 by using solder and using the subsequent TEC, the solder is easy to spread outwards and contact with other soldering small units 10 due to the action of the surface tension of the solder, so that the reliability and the soldering precision of the soldering of the semiconductor crystal grains are reduced, and the quality of the TEC is affected.
In order to solve the problem, some technicians use a metal platinum material barrier layer with smooth surface to prevent solder from spreading and contacting, but the effect is not ideal; some technicians use a pit between the solder cells 10 to stop the flow as solder spreading from the location of the solder cell 10 passes through the pit, and although this method is partially effective, the direction of solder spreading outward must be specified to flow into the pit to stop the flow, and the solder fuses into a liquid form, which may flow square of the solder cell 10, not necessarily into the pit, but may flow in a curved manner.
The above background is for the convenience of understanding the present invention and is not a known art which has been disclosed to the general public before the application of the present invention.
Disclosure of Invention
In view of the above, the present invention provides a semiconductor cooler ceramic integrated circuit which reduces the height of the semiconductor cooler ceramic integrated circuit and is more suitable for downsizing.
A semiconductor refrigerator ceramic integrated circuit comprising: a ceramic substrate and a small welding unit; and
the blind hole extends from the front surface to the back surface of the ceramic substrate, the bottom surface of the small welding unit is connected with the bottom surface of the blind hole, the side surface of the small welding unit is connected with the side wall of the blind hole, and the top surface of the small welding unit is not higher than the front surface of the ceramic substrate.
Optionally, the ceramic substrate is an aluminum nitride ceramic substrate, a boron nitride ceramic substrate, an aluminum oxide ceramic substrate or a beryllium oxide ceramic substrate.
Optionally, the top surface of the solder cell is lower than the front surface of the ceramic substrate.
Optionally, the solder cell includes a metal layer and a pre-solder layer, the pre-solder layer being attached to a front surface of the metal layer.
Optionally, a distance h between the front surface of the ceramic substrate and the top surface of the small welding unit is equal to or greater than a cross-sectional area of the liquid volume/blind hole of the prefabricated welding material layer and a cross-sectional area of the solid volume/blind hole of the prefabricated welding material layer.
Optionally, the metal layer is one or more of a copper layer, a nickel layer, a palladium layer and a gold layer, and the prefabricated solder layer is Jin Xiceng.
Optionally, the thickness of the prefabricated solder layer is 3-10 μm, and the thickness of the metal layer is 10-100 μm.
Optionally, the welding small unit further comprises a bottom film layer, and the bottom film layer covers the bottom surface and the side surface of the blind hole.
Optionally, the thickness of the bottom film layer is 100nm-1000nm.
The invention also provides a preparation method of the semiconductor refrigerator ceramic integrated circuit.
A method for fabricating a semiconductor refrigerator ceramic integrated circuit comprising the steps of:
s1, forming a photoresist pattern serving as a mask on a ceramic substrate;
s2, a blind hole is carved on the ceramic substrate;
s3, removing the photoresist pattern;
s5, forming a photoresist pattern serving as a mask;
s6, electrodepositing, wherein an electrodeposited metal layer is formed in the blind hole;
s7, electroplating to form a prefabricated solder layer in the blind hole;
s8, removing the photoresist pattern;
the above-mentioned semiconductor refrigerator ceramic integrated circuit is formed.
Optionally, the method for manufacturing the semiconductor refrigerator ceramic integrated circuit further comprises the steps of; s4, sputtering metal in the front direction of the ceramic substrate to form a bottom film layer; s9, forming a photoresist pattern serving as a mask; s10, removing the bottom film; s11, removing the photoresist pattern.
Optionally, in S7, before the prefabricated solder layer is formed, a plated metal layer is formed by electroplating on the electrodeposited metal layer formed by electrodeposition in S6.
Compared with the prior art, the invention has the beneficial effects that:
the invention solves the problem that the solder spreads outwards by arranging the blind hole on the front surface of the ceramic substrate and positioning the welding small unit in the blind hole, reduces the height of the ceramic integrated circuit of the semiconductor refrigerator, and is more suitable for size miniaturization.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, a brief description will be given below of the drawings that are needed in the embodiments or the prior art descriptions, it being obvious that the drawings in the following description are some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort to a person skilled in the art.
FIG. 1 is a schematic top view of a TEC integrated circuit of the background of the invention;
FIG. 2 is a schematic cross-sectional view of FIG. 1;
FIG. 3 is a schematic cross-sectional view of a semiconductor refrigerator ceramic integrated circuit provided by the present invention;
fig. 4 is an enlarged schematic view of fig. 3 at A;
FIGS. 5-14 are schematic cross-sectional views of structures during the fabrication process of the semiconductor cooler ceramic integrated circuit of the present invention;
reference numerals illustrate: 10. the small unit is welded, 11, the ceramic substrate, 12, the blind holes, 13, the metal layer, 14, the prefabricated welding material layer, 15, the bottom film layer, 16 photoresist, 17, the copper layer, 18 and the nickel palladium gold layer.
Detailed Description
In the description of the present invention, it should be noted that, unless explicitly stated and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, indirectly connected through an intermediary, or may be in communication with each other between two elements or in an interaction relationship between two elements. The specific meaning of the above terms in the present invention can be understood by those of ordinary skill in the art according to the specific circumstances.
In the description of the present invention, it should be understood that the terms "upper," "lower," "front," "rear," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like indicate or are based on the orientation or positional relationship shown in the drawings, merely to facilitate description of the present invention and to simplify the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present invention. In the description of the present invention, the meaning of "a plurality" is two or more, unless specifically stated otherwise.
The terms "first," "second," "third," "fourth" and the like in the description and in the claims of this application and in the above-described figures, if any, are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that embodiments of the present application described herein may be capable of operation in sequences other than those illustrated or described herein, for example. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
For the purposes of making the objects, technical solutions and advantages of the embodiments of the present application more clear, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is apparent that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments herein without making any inventive effort, are intended to be within the scope of the present application.
The technical scheme of the invention is described in detail below by specific examples. The following embodiments may be combined with each other, and some embodiments may not be repeated for the same or similar concepts or processes.
Referring to fig. 3-4, fig. 3 is a schematic cross-sectional view of a ceramic integrated circuit of a semiconductor refrigerator according to the present invention, and fig. 4 is an enlarged schematic view of fig. 3-A.
A ceramic integrated circuit of a semiconductor refrigerator comprises a ceramic substrate 11 and more than 2 small welding units 10, wherein blind holes 12 with the number equal to that of the small welding units 10 are arranged on the ceramic substrate 11, each small welding unit 10 is embedded in one blind hole 12, and the blind holes 12 extend from the front surface to the back surface of the ceramic substrate 11.
By providing the blind holes 12 on the ceramic substrate 11 and embedding the solder die 10 in the blind holes 12, on the one hand, during subsequent soldering of the semiconductor die (also referred to as components) to the solder die 10 with solder and subsequent use of the TEC, the solder die 10 is embedded in the blind holes 12, reducing the distance from the solder to the ceramic substrate 11, while the solder spreads outwardly, the speed and extent of spreading is reduced due to the reduced height, reducing the likelihood of reaching the remaining solder die 10; on the other hand, after the solder cells 10 are embedded in the blind holes 12, the height of the semiconductor cooler ceramic integrated circuit is reduced in the height direction, and the spatial extent of the semiconductor cooler ceramic integrated circuit is reduced.
It will be appreciated by those skilled in the art that in one or more embodiments of the present invention, the ceramic substrate 11 may be an aluminum nitride ceramic substrate, or may be a boron nitride ceramic substrate, an aluminum oxide ceramic substrate, or a beryllium oxide ceramic substrate, which may be selected by those skilled in the art as desired by a customer.
It will be appreciated by those skilled in the art that in one or more embodiments of the present invention, the solder cell 10 includes a metal layer 13 and a pre-solder layer 14, the pre-solder layer 14 being attached to the front surface of the metal layer 13. When packaged, the pre-solder layer 14 bonds the semiconductor die (also referred to as a component) to the bond die 10.
In one or more embodiments of the invention, the bottom surface of the solder cell 10 is connected to the bottom surface of the blind hole 12, and the top surface of the solder cell 10 is flush with the front surface of the ceramic substrate 11. Since the top surface of the solder cell 10 is the top surface of the solder preform layer 14, the top surface of the solder preform layer 14 is flush with the front surface of the ceramic substrate 11, and during the subsequent soldering of the semiconductor die (also referred to as a component) to the solder cell 10 with solder and the subsequent use of the TEC, even if the solder melts, the solder cannot spread outward because the solder preform layer 14 is blocked by the walls of the blind holes 12, thereby not only solving the possibility of spreading the solder to other solder cells 10, but also, because the solder does not spread outward after melting and stays at the solder preform layer 14, the solder at the solder cell 10 is not reduced as compared with the case where the pit is provided between the solder cells 10 in the related art, and the solder performance is not deteriorated as the solder is less as the use time is longer.
In one or more embodiments of the present invention, further, the top surface of the small soldering unit 10 is lower than the front surface of the ceramic substrate 11, and the distance h between the front surface of the ceramic substrate 11 and the top surface of the small soldering unit 10 is + (liquid volume of the pre-soldering material layer 14-solid volume of the pre-soldering material layer 14)/the cross-sectional area of the blind hole 12, at this time, even if the pre-soldering material layer 14 is completely melted, the melted liquid is located in the blind hole 12, thereby completely avoiding the outward spreading. On the other hand, since the solder cell 10 is lower than the front surface of the ceramic substrate 11, there is a positioning groove on the solder cell 10 that can be used for positioning, which is used for positioning when soldering the package, preventing the package from being shifted.
It will be appreciated by those skilled in the art that in one or more embodiments of the present invention, the metal layer 13 may include either a copper layer, a nickel layer, a palladium layer, or a gold layer, or any two or more layers of copper layer, nickel layer, palladium layer, or gold layer, and those skilled in the art may choose according to the needs of the customer.
It will be appreciated by those skilled in the art that in one or more embodiments of the present invention, the pre-solder layer 14 is a gold-tin layer that melts when soldered or at a higher temperature and solidifies at a lower temperature.
It will be appreciated by those skilled in the art that in one or more embodiments of the present invention, the pre-solder layer 14 has a thickness of 3-10 μm.
It will be appreciated by those skilled in the art that in one or more embodiments of the present invention, the metal layer 13 has a thickness of 10-100 μm.
It will be appreciated by those skilled in the art that in one or more embodiments of the present invention, the welded cell 10 further includes a bottom film layer 15, the bottom film layer 15 overlying the bottom and side surfaces of the blind hole 12; the bottom film layer 15 is used for enhancing the adhesiveness between the metal layer 13 and the ceramic substrate 11, and enhancing the conductive connectivity of the metal layer 13; and when the bottom film layer 15 covers the bottom surface and the side surface of the blind hole 12, on one hand, the connection area of the small welding unit 10 and the ceramic substrate 11 is increased, and on the other hand, the connection area of the bottom film layer 15 and the metal layer 13 is also increased, so that the overall performance of the ceramic integrated circuit of the semiconductor refrigerator is greatly improved. In addition, the bottom film layer 15 wraps the metal layer 13, which is more beneficial to the protection of the metal layer 13.
It will be appreciated by those skilled in the art that in one or more embodiments of the present invention, the base film layer 15 has a thickness of 100nm to 1000nm.
The invention also provides a preparation method of the semiconductor refrigerator ceramic integrated circuit shown in fig. 3.
Referring to fig. 5-14, fig. 5-14 are schematic structural cross-sectional views of the semiconductor refrigerator ceramic integrated circuit of the present invention during the manufacturing process;
a method of fabricating the semiconductor cooler ceramic integrated circuit of fig. 3, comprising the steps of:
s1, photoetching on a ceramic substrate 11 to form a photoresist 16 pattern serving as a mask, as shown in FIG. 5;
photolithography is the prior art in the electronics field, and the photoresist is divided into a positive photoresist and a negative photoresist, which have opposite roles, the selected photoresist is not selected in the invention, and in the invention, the place covered by the photoresist 16 is the place reserved after the process treatment, namely the place not treated by the process;
s2, a blind hole 12 is engraved on the ceramic substrate 11 at a place where no photoresist 16 covers, and the height of the blind hole 12 is set according to requirements, as shown in FIG. 6;
s3, removing the photoresist 16 to form a structure shown in FIG. 7;
s4, sputtering Ti and Cu on the front surface of the ceramic substrate 11 to form a bottom film layer 15, so as to form a structure as shown in FIG. 8;
s5, photoetching to form a photoresist 16 pattern serving as a mask, as shown in FIG. 9;
s6, electrodepositing Cu in the blind holes 12 to form a copper layer 17, as shown in FIG. 10;
s7, electroplating nickel, palladium and gold in the blind holes 12 to form a nickel-palladium-gold layer 18, forming a metal layer 13 by the copper layer 17 and the nickel-palladium-gold layer 18, and electroplating tin to form a prefabricated solder layer 14 on the nickel-palladium-gold layer 18, as shown in FIG. 11;
s8, removing the photoresist 16 to form the structure shown in FIG. 12;
s9, photoetching to form a photoresist 16 pattern serving as a mask, as shown in FIG. 13;
s10, removing the bottom film to form the structure of FIG. 14;
and S11, removing the photoresist 16 to form the structure shown in figure 3.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and not for limiting the same; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the invention.

Claims (10)

1. A semiconductor cooler ceramic integrated circuit, comprising:
a ceramic substrate;
welding small units; and
a blind hole;
the blind holes extend from the front surface to the back surface of the ceramic substrate, the bottom surfaces of the small welding units are connected with the bottom surfaces of the blind holes, the side surfaces of the small welding units are connected with the side walls of the blind holes, and the top surfaces of the small welding units are not higher than the front surface of the ceramic substrate.
2. The semiconductor refrigerator ceramic integrated circuit of claim 1, wherein the ceramic substrate is an aluminum nitride ceramic substrate, a boron nitride ceramic substrate, an aluminum oxide ceramic substrate, or a beryllium oxide ceramic substrate; or/and (or)
The top surface of the small welding unit is lower than the front surface of the ceramic substrate.
3. The semiconductor cooler ceramic integrated circuit according to claim 2, wherein the solder cell comprises a metal layer and a pre-solder layer, the pre-solder layer being attached to a front surface of the metal layer.
4. A semiconductor refrigerator ceramic integrated circuit according to claim 3, wherein the distance h + between the front surface of the ceramic substrate and the top surface of the solder cell is the cross-sectional area of the liquid volume/blind hole of the pre-solder layer-the solid volume/blind hole of the pre-solder layer.
5. A semiconductor refrigerator ceramic integrated circuit according to claim 3 wherein the metal layer is one or more of a copper layer, a nickel layer, a palladium layer, a gold layer, and the pre-solder layer is Jin Xiceng.
6. The semiconductor refrigerator ceramic integrated circuit of claim 5, wherein the pre-solder layer has a thickness of 3-10 μm and the metal layer has a thickness of 10-100 μm.
7. The semiconductor refrigerator ceramic integrated circuit of any one of claims 3-6 wherein the solder die further comprises a bottom film layer overlying the bottom and side surfaces of the blind via.
8. The semiconductor refrigerator ceramic integrated circuit of claim 7, wherein the base film layer has a thickness of 100nm to 1000nm.
9. A method for manufacturing a ceramic integrated circuit for a semiconductor refrigerator, comprising the steps of:
s1, forming a photoresist pattern serving as a mask on a ceramic substrate;
s2, a blind hole is carved on the ceramic substrate;
s3, removing the photoresist pattern;
s5, forming a photoresist pattern serving as a mask;
s6, electrodepositing, wherein an electrodeposited metal layer is formed in the blind hole;
s7, electroplating to form a prefabricated solder layer in the blind hole;
s8, removing the photoresist pattern;
forming a semiconductor refrigerator ceramic integrated circuit as claimed in any one of claims 1 to 8.
10. The method of manufacturing a semiconductor cooler ceramic integrated circuit according to claim 9, wherein the method of manufacturing a semiconductor cooler ceramic integrated circuit further comprises; s4, sputtering metal in the front direction of the ceramic substrate to form a bottom film layer; s9, forming a photoresist pattern serving as a mask; s10, removing the bottom film; s11, removing the photoresist pattern; or/and (or)
In S7, before the prefabricated solder layer is formed, an electroplated metal layer is formed on the electrodeposited metal layer formed by the electrodepositing in S6 in an electroplating mode.
CN202410179736.3A 2024-02-18 2024-02-18 Semiconductor refrigerator ceramic integrated circuit and preparation method thereof Pending CN117729830A (en)

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Application Number Priority Date Filing Date Title
CN202410179736.3A CN117729830A (en) 2024-02-18 2024-02-18 Semiconductor refrigerator ceramic integrated circuit and preparation method thereof

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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050150538A1 (en) * 2004-01-09 2005-07-14 Industrial Technology Research Institute Micro thermoelectric device and manufacturing method thereof
US20110290293A1 (en) * 2010-05-26 2011-12-01 Samsung Electro-Mechanics Co. Thermoelectric module and method for manufacturing the same
KR20160126805A (en) * 2015-04-24 2016-11-02 엘지이노텍 주식회사 Thermoelectric device moudule and device using the same
KR20190038098A (en) * 2017-09-29 2019-04-08 엘지이노텍 주식회사 Thermo electric element
KR20200000985A (en) * 2018-06-26 2020-01-06 현대자동차주식회사 Thermoelectric conversion module and a method for manufacturing thereof
CN115636695A (en) * 2022-12-21 2023-01-24 四川科尔威光电科技有限公司 Preparation method of semiconductor aluminum nitride ceramic preset gold-tin solder heat sink

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050150538A1 (en) * 2004-01-09 2005-07-14 Industrial Technology Research Institute Micro thermoelectric device and manufacturing method thereof
US20110290293A1 (en) * 2010-05-26 2011-12-01 Samsung Electro-Mechanics Co. Thermoelectric module and method for manufacturing the same
KR20160126805A (en) * 2015-04-24 2016-11-02 엘지이노텍 주식회사 Thermoelectric device moudule and device using the same
KR20190038098A (en) * 2017-09-29 2019-04-08 엘지이노텍 주식회사 Thermo electric element
KR20200000985A (en) * 2018-06-26 2020-01-06 현대자동차주식회사 Thermoelectric conversion module and a method for manufacturing thereof
CN115636695A (en) * 2022-12-21 2023-01-24 四川科尔威光电科技有限公司 Preparation method of semiconductor aluminum nitride ceramic preset gold-tin solder heat sink

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