CN117729092A - Method for determining restart reason and electronic equipment - Google Patents

Method for determining restart reason and electronic equipment Download PDF

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Publication number
CN117729092A
CN117729092A CN202310974184.0A CN202310974184A CN117729092A CN 117729092 A CN117729092 A CN 117729092A CN 202310974184 A CN202310974184 A CN 202310974184A CN 117729092 A CN117729092 A CN 117729092A
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China
Prior art keywords
restart
register
router
target
electronic equipment
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CN202310974184.0A
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Chinese (zh)
Inventor
宁博
肖啸
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Honor Device Co Ltd
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Honor Device Co Ltd
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Priority to CN202310974184.0A priority Critical patent/CN117729092A/en
Publication of CN117729092A publication Critical patent/CN117729092A/en
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Abstract

The application provides a method for determining a restart reason and electronic equipment, and relates to the technical field of network equipment. Under the condition that the electronic equipment is restarted, the electronic equipment acquires target data corresponding to a target register, wherein the data in the target register is emptied when the electronic equipment is disconnected from a power supply, and the target data corresponding to the target register is used for verifying whether the current restart is a power-off restart or not. Then, in the case where the target data is zero, the electronic device determines that the restart cause information is power-off restart information. In the method and the device, accuracy of determining the restarting reason can be improved, and a foundation is provided for improving stability of the following router.

Description

Method for determining restart reason and electronic equipment
Technical Field
The present disclosure relates to the field of network devices, and in particular, to a method for determining a restart reason and an electronic device.
Background
With the continuous development of computer technology, networks have become an integral part of people's daily lives, and routers have also been incorporated into people's daily lives as gateways. The router can be used for establishing connection between a plurality of electronic devices (such as mobile phones) and the Internet, namely, the electronic devices can realize the internet surfing function by connecting WIFI corresponding to the router.
However, a restart may occur during the operation of the router, and in order to analyze and improve the stability of the router, the cause of the restart of the router needs to be determined, and thus, a method for determining the cause of the restart of the router is needed.
Disclosure of Invention
The embodiment of the application provides a method for determining a restarting reason and electronic equipment, which are used for improving accuracy of determining the restarting reason of a router and further improving operation stability of the router.
In order to achieve the above purpose, the embodiments of the present application adopt the following technical solutions:
in a first aspect, a method for determining a restart reason is provided, where in the case where an electronic device performs restart, the electronic device acquires target data corresponding to a target register, where the data in the target register is emptied when the electronic device is powered off, and the target data corresponding to the target register is used to verify whether the restart is a power-off restart at the present time. Then, the electronic device determines whether the target data is a target value, and if the target data is a target value, the electronic device determines restart cause information of the electronic device as power-off restart information, wherein the target value is zero.
According to the method and the device, the characteristic that the register data of the system on chip of the electronic device is immediately emptied after power failure is utilized, after the electronic device is restarted, the restarting reason of the electronic device is judged according to the data stored in the target register, so that the situation that the restarting reason is determined to be wrong due to the fact that the target data is not emptied in time can be reduced, accuracy of determining the restarting reason is improved, foundation is provided for improving stability of a follow-up router, and experience of the router is improved.
In a possible implementation manner of the first aspect, before the electronic device obtains the target data corresponding to the target register, the method further includes: after entering an SSBL stage in the electronic device start-up process, the electronic device acquires an initial restart reason value (or referred to as initial restart reason information), where the initial restart reason value is used to indicate a reason why the electronic device is restarted at this time, and the initial restart reason value is stored in a target memory area of the DDR. Then, in a case where the initial restart cause information is different from the restart cause information, the electronic device may update the initial restart cause information to the restart cause information.
In the method, the initial restart reason value is stored in the target memory area of the DDR, so that the complete operation of the restart reason correction function can be ensured, the restart reason value can be read quickly and accurately by the electronic equipment, and a basis is provided for the follow-up determination of the restart reason. In addition, if the initial restart reason information is different from the restart reason information, it indicates that the restart reason is determined to be wrong, so the electronic device can update the initial restart reason information to improve the accuracy of the restart reason determination.
In a possible implementation manner of the first aspect, the target register is a config register, and target data corresponding to the config register includes a first flag bit, and the method further includes: and under the condition that the first flag bit is 1, the electronic equipment determines that the restart reason information is soft restart information.
In the application, since the target data corresponding to the config register comprises the first flag bit, and the value corresponding to the first flag bit is kept unchanged in the running process of the electronic equipment, the electronic equipment can judge the restarting reason of the electronic equipment according to the first flag bit, if the first flag bit is 1, the value corresponding to the first flag bit is not changed, so that the electronic equipment can determine that the restarting reason is soft restarting, and the accuracy of the restarting reason determination can be improved.
In a possible implementation manner of the first aspect, the target register is a watchdog register, and the target data corresponding to the watchdog register includes a second flag bit, and the method further includes: and under the condition that the second flag bit is 1, the electronic equipment determines that the restart reason information is soft restart information.
In the application, since the target data corresponding to the watchdog register comprises the second flag bit, and the data stored in the watchdog register can detect the running state of the electronic equipment in real time, the electronic equipment can judge the restarting reason of the electronic equipment according to the second flag bit, if the second flag bit is 1, that is, the second flag bit is reset, the restart of the watchdog of the electronic equipment is indicated, that is, the soft restart is performed, so that the accuracy of the determination of the restarting reason can be improved.
In a possible implementation manner of the first aspect, after the electronic device reads the target data corresponding to the target register, the method further includes: and the electronic equipment starts a watchdog counter corresponding to the watchdog register, and initializes and configures the value of the watchdog counter. And then, in the running process of the electronic equipment, the electronic equipment decrements the value of the watchdog counter according to the preset time. Then, the electronic device restarts if the value of the watchdog counter is zero.
In the application, if the value of the watchdog counter is zero, the electronic equipment is in an abnormal state for a long time, so that the electronic equipment can recover the normal running state of the electronic equipment in a restarting mode, namely, the normal running of the electronic equipment is ensured, and the use experience of a user is improved.
In a possible implementation manner of the first aspect, the method further includes: and the electronic equipment uploads the restarting reason information to the cloud platform. And then, the cloud platform can analyze the restarting reason of the electronic equipment according to the restarting reason information to obtain an analysis result, wherein the analysis result is used for representing the running stability of the electronic equipment.
In the application, the stability of the operation of the electronic equipment can be determined by analyzing the restarting reason of the electronic equipment, so that the stability of the router is improved according to the analysis result, and the use experience of a user is improved.
In a second aspect, the present application provides an electronic device comprising a register, a memory, and one or more processors; the register, the memory, and the processor are coupled; the register is used for temporarily storing instructions, data and addresses, and the memory is used for storing computer program codes, and the computer program codes comprise computer instructions; the computer instructions, when executed by the processor, cause the electronic device to perform the method as described above.
In a third aspect, the present application provides a computer readable storage medium comprising computer instructions which, when run on an electronic device, cause the electronic device to perform a method as described above.
In a fourth aspect, the present application provides a computer program product which, when run on an electronic device, causes the electronic device to perform the method as described above.
In a fifth aspect, there is provided a chip comprising: the device comprises an input interface, an output interface, a processor and a memory, wherein the input interface, the output interface, the processor and the memory are connected through an internal connection path, the processor is used for executing codes in the memory, and when the codes are executed, the processor is used for executing the method.
The advantages achieved by the electronic device according to the second aspect, the computer readable storage medium according to the third aspect, the computer program product according to the fourth aspect, and the chip according to the fifth aspect may refer to the advantages of the first aspect and any one of the possible design manners thereof, and are not described herein.
Drawings
Fig. 1 is a schematic diagram of a router startup procedure according to an embodiment of the present application;
fig. 2 is a schematic hardware structure of an electronic device according to an embodiment of the present application;
fig. 3 is a schematic diagram of an application scenario provided in an embodiment of the present application;
fig. 4 is a flowchart of a method for determining a restart reason according to an embodiment of the present application;
fig. 5 is a schematic diagram of an MIPS architecture according to an embodiment of the present disclosure;
fig. 6 is a schematic diagram of an ARM architecture according to an embodiment of the present application;
fig. 7 is a flowchart of a method for determining a restart reason according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application. In the description of the present application, unless otherwise indicated, "and/or" in the present application is merely an association relationship describing an association object, and indicates that three relationships may exist, for example, a and/or B may indicate: there are three cases, a alone, a and B together, and B alone, wherein a, B may be singular or plural. Also, in the description of the present application, unless otherwise indicated, "a plurality" means two or more than two. "at least one of" or the like means any combination of these items, including any combination of single item(s) or plural items(s). For example, at least one (one) of a, b, or c may represent: a, b, c, a-b, a-c, b-c, or a-b-c, wherein a, b, c may be single or plural. In addition, in order to clearly describe the technical solutions of the embodiments of the present application, in the embodiments of the present application, the words "first", "second", and the like are used to distinguish the same item or similar items having substantially the same function and effect. It will be appreciated by those of skill in the art that the words "first," "second," and the like do not limit the amount and order of execution, and that the words "first," "second," and the like do not necessarily differ. Meanwhile, in the embodiments of the present application, words such as "exemplary" or "such as" are used to mean serving as examples, illustrations, or descriptions. Any embodiment or design described herein as "exemplary" or "for example" should not be construed as preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "such as" is intended to present related concepts in a concrete fashion that may be readily understood.
The router is used as a home gateway, and users need to be connected to the Internet through the router for remote office, home entertainment, social interaction, online shopping and the like. The router stably operates for a long time to ensure the basis of surfing experience, so that the stability of the router needs to be ensured, and the restarting of the router possibly affects the stability of the router, so that the restarting type (or the restarting reason) of the router needs to be accurately identified, the problem analysis of the stability of the router by using the restarting type of the router is further performed, the router can be better improved, and the performance of the router is improved.
Different from the equipment supporting power management such as a mobile phone, a tablet, a PC and the like, the router directly accesses 220V household power through the power adapter in hardware design, and immediately stops working when the power is disconnected, so that a restarting event and equipment state information cannot be stored, wherein the equipment state information is used for indicating whether the router is in a working state or not, and therefore, the restarting type of the router cannot be directly determined. In some embodiments, the double data rate synchronous dynamic random access memory (Data Rate Synchronous Dynamic Random Access Memory, DDR) cannot store data after the router is disconnected from the power supply, and the DDR can store data by restarting the router by soft restart, where soft restart refers to restarting the router when the router is connected to the power supply, for example, restarting the router by remote control, and after restarting, the DDR is data. Optionally, the router may save the restart event, i.e. the restart cause is recorded, when a soft restart is performed.
Therefore, the router can judge the current restarting reason of the router by utilizing whether the data in the DDR is empty or not. Upon restart of the router, the router may read the data saved at the DDR location.
If the data is empty, i.e. the data is not read from the DDR, the current restart is a power-off restart. If the data is not empty, for example, user data, logs (such as operation logs and DDR logs) and the like are read from the DDR, it is indicated that the restart is not a power-off restart but may be a soft restart, and the DDR records a restart reason, so as to realize the determination of the restart reason.
After determining that the restart cause of the current restart is a power-off restart, the router may write the restart cause to the DDR. It should be appreciated that if there is another reason (e.g., soft restart) that causes the router to restart this time, the DDR does not need to repeat the writing because of the restart.
And then, the router can report the restarting reason in the DDR to the cloud platform (or called as a big data platform) so as to analyze and improve the router aiming at the restarting reason later and improve the working stability of the router.
However, the method for detecting the power-off restart of the router is only suitable for most of the long-time power-off situations, and for the short-time or instantaneous power-off situations, a situation of wrong determination of the restart cause may occur. Due to the influence of the DDR chip manufacturing process, hardware circuit design and other factors, after the router is powered off, the DDR in the router may not be powered off immediately, but may delay the power off, so that the data in the DDR may not be cleared immediately, that is, the data still exists in the DDR. When the router is restarted, the router detects that data still exists in the DDR, and then the fact that the restart reason is not the power-off restart is determined, and the restart reason is determined to be wrong is also caused, so that the record of the restart reason of the router is wrong, and the accuracy of subsequent stability analysis is affected.
Considering that data of a register stored in a System On Chip (SOC) is immediately emptied after power-off, in order to solve the problem that the DDR cannot immediately delete the stored data, the present application provides a method for determining a restart reason. In the method, a router acquires target data stored in a target register, wherein the target register comprises a configuration (config) register and/or a watchdog (watchdog) register, the target data in the configuration register is a register feature bit, and the target data in the watchdog register comprises a register flag bit. Then, the router judges whether the target data is a target value, and if the target data is the target value, the restart cause information of the router is determined as power-off restart information, wherein the target value is zero.
In the embodiment of the application, by utilizing the characteristic that the on-chip system of the router is immediately emptied of the register data after power failure, after restarting the router, whether the router is power failure restarting is judged according to the target data stored in the target register, so that the accuracy of restarting reason determination can be improved, a foundation is provided for the follow-up router to improve stability, and the use experience sense of the router is improved.
The SOC chip includes a central processing unit (central processing unit, CPU), a memory, peripheral circuits, and the like. The CPU is used as the operation and control core of computer system and is the final execution unit for information processing and program running. The CPU includes an operator, a controller, and a register. The operator is used for performing relevant logical operations. The controller is used for analyzing the received instruction and sending out a corresponding control signal according to the analysis result. The register is used for temporarily storing instructions, data and addresses. The registers may include, for example, config registers and/or watchdog registers as described above.
In one possible implementation, the router boot process includes five phases, a memory code (rom code) load phase, a first phase loader (first stage bootloader, FSBL), a second phase loader (second stage bootloader, SSBL), a kernel boot (kernel), and a user traffic run (user). Illustratively, as shown in FIG. 1, the ROM code phase is performed in a read-only memory (ROM), where the ROM operates in a non-destructive read-out manner, can read data but cannot write data, and the data is not lost once written to the memory even if power is turned off. The FSBL stage is executed in a static random-access memory (SRAM), wherein whether data exist in the SRAM can be used for determining whether a router is powered off and restarted, and if the router is not powered off, the data in the SRAM cannot be cleared; if the router has been powered down, the data stored in the SRAM may be cleared, i.e., the data stored in the SRAM is empty. The SSBL stage, the kernel stage, and the user stage are performed at DDR.
The rom code phase described above may include executing instructions (or called programs) in the rom code in the event of a reset of the SOC. The SOC reset refers to a reset operation of a system integrated on a chip (or referred to as a system on a chip). The reset operation can restore the modules included in the SOC to an initial state so as to solve the problems of abnormal operation or dead halt of the system on a chip. Thereafter, the SOC may initialize a basic clock, check CPU Information (ID), load and verify the FSBL code, and jump to FSBL phase execution. The basic clock is a reference clock signal in the computer system and is used for synchronizing the operation and data transmission of each hardware module in the system. The base clock determines the speed of operation of the system and plays an important role in the stability and performance of the system.
Wherein the CPU ID includes a CPU model, a CPU type, and the like. The CPU types may include a reduced instruction set (reduced instruction set computing, RISC) type and a complex instruction set (complex instruction set computer, CISC) type. The architecture of the RISC micro instruction set type CPU may be ARM architecture, MIPS architecture, or Power architecture. The CPU of ARM architecture is applied to mobile equipment (such as mobile phones, tablet computers and the like) and embedded equipment (such as routers, electric rice cookers, televisions and the like). The CPU of the MIPS architecture is applied to the embedded device. The CPU of the Power architecture is applied to the fields of high-performance computing, servers and embedded systems, such as game machines and the like. The architecture of the CISC micro instruction set type CPU may be an x86 architecture CPU. The x86 architecture CPU is used in personal computers and servers.
The instruction in the rom code is a program that is solidified inside the SOC, and is generally stored in a nonvolatile memory (nor flash) having a small space. The rom code supports a local execution (executed in place, XIP) feature, which means that the rom code can be directly executed in a nonvolatile memory without copying the rom code into the memory to run, thereby reducing the copying time and improving the execution efficiency.
The FSBL stage may include an SOC initialization SOC clock tree, which may be an advanced high-performance bus (AHB) clock on an advanced reduced instruction set machine (advanced RISC machine, ARM) architecture, a low-speed bus (advanced peripheral bus, APB) clock on an ARM architecture, or the like. Thereafter, the SOC may initialize the external DDR controller. Thereafter, the SOC may load SSBL code from a FLASH memory chip (FLASH) to the DDR and jump to SSBL phase execution.
The SSBL phase described above may include SOC initializing partial SOC peripherals such as data volatile memory, data nonvolatile memory, and the like. Then, the SOC may load the root file system from the FLASH and decompress the kernel to the target location of the DDR, where the target location is the first memory area included in the kernel management area in table 1 below. Thereafter, the SOC may jump to the kernel entry function to launch the kernel. The kernel is the core of the operating system and is used for controlling all contents in the system. In this embodiment, the kernel may be a linux kernel. In other embodiments, the kernel may be a real-time operating system (Real Time Operating System, RTOS) kernel or the like.
The kernel phase may include SOC initialization kernel resources, which may include schedulers, memory subsystems, file systems, network subsystems, inter-process communications (inter-process communication, IPC) utilized resources (e.g., pipes, shared memory, message queues, etc.), and protocol stacks, etc. Thereafter, the SOC may pull up an initialization (init) process. It can be understood that the kernel stage is mainly responsible for router resource management and allocation, and starting subsystems such as a scheduler, memory management, a file system, IPC, a protocol stack and the like, and provides a foundation for subsequent operation of each service of the router.
The user phase may include the SOC initiating a target business process, wherein, the target task process may include a dhcps process, a dns process, a dhcpc process, etc., and the target service may be a service providing a network access function. Therefore, the router can normally use the network service, and the normal operation of each service function of the router is ensured.
The electronic device in the embodiment of the application may be a router, which may be a home router, and may be generally connected to a device such as a mobile phone or a tablet computer. The electronic device in other embodiments may also be other embedded devices, for example, a device that cannot operate after power failure occurs in a refrigerator, a television, an electric cooker, etc., which may be simply understood to be a device without a battery. The following embodiments do not limit the specific form of the electronic device.
Take the example that the electronic device is a router. Fig. 2 shows a schematic structural diagram of the electronic device 100.
The electronic device 100 may include a processor 110, an antenna, a wireless communication module 160, at least one communication interface 150, an external memory 121, a universal serial bus (universal serial bus, USB) interface 130, keys 190, and indicators 192, among others.
It should be understood that the illustrated structure of the embodiment of the present invention does not constitute a specific limitation on the electronic device 100. In other embodiments of the present application, electronic device 100 may include more or fewer components than shown, or certain components may be combined, or certain components may be split, or different arrangements of components. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.
The processor 110 may include a CPU, a single-chip microcomputer, etc. having processing capabilities.
The processor may be a neural hub and a command center of the electronic device 100, among others. The processor can generate operation control signals according to the instruction operation codes and the time sequence signals to finish the control of instruction fetching and instruction execution.
A memory may also be provided in the processor 110 for storing instructions and data. In some embodiments, the memory in the processor 110 is a cache memory. The memory may hold instructions or data that the processor 110 has just used or recycled. If the processor 110 needs to reuse the instruction or data, it can be called directly from the memory. Repeated accesses are avoided and the latency of the processor 110 is reduced, thereby improving the efficiency of the system.
Wherein, optionally, the CPU is located on the SOC chip. The SOC chip may also include memory, peripheral circuits, and the like. The CPU includes an operator, a controller and a register. The operator is used for performing relevant logical operations. The controller is used for analyzing the received instruction and sending out a corresponding control signal according to the analysis result. The register is used for temporarily storing instructions, data and addresses.
The wireless communication function of the electronic device 100 may be implemented by an antenna, a wireless communication module 160, a modem processor, a baseband processor, and the like.
The antenna is used for transmitting and receiving electromagnetic wave signals. Each antenna in the electronic device 100 may be used to cover a single or multiple communication bands. Different antennas may also be multiplexed to improve the utilization of the antennas. For example: the antennas may be multiplexed into diversity antennas of a wireless local area network. In other embodiments, the antenna may be used in conjunction with a tuning switch.
The modem processor may include a modulator and a demodulator. The modulator is used for modulating the low-frequency baseband signal to be transmitted into a medium-high frequency signal. The demodulator is used for demodulating the received electromagnetic wave signal into a low-frequency baseband signal. The demodulator then transmits the demodulated low frequency baseband signal to the baseband processor for processing. The low frequency baseband signal is processed by the baseband processor and then transferred to the application processor. In some embodiments, the modem processor may be a stand-alone device. In other embodiments, the modem processor may be provided in the same device as the wireless communication module 160 or other functional module, independent of the processor 110.
The wireless communication module 160 may provide solutions for wireless communication including wireless local area network (wireless local area networks, WLAN) (e.g., WIFI (wireless fidelity) network), bluetooth (BT), global navigation satellite system (global navigation satellite system, GNSS), frequency modulation (frequency modulation, FM), near field wireless communication technology (near field communication, NFC), infrared technology (IR), etc. for application on the electronic device 100. The wireless communication module 160 may be one or more devices that integrate at least one communication processing module. The wireless communication module 160 receives electromagnetic waves via an antenna, modulates the electromagnetic wave signals, filters the electromagnetic wave signals, and transmits the processed signals to the processor 110. The wireless communication module 160 may also receive a signal to be transmitted from the processor 110, frequency modulate it, amplify it, and convert it to electromagnetic waves for radiation via an antenna. In some embodiments, at least some of the functional modules of the wireless communication module 160 may be disposed in the processor 110.
In some embodiments, the antenna of the electronic device 100 and the wireless communication module 160 are coupled such that the electronic device 100 may communicate with a network and other devices through wireless communication techniques. The wireless communication techniques may include the Global System for Mobile communications (global system for mobile communications, GSM), general packet radio service (general packet radio service, GPRS), code division multiple access (code division multiple access, CDMA), wideband code division multiple access (wideband code division multiple access, WCDMA), time division code division multiple access (time-division code division multiple access, TD-SCDMA), long term evolution (long term evolution, LTE), BT, GNSS, WLAN, NFC, FM, and/or IR techniques, among others. The GNSS may include a global satellite positioning system (global positioning system, GPS), a global navigation satellite system (global navigation satellite system, GLONASS), a beidou satellite navigation system (beidou navigation satellite system, BDS), a quasi zenith satellite system (quasi-zenith satellite system, QZSS) and/or a satellite based augmentation system (satellite based augmentation systems, SBAS).
The communication interface 150 uses any transceiver-like device for communicating with other devices.
The USB interface 130 is an interface conforming to the USB standard specification, and may specifically be a Mini USB interface, a Micro USB interface, a USB Type C interface, or the like. The USB interface 130 may be used to connect a charger to charge the electronic device 100, and may also be used to transfer data between the electronic device 100 and a peripheral device.
It should be understood that the interfacing relationship between the modules illustrated in the embodiments of the present invention is only illustrative, and is not meant to limit the structure of the electronic device 100. In other embodiments of the present application, the electronic device 100 may also use different interfacing manners, or a combination of multiple interfacing manners in the foregoing embodiments.
External memory 121 may be used to store computer-executable program code that includes instructions. The processor 110 executes various functional applications of the electronic device 100 and data processing by executing instructions stored in the external memory 121. The external memory 121 may include a storage program area and a storage data area. The storage program area may store an operating system, an application program required for at least one function, and the like. The storage data area may store data created during use of the electronic device 100 (e.g., audio data, etc.), and so on. In addition, the external memory 121 may include a high-speed random access memory, and may further include a nonvolatile memory such as at least one magnetic disk storage device, a flash memory device, a universal flash memory (universal flash storage, UFS), and the like.
In some embodiments, the external memory 121 may include ROM memory, SRAM memory, DDR memory, etc.
The keys 190 include a start key, a function key, and the like. The keys 190 may be mechanical keys. Or may be a touch key. The electronic device 100 may receive key inputs, generating key signal inputs related to user settings and function controls of the electronic device 100.
Take the example that the electronic device is a router. Fig. 3 shows a schematic diagram of an application scenario. As shown in fig. 3, a Router (Router) may serve as a connection link between a terminal device and the internet, and may forward data (e.g., data streams) between the terminal device and the internet. The router may be connected to the terminal device by a wired connection or a wireless connection, and after the router is connected to the terminal device, the terminal device may access the WIFI signal of the router to implement a network function (such as playing an online video, playing a network game, etc.). It should be noted that, the router and the terminal device in the scenario shown in fig. 3, and the number of the terminal devices are only examples, which are not limited in this application.
The terminal device may be a mobile phone, a smart watch, a smart bracelet, a tablet computer, a desktop computer, a laptop computer, a smart refrigerator, a smart television, a printer, etc., and the embodiment of the present application does not limit the specific type of the electronic device.
The embodiment of the application provides a method for determining a restart reason, which can be applied to electronic equipment. Taking the above electronic device as a router as an example, as shown in fig. 4, the method for determining the restart reason may include S401-S406.
S401, after turning on the power or receiving the restart command, the router restarts.
Under the condition, the router can stop working immediately after no external power supply is used for providing power. For example, the power source connected to the router cannot provide power, or the router is not connected to the power source, and the router may stop working. After the router is connected with an external power supply, the router can continuously use the electric energy of the power supply to finish the work of starting up and restarting.
In another case, the router may restart after receiving the restart command. For example, when the router is in an on state, the user may turn off the router by pressing a power button on the router, and the router stops working to perform shutdown in response to a turn-off command. After that, after the router is powered off, the user may continue to press a power button on the router to turn on the router, which restarts in response to the turn-on command (or referred to as a restart command). Alternatively, the user may send a restart command to the router through other devices (e.g., a mobile phone, a computer), and the router may restart in response to the restart command after receiving the restart command.
S402, during the restarting period, the router acquires a restarting reason value. The restart reason value is used for indicating the reason why the router is restarted at this time.
In some embodiments, during a router restart, the router may obtain the restart reason value (or referred to as initial restart reason information) in the SSBL phase. It will be appreciated that if the router does not restart due to a power outage, the router will record the corresponding restart cause before performing the shutdown. For example, the restart may be caused by a hardware problem, such as a power supply, a processor, etc., a software problem, such as a software update, etc., or an excessive network load, such as a situation that a router crashes due to processing excessive network traffic. It should be noted that, for the power-off restart reason, the router can only determine according to the target data in the target register, and cannot determine before the router restarts.
It should be noted that, because the service logic in the SSBL stage can be changed, the target data corresponding to the target register is read in the SSBL stage, so that the restart cause of the router can be determined by using the target data, instead of determining the restart cause of the router by determining whether the data in the DDR specific location is empty in the original manner, thereby improving the accuracy of determining the restart cause.
In some embodiments, the router may store the restart cause value into a target memory area of the storage device. The target memory area is configured to store a restart reason value, where the restart reason value indicates a identifier corresponding to the restart reason, and the identifier indicates a corresponding restart reason.
For example, referring to table 1, a 128M DDR is illustrated as an initial address of 0x8000000, which may include a core management area, a boot parameter area, a log memory area, and a target memory area.
The address range of the kernel management area comprises 0x 00000000-0 x7EE1000, and the kernel management area comprises a first memory area and a second memory area. The first memory area is the memory occupied (or called used) by the kernel mirror image itself, and the address range of the first memory area comprises 0x00000000 to 0x6F9A00. The second memory area is a memory managed after the kernel is started, and is mainly provided for the kernel and each service module.
The address range of the starting parameter area comprises 0x7E 01000-0 x100000, and the starting parameter area is mainly used for storing the starting parameter address of the kernel and the partition table of the file system. A file system is a system for organizing and allocating space of a memory device, taking charge of storing files, protecting and retrieving stored files, and is used for defining a method and a data structure of files on the memory device (such as a disk) or a partition. Partition table refers to the division of data in a table into multiple small subsets by category, which may include range, list, and hash (hash) partitions, based on internal attributes primarily based on the partition table.
The address range of the log memory area comprises 0x7F 01000-0 xFC000, and the log memory area is a log system memory area based on memory and is mainly used for storing logs recorded in the running process of a system, a kernel and an upper business module so that other equipment can be used for checking and positioning problems caused by the running of a router or the running of the business module through the analysis of the logs in the log memory area.
The address range of the target memory area includes 0x7FFD 000-0 x3000, and the target memory area is used for storing the restart reason value.
TABLE 1
In this embodiment, a target memory area is separately divided in the DDR to store the restart cause value, so that the complete operation of the restart cause correction function can be ensured, and the accuracy of determining the restart cause is improved.
In some embodiments, after the router is restarted, the router may directly obtain the corresponding restart reason value from the target memory area, so that it is convenient to modify the restart reason value later.
In other embodiments, the router may acquire the restart reason value after performing step S403 described below. That is, the router may acquire a restart reason value and modify the restart reason value to be a power-off restart if it is determined that the target data meets the preset condition.
S403, the router reads the target data corresponding to the target register. Wherein the target registers include config registers and/or watchdog registers. The target data corresponding to the target register is used for verifying whether the current restart reason is a power-off restart.
Specifically, after the router acquires the restart cause value, the router may read the target data corresponding to the target register (or referred to as the data located in the target register) at the SSBL stage in the router start-up flow. The target register may include a config register and/or a watchdog register, where target data corresponding to the config register (or referred to as data located in the config register) is a register feature bit (or referred to as a first flag bit), and target data corresponding to the watchdog register (or referred to as data located in the watchdog register) is a register flag bit (or referred to as a second flag bit).
For example, if the target register is a config register, the target data corresponding to the target register is a register feature bit; if the target register is a watchdog register, the target data corresponding to the target register is a register flag bit; if the target register includes a config register and a watchdog register, the target data corresponding to the target register may include a register feature bit corresponding to the config register and a register flag bit corresponding to the watchdog register.
In some embodiments, registers on different SOC chips may be different due to the different SOC chips designed by different SOC vendors, and thus the registers on the SOC chips may be the watchdog registers, i.e., the target registers may be the watchdog registers. The router operation state can be detected in real time according to the data stored in the watchdog register, that is, the router can determine the router operation state according to the target data corresponding to the target register. Correspondingly, the target data corresponding to the target register may include a register flag bit and a counter value, so that the router may determine a restart reason of the router by using the register flag bit and the counter value.
Illustratively, after the core start-up phase described above, the router may start the SOC's watchdog counter and initially configure the value of the watchdog counter, e.g., configure the value of the watchdog counter to 0xFFF. Then, during the operation of the router, the watchdog counter is decremented according to a preset time (for example, 1 s), that is, each time the router operates for 1s, the value of the watchdog counter is decremented by 1, and if the value of the watchdog counter is decremented to 0, it is indicated that the router is in an abnormal state for a long time (for example, a condition such as a stuck state occurs), that is, the SOC stops working due to the occurrence of an abnormality, so that the SOC can generate a reset signal, and reset the value of the watchdog counter according to the reset signal, so as to restart the SOC, that is, restart the router. That is, if the value of the watchdog counter is not 0, it indicates that the router is operating normally, so that the router does not need to be restarted, that is, the SOC does not generate a reset signal.
After that, the SOC may set the register flag bit corresponding to the watchdog register, that is, set the register flag bit to 1. The register flag bit of 1 indicates that the router has been restarted by the watchdog, i.e., the router has been restarted without power-off. After that, after the router enters the SSBL phase, the router can read the register flag bit. It should be appreciated that a value of 0 for the watchdog counter indicates that the SOC has restarted, i.e., the router has restarted. Since the data in the patchdog register will be cleared immediately after the router is powered down, i.e., the register flag bit is not set to 1, i.e., the register flag bit is 0. If the restart is not caused by power-off, such as a soft restart (e.g. a patchdog restart), the register flag bit read by the router is still 1 because the SOC will set the register flag bit to 1 before the power-off restart is performed.
In other embodiments, since the processor architectures corresponding to different routers may be different, the processor architectures may include Reduced Instruction Set (RISC) processor architectures such as MIPS architecture and ARM architecture, and the registers corresponding to different processor architectures may be different, the registers on the SOC chip may also be config registers, that is, the target registers may be config registers. The config register is a register that is not modified by basic configuration information after the initialization configuration of the boot software is completed, where the basic configuration information may include a value corresponding to the configuration of the config register, for example, the last 4 bits in the config register indicate a location where a start-up file that must be used by the router at the time of start-up.
Illustratively, taking the SOC of the MIPS architecture as an example, the config register included in the CP0 coprocessor may be configured by the router to initialize the register feature bit to 1 through the boot software after the SSBL phase. Then, during the router operation, the value corresponding to the characteristic bit of the register remains unchanged. Thereafter, if the router is powered down, the data in the config register is cleared, so that the register feature bit is empty, i.e., becomes 0. Then, in the SSBL phase of router startup, the boot software can read the register feature bit corresponding to the config register.
Note that, if the processor architecture is the MIPS architecture, after the SOC is started, the registers (such as the config registers), the ROM, and the random access memory (random access memory, RAM) addresses in the SOC are mapped into the 0xA0000000-0xC0000000 address space, and the CPU does not need to be mapped by the memory management unit (memory management unit, MMU) when accessing the addresses in the space. Thereafter, in the SSBL phase described above, the router can directly access the address in the space and read and store the corresponding data. It is understood that the MMU is a hardware component in the router that manages memory access and allocation. It is responsible for converting virtual memory addresses to physical memory addresses and providing memory protection and entitlement control.
For example, referring to FIG. 5, the address space of the MIPS architecture may include at least one of four regions kuseg, ksseg 0, ksseg 1, and ksseg 2. Different regions are used for memory mapping of different types of data.
Wherein the kuseg area is an area available for user state, and is used for mapping codes and data of user processes. For example, the virtual address range of the region may include 0x00000000 to 0x7fffffff, and the size may be 2GB. The kuseg region may be accessed with the MMU turned on.
The kseg0 region is a non-mapped cached region (unmapped), and the kseg0 region is used to translate the virtual address of the region into a physical address. The physical address to which the virtual address of the region maps is used to store code and data. For example, the virtual address range of the area may include 0x80000000 to 0x9fffffff, and the size may be 512MB. Whether or not the MMU is on, the region may be accessed.
The Kseg1 region is a non-mapped non-cache region (unmapped uncached), the Kseg1 region is used for mapping physical addresses, and the physical addresses mapped by the Kseg1 region are the same as those mapped by the Kseg0 region, and only virtual addresses are different. For example, the virtual address range of the region may include 0xA0000000 to 0 xbfffffffff, and the size may be 512MB. Whether or not the MMU is on, the region may be accessed.
The Kseg2 region is a mapped region (mapped), and the Kseg2 region is used to map code and data of a core process. For example, the virtual address range of the region may include 0xC0000000 to 0 xffffffffff, and the size may be 1GB. The Kseg2 region may be accessed with the MMU turned on.
In another example, the processor architecture is an ARM architecture, and accordingly, in the SSBL stage, the router may disable MMU mapping first. After that, the CPU can directly access the register address to acquire the target data corresponding to the register, so that the condition of restarting the router caused by CPU access errors can be avoided and the probability of restarting the router is reduced by prohibiting MMU mapping.
Optionally, as shown in fig. 6, the ARM architecture is divided into four layers, namely a hardware layer, a driving layer, a kernel layer and a service layer. The hardware layers may include, among other things, SOC, FLASH, DDR, KEY (KEY), and port physical layer (port physical layer, PHY). The port physical layer is a chip externally connected with a signal interface, namely, a data frame (frame) of the Ethernet can be sent and received through the port physical layer.
The driver layer may include FLASH, interrupt controllers (generic interrupt controller, GICs), watchdog, universal asynchronous receiver transmitter (universal asynchronous receiver/transmitter, UART), PHY, KEY, indicator Lights (LEDs), memory devices, peripheral device high speed connection standards (peripheral component interconnect express, PCIe), integrated circuit buses (inter-integrated circuit, IIC), and serial peripheral device interfaces (Serial Peripheral Interface, SPI).
The kernel layer may include a file system, a memory management module, a protocol stack, and a scheduler.
The traffic layer may include log (log) processes, special processes, dns processes, dhcpc processes, and dhcps processes. The log process is a system log recording process and is responsible for recording various events, errors and warning information when the system runs.
The special process is a process responsible for reading and modifying the restart cause value.
The dns process is the process responsible for domain name resolution. It converts the domain name provided by the user into a corresponding IP address.
The dhcpc process is a DHCP client process. DHCP is a network protocol that enables devices to connect to a network without manual configuration by automatically assigning parameters such as IP addresses, subnet masks, gateways, etc. The dhcpc process is responsible for communicating with the DHCP server, acquiring and configuring network parameters.
The DHCPs process is a DHCP server process. The DHCP server is responsible for providing the device with network configuration information such as IP addresses, subnet masks, gateways, etc. The DHCPs process listens for DHCP requests in the network and assigns appropriate network parameters to the requesting party according to the configuration rules.
It should be noted that, for an SOC of the ARM architecture, the SOC may directly access the physical memory address before turning on the MMU. However, after turning on the MMU, the SOC needs to establish a mapping between the physical memory address and the virtual memory address to access the corresponding physical memory address through the virtual memory address.
In some embodiments, the router divides the target memory area in the driver layer according to the restart cause value, and creates a memory device driver for the target memory area to provide a memory read-write interface for the target memory area. Thereafter, upon router startup, the SOC in the router may register the memory device driver. After the special process is started, the router can open the memory device driving file and call the read-write interface to read and modify the restart reason value from the target memory area. After the special process reads the restart cause value, an upload restart event may be triggered, so that the log process collects a restart log corresponding to the restart event, where the restart log is stored in the log memory area in table 1. The router may then upload the restart log and the restart cause value to a cloud platform (or referred to as a big data platform) in order to analyze the stability of the router later.
S404, the router judges whether the target data is a target value.
Illustratively, in the case where the target data is the target value, indicating that the current restart is a power-off restart, the router may perform S405. In the case where the target data is not the target value, indicating that the current restart is not a power-off restart, the router may execute S406.
In some embodiments, the target register is a config register. Accordingly, the target data is a register feature bit and the target value is a first target value (e.g., 0). If the register feature bit is set, that is, if the register feature bit is 1, which indicates that the data in the config register is not cleared, the router may determine that the target data is not the first target value, and thus may determine that the current restart cause of the router is a soft restart, and not a power-off restart, that is, the restart cause value is not required to be modified. If the register feature bit is reset, that is, if the register feature bit is 0, which indicates that the data in the config register is cleared, the router may determine that the target data is the first target value, and therefore, it may determine that the restart cause information of the router is power-off restart information, that is, the restart cause value needs to be modified to an identifier corresponding to the power-off restart cause, that is, the router may update the initial restart cause information to the restart cause information if the initial restart cause information is different from the restart cause information.
In other embodiments, the target register is a watchdog register. Accordingly, the target data is a register flag bit and the target value is a first target value (e.g., 0). If the register flag bit is reset, that is, the register flag bit is 0, which indicates that the data in the watchdog register is cleared, the router can determine that the target data is the first target value, so that it can determine that the restart reason of the router is a power-off restart, that is, the restart reason value needs to be modified into an identifier corresponding to the power-off restart reason. If the register flag bit is set, that is, the register flag bit is 1, which indicates that the data in the watchdog register is not cleared, the router may determine that the target data is not the first target value, and thus may determine that the restart reason of the router is a soft restart (e.g., a watchdog restart), and the restart is not powered off, that is, the restart reason value is not modified.
In other embodiments, the target registers are config registers and watchdog registers. Correspondingly, the target data comprises a register feature bit corresponding to a config register and a register flag bit corresponding to a watchdog register, and the target value is a first target value (e.g. 0). If the register feature bit corresponding to the config register is 0 and/or the register flag bit corresponding to the watchdog register is 0, which indicates that any target data corresponding to any target register exists in the router and is emptied, the router can determine that the target data is the first target value, so that it can determine that the restart reason of the router is a power-off restart, that is, the restart reason value needs to be modified into an identifier corresponding to the power-off restart reason. If the register feature bit corresponding to the config register is 1 and the register flag bit corresponding to the watchdog register is 1, which indicates that the data in the config register and the watchdog register are not cleared, the router can determine that the target data is not the first target value, so that it can determine that the restart reason of the router is not power-off restart, that is, the restart reason value is not required to be modified.
And S405, the router modifies the restart reason value into an identifier corresponding to the power-off restart.
Specifically, after determining that the target data is the target value, it indicates that the restart cause value recorded in the router is erroneous, and therefore, the router may modify the restart cause value to an identifier (or referred to as power-off restart information) corresponding to the power-off restart cause, that is, determine the restart cause information as power-off restart information. Then, the router may update the initial restart cause information to restart cause information when the restart cause information is different from the initial restart cause information.
It should be noted that, if the router (e.g., the target memory area in the router) does not have the restart cause value, that is, the restart cause value is null, the identifier corresponding to the power-off restart may be directly written into the target memory area, instead of modifying the original restart cause value in the target memory area to the power-off restart value, that is, the identifier corresponding to the power-off restart.
S406, the router does not modify the restart reason value.
Specifically, after determining that the target data is not the target value, it indicates that the restart cause value recorded in the router is correct, and the router does not need to modify the restart cause value, that is, does not need to modify the restart cause.
In some embodiments, after the router is restarted, the SOC in the router may determine, according to the target data corresponding to the target register, whether the restart reason is a power-off restart, so as to modify the restart reason in time when the restart reason is the power-off restart. The process of reading and modifying the restart cause value of the SOC in the router will be described in detail with reference to the configuration shown in fig. 2 and the determination flow of the restart cause shown in fig. 7.
S701, in response to turning on the power or receiving a restart command, the SOC in the router starts.
S702, after entering an SSBL stage, the SOC reads a restart reason value from a target memory area of the DDR.
S703, the SOC reads the target data corresponding to the target register.
S704, if the target data is the target value, the SOC modifies the restart cause value to the identifier corresponding to the power-off restart if the restart cause value is not the identifier corresponding to the power-off restart.
In some embodiments, where the target register is a config register, the target data is a register feature bit and the target value is a first target value (e.g., 0). If the register feature bit is 0, it indicates that the router has been powered down and restarted, so the SOC may modify the restart cause value to an identifier corresponding to the power down restart. If the register feature bit is 1, it indicates that the router has not been restarted by power failure, so the SOC does not need to modify the restart cause value.
In other embodiments, where the target register is a watchdog register, the target data is a register flag bit and the target value is a first target value (e.g., 0). If the flag bit of the watchdog register is 0, it indicates that the router is powered off and restarted, so the SOC may modify the restart cause value to an identifier corresponding to the powered off restart. If the flag bit of the watchdog register is 1, the router is not restarted after power failure, so that the SOC does not need to modify the restart reason value.
In other embodiments, where the target register includes a config register and a watchdog register, the target data includes a register feature bit corresponding to the config register and a register flag bit corresponding to the watchdog register, and the target value is a first target value (e.g., 0). If the register feature bit corresponding to the config register is 0 and/or the register flag bit corresponding to the patchdog register is 0, it indicates that the router is powered off and restarted, so the SOC may modify the restart cause value into an identifier corresponding to the powered off and restarted. If the register feature bit corresponding to the config register is 1 and the register flag bit corresponding to the watchdog register is 1, it is indicated that the router is not powered off and restarted, so that the SOC does not need to modify the restart cause value.
S705, the SOC performs initialization configuration on the target data.
In some embodiments, if the target register is a config register, after the SSBL phase, the boot software corresponding to the SOC may configure the register feature bit to be 1, that is, set the register feature bit, so that the router may determine the restart reason of the router according to the register feature when the router performs the next restart. If the target register is a watchdog register, after the kernel start phase, the SOC may start the watchdog counter and perform an initialization configuration on the value of the watchdog counter. Thereafter, in the case where the value of the watchdog counter is decremented to zero, the SOC configures the watchdog register flag initialization to 1, that is, sets the watchdog register flag.
The execution order of the process of determining the restart cause value and the process of initializing the configuration target data is not limited, for example, the SOC may execute the step of S704 first and then execute the step of S705, or the SOC may execute the step of S705 first and then execute the step of S704, or the SOC may execute the steps of S704 and S705 simultaneously.
S706, after entering a user stage, the SOC uploads the restart reason value to the cloud platform.
And S707, the cloud platform can analyze the restarting reason of the router according to the restarting reason value to obtain an analysis result.
The analysis result is used for representing the running stability of the router, so that the stability of the router is improved according to the analysis result, and the use experience of a user is improved.
In some embodiments, the present application provides a computer storage medium comprising computer instructions that, when run on an electronic device, cause the electronic device to perform a method of determining a cause of restart as described above.
In some embodiments, the present application provides a computer program product which, when run on an electronic device, causes the electronic device to perform the method of determining a cause of restart as described above.
It will be apparent to those skilled in the art from this description that, for convenience and brevity of description, only the above-described division of the functional modules is illustrated, and in practical application, the above-described functional allocation may be performed by different functional modules according to needs, i.e. the internal structure of the apparatus is divided into different functional modules to perform all or part of the functions described above.
In the several embodiments provided in this application, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative, e.g., the division of the modules or units is merely a logical functional division, and there may be additional divisions when actually implemented, e.g., multiple units or components may be combined or integrated into another apparatus, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and the parts displayed as units may be one physical unit or a plurality of physical units, may be located in one place, or may be distributed in a plurality of different places. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in each embodiment of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.
The integrated units, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a readable storage medium. Based on such understanding, the technical solution of the embodiments of the present application may be essentially or a part contributing to the prior art or all or part of the technical solution may be embodied in the form of a software product stored in a storage medium, including several instructions for causing a device (may be a single-chip microcomputer, a chip or the like) or a processor (processor) to perform all or part of the steps of the methods described in the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read Only Memory (ROM), a random access memory (random access memory, RAM), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
The foregoing is merely a specific embodiment of the present application, but the scope of the present application is not limited thereto, and any changes or substitutions within the technical scope of the present disclosure should be covered in the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (10)

1. A method for determining a cause of a restart, comprising:
during restarting of the electronic equipment, the electronic equipment reads target data corresponding to a target register; the method comprises the steps that data in a target register are emptied when the electronic equipment is powered off, and target data corresponding to the target register are used for verifying whether the current restart is a power-off restart or not;
and under the condition that the target data is zero, the electronic equipment determines that the restart reason information is power-off restart information.
2. The method of claim 1, wherein the electronic device is a router, the destination register is a configuration config register, and the destination data corresponding to the config register includes a first flag bit.
3. The method of claim 1, wherein the target register is a config register, and the target data corresponding to the config register includes a first flag bit; the method further comprises the steps of:
and under the condition that the first flag bit is 1, the restart reason information of the electronic equipment is soft restart information.
4. The method of claim 1, wherein the target register is a watchdog latch register, and the target data corresponding to the watchdog register includes a second flag bit.
5. The method of claim 1, wherein the target register is a watchdog register, and the target data corresponding to the watchdog register includes a second flag bit;
the method further comprises the steps of:
and under the condition that the second flag bit is 1, the restart reason information of the electronic equipment is soft restart information.
6. The method according to claim 4 or 5, wherein after the electronic device reads the target data corresponding to the target register, the method further comprises:
initializing and configuring a watchdog counter value corresponding to the watchdog register by the electronic equipment; the watchdog counter value is used for indicating whether the router needs to be restarted or not;
the electronic equipment decrements the value of the watchdog counter according to preset time;
and restarting the electronic equipment under the condition that the value of the watchdog counter is reduced to zero.
7. The method according to any one of claims 1-6, further comprising:
the electronic equipment uploads the restarting reason information to a cloud platform; the cloud platform is used for analyzing the restarting reason information and determining an operation stability result of the electronic equipment.
8. The method according to any one of claims 1-7, wherein the restart cause value is stored in a target memory area of a double data rate synchronous dynamic random access memory DDR;
the method further comprises the steps of:
after entering a second stage loader SSBL stage in the starting process of the electronic equipment, the electronic equipment reads initial restarting reason information from the target memory area;
after the electronic device determines that the restart reason information is power-off restart information, the method further includes:
and the electronic equipment updates the initial restart reason information into the restart reason information when the initial restart reason information is different from the restart reason information.
9. An electronic device comprising a register, a memory, and one or more processors; the register, the memory, and the processor are coupled; the register is used for temporarily storing instructions, data and addresses, and the memory is used for storing computer program codes, and the computer program codes comprise computer instructions; the computer instructions, when executed by the processor, cause the electronic device to perform the method of any one of claims 1 to 8.
10. A computer readable storage medium comprising computer instructions which, when run on an electronic device, cause the electronic device to perform the method of any one of claims 1 to 8.
CN202310974184.0A 2023-08-02 2023-08-02 Method for determining restart reason and electronic equipment Pending CN117729092A (en)

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