CN117728775B

CN117728775B - Low-noise transconductance amplifier, chip and Internet of things equipment

Info

Publication number: CN117728775B
Application number: CN202410174447.4A
Authority: CN
Inventors: 隋超; 杨辉; 敬军; 周长军; 赵林
Original assignee: Shenzhen Jiangtai Technology Co ltd
Current assignee: Shenzhen Jiangtai Technology Co ltd
Priority date: 2024-02-07
Filing date: 2024-02-07
Publication date: 2024-05-07
Anticipated expiration: 2044-02-07
Also published as: CN117728775A

Abstract

The application relates to the field of chip circuits of the Internet of things, and particularly discloses a low-noise transconductance amplifier, a chip and Internet of things equipment, wherein the low-noise transconductance amplifier comprises: the first input matching circuit, the second input matching circuit, the first core amplifying circuit, the second core amplifying circuit, the voltage stabilizing circuit, the reference voltage, the first filter circuit and the second filter circuit; the first core amplifying circuit and the second core amplifying circuit are used for converting radio frequency voltage into current signals and amplifying the current signals to obtain two paths of differential currents; the first filter circuit and the second filter circuit are used for carrying out filter processing on the two paths of differential currents and obtaining a common-mode voltage; and the voltage stabilizing circuit is used for comparing the common-mode voltage with the reference voltage, taking the error of the reference voltage and the common-mode voltage as the regulating voltage, and sending back to the first core amplifying circuit and the second core amplifying circuit so that the first core amplifying circuit and the second core amplifying circuit output stable two paths of differential currents.

Description

Low-noise transconductance amplifier, chip and Internet of things equipment

Technical Field

The invention relates to the field of chip circuits of the Internet of things, in particular to a low-noise transconductance amplifier, a chip and Internet of things equipment.

Background

With the rapid development of the wireless communication field, the application of wireless communication in the internet of things equipment has become more and more widespread, and the demand for the stabilization of communication signals of wireless communication has also increased gradually.

When a chip of the internet of things equipment receives an input signal, a low-noise transconductance amplifier (low noise transconductance amplifier, LNTA) is needed to convert the voltage in the input signal into the current, and then signal frequency conversion, filtering and analog-to-digital conversion are carried out on the converted current, so that the output signal is converted into a digital signal with a specific frequency for the internet of things equipment to receive.

After the low-noise transconductance amplifier converts the voltage in the input signal into the current, the two paths of output differential currents are combined into a common-mode voltage after being propagated along with the circuit, and the stability of converting the voltage in the input signal into the current by the low-noise transconductance amplifier is poor due to the unstable formed common-mode voltage.

Disclosure of Invention

In order to solve the above problems in the prior art, the embodiment of the application provides a low-noise transconductance amplifier, which solves the problem of poor stability of converting the voltage quantity in an input signal into the current quantity.

In a first aspect, an embodiment of the present application provides a low noise transconductance amplifier, including:

the first input matching circuit, the second input matching circuit, the first core amplifying circuit, the second core amplifying circuit, the voltage stabilizing circuit, the reference voltage, the first filter circuit and the second filter circuit;

Wherein,

The first end of the first input matching circuit is used as the positive voltage input end of the low-noise transconductance amplifier, and the second end of the first input matching circuit is connected with the first end of the first core amplifying circuit;

The second end of the first core amplifying circuit is connected with the first end of the voltage stabilizing circuit, and the third end of the first core amplifying circuit is used as the positive current output end of the low-noise transconductance amplifier and is connected with the first end of the first filter circuit;

The first end of the second input matching circuit is used as the negative voltage input end of the low-noise transconductance amplifier, and the second end of the second input matching circuit is connected with the first end of the second core amplifying circuit;

The second end of the second core amplifying circuit is connected with the first end of the voltage stabilizing circuit, and the third end of the second core amplifying circuit is used as the negative current output end of the low-noise transconductance amplifier and is connected with the first end of the second filter circuit;

the second end of the voltage stabilizing circuit is connected with the second end of the first filter circuit and the second end of the second filter circuit, and the third end of the voltage stabilizing circuit is connected with the reference voltage;

The first input matching circuit and the second input matching circuit are used for carrying out impedance matching on the input radio frequency voltage so as to reduce the power loss generated by the transmission of the radio frequency voltage in the circuit;

The first core amplifying circuit and the second core amplifying circuit are used for converting the radio frequency voltage into a current signal and amplifying the current signal to obtain two paths of differential currents;

The first filter circuit and the second filter circuit are used for carrying out filter processing on the two paths of differential currents and obtaining a common-mode voltage at the joint of the first filter circuit and the second filter circuit;

The voltage stabilizing circuit is used for comparing the common mode voltage with the reference voltage, and sending the error of the reference voltage and the common mode voltage back to the first core amplifying circuit and the second core amplifying circuit as a regulating voltage so that the first core amplifying circuit and the second core amplifying circuit output stable two paths of differential currents.

In a possible embodiment, the voltage stabilizing circuit includes:

An operational amplifier;

Wherein,

The output end of the operational amplifier is used as a first end of the voltage stabilizing circuit, is connected with the second end of the first core amplifying circuit and is connected with the second end of the second core amplifying circuit, the in-phase input end of the operational amplifier is used as a second end of the voltage stabilizing circuit, is connected with the second end of the first filter circuit and is connected with the second end of the second filter circuit, and the inverting input end of the operational amplifier is used as a third end of the voltage stabilizing circuit and is connected with the reference voltage;

The operational amplifier is used for comparing the common-mode voltage input by the non-inverting input end with the reference voltage of the inverting input end, if the common-mode voltage is not equal to the reference voltage, the operational amplifier takes the error of the common-mode voltage and the reference voltage as the regulating voltage, and sends the regulating voltage back to the first core amplifying circuit and the second core amplifying circuit, otherwise, the regulating voltage output by the operational amplifier is 0.

In a possible embodiment, the first core amplifying circuit includes:

The first and second capacitors are connected with the first and second capacitors respectively;

Wherein,

The first end of the first linear compensation circuit is used as the first end of the first core amplifying circuit to be connected with the second end of the first input matching circuit, and the second end of the first linear compensation circuit is used as the third end of the first core amplifying circuit to be connected with the first end of the first filter circuit;

one end of the first resistor is connected with the grid electrode of the first field effect transistor, and the other end of the first resistor is used as the second end of the first core amplifying circuit to be connected with the first end of the voltage stabilizing circuit and connected with the first constant voltage;

One end of the first capacitor is connected with the first end of the first linear compensation circuit, and the other end of the first capacitor is connected with the grid electrode of the first field effect transistor;

The source electrode of the first field effect tube is connected with an input power supply, and the drain electrode of the first field effect tube is connected with the second end of the first linear compensation circuit;

one end of the second resistor is connected with the grid electrode of the second field effect transistor, and the other end of the second resistor is used as the second end of the first core amplifying circuit to be connected with the first end of the voltage stabilizing circuit and connected with the second constant voltage;

one end of the second capacitor is connected with the first end of the first linear compensation circuit, and the other end of the second capacitor is connected with the grid electrode of the second field effect transistor;

The drain electrode of the second field effect tube is connected with the second end of the first linear compensation circuit, and the source electrode of the second field effect tube is grounded;

The first linear compensation circuit is used for compensating the current signals amplified by the first field effect transistor and the second field effect transistor so as to improve the linearity of one path of differential current output by the first core amplifying circuit;

when the low-noise transconductance amplifier works, the regulating voltage output by the voltage stabilizing circuit is respectively overlapped with the first constant voltage and the second constant voltage, so that the conduction of the first field effect transistor and the second field effect transistor is respectively controlled through the overlapped voltage of the regulating voltage and the first constant voltage and the overlapped voltage of the regulating voltage and the second constant voltage, and one path of differential current output by the first core amplifying circuit is regulated.

In a possible embodiment, the first linear compensation circuit includes:

the third field effect transistor, the fourth field effect transistor, the third resistor, the fourth resistor, the fifth resistor, the third capacitor, the fourth capacitor, the first reference voltage and the second reference voltage;

Wherein,

One end of the third resistor is used as a first end of the first linear compensation circuit to be connected with the second end of the first input matching circuit, and the other end of the third resistor is connected with the source electrode of the third field effect transistor and the source electrode of the fourth field effect transistor;

One end of the fourth resistor is connected with the grid electrode of the third field effect transistor, and the other end of the fourth resistor is connected with the first reference voltage;

one end of the fifth resistor is connected with the grid electrode of the fourth field effect transistor, and the other end of the fifth resistor is connected with the second reference voltage;

One end of the third capacitor is connected with the grid electrode of the third field effect transistor, and the other end of the third capacitor is used as the second end of the first linear compensation circuit and is connected with the first end of the first filter circuit;

One end of the fourth capacitor is connected with the grid electrode of the fourth field effect transistor, and the other end of the fourth capacitor is used as the second end of the first linear compensation circuit and is connected with the first end of the first filter circuit;

The drain electrode of the third field effect transistor is connected with an input power supply;

The drain electrode of the fourth field effect transistor is grounded;

the third field effect transistor and the fourth field effect transistor are used for performing linear compensation on the current signals amplified by the first field effect transistor and the second field effect transistor.

In a possible embodiment, the second core amplifying circuit includes:

A fifth field effect transistor, a sixth resistor, a seventh resistor, a fifth capacitor, a sixth capacitor, a second linear compensation circuit, a third constant voltage and a fourth constant voltage;

Wherein,

The first end of the second linear compensation circuit is used as the first end of the second core amplifying circuit to be connected with the second end of the second input matching circuit, and the second end of the second linear compensation circuit is used as the third end of the second core amplifying circuit to be connected with the first end of the second filter circuit;

one end of the sixth resistor is connected with the grid electrode of the fifth field effect transistor, and the other end of the sixth resistor is used as the second end of the second core amplifying circuit to be connected with the first end of the voltage stabilizing circuit and connected with the third constant voltage;

one end of the fifth capacitor is connected with the first end of the second linear compensation circuit, and the other end of the fifth capacitor is connected with the grid electrode of the fifth field effect tube;

the source electrode of the fifth field effect transistor is connected with an input power supply, and the drain electrode of the fifth field effect transistor is connected with the second end of the second linear compensation circuit;

one end of the seventh resistor is connected with the grid electrode of the sixth field effect transistor, and the other end of the seventh resistor is used as the second end of the second core amplifying circuit to be connected with the first end of the voltage stabilizing circuit and connected with the fourth constant voltage;

one end of the sixth capacitor is connected with the first end of the second linear compensation circuit, and the other end of the sixth capacitor is connected with the grid electrode of the sixth field effect transistor;

the drain electrode of the sixth field effect transistor is connected with the second end of the second linear compensation circuit, and the source electrode of the sixth field effect transistor is grounded;

The second linear compensation circuit is used for compensating the current signals amplified by the fifth field effect transistor and the sixth field effect transistor so as to improve the linearity of one path of differential current output by the second core amplifying circuit;

When the low-noise transconductance amplifier works, the regulating voltage output by the voltage stabilizing circuit is respectively overlapped with the third constant voltage and the fourth constant voltage, so that the conduction of the fifth field effect transistor and the sixth field effect transistor is respectively controlled through the overlapped voltage of the regulating voltage and the third constant voltage and the overlapped voltage of the regulating voltage and the fourth constant voltage, and one path of differential current output by the second core amplifying circuit is regulated.

In a possible embodiment, the second linearity compensation circuit includes:

A seventh field effect transistor, an eighth resistor, a ninth resistor, a tenth resistor, a seventh capacitor, an eighth capacitor, a third reference voltage and a fourth reference voltage;

Wherein,

One end of the eighth resistor is used as a first end of the second linear compensation circuit to be connected with the second end of the second input matching circuit, and the other end of the eighth resistor is connected with the source electrode of the seventh field effect transistor and the source electrode of the eighth field effect transistor;

One end of the ninth resistor is connected with the grid electrode of the seventh field effect transistor, and the other end of the ninth resistor is connected with the third reference voltage;

one end of the tenth resistor is connected with the grid electrode of the eighth field effect transistor, and the other end of the tenth resistor is connected with the fourth reference voltage;

One end of the seventh capacitor is connected with the grid electrode of the seventh field effect transistor, and the other end of the seventh capacitor is used as the second end of the second linear compensation circuit to be connected with the first end of the second filter circuit;

One end of the eighth capacitor is connected with the grid electrode of the eighth field effect transistor, and the other end of the eighth capacitor is used as the second end of the second linear compensation circuit and is connected with the first end of the second filter circuit;

The drain electrode of the seventh field effect transistor is connected with an input power supply;

The drain electrode of the eighth field effect transistor is grounded;

The seventh field effect transistor and the eighth field effect transistor are used for performing linear compensation on the current signals amplified by the fifth field effect transistor and the sixth field effect transistor.

In a possible embodiment, the first filtering circuit includes:

A ninth capacitance, an eleventh resistance, and a twelfth resistance;

Wherein,

One end of the ninth capacitor is used as a first end of the first filter circuit and is connected with the third end of the first core amplifying circuit, and the other end of the ninth capacitor is connected with one end of the eleventh resistor;

The other end of the eleventh resistor is grounded;

one end of the twelfth resistor is connected with the third end of the first core amplifying circuit, and the other end of the twelfth resistor is used as the second end of the first filter circuit and is connected with the second end of the voltage stabilizing circuit;

the first filter circuit is used for filtering one path of differential current output by the first core amplifying circuit, filtering high-frequency alternating current signals and eliminating signal interference.

In a possible embodiment, the second filter circuit includes:

a tenth capacitor, a thirteenth resistor, and a fourteenth resistor;

Wherein,

One end of the tenth capacitor is used as a first end of the second filter circuit and is connected with a third end of the second core amplifying circuit, and the other end of the tenth capacitor is connected with one end of the thirteenth resistor;

The other end of the thirteenth resistor is grounded;

One end of the fourteenth resistor is connected with the third end of the second core amplifying circuit, and the other end of the fourteenth resistor is used as the second end of the second filter circuit and is connected with the second end of the voltage stabilizing circuit;

The second filter circuit is used for filtering one path of differential current output by the second core amplifying circuit, filtering high-frequency alternating current signals and eliminating signal interference.

In a second aspect, embodiments of the present application provide a chip comprising a low noise transconductance amplifier according to the first aspect.

In a third aspect, an embodiment of the present application provides an internet of things device, where the internet of things device includes a low noise transconductance amplifier according to the first aspect or a chip according to the second aspect.

By adopting the embodiment of the application, the method has the following beneficial effects:

The input radio frequency voltage is converted and amplified through the first core amplifying circuit and the second core amplifying circuit, two paths of amplified differential currents can be obtained, the two paths of amplified differential currents are combined into a common-mode voltage after being filtered through the first filtering circuit and the second filtering circuit and enter the voltage stabilizing circuit, the common-mode voltage is compared with a reference voltage through the voltage stabilizing circuit, the voltage stabilizing circuit is used for transmitting the common-mode voltage back to the first core amplifying circuit and the second core amplifying circuit as an adjusting voltage, and therefore the two paths of differential currents output by the first core amplifying circuit and the second core amplifying circuit are adjusted through the adjusting voltage, the stability of the output of the two paths of differential currents is improved, and the problem that the stability of converting the voltage quantity in an input signal into the current quantity of a low-noise transconductance amplifier is poor is solved.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for the description of the embodiments will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

Fig. 1 is a circuit block diagram of a low noise transconductance amplifier according to an embodiment of the present application;

fig. 2 is a schematic structural diagram of a voltage stabilizing circuit according to an embodiment of the present application;

FIG. 3 is a schematic diagram of a first linear compensation circuit and a second linear compensation circuit according to an embodiment of the present application;

Fig. 4 is a schematic structural diagram of a first filter circuit and a second filter circuit according to an embodiment of the present application.

Detailed Description

The following description of the technical solutions in the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings in the embodiments of the present application, and it is apparent that the described embodiments are some embodiments of the present application, but not all the implementation modes. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.

The terms "first," "second," "third," and "fourth" and the like in the description and in the claims and drawings are used for distinguishing between different objects and not necessarily for describing a particular sequential or chronological order. Furthermore, the terms "comprise" and "have," as well as any variations thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those listed steps or elements but may include other steps or elements not listed or inherent to such process, method, article, or apparatus.

Reference herein to "an embodiment" means that a particular feature, result, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.

Referring first to fig. 1, fig. 1 is a circuit block diagram of a low noise transconductance amplifier according to an embodiment of the present application. The low noise transconductance amplifier may include: the first input matching circuit 101, the second input matching circuit 102, the first core amplifying circuit 201, the second core amplifying circuit 202, the voltage stabilizing circuit 301, the reference voltage Vref, the first filter circuit 401, and the second filter circuit 402.

In the embodiment of the present application, the first end of the first input matching circuit 101 is used as the positive voltage input end vin+ of the low noise transconductance amplifier, and the second end of the first input matching circuit 101 is connected to the first end of the first core amplifying circuit 201.

The second end of the first core amplifying circuit 201 is connected to the first end of the voltage stabilizing circuit 301, and the third end of the first core amplifying circuit 201 is connected to the first end of the first filter circuit 401 as the positive current output terminal iout+ of the low noise transconductance amplifier.

The first terminal of the second input matching circuit 102 serves as the negative voltage input Vin-of the low noise transconductance amplifier, and the second terminal of the second input matching circuit 102 is connected to the first terminal of the second core amplifying circuit 202.

A second end of the second core amplifying circuit 202 is connected to the first end of the voltage stabilizing circuit 301, and a third end of the second core amplifying circuit 202 is connected to the first end of the second filter circuit 402 as a negative current output terminal Iout "of the low noise transconductance amplifier.

A second terminal of the voltage stabilizing circuit 301 is connected to a second terminal of the first filter circuit 401 and to a second terminal of the second filter circuit 402, and a third terminal of the voltage stabilizing circuit 301 is connected to the reference voltage Vref.

The first input matching circuit 101 and the second input matching circuit 102 are used for performing impedance matching on the input radio frequency voltage so as to reduce power loss generated by transmission of the radio frequency voltage in the circuit.

The first core amplifying circuit 201 and the second core amplifying circuit 202 are configured to convert a radio frequency voltage into a current signal, and amplify the current signal to obtain two differential currents.

The first filter circuit 401 and the second filter circuit 402 are configured to perform filtering processing on the two paths of differential currents, and obtain a common-mode voltage at a connection position of the first filter circuit 401 and the second filter circuit 402.

The voltage stabilizing circuit 301 is configured to compare the common mode voltage with the reference voltage Vref, and send an error between the reference voltage Vref and the common mode voltage as a regulated voltage back to the first core amplifying circuit 201 and the second core amplifying circuit 202, so that the first core amplifying circuit 201 and the second core amplifying circuit 202 output stable two differential currents.

It should be noted that, in the embodiment of the present application, the error between the reference voltage Vref and the common mode voltage is the difference between the reference voltage Vref and the common mode voltage, and when the difference between the reference voltage Vref and the common mode voltage is adjusted to be 0, the common mode voltage is in a stable state, so that two paths of differential currents output by the low noise transconductance amplifier are in a stable state.

In the embodiment of the present application, the first input matching circuit 101 and the second input matching circuit 102 are configured to perform impedance matching with the first core amplifying circuit 201 and the second core amplifying circuit 202, so that the input radio frequency voltage enters the first core amplifying circuit 201 and the second core amplifying circuit 202 for signal processing. Thereby ensuring maximum power transfer and minimum reflection loss of the signal to optimize performance and efficiency of the radio frequency system.

Alternatively, the first input matching circuit 101 and the second input matching circuit 102 may include, for example: a pi-type matching circuit, an L-type matching circuit and a T-type matching circuit. The pi-type matching circuit consists of an inductor and two capacitors and is used for matching impedance difference between a transmission line and a load. The L-shaped matching circuit is formed by serially connecting an inductor and a capacitor and is used for matching radio frequency circuits among different impedances. The T-shaped matching circuit consists of a capacitor and two inductors and is used for matching the impedance between a signal source and a transmission line.

It will be appreciated that the "pi" type matching circuit, the "L" type matching circuit, and the "T" type matching circuit described above may be used alone or in combination to achieve the above impedance matching to ensure reliable communications, efficient energy transfer, and reduced signal distortion.

It should be noted that the low noise transconductance amplifier is mainly applied to wireless communication and radio frequency systems, and is used for amplifying a weak input signal to a controllable amplitude for subsequent processing by a circuit or a system. Because the input signal processed by the low noise transconductance amplifier is weak, the low noise transconductance amplifier needs to be placed near the input signal source to reduce signal attenuation. When the low-noise transconductance amplifier amplifies an input signal, noise interference introduced in the circuit is amplified, and a field effect transistor in the low-noise transconductance amplifier is sensitive, so that two paths of differential signals output by the first core amplifying circuit 201 and the second core amplifying circuit 202 are unstable.

Thus, in the embodiment of the present application, the two paths of differential currents output by the first core amplifying circuit 201 and the second core amplifying circuit 202 are filtered, and then combined into a common-mode voltage to be input to the voltage stabilizing circuit 301. The voltage stabilizing circuit 301 compares the common-mode voltage with the reference voltage Vref, calculates an error between the common-mode voltage and the reference voltage Vref, and sends the error back to the first core amplifying circuit 201 and the second core amplifying circuit 202 as a regulated voltage, and the first core amplifying circuit 201 and the second core amplifying circuit 202 regulate the two differential currents outputted by the regulated voltage until the two differential currents are outputted stably.

Referring to fig. 2, fig. 2 is a schematic structural diagram of a voltage stabilizing circuit according to an embodiment of the present application. The voltage stabilizing circuit may include: an operational amplifier OP.

In the embodiment of the present application, the output end of the operational amplifier OP is used as the first end of the voltage stabilizing circuit 301 to be connected with the second end of the first core amplifying circuit 201 and connected with the second end of the second core amplifying circuit 202, the in-phase input end of the operational amplifier OP is used as the second end of the voltage stabilizing circuit 301 to be connected with the second end of the first filtering circuit 401 and connected with the second end of the second filtering circuit 402, and the inverting input end of the operational amplifier OP is used as the third end of the voltage stabilizing circuit 301 to be connected with the reference voltage Vref.

The operational amplifier OP is configured to compare a common-mode voltage input at the in-phase input terminal with a reference voltage Vref at the reverse input terminal, and if the common-mode voltage is not equal to the reference voltage Vref, the operational amplifier OP uses an error between the common-mode voltage and the reference voltage Vref as a regulated voltage, and sends the regulated voltage back to the first core amplifying circuit 201 and the second core amplifying circuit 202, otherwise, the regulated voltage output by the operational amplifier OP is 0.

It should be noted that the device itself of the operational amplifier OP has the effect of adjusting the level by adjusting the static operating point, and is therefore used to design a negative feedback circuit. In the embodiment of the application, the common-mode voltage at the in-phase input end is compared with the reference voltage Vref, and the error between the common-mode voltage and the reference voltage Vref is obtained through calculation of the operational amplifier OP, so that the common-mode voltage is regulated to be equal to the reference voltage Vref through the error, namely, the common-mode voltage is stable.

Specifically, after the two paths of differential currents obtained by the processing of the first core amplifying circuit 201 and the second core amplifying circuit 202 are filtered by the first filtering circuit 401 and the second filtering circuit 402, the two paths of obtained voltage signals are combined into a common-mode voltage at the non-inverting input end of the operational amplifier OP. The common mode voltage is input to the non-inverting input of the operational amplifier OP and compared with a predetermined reference voltage Vref.

If the common mode voltage is equal to the reference voltage Vref, the output terminal of the operational amplifier OP is output as 0.

If the common-mode voltage is not equal to the reference voltage Vref, the operational amplifier OP calculates an error between the common-mode voltage and the reference voltage Vref, and outputs the error as a regulating voltage at the output end of the operational amplifier OP. The regulated voltage reenters the first core amplifying circuit 201 and the second core amplifying circuit 202 through the output terminal of the operational amplifier OP, thereby regulating the two differential currents output from the first core amplifying circuit 201 and the second core amplifying circuit 202. After the two paths of regulated differential currents are filtered by the first filter circuit 401 and the second filter circuit 402, the obtained two paths of voltage signals are combined into a new common-mode voltage at the non-inverting input end of the operational amplifier OP. The operational amplifier OP again compares the common-mode voltage with the reference voltage until the common-mode voltage is adjusted to be equal to the reference voltage Vref, i.e., the common-mode voltage at the non-inverting input of the operational amplifier OP is stable.

Therefore, the common-mode voltage of the non-inverting input end of the operational amplifier OP is regulated to be equal to the reference voltage of the inverting input end through the negative feedback of the operational amplifier OP, so that the common-mode voltage is stable, the stability of two paths of differential currents output by the first core amplifying circuit 201 and the second core amplifying circuit 202 is further enhanced, and the problem that the stability of converting the voltage quantity in an input signal into the current quantity by the low-noise transconductance amplifier is poor is solved.

Illustratively, as shown in fig. 2, the first core amplifying circuit 201 may include:

The first and second field effect transistors M1 and M2, the first and second resistors R1 and R2, the first and second capacitors C1 and C2, the first and second linear compensation circuits 211, and the first and second constant voltages V1 and V2.

In the embodiment of the present application, the first end of the first linear compensation circuit 211 is connected to the second end of the first input matching circuit 101 as the first end of the first core amplifying circuit 201, and the second end of the first linear compensation circuit 211 is connected to the first end of the first filter circuit 401 as the third end of the first core amplifying circuit 201.

One end of the first resistor R1 is connected to the gate of the first field effect transistor M1, and the other end of the first resistor R1 is connected to the first end of the voltage stabilizing circuit 301 as the second end of the first core amplifying circuit 201, and is connected to the first constant voltage V1.

One end of the first capacitor C1 is connected to the first end of the first linear compensation circuit 211, and the other end of the first capacitor C1 is connected to the gate of the first field effect transistor M1.

The source of the first fet M1 is connected to the input power VDD, and the drain of the first fet M1 is connected to the second end of the first linear compensation circuit 211.

One end of the second resistor R2 is connected to the gate of the second field effect transistor M2, and the other end of the second resistor R2 is connected to the first end of the voltage stabilizing circuit 301 as the second end of the first core amplifying circuit 201, and is connected to the second constant voltage V2.

One end of the second capacitor C2 is connected to the first end of the first linear compensation circuit 211, and the other end of the second capacitor C2 is connected to the gate of the second field effect transistor M2.

The drain electrode of the second field effect transistor M2 is connected to the second end of the first linear compensation circuit 211, and the source electrode of the second field effect transistor M2 is grounded.

The first linear compensation circuit 211 is configured to compensate the current signals amplified by the first field effect transistor M1 and the second field effect transistor M2, so as to improve the linearity of one path of differential current output by the first core amplifying circuit 201.

When the low noise transconductance amplifier works, the regulated voltage output by the voltage stabilizing circuit 301 is respectively overlapped with the first constant voltage V1 and the second constant voltage V2, so that the conduction of the first field effect transistor and the second field effect transistor is respectively controlled by the overlapped voltage of the regulated voltage and the first constant voltage V1 and the overlapped voltage of the regulated voltage and the second constant voltage, and one path of differential current output by the first core amplifying circuit 201 is regulated.

In the embodiment of the present application, when the input rf voltage first enters the first core amplifying circuit 201, the first constant voltage V1 flows through the first resistor R1 to form a control current for turning on the first fet M1, and the second constant voltage V2 flows through the second resistor R2 to form a control current for turning on the second fet M2. Thereby, the first field effect transistor M1 and the second field effect transistor M2 convert the radio frequency voltage into a current signal, and amplify the current signal, so that the first core amplifying circuit 201 outputs a path of differential current.

When the regulated voltage output by the voltage stabilizing circuit 301 enters the first core amplifying circuit 201, the superimposed voltage of the regulated voltage superimposed with the first constant voltage V1 flows through the first resistor R1 to generate a new control current, thereby controlling the conduction of the first fet M1. The superimposed voltage of the regulated voltage superimposed with the second constant voltage V2 flows through the second resistor R2 to generate a new control current, thereby controlling the conduction of the second fet M2.

Specifically, when the input voltage enters the first core amplifying circuit 201 through the first input matching circuit 101, the input voltage enters the first fet M1 and the second fet M2 after being filtered by the first capacitor C1 and the second capacitor C2. The first field effect transistor M1 and the second field effect transistor M2 are respectively conducted for half a period through the first constant voltage V1 and the second constant voltage V2, the input voltage is converted into a current signal, and the current signal is amplified. After the amplified current signal is compensated by the first linear compensation circuit 211, a differential current is output at the third terminal of the first core amplifying circuit 201.

Further, after the one path of differential current is filtered by the first filter circuit 401, the voltage signal filtered by the second filter circuit 402 is combined into a common-mode voltage at the non-inverting input terminal of the operational amplifier OP. After comparing the common-mode voltage with the reference voltage Vref, the operational amplifier OP returns the error between the common-mode voltage and the reference voltage Vref as the adjustment voltage to the first core amplifying circuit 201.

Further, the adjusting voltage is overlapped with the first constant voltage V1 and is overlapped with the second constant voltage V2, and the overlapped voltage of the adjusting voltage and the first constant voltage V1 flows through the first resistor R1 to generate a new control current, and the control current enters the gate of the first field effect transistor M1, so as to control the conduction of the first field effect transistor M1. The superimposed voltage of the regulated voltage superimposed with the second constant voltage V2 flows through the second resistor R2 to generate a new control current, which enters the gate of the second fet M2, thereby controlling the conduction of the second fet M2. Therefore, the amplifying effect of the first field effect transistor M1 and the second field effect transistor M2 on the current signal changes along with the conduction change of the first field effect transistor M1 and the second field effect transistor M2, so as to regulate the output of one path of differential current at the third end of the first core amplifying circuit 201 until the common mode voltage is equal to the reference voltage Vref, and the first core amplifying circuit 201 outputs a stable path of differential current.

Therefore, by introducing the output end of the operational amplifier OP into the first core amplifying circuit 201 to form a negative feedback loop, the stability of the common-mode voltage of the non-inverting input end of the operational amplifier OP can be regulated, so that the stability of one path of differential current output by the first core amplifying circuit 201 is enhanced.

Illustratively, as shown in fig. 3, the first linear compensation circuit 211 may include: the third FET M3, the fourth FET M4, the third resistor R3, the fourth resistor R4, the fifth resistor R5, the third capacitor C3, the fourth capacitor C4, the first reference voltage Vs1 and the second reference voltage Vs2.

In the embodiment of the present application, one end of the third resistor R3 is used as the first end of the first linear compensation circuit 211 to be connected to the second end of the first input matching circuit 101, and the other end of the third resistor R3 is connected to the source of the third fet M3 and to the source of the fourth fet M4.

The third resistor R3 may be used to perform impedance matching with the first input matching circuit 101, so that the input voltage may enter the first core amplifying circuit 201 through the first input matching circuit 101.

One end of the fourth resistor R4 is connected to the gate of the third fet M3, and the other end of the fourth resistor R4 is connected to the first reference voltage Vs 1.

One end of the fifth resistor R5 is connected to the gate of the fourth fet M4, and the other end of the fifth resistor R5 is connected to the second reference voltage Vs 2.

One end of the third capacitor C3 is connected to the gate of the third field effect transistor M3, and the other end of the third capacitor C3 is connected to the first end of the first filter circuit 401 as the second end of the first linear compensation circuit 211.

One end of the fourth capacitor C4 is connected to the gate of the fourth field effect transistor M4, and the other end of the fourth capacitor C4 is connected to the first end of the first filter circuit 401 as the second end of the first linear compensation circuit 211.

The drain electrode of the third field effect transistor M3 is connected with the input power supply VDD.

The drain electrode of the fourth field effect transistor M4 is grounded.

The third fet M3 and the fourth fet M4 are configured to linearly compensate the current signals amplified by the first fet M1 and the second fet M2.

Specifically, the input voltage is converted into a current signal by the first field effect transistor M1 and the second field effect transistor M2, and the current signal is amplified. The amplified current signal and the first reference voltage Vs1 and the second reference voltage Vs2 jointly control the conduction of the third fet M3 and the fourth fet M4 so as to linearly compensate the current signal. The compensated current signal has a high linearity.

Further, the linearly compensated current signal is output at the third terminal of the first core amplifying circuit 201, i.e. one path of differential current is output.

Illustratively, as shown in fig. 2, the second core amplifying circuit 202 may include: fifth field effect transistor M5, sixth field effect transistor M6, sixth resistor R6, seventh resistor R7, fifth capacitor C5, sixth capacitor C6, second linearity compensation circuit 212, third constant voltage V3, and fourth constant voltage V4.

In the embodiment of the present application, the first end of the second linear compensation circuit 212 is connected to the second end of the second input matching circuit 102 as the first end of the second core amplifying circuit 202, and the second end of the second linear compensation circuit 212 is connected to the first end of the second filter circuit 402 as the third end of the second core amplifying circuit 202.

One end of the sixth resistor R6 is connected to the gate of the fifth field effect transistor M5, and the other end of the sixth resistor R6 is connected to the first end of the voltage stabilizing circuit 301 as the second end of the second core amplifying circuit 202, and is connected to the third constant voltage V3.

One end of the fifth capacitor C5 is connected to the first end of the second linear compensation circuit 212, and the other end of the fifth capacitor C5 is connected to the gate of the fifth fet M5.

The source of the fifth fet M5 is connected to the input power VDD, and the drain of the fifth fet M5 is connected to the second end of the second linearity-compensation circuit 212.

One end of the seventh resistor R7 is connected to the gate of the sixth field effect transistor M6, and the other end of the seventh resistor R7 is connected to the first end of the voltage stabilizing circuit 301 as the second end of the second core amplifying circuit 202, and is connected to the fourth constant voltage V4.

One end of the sixth capacitor C6 is connected to the first end of the second linearity-compensation circuit 212, and the other end of the sixth capacitor C6 is connected to the gate of the sixth field-effect transistor M6.

The drain of the sixth fet M6 is connected to the second end of the second linearity-compensation circuit 212, and the source of the sixth fet M6 is grounded.

The second linearity compensation circuit 212 is configured to compensate the current signals amplified by the fifth fet M5 and the sixth fet M6, so as to improve the linearity of the differential current outputted by the second core amplifying circuit 202.

When the low noise transconductance amplifier works, the regulated voltage output by the voltage stabilizing circuit 301 is respectively overlapped with the third constant voltage V3 and the fourth constant voltage V4, so that the conduction of the fifth field effect transistor M5 and the sixth field effect transistor M6 is respectively controlled by the overlapped voltage of the regulated voltage and the third constant voltage V3 and the overlapped voltage of the regulated voltage and the fourth constant voltage V4, and one path of differential current output by the second core amplifying circuit 202 is regulated.

In the embodiment of the present application, when the input rf voltage first enters the second core amplifying circuit 202, the third constant voltage V3 flows through the sixth resistor R6 to form a control current to turn on the fifth fet M5, and the fourth constant voltage V4 flows through the seventh resistor R7 to form a control current to turn on the sixth fet M6. The fifth fet M5 and the sixth fet M6 convert the rf voltage into a current signal, and amplify the current signal, so that the second core amplifying circuit 202 outputs a differential current.

When the regulated voltage output by the voltage stabilizing circuit 301 enters the second core amplifying circuit 202, the superimposed voltage of the regulated voltage and the third constant voltage V3 flows through the sixth resistor R6 to generate a new control current, so as to control the conduction of the fifth fet M5. The superimposed voltage of the regulated voltage superimposed with the fourth constant voltage V4 flows through the seventh resistor R7 to generate a new control current, thereby controlling the conduction of the sixth fet M6.

Specifically, after the input voltage enters the second core amplifying circuit 202 through the second input matching circuit 102, the input voltage enters the fifth fet M5 and the sixth fet M6 after being filtered by the fifth capacitor C5 and the sixth capacitor C6. The fifth fet M5 and the sixth fet M6 are turned on for half a period by the third constant voltage V3 and the fourth constant voltage V4, respectively, to convert an input voltage into a current signal, and amplify the current signal. After the amplified current signal is compensated by the second linear compensation circuit 212, a differential current is output at the third terminal of the second core amplifying circuit 202.

Further, after the one path of differential current is filtered by the second filter circuit 402, the voltage signal filtered by the first filter circuit 401 and the non-inverting input terminal of the operational amplifier OP are combined into a common-mode voltage. After comparing the common-mode voltage with the reference voltage Vref, the operational amplifier OP sends the error between the common-mode voltage and the reference voltage Vref back to the second core amplifying circuit 202 as the adjustment voltage.

Further, the adjusting voltage is overlapped with the third constant voltage V3 and is overlapped with the fourth constant voltage V4, and the overlapped voltage of the adjusting voltage and the third constant voltage V3 flows through the sixth resistor R6 to generate a new control current, and the control current enters the gate of the fifth fet M5, so as to control the conduction of the fifth fet M5. The superimposed voltage of the regulated voltage superimposed with the fourth constant voltage V4 flows through the seventh resistor R7 to generate a new control current, which enters the gate of the sixth fet M6, thereby controlling the conduction of the sixth fet M6. Therefore, the amplifying effect of the fifth field effect transistor M5 and the sixth field effect transistor M6 on the current signal changes along with the conduction change of the fifth field effect transistor M5 and the sixth field effect transistor M6, so as to regulate the output of the third end of the second core amplifying circuit 202 to one path of differential current until the common mode voltage is equal to the reference voltage Vref, and the second core amplifying circuit 202 outputs a stable path of differential current.

Therefore, by introducing the output end of the operational amplifier OP to the second core amplifying circuit 202 to form a negative feedback loop, the stability of the common-mode voltage of the non-inverting input end of the operational amplifier OP can be adjusted, so that the stability of one path of differential current output by the second core amplifying circuit 202 is enhanced.

Illustratively, as shown in FIG. 3, the second linearity compensation circuit 212 may include: seventh field effect transistor M7, eighth field effect transistor M8, eighth resistor R8, ninth resistor R9, tenth resistor R10, seventh capacitor C7, eighth capacitor C8, third reference voltage Vs3, and fourth reference voltage Vs4.

In the embodiment of the present application, one end of the eighth resistor R8 is used as the first end of the second linear compensation circuit 212 and is connected to the second end of the second input matching circuit 102, and the other end of the eighth resistor R8 is connected to the source of the seventh field effect transistor M7 and to the source of the eighth field effect transistor M8.

The eighth resistor R8 may be used to perform impedance matching with the second input matching circuit 102, so that the input voltage may enter the second core amplifying circuit 202 through the second input matching circuit 102.

One end of the ninth resistor R9 is connected to the gate of the seventh field effect transistor M7, and the other end of the ninth resistor R9 is connected to the third reference voltage Vs 3.

One end of the tenth resistor R10 is connected to the gate of the eighth field effect transistor M8, and the other end of the tenth resistor R10 is connected to the fourth reference voltage Vs 4.

One end of the seventh capacitor C7 is connected to the gate of the seventh field effect transistor M7, and the other end of the seventh capacitor C7 is connected to the first end of the second filter circuit 402 as the second end of the second linear compensation circuit 212.

One end of the eighth capacitor C8 is connected to the gate of the eighth field effect transistor M8, and the other end of the eighth capacitor C8 is connected to the first end of the second filter circuit 402 as the second end of the second linear compensation circuit 212.

The drain of the seventh field effect transistor M7 is connected to the input power supply VDD.

The drain electrode of the eighth field effect transistor M8 is grounded.

The seventh fet M7 and the eighth fet M8 are configured to linearly compensate the current signals amplified by the fifth fet M5 and the sixth fet M6.

Specifically, the input voltage is converted into a current signal by the fifth field effect transistor M5 and the sixth field effect transistor M6, and the current signal is amplified. The amplified current signal and the third reference voltage Vs3 and the fourth reference voltage Vs4 jointly control the conduction of the seventh field effect transistor M7 and the eighth field effect transistor M8 so as to linearly compensate the current signal. The compensated current signal has a high linearity.

Further, the linearly compensated current signal is output at the third terminal of the second core amplifying circuit 202, i.e. one path of differential current is output.

For example, as shown in fig. 4, the first filter circuit 401 may include: a ninth capacitor C9, an eleventh resistor R11, and a twelfth resistor R12.

In the embodiment of the present application, one end of the ninth capacitor C9 is used as the first end of the first filter circuit 401 and is connected to the third end of the first core amplifying circuit 201, and the other end of the ninth capacitor C9 is connected to one end of the eleventh resistor R11.

The other end of the eleventh resistor R11 is grounded.

One end of the twelfth resistor R12 is connected to the third end of the first core amplifying circuit 201, and the other end of the twelfth resistor R12 is connected to the second end of the voltage stabilizing circuit 301 as the second end of the first filter circuit 401.

The first filter circuit 401 is configured to perform filtering processing on one path of differential current output by the first core amplifying circuit 201, filter high-frequency and ac signals, and eliminate signal interference.

Illustratively, as shown in FIG. 4, the second filter circuit 402 includes: a tenth capacitor C10, a thirteenth resistor R13, and a fourteenth resistor R14.

In the embodiment of the present application, one end of the tenth capacitor C10 is used as the first end of the second filter circuit 402, and is connected to the third end of the second core amplifying circuit 202, and the other end of the tenth capacitor C10 is connected to one end of the thirteenth resistor R13.

The other end of the thirteenth resistor R13 is grounded.

One end of the fourteenth resistor R14 is connected to the third end of the second core amplifying circuit 202, and the other end of the fourteenth resistor R14 is connected to the second end of the voltage stabilizing circuit 301 as the second end of the second filter circuit 402.

The second filter circuit 402 is configured to perform filtering processing on one path of differential current output by the second core amplifying circuit 202, and filter high-frequency and ac signals to eliminate signal interference.

Specifically, two paths of differential currents processed by the first core amplifying circuit 201 and the second core amplifying circuit 202 enter the first filter circuit 401 and the second filter circuit 402, respectively. The capacitor C9 and the eleventh resistor R11 respectively form an RC filter circuit, and the tenth capacitor C10 and the thirteenth resistor R13 form an RC filter network. The two paths of differential currents are isolated from direct current, alternating current and low frequency by the two RC filter networks, and high-frequency and alternating-current signals in the two paths of differential currents are grounded so as to filter out the high-frequency and alternating-current signals, thereby eliminating high-frequency signal interference.

Further, the two paths of differential currents filtered by the two RC filter networks are divided by the twelfth resistor R12 and the fourteenth resistor R14, and the two paths of voltage signals formed by the two paths of differential currents are combined into a common-mode voltage at the connection part of the first filter circuit 401 and the second filter circuit 402 and are input to the non-inverting input end of the operational amplifier OP.

Thus, the high-frequency and alternating-current signals of the two paths of differential currents can be filtered through the internal RC filter networks of the first filter circuit 401 and the second filter circuit 402, and high-frequency noise interference can be eliminated for the low-noise transconductance amplifier. The two paths of differential currents after filtering process pass through respective voltage dividing resistors, namely a twelfth resistor R12 and a fourteenth resistor R14 to form two paths of voltage signals, and the two paths of voltage signals are combined into a common-mode voltage to be input to the voltage stabilizing circuit 301, so that the low-noise transconductance amplifier outputs stable two paths of differential currents through the voltage stabilizing circuit 301.

It can be seen that the first core amplifying circuit and the second core amplifying circuit convert and amplify the input radio frequency voltage to obtain two paths of amplified differential currents, the two paths of amplified differential currents are filtered by the first filtering circuit and the second filtering circuit and then are combined into a common-mode voltage, the common-mode voltage is input into the voltage stabilizing circuit, the voltage stabilizing circuit compares the common-mode voltage with a reference voltage, and the voltage stabilizing circuit sends the common-mode voltage serving as an adjusting voltage back to the first core amplifying circuit and the second core amplifying circuit, so that the two paths of differential currents output by the first core amplifying circuit and the second core amplifying circuit are adjusted through the adjusting voltage, the stability of the output of the two paths of differential currents is improved, and the problem that the stability of converting the voltage quantity in an input signal into the current quantity by the low-noise transconductance amplifier is poor is solved.

In a possible embodiment, the present application also provides a chip, which may include the low noise transconductance amplifier described in any one of the above embodiments, which is not described herein.

In a possible embodiment, the embodiment of the present application further provides an internet of things device, where the internet of things device includes the low noise transconductance amplifier described in any one of the above embodiments or the chip provided in any one of the above embodiments.

It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-described division of the functional units and modules is illustrated, and in practical application, the above-described functional distribution may be performed by different functional units and modules according to needs, i.e. the internal structure of the apparatus is divided into different functional units or modules to perform all or part of the above-described functions.

The above embodiments are only for illustrating the technical solution of the present application, and are not limiting; although the application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present application, and are intended to be included in the scope of the present application.

Claims

1. A low noise transconductance amplifier, the low noise transconductance amplifier comprising:

Wherein,

2. The low noise transconductance amplifier of claim 1, wherein the voltage stabilizing circuit comprises:

An operational amplifier;

Wherein,

3. The low noise transconductance amplifier of claim 1, wherein the first core amplifying circuit comprises:

Wherein,

4. A low noise transconductance amplifier according to claim 3, wherein the first linear compensation circuit comprises:

Wherein,

The drain electrode of the fourth field effect transistor is grounded;

5. The low noise transconductance amplifier of claim 1, wherein the second core amplifying circuit comprises:

Wherein,

6. The low noise transconductance amplifier of claim 5, wherein the second linearity compensation circuit comprises:

Wherein,

The drain electrode of the eighth field effect transistor is grounded;

7. The low noise transconductance amplifier of claim 1, wherein the first filtering circuit comprises:

A ninth capacitance, an eleventh resistance, and a twelfth resistance;

Wherein,

The other end of the eleventh resistor is grounded;

8. The low noise transconductance amplifier of claim 1, wherein the second filtering circuit comprises:

a tenth capacitor, a thirteenth resistor, and a fourteenth resistor;

Wherein,

The other end of the thirteenth resistor is grounded;

9. A chip comprising a low noise transconductance amplifier according to any one of claims 1-8.

10. An internet of things device comprising the low noise transconductance amplifier according to any one of claims 1-8 or the chip according to claim 9.