CN117727621A - Method for improving surface flatness of epitaxial wafer - Google Patents

Abstract

The patent application discloses a method for improving the surface flatness of an epitaxial wafer, which comprises the steps of firstly carrying out epitaxial growth on a processed substrate, growing an epitaxial layer to a certain preset thickness, polishing the grown epitaxial layer to a target epitaxial layer thickness and edge morphology through processes such as cleaning, polishing, edge polishing and the like, and finally enabling the surface flatness to meet the use requirement; the method utilizes the method of post-polishing the epitaxial layer, reduces poor flatness of the surface of the epitaxial layer caused by uneven epitaxial growth and the problem of the surface of the substrate silicon wafer, and thus effectively improves the product yield.

Description

Method for improving surface flatness of epitaxial wafer

Technical Field

The invention relates to a silicon wafer manufacturing technology for an integrated circuit, in particular to a method for improving the surface flatness of a polishing sheet.

Background

Epitaxial growth of a silicon wafer is an important process in the chip manufacturing process, and is a process of growing a monocrystalline film on the surface of a monocrystalline substrate under certain conditions, wherein the grown monocrystalline film is an epitaxial layer.

In the related technology of epitaxial film growth, a vapor deposition method is generally adopted to carry out epitaxial growth on a silicon wafer, a raw material silicon wafer is placed on a base in a reaction cavity of an epitaxial growth furnace, then the reaction chamber is heated to a reaction temperature, cleaning gas is blown in to clean after the reaction temperature is reached, and after surface oxide and gas in the reaction cavity are cleaned, silicon source gas is randomly filled in to carry out continuous growth of a silicon epitaxial film on the surface of the substrate.

When the chemical vapor deposition method is carried out on the silicon wafer for epitaxial growth, the silicon wafer is conveyed to the reaction chamber by the bearing piece of the conveying unit of the epitaxial furnace, and due to the gas uniformity and the surface layer property of the substrate during the epitaxial film growth of the silicon wafer, part of the epitaxial silicon wafer grows through the film layer, the surface flatness control difficulty is higher, and the overall epitaxial yield is affected by the flatness of the epitaxial film layer.

The invention relates to a method for controlling the surface flatness of an epitaxial wafer, which aims at improving the surface flatness parameters of a silicon wafer after epitaxial growth of a film layer.

In order to achieve the purpose of improving the surface flatness of the epitaxial wafer, the method comprises the following steps:

firstly, removing an oxide layer on the surface of a monocrystalline silicon wafer, heating to a preset temperature, then introducing a silicon source to perform epitaxial layer growth, and growing an epitaxial film to a set thickness to obtain a silicon epitaxial wafer;

in the first step, the thickness of the grown epitaxial layer is characterized in that the target thickness of the product epitaxial layer is a, and when the epitaxial film is grown on the substrate, the thickness of the grown epitaxial layer is set to be 1.05a-1.50a, and the thickness of the preferable epitaxial layer is 1.10a-1.13a; then carrying out epitaxial growth so as to obtain an epitaxial wafer;

secondly, cleaning the silicon epitaxial wafer after the epitaxial film is grown for the first time;

the first cleaning flow is characterized in that: cleaning with pure water megasonically for 220S-240S, and then centrifugally drying the epitaxial wafer for 130-150S at high speed;

polishing the epitaxial wafer, namely polishing the epitaxial wafer by adopting a double-sided polishing process until the thickness of an epitaxial layer of the silicon wafer is a;

the polishing process is characterized in that: the polishing solution is selected to be ultrapure water, the polishing pressure is 35-40kPa, and the rotating speed is controlled to be 40-50rpm;

step four, the epitaxial silicon wafer is cleaned for the second time;

in the fourth step, the second cleaning process comprises the following steps: cleaning with pure water megasonically for 220-240S, and then centrifugally drying the epitaxial wafer, and drying at a high speed for 130-150S;

fifthly, performing edge polishing on the epitaxial wafer subjected to the secondary cleaning;

in the fifth step, the side polishing process is that the deviation range of the circle center of the silicon wafer and the circle center of the machine table is within 0.1mm, the side polishing pressure is set to be 100-120N, the rotating speed is 750-800r/min, and the polishing time is 50-60s;

the edge polishing process can be adjusted according to different epitaxial wafer products, and the modification of the method based on the patent is still within the protection range;

step six, cleaning the edge-polished epitaxial wafer for the third time, and obtaining the target epitaxial wafer after cleaning;

the third cleaning process in the sixth step is as follows: firstly, soaking epitaxial wafers with organic cleaning liquid at 65-70 ℃ for 5-6 minutes, then megasonically cleaning the soaked epitaxial wafers with clean water for 2-3 minutes, and finally drying the epitaxial wafers at 95-110 ℃ for 8-10 minutes.

The method comprises the steps of firstly growing an epitaxial film with a certain thickness, then polishing and removing redundant epitaxial layers in a polishing and edge polishing mode to finally obtain the silicon epitaxial wafer with a target thickness, and solving the problem of poor surface flatness of the product epitaxial wafer caused by uneven epitaxial film thickness in the epitaxial growth mode

Drawings

FIG. 1 is a flow chart of a method for controlling flatness of epitaxial wafers

Examples

The following examples will be presented to aid one skilled in the art in further understanding the application and are not intended to limit the application in any way, as the following detailed description of specific embodiments of the epitaxial wafer flatness control method of the present invention is described in conjunction with the accompanying drawings; it should be noted that variations and modifications could be made by those skilled in the art without departing from the spirit of the present application; these are all within the scope of the present application.

Examples

And manufacturing a homogeneous silicon epitaxial wafer with the thickness of 3 microns of epitaxial layers, and controlling the surface flatness of the epitaxial wafer by adopting the method.

Firstly, carrying out epitaxial growth on the treated substrate silicon wafer, and presetting a grown silicon epitaxial layer of 3.35 microns by adopting silane as a silicon source.

Placing a substrate in an epitaxial growth furnace, gradually heating the substrate to the temperature of 900 ℃ in a reaction cavity for 10min, slowly heating the substrate to 1120-1150 ℃, introducing silicon source gas for epitaxial layer growth for 6.5 min, cooling the substrate after epitaxial growth is completed, and taking the substrate out of the growth furnace for first cleaning; and cleaning with pure water megasonically for 220S, centrifuging and spin-drying at high speed for 150S, and preparing double-sided polishing after spin-drying the epitaxial wafer.

Placing the epitaxial wafer into a double-sided polishing machine, setting the polishing pressure to 35kPa, controlling the rotating speed to 40rpm, calculating the water polishing time to 170s, then carrying out double-sided polishing on the epitaxial wafer, measuring the thickness of the polished epitaxial wafer and retrograde epitaxial layer, extracting 3 wafers for thickness verification, and verifying that the thickness of the epitaxial wafer meets the epitaxial wafer product standard. And then carrying out secondary cleaning on the polished epitaxial wafer, namely pure water megasonic cleaning for 220S, then carrying out centrifugal high-speed spin-drying for 150S, and carrying out edge polishing on the epitaxial wafer after spin-drying.

In the edge polishing process, the center of a silicon wafer is set to deviate from the center of a machine table by 0.1mm, the edge polishing pressure is set to 100N, the rotating speed is 750r/min, and the polishing time is 60s, so that the edge morphology of the epitaxial wafer required by a product is obtained.

And finally, cleaning for the third time, namely firstly immersing and cleaning the epitaxial wafer in an organic cleaning liquid cleaning tank, wherein the immersing and cleaning temperature is set to 70 ℃, the cleaning time is set to 300s, then transferring the epitaxial wafer into a megasonic pure water tank for megasonic cleaning, the cleaning time is set to 180s, and finally transferring the epitaxial wafer into a drying furnace for drying, and the drying temperature is set to 100 ℃ and the drying time is set to 8 minutes.

And (3) carrying out surface flatness parameter test on the dried epitaxial wafer, extracting 10 epitaxial wafers to test the surface parameters of the epitaxial wafers, wherein the test results are shown in the following table:

the related test surface parameters of the tested epitaxial wafer meet the requirements of the product wafer.

And selecting 10 polishing sheets for testing experiments, carrying out homoepitaxial growth on the substrate by adopting a common epitaxial growth process, directly growing an epitaxial layer to a target thickness, carrying out no subsequent polishing operation, and carrying out surface flatness parameter testing after the epitaxial growth is finished, wherein the results are shown in the table below.

From the comparison example, the method has obvious effect on improving the surface flatness of the epitaxial wafer, and particularly has obvious improvement on TTV.

Claims (6)

1. The method for improving the surface flatness of the epitaxial wafer is characterized by comprising the following steps of:

1) Firstly removing an oxide layer on the surface of a monocrystalline silicon wafer, then heating to a preset temperature, then introducing a silicon source to perform epitaxial layer growth, designing the epitaxial layer growth thickness in the step according to the target epitaxial layer thickness of a product, and recording the epitaxial layer growth thickness as a set thickness, and growing an epitaxial film to the set thickness so as to obtain a silicon epitaxial wafer;

2) Performing first cleaning on the silicon epitaxial wafer after the epitaxial film is grown;

3) Carrying out surface double-sided polishing on the epitaxial wafer after the first cleaning;

4) Performing second cleaning on the polished epitaxial wafer;

5) Performing edge polishing on the epitaxial wafer after the second cleaning;

6) And (3) cleaning the epitaxial wafer subjected to edge polishing for the third time, and obtaining the target epitaxial wafer after cleaning.

2. The method of claim 1, wherein the product epitaxial layer has a target thickness a, and the thickness of the grown epitaxial layer in the step is set to be 1.10a-1.13a.

3. The method for improving the surface flatness of epitaxial wafers according to claim 1, wherein the first cleaning and the second cleaning are performed by pure water megasonic cleaning for 220S-240S, and then the epitaxial wafers are spun by centrifugation and spin-drying for 130-150S.

4. The method for improving the surface flatness of an epitaxial wafer according to claim 1, wherein the polishing process in the fourth step is characterized in that: the polishing liquid is selected to be ultrapure water, the polishing pressure is 35-40kPa, and the rotating speed is controlled to be 40-50rpm.

5. The method for improving the surface flatness of epitaxial wafers according to claim 1, wherein the edge polishing process in the fifth step is that the circle center of the silicon wafer deviates from the circle center of the machine by within 0.1 mm.

6. The method for improving the surface flatness of epitaxial wafers of claim 1, wherein the third cleaning process comprises: firstly, soaking epitaxial wafers with organic cleaning liquid at 65-70 ℃ for 5-6 minutes, then megasonically cleaning the soaked epitaxial wafers with clean water for 2-3 minutes, and finally drying the epitaxial wafers at 95-110 ℃ for 8-10 minutes.