CN117687949A - Data communication method, device, electronic equipment and nonvolatile storage medium - Google Patents

Abstract

The application discloses a data communication method, a data communication device, electronic equipment and a nonvolatile storage medium. Wherein the method comprises the following steps: under the condition that the serial peripheral interface main equipment receives a data transmission instruction sent by an upper software system, determining an equipment identifier of the serial peripheral interface slave equipment to which data to be transmitted corresponding to the data transmission instruction is planned to be sent; generating a data communication frame corresponding to data to be transmitted, and adding an equipment identifier to a first preset position of the data communication frame; the data communication frame added with the device identifier is transmitted to each serial peripheral interface slave device connected with the serial peripheral interface master device through a host output slave input signal. The method and the device solve the technical problem that the main device can send a plurality of same input and output signals as chip selection signals when a plurality of serial peripheral interface peripheral devices exist in the related technology, and the input and output resources are excessively occupied.

Description

Data communication method, device, electronic equipment and nonvolatile storage medium

Technical Field

The present invention relates to the field of wireless communications and terminal technologies, and in particular, to a data communication method, apparatus, electronic device, and nonvolatile storage medium.

Background

The small base station has the characteristics of simple structure, easy deployment, convenient expansion and the like, and has become a mainstream scheme for the 5G (5 th Generation Mobile Networks, fifth-generation mobile communication technology) time-division coverage. The 5G expansion type small base station comprises a three-level architecture of a baseband unit (Building Baseband Unit, BBU), a convergence unit (HUB) and a radio frequency unit (Pico Radio Remote Unit, pRRU), wherein pRRU is a remote radio unit and is mainly used for realizing functions of receiving and processing baseband signals, receiving and transmitting radio frequency signals and the like.

In software and hardware design development of pRRU, in addition to many high-speed interfaces, low-speed interfaces are widely used, and serial peripheral interfaces (Serial Peripheral interface, SPI) are often used as interfaces between chips, as well as communication, configuration and management interfaces. Full duplex mode communication is adopted between SPI devices, and common bus topology comprises: a point-to-point master-slave mode, and a point-to-multipoint master-multi-slave mode.

In the related art, when there are multiple SPI peripherals, whether using a point-to-point mode or a point-to-multipoint mode, the serial peripheral interface master device will send multiple identical input/output signals as chip select signals, which has the technical problem of occupying excessive input/output resources.

In view of the above problems, no effective solution has been proposed at present.

Disclosure of Invention

The embodiment of the application provides a data communication method, a data communication device, electronic equipment and a nonvolatile storage medium, which at least solve the technical problem that the input and output resources are excessively occupied because a main device can send a plurality of same input and output signals as chip selection signals when a plurality of serial peripheral interface peripheral devices exist in the related technology.

According to an aspect of the embodiments of the present application, there is provided a data communication method, including: under the condition that the serial peripheral interface main equipment receives a data transmission instruction sent by an upper software system, determining an equipment identifier of the serial peripheral interface slave equipment to which data to be transmitted corresponding to the data transmission instruction is planned to be sent; generating a data communication frame corresponding to data to be transmitted, and adding an equipment identifier to a first preset position of the data communication frame; and transmitting the data communication frame added with the device identifier to each serial peripheral device interface slave device connected with the serial peripheral device interface master device through a host output slave input signal, wherein the serial peripheral device interface slave device is used for analyzing the data communication frame under the condition that the device identifier of the first preset position of the data communication frame is detected to be consistent with the device identifier of the serial peripheral device interface slave device.

Optionally, the serial peripheral interface master device and/or the serial peripheral interface slave device include three pins, including: a first pin for transmitting a serial clock signal for synchronizing clock frequencies between the serial peripheral interface master and the serial peripheral interface slave, a second pin for transmitting a host output slave input signal for transmitting data from the serial peripheral interface master to the serial peripheral interface slave, and a third pin for transmitting a host input slave output signal for transmitting data from the serial peripheral interface slave to the serial peripheral interface master.

Alternatively, in the case where the serial peripheral interface master does not transmit data to the serial peripheral interface slave, the master output slave input signal remains in a high state.

Optionally, the method further comprises: and adding a preamble at a second preset position of the data communication frame, wherein the preamble is used for setting a host output slave input signal to be in a low level state so as to indicate a starting position of the host output slave input signal for transmitting effective data, and the serial peripheral interface slave device is used for acquiring the data communication frame under the condition that the preamble is detected.

Optionally, the method further comprises: the receiving serial peripheral interface slave device responds to the data communication frame by inputting response data returned by the slave output signal through the host.

Optionally, the serial peripheral interface slave device is further configured to ignore the data communication frame if it is detected that the device identifier of the first preset location of the data communication frame does not coincide with the device identifier of the slave device.

Optionally, the data communication frame further includes: the system comprises a read-write flag field, an address field and a numerical field, wherein the read-write flag field is used for representing the operation type of a data communication frame on a serial peripheral interface slave device, and the operation type comprises: the address field is used for representing an address for performing read/write operation on the serial peripheral interface slave device, and the numerical value field is used for representing data which is required to be written/read from the address corresponding to the address field.

According to another aspect of the embodiments of the present application, there is also provided another data communication method, including: receiving a data communication frame sent by a serial peripheral interface main device through a host output slave input signal, wherein a first preset position of the data communication frame comprises a device identifier, and the device identifier is a device identifier of a serial peripheral interface slave device to which data to be transmitted corresponding to a determined data transmission instruction is planned to be sent under the condition that the serial peripheral interface main device receives the data transmission instruction sent by an upper software system; and under the condition that the equipment identifier of the first preset position of the data communication frame is detected to be consistent with the equipment identifier of the first preset position, analyzing the data communication frame.

According to another aspect of the embodiments of the present application, there is also provided a data communication apparatus including: the identifier determining module is used for determining the device identifier of the serial peripheral interface slave device to which the data to be transmitted corresponding to the data transmission instruction is planned to be transmitted under the condition that the serial peripheral interface master device receives the data transmission instruction sent by the upper software system; the identifier adding module is used for generating a data communication frame corresponding to data to be transmitted and adding the equipment identifier to a first preset position of the data communication frame; and the data frame transmission module is used for transmitting the data communication frame added with the device identifier to each serial peripheral device interface slave device connected with the serial peripheral device interface master device through a host output slave machine input signal, wherein the serial peripheral device interface slave device is used for analyzing the data communication frame under the condition that the device identifier of the first preset position of the data communication frame is detected to be consistent with the device identifier of the serial peripheral device interface slave device.

According to still another aspect of the embodiments of the present application, there is also provided an electronic device, including: the system comprises a memory and a processor for running a program stored in the memory, wherein the program runs to execute a data communication method.

According to still another aspect of the embodiments of the present application, there is further provided a nonvolatile storage medium, where the nonvolatile storage medium includes a stored computer program, and a device where the nonvolatile storage medium is located performs the data communication method by running the computer program.

In the embodiment of the application, under the condition that the serial peripheral interface master equipment receives a data transmission instruction sent by an upper software system, determining an equipment identifier of a serial peripheral interface slave equipment to which data to be transmitted corresponding to the data transmission instruction is planned to be sent; generating a data communication frame corresponding to data to be transmitted, and adding an equipment identifier to a first preset position of the data communication frame; and sending the data communication frame added with the equipment identifier to each serial peripheral equipment interface slave equipment connected with the serial peripheral equipment interface master equipment through a host output slave machine input signal, wherein the serial peripheral equipment interface slave equipment is used for analyzing the data communication frame under the condition that the equipment identifier at the first preset position of the data communication frame is detected to be consistent with the equipment identifier of the serial peripheral equipment interface slave equipment, and the data communication can be carried out without providing a chip selection pin for the serial peripheral equipment interface master equipment and a hardware chip selection signal line between the master equipment and the slave equipment by carrying the equipment identifier field in the data frame sent by the serial peripheral equipment interface master equipment, so that the purpose of reducing the use of input and output resources of a master control unit where the serial peripheral equipment interface master equipment is located is achieved, and further the technical problem that the input and output resources are occupied too much because the master equipment can send a plurality of identical input and output signals as the chip selection signals when a plurality of serial peripheral equipment interface peripherals exist in the related technology is solved.

Drawings

The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiments of the application and together with the description serve to explain the application and do not constitute an undue limitation to the application. In the drawings:

fig. 1 is a block diagram of a hardware architecture of a computer terminal (or electronic device) for implementing a method of data communication according to an embodiment of the present application;

FIG. 2 is a schematic diagram of a method flow of data communication provided according to an embodiment of the present application;

fig. 3 is a schematic diagram of a method flow of SPI soft chip selection according to an embodiment of the present application;

FIG. 4 is a schematic diagram of an SPI bus topology provided in accordance with an embodiment of the present application;

FIG. 5 is a schematic diagram of an SPI read/write operation data frame provided in accordance with an embodiment of the present application;

FIG. 6 is a schematic diagram of an example of a timing of a newly added field provided in accordance with an embodiment of the present application;

FIG. 7 is a schematic diagram of another method flow of data communication provided in accordance with an embodiment of the present application;

fig. 8 is a schematic structural diagram of a data communication device according to an embodiment of the present application.

Detailed Description

In order to make the present application solution better understood by those skilled in the art, the following description will be made in detail and with reference to the accompanying drawings in the embodiments of the present application, it is apparent that the described embodiments are only some embodiments of the present application, not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments herein without making any inventive effort, shall fall within the scope of the present application.

It should be noted that the terms "first," "second," and the like in the description and claims of the present application and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that embodiments of the present application described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

The 5G expansion type small base station comprises a three-level architecture of a baseband unit BBU, a convergence unit HUB and a radio frequency unit pRRU, wherein pRRU is used for realizing functions of receiving and processing baseband signals, receiving and transmitting radio frequency signals and the like. In the development of software and hardware design of pRRU, in addition to many high-speed interfaces, low-speed interfaces are widely used, such as I2C (Inter-Integrated Circuit, integrated circuit bus), UART (Universal Asynchronous Receiver/transceiver), SPI, etc. These low rate interfaces are commonly used as communication, configuration, and management interfaces as interfaces between the chips. For example, SPI may be used as a communication interface between SoC (System on Chip), PS (programming System, programmable System) and PL (programmable logic ), I2C may be used as a configuration interface for a clock Chip, and UART may be used as a debug interface for SoC and PS.

In the related art, SPI defines a four-wire interface, and SPI devices communicate in a full duplex mode, and a common bus topology includes: a point-to-point master-slave mode, and a point-to-multipoint master-multi-slave mode. There are four modes of operation for SPI, and the communication mode of the host is controlled by CPOL (Clock Polarity) which defines the level of the Clock line in the idle state, and CPHA (Clock Phase) which defines the timing (i.e., phase) of the data bits relative to the Clock line. The SPI bus has the advantages of relatively simple structure, easy realization and good expansibility. At present, the SPI standard only provides bus interface characteristics, and to realize SPI communication between master and slave devices, a corresponding frame format is defined for accessing a slave, mainly two operations of reading and writing.

However, when there are multiple SPI peripherals, the master control unit (for example, MCU (Microcontroller Unit, control unit) or FPGA (Field Programmable Gate Array, programmable logic array)) where the serial peripheral interface master device is located needs to use the same number of IOs (input output) as the chip select signal, regardless of the point-to-point mode or the point-to-multipoint mode, which has a problem of occupying more IO resources.

In order to solve the above-mentioned problems, related solutions are provided in the embodiments of the present application, and the following detailed description is provided.

In accordance with the embodiments of the present application, there is provided a method embodiment of data communication, it being noted that the steps illustrated in the flowcharts of the figures may be performed in a computer system, such as a set of computer executable instructions, and, although a logical order is illustrated in the flowcharts, in some cases, the steps illustrated or described may be performed in an order other than that illustrated herein.

The method embodiments provided by the embodiments of the present application may be performed in a mobile terminal, a computer terminal, or similar computing device. Fig. 1 shows a block diagram of a hardware structure of a computer terminal (or electronic device) for implementing a data communication method. As shown in fig. 1, the computer terminal 10 (or electronic device) may include one or more processors 102 (shown as 102a, 102b, … …,102 n) which may include, but are not limited to, a microprocessor MCU or a processing device such as a programmable logic device FPGA, a memory 104 for storing data, and a transmission device 106 for communication functions. In addition, the method may further include: a display, an input/output interface (I/O interface), a Universal Serial BUS (USB) port (which may be included as one of the ports of the BUS), a network interface, a power supply, and/or a camera. It will be appreciated by those of ordinary skill in the art that the configuration shown in fig. 1 is merely illustrative and is not intended to limit the configuration of the electronic device described above. For example, the computer terminal 10 may also include more or fewer components than shown in FIG. 1, or have a different configuration than shown in FIG. 1.

It should be noted that the one or more processors 102 and/or other data processing circuits described above may be referred to generally herein as "data processing circuits. The data processing circuit may be embodied in whole or in part in software, hardware, firmware, or any other combination. Furthermore, the data processing circuitry may be a single stand-alone processing module, or incorporated, in whole or in part, into any of the other elements in the computer terminal 10 (or electronic device). As referred to in the embodiments of the present application, the data processing circuit acts as a processor control (e.g., selection of the path of the variable resistor termination to interface).

The memory 104 may be used to store software programs and modules of application software, such as program instructions/data storage devices corresponding to the data communication method in the embodiments of the present application, and the processor 102 executes the software programs and modules stored in the memory 104, thereby executing various functional applications and data processing, that is, implementing the data communication method described above. Memory 104 may include high-speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory 104 may further include memory located remotely from the processor 102, which may be connected to the computer terminal 10 via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.

The transmission means 106 is arranged to receive or transmit data via a network. The specific examples of the network described above may include a wireless network provided by a communication provider of the computer terminal 10. In one example, the transmission device 106 includes a network adapter (Network Interface Controller, NIC) that can connect to other network devices through a base station to communicate with the internet. In one example, the transmission device 106 may be a Radio Frequency (RF) module for communicating with the internet wirelessly.

The display may be, for example, a touch screen type Liquid Crystal Display (LCD) that may enable a user to interact with a user interface of the computer terminal 10 (or electronic device).

In the above operating environment, the embodiment of the present application provides a data communication method, and fig. 2 is a schematic diagram of a data communication method flow provided according to the embodiment of the present application, as shown in fig. 2, where the method includes the following steps:

step S202, under the condition that a serial peripheral interface master device (SPI master device) receives a data transmission instruction sent by an upper software system, determining a device identifier of a serial peripheral interface slave device (SPI slave device) to which data to be transmitted corresponding to the data transmission instruction is planned to be sent;

step S204, generating a data communication frame corresponding to data to be transmitted, and adding a device identifier to a first preset position of the data communication frame;

in step S206, the data communication frame added with the device identifier is sent to each SPI slave device connected to the SPI master device through the master output slave input signal, where the SPI slave device is configured to parse the data communication frame when detecting that the device identifier of the first preset location of the data communication frame is consistent with the device identifier of the SPI master device.

Compared with the prior art, the SPI master device is used for leading out a chip selection signal to the SPI slave device, and the hard chip selection scheme of the slave device is realized by controlling the level of the chip selection signal, the selected SPI slave device is identified through the device identifier field carried in the communication data frame issued by the SPI master device in the software layer, so that the purposes of reducing IO use of a master control unit where the SPI master device is located, reducing hardware PCB (Printed Circuit Board) wiring and facilitating system hardware design are achieved, and the problems that the master device can send a plurality of identical input and output signals as the chip selection signal when a plurality of serial peripheral device interface peripheral devices exist in the prior art are solved, and excessive occupation of input and output resources exists are solved.

The data communication method in steps S202 to S206 of the embodiment of the present application is further described below.

Fig. 3 is a schematic diagram of a method flow of SPI soft chip selection according to an embodiment of the present application, as shown in fig. 3.

First, serial peripheral interface devices (SPI devices, including a master device and a slave device) are initialized, device identifiers (device ids) of each SPI device are configured, signal connections among the devices are configured, and a bus topology structure is changed from four-wire connection to three-wire connection in the related art, as shown in FIG. 4, and the following is specific.

In some embodiments of the present application, the SPI master device and/or the SPI slave device include three pins, including: a first pin (SCLK pin) for transmitting a serial clock signal for synchronizing clock frequencies between the SPI master device and the SPI slave device, a second pin (MOSI pin) for transmitting a master output slave input signal for transmitting data from the SPI master device to the SPI slave device, and a third pin (MISO pin) for transmitting a master input slave output signal for transmitting data from the SPI slave device to the SPI master device.

In this embodiment, the four-wire connection topology structure in the related art shown in the left side of fig. 4 is changed to the three-wire connection topology structure shown in the right side of fig. 4, where SCLK is a serial clock signal, generated by a master device, MOSI is a master output slave input signal, MISO is a master input slave output signal, SS is a chip select signal in the related art, sent by the master device, and the low level is effective.

After initializing the serial peripheral interface DEVICE, the frame format of the SPI data communication frame may be defined, and fig. 5 is a schematic diagram of an SPI read/write operation data frame provided according to an embodiment of the present application, and as shown in fig. 5, in the embodiment of the present application, a DEVICE identifier control field (i.e. 51-50 bits DEVICE ID shown in fig. 5) and a preamble control field (i.e. 53-52 bits PRE shown in fig. 5) are added to a frame structure of the data communication frame, where the preamble is used to synchronize a master DEVICE (master) and a slave DEVICE (slave) to confirm a data start position, the DEVICE identifier is used by the SPI slave DEVICE (slave) to match its DEVICE identifier to determine whether to be chip-selected, and the DEVICE identifier of each SPI slave may be flexibly configured by the SPI slave through an internal register or by an external hardware pin through a resistor pull-down.

In addition, the data communication frame further includes: a reserved field (i.e., 49 bits RES shown in fig. 5), a read-write flag field (i.e., 48 bits shown in fig. 5), an ADDRESS field (i.e., 47-32 bits ADDRESS shown in fig. 5), and a number field (i.e., 31-0 bits DATA shown in fig. 5), wherein the read-write flag field is used to characterize a type of operation performed by a DATA communication frame on an SPI slave device, the type of operation including: the data writing method comprises the steps of reading operation (R) and writing operation (R), wherein an address field is used for representing an address for reading/writing operation on the SPI slave device, and a numerical value field is used for representing data which is required to be written/read from the address corresponding to the address field.

After the initialization of the serial peripheral interface device and the definition of the data communication frame are completed, data communication between the SPI master device (SPI master) and the SPI slave device (SPI slave) can be performed.

In some embodiments of the present application, in the case where the SPI master device is not transmitting data to the SPI slave device, the master output slave input signal remains in a high state, i.e., both the current SPI master device (SPI master) and the SPI slave device (SPI slave) are in an idle state.

Under the condition that a data transmission instruction sent by an upper software system is received, the SPI master equipment starts whole-frame data transmission, specifically, generates a data communication frame corresponding to data to be transmitted, determines an equipment identifier of an SPI slave equipment to which the data to be transmitted corresponding to the data transmission instruction is planned to be sent, and adds the equipment identifier to a first preset position (51-50 bits) of the data communication frame

In addition, in some embodiments of the present application, a preamble is further added at a second preset position (53-52 bits) of the data communication frame, where the preamble is used to set the master output slave input signal to a low level state, so as to indicate a start position of the master output slave input signal where valid data is transmitted.

Specifically, because of the timing change caused by the change of the bus structure, in this embodiment, synchronization may be performed through the preamble, when the SPI master device does not perform data communication frame transmission, the master output slave input signal always keeps high level, as an idle state, when the SPI master device performs data communication frame transmission, the master output slave input signal state is pulled down through the preamble, as a start flag of data communication frame transmission, the data communication frame transmission is completed, and the master output slave input signal state is pulled up, and remains idle state, as shown in fig. 6.

The SPI slave device acquires a data communication frame under the condition that the preamble is detected, the framing of effective data is completed, after the data communication frame is acquired, the SPI slave device (SPI slave device) analyzes a device identifier (device id) field of a first preset position in the data communication frame, after the SPI slave device analyzes the device id field, the SPI slave device is matched with the device id of the SPI slave device, whether the device id field obtained by analysis is consistent with the device id of the SPI slave device or not is judged, if so, chip selection is successful, the SPI slave device generates enabling signals of other fields in the analysis frame, continues to analyze other fields in the command frame, processes the enabling signals, and outputs corresponding read/write bus signals for subsequent writing or reading operation; if the device identifiers are inconsistent, the chip selection fails, the SPI slave device does not execute any operation, namely the SPI slave device is also used for ignoring the data communication frame under the condition that the device identifiers at the first preset position of the data communication frame are detected to be inconsistent with the device identifiers of the SPI slave device.

In addition, the SPI master device can also receive response data returned by the SPI slave device in response to the data communication frame through the host input slave output signal.

According to the scheme, the device id field is carried in the SPI master sending data frame so as to identify the SPI slave selected by the chip, the SPI master is not required to provide chip selection pins, and a hardware chip selection signal line between the master and the slave is not required, in a multi-SPI peripheral system, IO use of a main control unit where the SPI master is located is reduced, hardware PCB wiring is reduced, and system hardware design is facilitated.

The embodiment of the application also provides another data communication method, and fig. 7 is a schematic diagram of a flow of another data communication method according to the embodiment of the application, as shown in fig. 7, where the method includes the following steps:

step S702, receiving a data communication frame sent by SPI master equipment through a host output slave input signal, wherein a first preset position of the data communication frame comprises an equipment identifier, and the equipment identifier is an equipment identifier of SPI slave equipment to which data to be transmitted corresponding to a determined data transmission instruction is planned to be sent under the condition that the SPI master equipment receives the data transmission instruction sent by an upper software system;

in step S704, when it is detected that the device identifier at the first preset position of the data communication frame matches the device identifier of the data communication frame, the analysis process is performed on the data communication frame.

Note that, in this embodiment, a method embodiment corresponding to the data communication method shown in fig. 2 is provided, and therefore, the explanation of the data communication method is also applicable to the embodiment of the present application, and is not repeated here.

According to an embodiment of the present application, there is also provided an embodiment of a data communication apparatus. Fig. 8 is a schematic structural diagram of a data communication device according to an embodiment of the present application. As shown in fig. 8, the apparatus includes:

the identifier determining module 80 is configured to determine, when the serial peripheral interface master device receives a data transmission instruction sent by the upper software system, a device identifier of a serial peripheral interface slave device to which data to be transmitted corresponding to the data transmission instruction is scheduled to be sent;

optionally, the serial peripheral interface master device and/or the serial peripheral interface slave device include three pins, including: a first pin for transmitting a serial clock signal for synchronizing clock frequencies between the serial peripheral interface master and the serial peripheral interface slave, a second pin for transmitting a host output slave input signal for transmitting data from the serial peripheral interface master to the serial peripheral interface slave, and a third pin for transmitting a host input slave output signal for transmitting data from the serial peripheral interface slave to the serial peripheral interface master.

Alternatively, in the case where the serial peripheral interface master does not transmit data to the serial peripheral interface slave, the master output slave input signal remains in a high state.

An identifier adding module 82, configured to generate a data communication frame corresponding to data to be transmitted, and add a device identifier to a first preset location of the data communication frame;

optionally, the identifier adding module 82 is further configured to: and adding a preamble at a second preset position of the data communication frame, wherein the preamble is used for setting a host output slave input signal to be in a low level state so as to indicate a starting position of the host output slave input signal for transmitting effective data, and the serial peripheral interface slave device is used for acquiring the data communication frame under the condition that the preamble is detected.

Optionally, the data communication frame further includes: the system comprises a read-write flag field, an address field and a numerical field, wherein the read-write flag field is used for representing the operation type of a data communication frame on a serial peripheral interface slave device, and the operation type comprises: the address field is used for representing an address for performing read/write operation on the serial peripheral interface slave device, and the numerical value field is used for representing data which is required to be written/read from the address corresponding to the address field.

The data frame transmission module 84 is configured to send, by using a host output slave input signal, a data communication frame to which a device identifier is added to each serial peripheral interface slave device connected to the serial peripheral interface master device, where the serial peripheral interface slave device is configured to parse the data communication frame when detecting that the device identifier at the first preset location of the data communication frame matches its own device identifier.

Optionally, the data frame transmission module 84 is further configured to: the receiving serial peripheral interface slave device responds to the data communication frame by inputting response data returned by the slave output signal through the host.

Optionally, the serial peripheral interface slave device is further configured to ignore the data communication frame if it is detected that the device identifier of the first preset location of the data communication frame does not coincide with the device identifier of the slave device.

The respective modules in the data communication apparatus may be program modules (for example, a set of program instructions for implementing a specific function), or may be hardware modules, and for the latter, they may be represented by the following forms, but are not limited thereto: the expression forms of the modules are all a processor, or the functions of the modules are realized by one processor.

It should be noted that, the data communication apparatus provided in the present embodiment may be used to perform the data communication method shown in fig. 2, so the explanation of the data communication method is also applicable to the embodiments of the present application, and is not repeated here.

The embodiment of the application also provides a nonvolatile storage medium, which comprises a stored computer program, wherein the equipment where the nonvolatile storage medium is located executes the following data communication method by running the computer program: under the condition that the serial peripheral interface main equipment receives a data transmission instruction sent by an upper software system, determining an equipment identifier of the serial peripheral interface slave equipment to which data to be transmitted corresponding to the data transmission instruction is planned to be sent; generating a data communication frame corresponding to data to be transmitted, and adding an equipment identifier to a first preset position of the data communication frame; and transmitting the data communication frame added with the device identifier to each serial peripheral device interface slave device connected with the serial peripheral device interface master device through a host output slave input signal, wherein the serial peripheral device interface slave device is used for analyzing the data communication frame under the condition that the device identifier of the first preset position of the data communication frame is detected to be consistent with the device identifier of the serial peripheral device interface slave device.

Or receiving a data communication frame sent by the serial peripheral interface main equipment through a host output slave input signal, wherein a first preset position of the data communication frame comprises an equipment identifier, and the equipment identifier is the equipment identifier of the serial peripheral interface slave equipment to which the data to be transmitted corresponding to the determined data transmission instruction is planned to be sent under the condition that the serial peripheral interface main equipment receives the data transmission instruction sent by the upper software system; and under the condition that the equipment identifier of the first preset position of the data communication frame is detected to be consistent with the equipment identifier of the first preset position, analyzing the data communication frame.

The foregoing embodiment numbers of the present application are merely for describing, and do not represent advantages or disadvantages of the embodiments.

In the foregoing embodiments of the present application, the descriptions of the embodiments are emphasized, and for a portion of this disclosure that is not described in detail in this embodiment, reference is made to the related descriptions of other embodiments.

In the several embodiments provided in the present application, it should be understood that the disclosed technology content may be implemented in other manners. The above-described embodiments of the apparatus are merely exemplary, and the division of the units, for example, may be a logic function division, and may be implemented in another manner, for example, a plurality of units or components may be combined or may be integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be through some interfaces, units or modules, or may be in electrical or other forms.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

In addition, each functional unit in each embodiment of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.

The integrated units, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application may be embodied in essence or a part contributing to the prior art or all or part of the technical solution in the form of a software product stored in a storage medium, including several instructions to cause a computer device (which may be a personal computer, a server or a network device, etc.) to perform all or part of the steps of the methods described in the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a removable hard disk, a magnetic disk, or an optical disk, or other various media capable of storing program codes.

The foregoing is merely a preferred embodiment of the present application and it should be noted that modifications and adaptations to those skilled in the art may be made without departing from the principles of the present application and are intended to be comprehended within the scope of the present application.

Claims (11)

1. A method of data communication, comprising:

under the condition that the serial peripheral interface master equipment receives a data transmission instruction sent by an upper software system, determining an equipment identifier of a serial peripheral interface slave equipment to which data to be transmitted corresponding to the data transmission instruction is planned to be sent;

generating a data communication frame corresponding to the data to be transmitted, and adding the equipment identifier to a first preset position of the data communication frame;

and sending the data communication frame added with the device identifier to each serial peripheral device interface slave device connected with the serial peripheral device interface master device through a host output slave input signal, wherein the serial peripheral device interface slave device is used for analyzing the data communication frame under the condition that the device identifier of the first preset position of the data communication frame is detected to be consistent with the device identifier of the serial peripheral device interface slave device.

2. The method according to claim 1, wherein the serial peripheral interface master and/or the serial peripheral interface slave comprises three pins, comprising: a first pin for transmitting a serial clock signal for synchronizing a clock frequency between the serial peripheral interface master and the serial peripheral interface slave, a second pin for transmitting the host output slave input signal for transmitting data from the serial peripheral interface master to the serial peripheral interface slave, and a third pin for transmitting a host input slave output signal for transmitting data from the serial peripheral interface slave to the serial peripheral interface master.

3. The data communication method according to claim 2, wherein the master output slave input signal remains in a high state in the case where the serial peripheral interface master does not transmit data to the serial peripheral interface slave.

4. A data communication method according to claim 3, characterized in that the method further comprises:

and adding a preamble at a second preset position of the data communication frame, wherein the preamble is used for setting the master output slave input signal to be in a low level state so as to indicate the starting position of valid data transmitted in the master output slave input signal, and the serial peripheral interface slave device is used for acquiring the data communication frame under the condition that the preamble is detected.

5. The data communication method according to claim 2, characterized in that the method further comprises:

and receiving response data returned by the serial peripheral interface slave device in response to the data communication frame through the host input slave output signal.

6. The data communication method according to claim 5, wherein the serial peripheral interface slave device is further configured to ignore the data communication frame if it is detected that the device identifier of the first preset location of the data communication frame does not coincide with the device identifier of itself.

7. The data communication method according to claim 1, wherein the data communication frame further comprises: a read-write flag field, an address field, and a numerical field, wherein the read-write flag field is used for characterizing a type of operation performed by the data communication frame on the serial peripheral interface slave device, the type of operation includes: and the address field is used for representing an address for performing read/write operation on the serial peripheral interface slave device, and the numerical value field is used for representing data which is required to be written/read from the address corresponding to the address field.

8. A method of data communication, comprising:

receiving a data communication frame sent by a serial peripheral interface main device through a host output slave input signal, wherein a first preset position of the data communication frame comprises a device identifier, and the device identifier is a device identifier of a serial peripheral interface slave device to which data to be transmitted corresponding to a determined data transmission instruction is planned to be sent under the condition that the serial peripheral interface main device receives the data transmission instruction sent by an upper software system;

and analyzing the data communication frame under the condition that the equipment identifier of the first preset position of the data communication frame is detected to be consistent with the equipment identifier of the equipment identifier.

9. A data communication apparatus, comprising:

the device comprises an identifier determining module, a data transmission module and a data transmission module, wherein the identifier determining module is used for determining a device identifier of a serial peripheral device interface slave device to which data to be transmitted corresponding to a data transmission instruction is planned to be transmitted under the condition that the serial peripheral device interface master device receives the data transmission instruction sent by an upper software system;

an identifier adding module, configured to generate a data communication frame corresponding to the data to be transmitted, and add the device identifier to a first preset position of the data communication frame;

and a data frame transmission module, configured to send the data communication frame to which the device identifier is added, to each of the serial peripheral interface slave devices connected to the serial peripheral interface master device, by using a host output slave input signal, where the serial peripheral interface slave device is configured to parse the data communication frame when detecting that the device identifier of the first preset position of the data communication frame matches the device identifier of the serial peripheral interface slave device.

10. An electronic device, comprising: a memory and a processor for executing a program stored in the memory, wherein the program is executed to perform the data communication method of any one of claims 1 to 8.

11. A non-volatile storage medium, characterized in that the non-volatile storage medium comprises a stored computer program, wherein the device in which the non-volatile storage medium is located performs the data communication method according to any one of claims 1 to 8 by running the computer program.