CN117687347B - Synchronous wave recording method and device based on FPGA and communication network - Google Patents

Synchronous wave recording method and device based on FPGA and communication network Download PDF

Info

Publication number
CN117687347B
CN117687347B CN202410145364.2A CN202410145364A CN117687347B CN 117687347 B CN117687347 B CN 117687347B CN 202410145364 A CN202410145364 A CN 202410145364A CN 117687347 B CN117687347 B CN 117687347B
Authority
CN
China
Prior art keywords
controller
fpga
online
mcu
controllers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202410145364.2A
Other languages
Chinese (zh)
Other versions
CN117687347A (en
Inventor
余翔
乐绪鑫
李俊贤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Three Gorges Zhikong Technology Co ltd
China Three Gorges Renewables Group Co Ltd
Original Assignee
Three Gorges Zhikong Technology Co ltd
China Three Gorges Renewables Group Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Three Gorges Zhikong Technology Co ltd, China Three Gorges Renewables Group Co Ltd filed Critical Three Gorges Zhikong Technology Co ltd
Priority to CN202410145364.2A priority Critical patent/CN117687347B/en
Publication of CN117687347A publication Critical patent/CN117687347A/en
Application granted granted Critical
Publication of CN117687347B publication Critical patent/CN117687347B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Abstract

The invention discloses a synchronous wave recording method and a synchronous wave recording device based on an FPGA and a communication network. All controllers set the same prerecording time and wave recording time, and the obtained wave form starts at the same time and the wave recording data with the same time span. All controller recording data are transmitted to a human-computer interface through Ethernet and then synthesized into a recording file.

Description

Synchronous wave recording method and device based on FPGA and communication network
Technical Field
The invention belongs to the technical field of fault monitoring, and particularly relates to a synchronous wave recording method and device based on an FPGA and a communication network, in particular to a synchronous wave recording method and device based on the FPGA and the communication network in an excitation system.
Background
The automatic control device needs to measure the external analog quantity for state detection, limit protection or control calculation, needs to receive the external key or switch state by the opening quantity, needs to display the internal limit protection state by the opening quantity, and needs to output the analog quantity for communication with the monitoring system. The recorded data composed of the analog input, analog output, switching input and switching output and the result of the control technology can be stored in a fixed-length data area as a data point. If a storage area is opened in the controller, the data points are circularly recorded according to the first-in first-out principle, and the recording function is realized.
When an operating system is built in the controller after a wave recording command is received, taking a currently recorded data point as a time zero point, multiplying the pre-recording time by the recording frequency of the wave recording to obtain a waveform starting point, and multiplying the subsequent recording time by the recording frequency of the wave recording to obtain how many data points need to be recorded to finish the wave recording command.
As shown in fig. 1, one waveform data occupies 10 bytes in the example, wherein 3 analog amounts occupy 2 bytes each, 16 on amounts occupy 1 bit each, 2 bytes in total, and 16 on amounts occupy 1 bit each, 2 bytes in total.
Fig. 2 shows a memory area in which 3000 pieces of waveform data are stored, and the waveform data are recorded to the tail portion and then automatically re-recorded from the start address.
If a waveform recording frequency is 50Hz, that is, 20ms, and one waveform data is recorded, the waveform needs to be prerecorded for 4 seconds, that is, 200 waveform data, and then 14 seconds, that is, 700 data are recorded, then the starting position and the ending position of the waveform are calculated according to the current recorded position when a wave recording command is received. As shown in fig. 3, when the waveform data writing pointer points to the 397 th data address and a wave recording command is received, the waveform start point is the 197 th data, the waveform end point is the 1096 th data, when the waveform data collection is completed after the 1096 th data is stored, the waveform data can be immediately uploaded to the human-computer interface, or a mark is set in the wave recording data refreshed at a fixed time, and the human-computer interface issues the wave uploading command when appropriate according to the mark. The refreshing of the data area is paused before the waveform uploading so as not to cover the effective data, and the refreshing can be resumed after the recording data is transmitted.
The current industrial field has popular digital wave recorder, which can start wave recording manually or according to preset conditions, the wave data recording frequency can reach more than 10kHz, but the wave provided by the wave recorder can only see the process of changing external state quantity, and the change of internal state quantity of the industrial controller equipment can not be recorded, so that the analysis of the cause of the change is inconvenient. Because the oscillograph does not monitor the internal switching value of the controller comprehensively, for example, the abnormal control is caused by the abnormal starting quantity signal of the internal hardware of the controller, only the phenomenon that the external state obtained from the oscillograph is out of control can be seen, and if the waveform is recorded in the controller, the corresponding change of the output control is caused by the abnormal measured value of the control object.
In addition, the analog quantity state measured by the oscillograph and the analog quantity state measured by the controller may be inconsistent due to the fault of the measuring line, taking the fault of the broken line of the exciting voltage transformer PT as an example, the external digital oscillograph may only record that the voltage has tiny fluctuation, and the fluctuation cause cannot be analyzed. The wave recording waveform of the excitation controller can see that the 2-phase voltage amplitude of the online control channel is halved at the fault moment, at the moment, the excitation system switches the control channel, and the other control channel uses another voltage transformer PT signal; meanwhile, the probability of faults is extremely low, so that the other control channel still takes the generator terminal voltage as a control object, and the stable operation is kept continuously. The external voltage monitored by the oscillograph still keeps stable in the fault of the broken line of the voltage transformer PT, but the measuring signal output by the voltage transformer PT is abnormal because of hardware faults, and the fault phenomenon cannot be reflected in the waveform of the oscillograph.
The automatic control device also has a wave recording function, and although the data recording frequency is far lower than that of the wave recorder, the waveform data also comprises a plurality of internal state quantities such as control quantity, limit protection mark and the like, which cannot be directly obtained by the wave recorder. The waveform recorded by the equipment is more suitable to be used in fault analysis.
The current automatic control device may have a plurality of controllers for coordinated operation, such as an excitation system configured with 3 intelligent power cabinets, a control channel with 2 excitation regulating cabinets, and a controller with 3 intelligent power cabinets. If waveforms of the controllers are acquired simultaneously during faults, the obtained information is more comprehensive, and fault analysis is facilitated. The automatic wave recording function of each controller may be started by using the analog quantity or the switching quantity, and the wave recording function of all controllers may not be started, because the functions are different, the analog quantity and the switching quantity of each controller are not completely consistent. It is also difficult to coordinate all controllers to start the recording function using an on-line controller. These controllers are used for real-time control, and usually do not communicate in an interrupt mode, while the query mode does not occupy too much MCU resources, but the communication delay is uncertain. If all controllers are informed to start recording by adopting a communication mode, the waveform starting moments of all controllers are possibly inconsistent, and analysis and comparison are not facilitated. As shown in fig. 4, the outputs of the two controllers actually have a causal relationship, and because the starting moments of the wave recording function are inconsistent, the state abrupt change moments are different when the two state curves are placed in the same coordinate axis, which is not beneficial to state analysis.
Disclosure of Invention
The invention aims to solve the problem that the waveform starting point moments of all controllers are inconsistent due to the fact that a wave recording device for recording analog quantity data and wave recording data in automatic control equipment cannot work in a coordinated mode, and the analysis and comparison of the actual causality relation of the output of different controllers are not facilitated.
The invention provides a synchronous wave recording method based on FPGA and communication network, which is used for enabling an on-line controller which receives a wave recording command of a human-computer interface or detects a synchronous wave recording triggering event to cooperate with other off-line controllers to synchronously record waves, enabling all controllers to synchronously send wave recording data to the human-computer interface through a network port, and the synchronous wave recording method comprises the following steps:
step 1, an MCU of an online controller sends a synchronous wave recording command to an FPGA of the online controller, after the FPGA of the online controller receives the synchronous wave recording command, the synchronous wave recording command is sent to other non-online controllers in a group through optical fiber communication, and a timer input capturing interrupt of a wave recording function corresponding to the MCU of the online controller is triggered in a delayed manner;
step 2, after receiving the synchronous wave recording command, the FPGA of the non-online controller immediately triggers the timer input capturing interruption of the MCU of the non-online controller, and starts wave recording of each non-online controller;
immediately triggering a timer input capturing interrupt of an MCU of the online controller after the delay is finished, and starting wave recording of the online controller;
the time from the FPGA of the on-line controller to the FPGA of the other off-line controllers for receiving the synchronous wave-recording command through the optical fiber is communication delay, and the delay is set to be the same as the communication delay;
step 3, all online and non-online controllers record recording data according to the same pre-recording time and the same subsequent recording time, all online and non-online controllers transmit the recording data to a human-computer interface through Ethernet after waveform recording is completed, and the human-computer interface gathers all online and non-online controllers recording data into a recording data file;
all online and non-online controllers comprise an FPGA and an MCU, the MCU sends communication target ID and data to the FPGA through a parallel port or SPI, or reads and receives data from the FPGA, a pin of the FPGA is connected with a corresponding pin of a timer channel of the MCU, the timer is triggered by an output signal of the FPGA to capture and interrupt, the timer is used for starting a wave recording function of the MCU, each MCU is communicated with a human-computer interface through a network port, and each FPGA is communicated through an optical fiber.
Further, the online controller is any one of the first controller and the second controller determined according to a preset preference sequence, and the non-online controller is the rest controller;
the first controller is used for collecting external recording data, and the second controller is used for outputting control signals to control industrial equipment according to the external recording data.
A second object of the present invention is to provide a synchronous wave recording device based on FPGA and communication network, including: the system comprises a first controller, a second controller and a human-computer interface, wherein the first controller is used for acquiring external wave recording data, the second controller is used for outputting control signals according to the external wave recording data to control industrial equipment, the first controller and the second controller both comprise an FPGA and an MCU, the MCU sends a communication target ID and data to the FPGA through a parallel port or an SPI, or reads and receives data from the FPGA, a pin of the FPGA is connected with a corresponding pin of a timer channel of the MCU, the timer is triggered to capture and interrupt by the FPGA output signals, the MCU of the first controller and the MCU of the second controller are used for starting the wave recording function of the MCU, the MCU of the first controller and the MCU of the second controller are communicated with the human-computer interface through network interfaces, and the FPGA of the first controller and the FPGA of different first controllers or the FPGA of different second controllers are communicated through optical fibers;
the first controller or the second controller is preset with a preferred sequence to determine which controller is used as an online controller, and the online controller receives a wave recording command of the human-computer interface or cooperates with other non-online controllers to synchronously record waves after detecting a synchronous wave recording trigger event, so that all controllers synchronously transmit wave recording data to the human-computer interface through a network port;
the online controller and the non-online controller cooperatively perform synchronous wave recording according to the following steps:
the MCU of the online controller sends a synchronous wave-recording command to the FPGA of the online controller, after the FPGA of the online controller receives the synchronous wave-recording command, the synchronous wave-recording command is sent to other non-online controllers in a group through optical fiber communication, and the MCU of the online controller is triggered in a delayed manner to input a capturing interrupt corresponding to a timer of a wave-recording function;
the FPGA of the off-line controller immediately sends a timer input capturing interrupt triggering the MCU of the off-line controller after receiving the synchronous wave recording command, and starts wave recording of each off-line controller;
immediately triggering a timer input capturing interrupt of an MCU of the online controller after the delay is finished, and starting wave recording of the online controller;
the time from the FPGA of the on-line controller to the FPGA of the other off-line controllers to receive the synchronous wave-recording command through the optical fiber is communication delay, and the delay is set to be the same as the communication delay.
Further, the communication delay is obtained by measurement, and the difference in communication delay between all controllers is not more than 1 μs.
Furthermore, the synchronous wave recording function data of all on-line and off-line controllers are consistent in prerecording time, the follow-up recording time is consistent, the wave recording data of all on-line and off-line controllers after waveform recording is completed are transmitted to a human-computer interface through Ethernet, and the wave recording data of all on-line and off-line controllers are summarized into a wave recording data file through the human-computer interface.
Further, the network ports of the MCU of the first controller and the MCU of the second controller are communicated with the human-computer interface through an exchanger.
Further, the first controller is a control channel controller in the excitation system, and the second controller is an intelligent power cabinet controller in the excitation system.
The beneficial effects of the invention are as follows: the on-line controller sets the communication compensation delay which is the same as the communication delay after receiving the synchronous wave recording command, and triggers the input capture interruption of the timer of the MCU of the on-line controller after the communication compensation delay, so that the on-line controller and other off-line controllers can be ensured to start the wave recording function at the same time. The synchronous wave recording function data prerecording time of all the on-line and off-line controllers is consistent, the subsequent recording time is consistent, after waveform recording is completed, all the on-line and off-line controllers transmit the wave recording data to a human-computer interface through the Ethernet, and the human-computer interface gathers the wave recording data of all the on-line and off-line controllers into a wave recording data file. Facilitating analysis of the causal relationships that actually exist for the outputs of the different controllers.
In the prior art, because the functions are different, the analog quantity and the switching value of the access of each controller are not completely consistent, the phenomenon that the wave recording function of all controllers cannot be started possibly occurs when the analog quantity or the switching value is used for starting the automatic wave recording function of each controller, and the problem that the wave recording function is started simultaneously when all controllers are coordinated by using an online controller exists is solved.
Drawings
FIG. 1 is a chart showing the offset of each state quantity in recording data relative to the start address;
FIG. 2 is a schematic diagram of circularly stored recording data;
FIG. 3 is a diagram of recording data generated in response to a recording command;
FIG. 4 illustrates the offset caused by the different start moments of the two controller wave recording functions;
FIG. 5 is a schematic diagram of a comparison of input capture and output of a timer channel;
FIG. 6 is a schematic diagram of an optical fiber communication network within the excitation system configured with 3 intelligent power cabinets;
FIG. 7 is a block diagram of a first or second controller;
FIG. 8 is a schematic diagram of various controllers connected to a human-machine interface via Ethernet;
FIG. 9 is a timing diagram of synchronous recording.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The term "Power System Stabilizer" is abbreviated as PSS and is a unit or group of units for the excitation regulator to control the excitation output by means of AVR, damping the low frequency power oscillations of the synchronous machine, for improving the stability performance of the power system, by means of an additional control function. The PSS is additionally arranged on the large-sized generator set, and relevant parameters of the PSS can be properly set to provide additional damping moment, so that the low-frequency oscillation of the power system is restrained, and the static stability limit of the power system is improved.
A synchronous wave recording device based on an FPGA and a communication network, comprising: the system comprises a first controller, a second controller and a human-computer interface, wherein the first controller is used for acquiring external wave recording data, the second controller is used for outputting control signals according to the external wave recording data to control industrial equipment, the first controller and the second controller both comprise an FPGA and an MCU, the MCU sends a communication target ID and data to the FPGA through a parallel port or an SPI, or reads and receives data from the FPGA, a pin of the FPGA is connected with a corresponding pin of a timer channel of the MCU, the timer is directly triggered by the FPGA output signals to capture and interrupt, the MCU of the first controller and the MCU of the second controller are communicated with the human-computer interface through a network port, and the FPGA of the first controller and the FPGA of the second controller and the FPGA of different first controllers or different second controllers are communicated through optical fibers;
the first controller or the second controller is preset with a preferred sequence to determine which controller is used as an online controller, and the online controller receives a wave recording command of the human-computer interface or cooperates with other non-online controllers to synchronously record waves after detecting a synchronous wave recording trigger event, so that all controllers synchronously transmit wave recording data to the human-computer interface through a network port.
The online controller and the non-online controller cooperatively perform synchronous wave recording according to the following steps:
the MCU of the on-line controller sends a synchronous wave recording command to the FPGA of the on-line controller, after the FPGA of the on-line controller receives the synchronous wave recording command, the FPGA of the on-line controller sends the synchronous wave recording command to other off-line controllers in a group through optical fiber communication, and simultaneously sends an output signal set as a wide pulse to the timer of the MCU of the on-line controller, triggers the input capture interrupt of the timer and sets as the output signal of the wide pulse for communication compensation delay;
the FPGA of the off-line controller immediately sends an output signal set as a narrow pulse after receiving the synchronous wave recording command, triggers a timer of an MCU of the off-line controller to input a capture interrupt, and starts wave recording in the capture interrupt;
the timer input capturing interruption of the MCU of the on-line controller is immediately triggered after the wide pulse of the output signal of the FPGA of the on-line controller is ended, and the wave recording of the on-line controller is started;
the time from the FPGA of the on-line controller to the FPGA of the other off-line controllers for receiving the synchronous wave-recording command through the optical fiber is communication delay, and the duration of the wide pulse is set to be the same as the communication delay.
The communication delays are obtained by measuring, and the difference between the communication delays between all the controllers is not more than 1 mu s.
After the communication compensation delay of the section of wide pulse, the timer input capturing interruption of the MCU of the online controller is triggered, so that the online controller and other non-online controllers can be ensured to start the wave recording function at the same time.
The synchronous wave recording function data prerecording time of all on-line and off-line controllers is consistent, the follow-up recording time is consistent, the wave recording is completed, the wave recording data are transmitted to a human-computer interface through Ethernet by all on-line and off-line controllers, and the human-computer interface gathers the wave recording data of all on-line and off-line controllers into a wave recording data file. The frequencies of the wave recording of all the controllers can also be consistent.
The network ports of the MCU of the first controller and the MCU of the second controller are communicated with the human-computer interface through a switch.
Example 1
Taking an excitation system with 3 intelligent power cabinets as an example, a synchronous wave recording device based on an FPGA and a communication network is introduced, and the synchronous wave recording device comprises 2 control channel controllers and 3 intelligent power cabinet controllers, wherein the total number of the controllers is 5, as shown in fig. 6, the control channel controllers are used as a first controller for collecting external wave recording data, the intelligent power cabinet controllers are used as a second controller for controlling a controllable silicon according to an external wave recording data output pulse signal, the wave recording data comprise analog quantity input, analog quantity output, switching value input and switching value output, and for example, the wave recording data comprise three-phase anode voltage, three-phase anode current, angular speed, three-phase stator voltage, three-phase stator current signals, system voltage, exciting current and other analog quantities. The intelligent power cabinet controller can realize an automatic mode (also called a constant terminal voltage mode or an AVR mode) taking the stator voltage as a control object according to the stator voltage and the stator current; the intelligent power cabinet controller can realize the PSS2B (PSS: power System Stabilizer) additional control of the main stream according to the angular speed; the intelligent power cabinet controller can realize a constant excitation current mode or an FCR mode which takes the excitation current as a control object according to the excitation current; the intelligent power cabinet controller can realize a constant anode voltage mode taking the anode voltage as a control object according to the three-phase anode voltage and the three-phase anode current.
As shown in fig. 6, the control channel controllers, the intelligent power cabinet controllers, and the control channel controllers and the intelligent power cabinet controllers are interconnected in a point-to-point manner through optical fibers.
As shown in fig. 7, the control channel controller and the intelligent power cabinet controller both comprise an FPGA and an MCU, the optical fiber communication is generally directly controlled by the FPGA, and the MCU sends the communication target ID and data to the FPGA through the parallel port or the SPI, or reads the received data from the FPGA, so that the burden of the MCU is greatly reduced. The FPGA scans the fiber information at high frequencies, and the delay from the occurrence of the signal to the FPGA parsing the data is short and fixed. The pin of the FPGA is connected with the corresponding pin of the timer channel of the MCU, the timer is directly triggered to capture the interrupt by the output signal of the FPGA, the current timer of the MCU is generally configured with a plurality of channels, each channel can point to a specific pin of the MCU, the pin is configured to trigger input to capture the interrupt (the change of triggering the interrupt can be set as a rising edge, a falling edge or an edge according to the requirement) when the output signal of the FPGA changes as shown in fig. 5, and the timer latches the current count value and enters an interrupt service program.
As shown in fig. 8, MCUs of the control channel controller and the intelligent power cabinet controller are connected to a human-computer interface through a switch by using an ethernet through a network port to communicate, and the human-computer interface receives and stores the wave recording data. MCU control Ethernet communication, FPGA control fiber communication.
The control channel controllers and the intelligent power cabinet controllers are preset with a preferred sequence to determine which controller is used as an online controller, the control channel controllers are usually used as first preferred sequences to be configured as the online controllers, when one control channel controller fails, the other control channel controller is used as the online controller, and when both control channel controllers fail to exit, the intelligent power cabinet controllers are configured as the online controllers according to a sequential ordering rule.
And after receiving a wave recording command of the human-computer interface or detecting a synchronous wave recording trigger event, the MCU of the online controller cooperates with other non-online controllers to synchronously record waves, so that all controllers synchronously transmit the wave recording data to the human-computer interface through the network interface.
The online controller and the non-online controller cooperatively perform synchronous wave recording according to the following steps:
after the on-line controller receives the synchronous wave recording command of the human-computer interface or the synchronous wave recording function is triggered by some events, the MCU of the on-line controller (generally a control channel controller) sends the synchronous wave recording command to the FPGA of the on-line controller, the FPGA of the on-line controller receives the synchronous wave recording command of the MCU of the on-line controller and then sends the synchronous wave recording command to other off-line controllers in groups through optical fiber communication, the FPGA of the on-line controller simultaneously sends an output signal which is set to be a wide pulse to the timer of the MCU of the on-line controller, the input capturing interruption of the timer is triggered, and the output signal which is set to be a wide pulse is used for communication compensation delay. For example, if the timer triggers an interrupt according to the falling edge of the output signal of the FPGA, the high level time of the output signal of the FPGA, that is, the communication compensation delay, may be prolonged, and if the timer triggers an interrupt according to the rising edge of the output signal of the FPGA, the low level time of the output signal of the FPGA, that is, the communication compensation delay, may be prolonged.
And after receiving the synchronous wave recording command, the FPGA of the other non-online controllers immediately sends an output signal set as a narrow pulse, triggers the input capture interrupt of the timer of the MCU of the non-online controllers, and starts wave recording in the capture interrupt.
And immediately triggering the timer input capturing interruption of the MCU of the on-line controller after the end of the wide pulse of the output signal of the FPGA of the on-line controller, starting the wave recording function of the on-line controller, and the time sequence is shown in fig. 9.
The time from the sending of the synchronous wave-recording command by the on-line controller FPGA through the optical fiber to the receiving of the synchronous wave-recording command by other off-line controller FPGAs is communication delay, the delay is fixed, and the measurement can be completed statically.
The signal duration of the wide pulse set by the on-line controller after receiving the synchronous wave recording command is the same as the communication delay, the communication delay difference between all controllers is not more than 1 mu s, the input capture interruption of the timer of the MCU of the on-line controller is triggered after the communication compensation delay of the wide pulse, and the on-line controller and other off-line controllers can be ensured to start the wave recording function at the same time.
The synchronous wave recording function data prerecording time of all the on-line and off-line controllers is consistent, the subsequent recording time is consistent, after waveform recording is completed, all the on-line and off-line controllers transmit the wave recording data to a human-computer interface through the Ethernet, and the human-computer interface gathers the wave recording data of all the on-line and off-line controllers into a wave recording data file. The frequencies of the wave recording of all the controllers can also be consistent.
Example 2
The synchronous wave recording method based on FPGA and communication network is used for making the on-line controller after receiving the wave recording command of human-machine interface or detecting the synchronous wave recording triggering event cooperate with other off-line controllers to synchronously record wave, and making all controllers synchronously transmit the wave recording data to human-machine interface through network interface, and is characterized by comprising the following steps:
step 1, an MCU of an online controller sends a synchronous wave recording command to an FPGA of the online controller, after the FPGA of the online controller receives the synchronous wave recording command, the synchronous wave recording command is sent to other non-online controllers in a group through optical fiber communication, and a timer input capturing interrupt of a wave recording function corresponding to the MCU of the online controller is triggered in a delayed manner;
step 2, after receiving the synchronous wave recording command, the FPGA of the non-online controller immediately triggers the timer input capturing interruption of the MCU of the non-online controller, and starts wave recording of each non-online controller;
immediately triggering a timer input capturing interrupt of an MCU of the online controller after the delay is finished, and starting wave recording of the online controller;
the time from the FPGA of the on-line controller to the FPGA of the other off-line controllers for receiving the synchronous wave-recording command through the optical fiber is communication delay, and the delay is set to be the same as the communication delay;
step 3, all online and non-online controllers record recording data according to the same pre-recording time and the same subsequent recording time, all online and non-online controllers transmit the recording data to a human-computer interface through Ethernet after waveform recording is completed, and the human-computer interface gathers all online and non-online controllers recording data into a recording data file;
all online and non-online controllers comprise an FPGA and an MCU, the MCU sends communication target ID and data to the FPGA through a parallel port or SPI, or reads and receives data from the FPGA, a pin of the FPGA is connected with a corresponding pin of a timer channel of the MCU, the timer is triggered by an output signal of the FPGA to capture and interrupt, the timer is used for starting a wave recording function of the MCU, each MCU is communicated with a human-computer interface through a network port, and each FPGA is communicated through an optical fiber.

Claims (7)

1. The synchronous wave recording method based on FPGA and communication network is used for making the on-line controller after receiving the wave recording command of human-machine interface or detecting the synchronous wave recording triggering event cooperate with other off-line controllers to synchronously record wave, and making all controllers synchronously transmit the wave recording data to human-machine interface through network interface, and is characterized by comprising the following steps:
step 1, an MCU of an online controller sends a synchronous wave recording command to an FPGA of the online controller, after the FPGA of the online controller receives the synchronous wave recording command, the synchronous wave recording command is sent to other non-online controllers in a group through optical fiber communication, and a timer input capturing interrupt of a wave recording function corresponding to the MCU of the online controller is triggered in a delayed manner;
step 2, after receiving the synchronous wave recording command, the FPGA of the non-online controller immediately triggers the timer input capturing interruption of the MCU of the non-online controller, and starts wave recording of each non-online controller;
immediately triggering a timer input capturing interrupt of an MCU of the online controller after the delay is finished, and starting wave recording of the online controller;
the time from the FPGA of the on-line controller to the FPGA of the other off-line controllers for receiving the synchronous wave-recording command through the optical fiber is communication delay, and the delay is set to be the same as the communication delay;
step 3, all online and non-online controllers record recording data according to the same pre-recording time and the same subsequent recording time, all online and non-online controllers transmit the recording data to a human-computer interface through Ethernet after waveform recording is completed, and the human-computer interface gathers the recording data of all online and non-online controllers into a recording data file;
all online and non-online controllers comprise an FPGA and an MCU, the MCU sends communication target ID and data to the FPGA through a parallel port or SPI, or reads and receives data from the FPGA, a pin of the FPGA is connected with a corresponding pin of a timer channel of the MCU, the timer is triggered by an output signal of the FPGA to capture and interrupt, the timer is used for starting a wave recording function of the MCU, each MCU is communicated with a human-computer interface through a network port, and each FPGA is communicated through an optical fiber.
2. The method for synchronous recording according to claim 1, wherein the on-line controller is any one of the first controller and the second controller determined according to a preset preference sequence, and the off-line controller is the remaining controller;
the first controller is used for collecting external recording data, and the second controller is used for outputting control signals to control industrial equipment according to the external recording data.
3. The utility model provides a synchronous wave recording device based on FPGA and communication network which characterized in that includes: the system comprises a first controller, a second controller and a human-computer interface, wherein the first controller is used for acquiring external wave recording data, the second controller is used for outputting control signals according to the external wave recording data to control industrial equipment, the first controller and the second controller both comprise an FPGA and an MCU, the MCU sends a communication target ID and data to the FPGA through a parallel port or an SPI, or reads and receives data from the FPGA, a pin of the FPGA is connected with a corresponding pin of a timer channel of the MCU, the timer is triggered to capture and interrupt by the FPGA output signals, the MCU of the first controller and the MCU of the second controller are used for starting the wave recording function of the MCU, the MCU of the first controller and the MCU of the second controller are communicated with the human-computer interface through network interfaces, and the FPGA of the first controller and the FPGA of different first controllers or the FPGA of different second controllers are communicated through optical fibers;
the first controller or the second controller is preset with a preferred sequence to determine which controller is used as an online controller, and the online controller receives a wave recording command of the human-computer interface or cooperates with other non-online controllers to synchronously record waves after detecting a synchronous wave recording trigger event, so that all controllers synchronously transmit wave recording data to the human-computer interface through a network port;
the online controller and the non-online controller cooperatively perform synchronous wave recording according to the following steps:
the MCU of the online controller sends a synchronous wave-recording command to the FPGA of the online controller, after the FPGA of the online controller receives the synchronous wave-recording command, the synchronous wave-recording command is sent to other non-online controllers in a group through optical fiber communication, and the MCU of the online controller is triggered in a delayed manner to input a capturing interrupt corresponding to a timer of a wave-recording function;
the FPGA of the off-line controller immediately sends a timer input capturing interrupt triggering the MCU of the off-line controller after receiving the synchronous wave recording command, and starts wave recording of each off-line controller;
immediately triggering a timer input capturing interrupt of an MCU of the online controller after the delay is finished, and starting wave recording of the online controller;
the time from the FPGA of the on-line controller to the FPGA of the other off-line controllers to receive the synchronous wave-recording command through the optical fiber is communication delay, and the delay is set to be the same as the communication delay.
4. A synchronous wave recording device based on FPGA and communication network according to claim 3, characterized in that the communication delay is obtained by measurement, the difference between the communication delays between all controllers being not more than 1 μs.
5. The synchronous wave recording device based on the FPGA and the communication network according to claim 3, wherein the synchronous wave recording function data of all the on-line controllers and the off-line controllers are consistent in prerecording time, follow-up recording time is consistent, the on-line controllers and the off-line controllers transmit the wave recording data to a human-computer interface through the Ethernet after the waveform recording is completed, and the human-computer interface gathers the wave recording data of the on-line controllers and the off-line controllers into a wave recording data file.
6. The synchronous wave recording device based on the FPGA and the communication network according to claim 3, wherein the network ports of the MCU of the first controller and the second controller are communicated with the human-computer interface through a switch.
7. The synchronous wave recording device based on the FPGA and the communication network according to claim 3, wherein the first controller is a control channel controller in an excitation system, and the second controller is an intelligent power cabinet controller in the excitation system.
CN202410145364.2A 2024-02-02 2024-02-02 Synchronous wave recording method and device based on FPGA and communication network Active CN117687347B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202410145364.2A CN117687347B (en) 2024-02-02 2024-02-02 Synchronous wave recording method and device based on FPGA and communication network

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202410145364.2A CN117687347B (en) 2024-02-02 2024-02-02 Synchronous wave recording method and device based on FPGA and communication network

Publications (2)

Publication Number Publication Date
CN117687347A CN117687347A (en) 2024-03-12
CN117687347B true CN117687347B (en) 2024-04-09

Family

ID=90132327

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202410145364.2A Active CN117687347B (en) 2024-02-02 2024-02-02 Synchronous wave recording method and device based on FPGA and communication network

Country Status (1)

Country Link
CN (1) CN117687347B (en)

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104966155A (en) * 2015-06-11 2015-10-07 国家电网公司 Intelligent transformer station cross-interval MU synchronous recording method considering delay compensation characteristic
CN105338613A (en) * 2015-11-02 2016-02-17 珠海许继电气有限公司 System and method for time setting synchronization of scattered nodes by use of wireless communication
CN107817721A (en) * 2017-10-26 2018-03-20 上海乐耘电气技术有限公司 Electric power wave-recording synchronous data sampling system
CN110988599A (en) * 2019-12-19 2020-04-10 长园深瑞继保自动化有限公司 Distributed wave recording high-precision synchronization method for power distribution fault indicator
KR102261848B1 (en) * 2019-12-19 2021-06-07 국방과학연구소 Time-synchronized remote system and the operation method thereof
CN115941102A (en) * 2022-10-31 2023-04-07 三峡智控科技有限公司 Method for synchronous communication between controllers by connecting MCU and FPGA through SPI
CN116795744A (en) * 2023-08-15 2023-09-22 三峡智控科技有限公司 LS2K1000LA and MCU communication control method

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7310163B2 (en) * 2019-02-14 2023-07-19 日本電信電話株式会社 TRANSMISSION DEVICE, TIME TRANSMISSION SYSTEM, AND DELAY CORRECTION METHOD

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104966155A (en) * 2015-06-11 2015-10-07 国家电网公司 Intelligent transformer station cross-interval MU synchronous recording method considering delay compensation characteristic
CN105338613A (en) * 2015-11-02 2016-02-17 珠海许继电气有限公司 System and method for time setting synchronization of scattered nodes by use of wireless communication
CN107817721A (en) * 2017-10-26 2018-03-20 上海乐耘电气技术有限公司 Electric power wave-recording synchronous data sampling system
CN110988599A (en) * 2019-12-19 2020-04-10 长园深瑞继保自动化有限公司 Distributed wave recording high-precision synchronization method for power distribution fault indicator
KR102261848B1 (en) * 2019-12-19 2021-06-07 국방과학연구소 Time-synchronized remote system and the operation method thereof
CN115941102A (en) * 2022-10-31 2023-04-07 三峡智控科技有限公司 Method for synchronous communication between controllers by connecting MCU and FPGA through SPI
CN116795744A (en) * 2023-08-15 2023-09-22 三峡智控科技有限公司 LS2K1000LA and MCU communication control method

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
智能变电站时间同步与时间同步监测集成装置的研制及应用;陈志刚等;《电力自动化设备》;20210228(第2期);全文 *

Also Published As

Publication number Publication date
CN117687347A (en) 2024-03-12

Similar Documents

Publication Publication Date Title
CA2333105C (en) Fault data synchronization via peer-to-peer communications network
US4558379A (en) Disturbance detection and recording system
US7698582B2 (en) Apparatus and method for compensating digital input delays in an intelligent electronic device
US6771170B2 (en) Power system waveform capture
KR100439686B1 (en) Power System Dynamics Monitor
CN203909162U (en) Electric energy quality collection apparatus
JPH0361908B2 (en)
CN109491487A (en) Multifunctional power sequencer and monitor chip
CN117687347B (en) Synchronous wave recording method and device based on FPGA and communication network
CN109407752B (en) GIS breaker online monitoring system for realizing clock synchronization in RS485 communication
CN112162691A (en) Data acquisition method, device and storage medium
KR101722149B1 (en) Earthquake Detection Synchronization Power System Fault Recorder
JPS61221542A (en) Centralized monitor control system
CN109709422B (en) Clock drift elimination method and device
CN105372467A (en) Signal monitoring method and system
KR100376510B1 (en) Real-time fault diagnosis device of power converter
CN112986894A (en) Test method for software separation of multi-core intelligent electric meter
JPS5973264A (en) Abnormality monitor for machine tool and the like
CN211979183U (en) Gateway metering point online checking device
CN114563656A (en) Method and device for monitoring power supply quality of communication equipment
CN117691632B (en) Thermal power generating unit peak regulation frequency modulation system
JPH05346443A (en) Digital fault supervisory recorder for power system
JPH11345177A (en) System and method for inputting/outputting process data
Wang et al. Frame analysis based real time related indicators measurement of industrial ethernet Powerlink
CN104345224B (en) Electric energy quality monitoring method and device

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant