CN117669450B - Equivalent circuit for simulating multistage resistance state memristor - Google Patents

Equivalent circuit for simulating multistage resistance state memristor Download PDF

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CN117669450B
CN117669450B CN202311644735.3A CN202311644735A CN117669450B CN 117669450 B CN117669450 B CN 117669450B CN 202311644735 A CN202311644735 A CN 202311644735A CN 117669450 B CN117669450 B CN 117669450B
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voltage
resistance
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resistor
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CN117669450A (en
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刘振
戴国树
容泽仁
陆浩冬
黄慧燕
陈晓媚
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Guangdong University of Technology
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Abstract

The invention discloses an equivalent circuit of an analog multi-stage resistance memristor, which comprises a signal input module, a signal identification module, a signal processing module and a signal selection module, wherein the signal input module comprises an anode input port and a cathode input port, the signal identification module is used for identifying the magnitude of an input voltage signal according to the voltages of the anode input port and the cathode input port, the identification result is input into the signal processing module, the signal processing module is used for determining a level signal for controlling a switch of the signal selection module according to the output of the signal processing module, and the signal selection module is used for controlling the magnitude of an output resistor according to the input of the signal processing module. The memristor equivalent circuit solves the technical problems that the existing memristor equivalent circuit cannot meet the requirements of different types of memristor equivalent circuits and cannot reflect the change process of memristor resistance values under different voltages.

Description

Equivalent circuit for simulating multistage resistance state memristor
Technical Field
The invention relates to the technical field of electronic circuits, in particular to an equivalent circuit of an analog multi-stage resistance memristor.
Background
Conventional computers employ a "von neumann" architecture, which requires frequent data transfers between memory and operators during operation, resulting in reduced computing and processing data capabilities due to the spatial separation of the memory and operators and mismatch in operating frequencies. In addition, the transfer of data from memory to the operator can result in high power consumption. Memristors are promising as a new device to break the "von neumann" architecture.
Memristors, collectively known as memristors, are circuit devices that represent a magnetic flux versus charge relationship. The resistance of a memristor may change as the total charge through the memristor changes. When the total charge through the memristor is unchanged, the memristor will maintain the resistance at this time, with non-volatility. Establishing an equivalent circuit of the memristor provides a reliable method for researching the electrical characteristics of the memristor and application of the memristor in an actual circuit. However, the existing memristor equivalent circuit is an ideal memristor equivalent circuit model, and cannot meet the requirements of different types of memristor equivalent circuits and embody the change process of memristor resistance values under different voltages.
Disclosure of Invention
The embodiment of the invention provides an equivalent circuit of an analog multi-level resistance memristor, which is used for solving the technical problems that the existing memristor equivalent circuit cannot meet the requirements of different types of memristor equivalent circuits and cannot reflect the change process of the memristor resistance under different voltages.
In view of the above, the invention provides an equivalent circuit for simulating a multi-level resistance memristor, which comprises a signal input module, a signal identification module, a signal processing module and a signal selection module;
the signal input module comprises an anode input port and a cathode input port;
The signal identification module is used for identifying the magnitude of an input voltage signal according to the voltages of the positive input port and the negative input port, and inputting the identification result into the signal processing module;
The signal identification module comprises a subtraction operational amplifier circuit, a voltage comparator for controlling low-resistance state switching, N specific value voltage source low-resistance state voltage comparators, a voltage comparator for controlling high-resistance state switching, M specific value voltage source high-resistance state voltage comparators and 2 NOT gates, wherein N is more than 2 and M is more than 2;
The output end of the voltage comparator for controlling the high-resistance state switching is connected with the input end of the other NOT gate, the voltage comparator for controlling the low-resistance state switching, the N specific value voltage source low-resistance state voltage comparators, the outputs of the M specific value voltage source high-resistance state voltage comparators and the 2 NOT gates are all connected with the input end of the signal processing module, the voltage source size of the N specific value voltage source low-resistance state voltage comparators is between the voltage comparator for controlling the low-resistance state switching and the voltage source voltage value of the voltage comparator for controlling the high-resistance state switching, and is sequentially reduced, and the voltage source size of the M specific value voltage source high-resistance state voltage comparators is sequentially increased between the voltage source voltage value of the voltage comparator for controlling the high-resistance state switching and the voltage source voltage value of the voltage comparator for controlling the high-resistance state switching;
the signal processing module is used for determining a level signal of the switch of the control signal selection module according to the output of the signal processing module;
The signal processing module comprises N+M-2 exclusive-OR gates, 2 AND gates and an SR latch, wherein the output end of each two adjacent specific value voltage source low-resistance voltage comparators is connected with the input end of one of the N-1 exclusive-OR gates, the output end of each two adjacent specific value voltage source high-resistance voltage comparators is connected with the input end of one of the M-1 exclusive-OR gates, the output end of each N specific value voltage source low-resistance voltage comparator is connected with the input end of one AND gate, the output end of each M specific value voltage source high-resistance voltage comparator is connected with the input end of the other AND gate, the S end of each SR latch is connected with the output end of the NOT gate connected with the voltage comparator for controlling the low-resistance switching, the R end of each SR latch is connected with the output end of the NOT gate connected with the voltage comparator for controlling the high-resistance switching, and the output end of each SR latch and the output end of the N+M-2 exclusive-OR gates are respectively connected with the input ends of the signal selecting module;
the signal selection module is used for controlling the output resistance according to the input of the signal processing module;
The signal selection module comprises N low-resistance control modules and M high-resistance control modules;
each low-resistance control module comprises an AND gate, a voltage control switch and a low-output resistor, wherein the positive electrode of the voltage control switch is connected with the output end of the AND gate, the negative electrode of the voltage control switch is grounded, one switch end of the voltage control switch is connected with the negative electrode input port, the other switch end of the voltage control switch is connected with one end of the low-output resistor, and the other end of the low-output resistor is connected with the positive electrode input port;
each high-resistance control module comprises an AND gate, a voltage control switch and a high-output resistor, wherein the positive electrode of the voltage control switch is connected with the output end of the AND gate, the negative electrode of the voltage control switch is grounded, one switch end of the voltage control switch is connected with the negative electrode input port, the other switch end of the voltage control switch is connected with one end of the high-output resistor, and the other end of the high-output resistor is connected with the positive electrode input port;
One input end of the AND gate of each low resistance control module is connected with the Q end of the SR latch, the other input end of the AND gate of each high resistance control module is connected with the output end of one of the N-1 exclusive OR gates, and one input end of the AND gate of each high resistance control module is connected with the SR latch The other input end is connected with the output end of one of the M-1 exclusive OR gates;
the low output resistance values of the N low resistance control modules are different, and the high output resistance values of the M high resistance control modules are different.
Optionally, the subtracting operational amplifier circuit comprises a first resistor, a second resistor, a third resistor, a fourth resistor, an operational amplifier and a capacitor;
one end of the first resistor is connected with the positive input port, the other end of the first resistor is connected with the positive input end of the operational amplifier and one end of the third resistor respectively, the other end of the third resistor is grounded, one end of the second resistor is connected with the negative input port, the other end of the second resistor is connected with the inverting input end of the operational amplifier and one end of the fourth resistor respectively, the other end of the fourth resistor is connected with the output end of the operational amplifier, the output end of the operational amplifier is connected with one end of the capacitor, and the other end of the capacitor is grounded.
Optionally, the resistances of the first resistor, the second resistor, the third resistor and the fourth resistor are 1000kΩ, and the capacitance of the capacitor is 200nF.
From the above technical scheme, the equivalent circuit and the system for simulating the multi-stage resistance memristor provided by the invention have the following advantages:
The invention provides an equivalent circuit of an analog multistage resistance state memristor, which comprises a signal input module, a signal identification module, a signal processing module and a signal selection module, wherein the signal input module comprises an anode input port and a cathode input port, the signal identification module is used for identifying the magnitude of an input voltage signal according to the voltages of the anode input port and the cathode input port, the identification result is input into the signal processing module, the signal processing module is used for determining a level signal for controlling a switch of the signal selection module according to the output of the signal processing module, and the signal selection module is used for controlling the magnitude of an output resistor according to the input of the signal processing module. The equivalent circuit of the analog multi-level resistance memristor provided by the invention can simulate the resistance values of different types of memristors under different voltages, realizes the change process of the resistance values under different voltages, meets the requirements of different types of memristor devices on circuit simulation, can better explore the electrical characteristics of the memristor and the application of the memristor in an actual circuit, and solves the technical problems that the conventional memristor equivalent circuit cannot meet the requirements of different types of memristor equivalent circuits and cannot reflect the change process of the memristor resistance values under different voltages.
Drawings
For a clearer description of embodiments of the invention or of solutions according to the prior art, the figures which are used in the description of the embodiments or of the prior art will be briefly described, it being obvious that the figures in the description below are only some embodiments of the invention, from which, without the aid of inventive efforts, other relevant figures can be obtained for a person skilled in the art.
FIG. 1 is a schematic diagram of an equivalent circuit of an analog multi-level resistance memristor provided by the present disclosure;
FIG. 2 is a circuit diagram of an equivalent circuit of an analog multi-level resistive memristor provided by the present disclosure;
FIG. 3 is a graph of the IV characteristic of an equivalent circuit provided in the present invention that can simulate a 12-level resistance state memristor.
Detailed Description
In order to make the present invention better understood by those skilled in the art, the following description will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings, and it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
For ease of understanding, referring to fig. 1 to 2, an embodiment of an equivalent circuit for simulating a multi-level resistance memristor is provided in the present disclosure, including a signal input module, a signal identification module, a signal processing module, and a signal selection module;
the signal input module comprises an anode input port and a cathode input port;
The signal identification module is used for identifying the magnitude of an input voltage signal according to the voltages of the positive input port and the negative input port, and inputting the identification result into the signal processing module;
The signal identification module comprises a subtraction operational amplifier circuit, a voltage comparator for controlling low-resistance state switching, N specific value voltage source low-resistance state voltage comparators, a voltage comparator for controlling high-resistance state switching, M specific value voltage source high-resistance state voltage comparators and 2 NOT gates, wherein N is more than 2 and M is more than 2;
The output end of the voltage comparator for controlling the high-resistance state switching is connected with the input end of the other NOT gate, the voltage comparator for controlling the low-resistance state switching, the N specific value voltage source low-resistance state voltage comparators, the outputs of the M specific value voltage source high-resistance state voltage comparators and the 2 NOT gates are all connected with the input end of the signal processing module, the voltage source size of the N specific value voltage source low-resistance state voltage comparators is between the voltage comparator for controlling the low-resistance state switching and the voltage source voltage value of the voltage comparator for controlling the high-resistance state switching, and is sequentially reduced, and the voltage source size of the M specific value voltage source high-resistance state voltage comparators is sequentially increased between the voltage source voltage value of the voltage comparator for controlling the high-resistance state switching and the voltage source voltage value of the voltage comparator for controlling the high-resistance state switching;
the signal processing module is used for determining a level signal of the switch of the control signal selection module according to the output of the signal processing module;
The signal processing module comprises N+M-2 exclusive-OR gates, 2 AND gates and an SR latch, wherein the output end of each two adjacent specific value voltage source low-resistance voltage comparators is connected with the input end of one of the N-1 exclusive-OR gates, the output end of each two adjacent specific value voltage source high-resistance voltage comparators is connected with the input end of one of the M-1 exclusive-OR gates, the output end of each N specific value voltage source low-resistance voltage comparator is connected with the input end of one AND gate, the output end of each M specific value voltage source high-resistance voltage comparator is connected with the input end of the other AND gate, the S end of each SR latch is connected with the output end of the NOT gate connected with the voltage comparator for controlling the low-resistance switching, the R end of each SR latch is connected with the output end of the NOT gate connected with the voltage comparator for controlling the high-resistance switching, and the output end of each SR latch and the output end of the N+M-2 exclusive-OR gates are respectively connected with the input ends of the signal selecting module;
the signal selection module is used for controlling the output resistance according to the input of the signal processing module;
The signal selection module comprises N low-resistance control modules and M high-resistance control modules;
each low-resistance control module comprises an AND gate, a voltage control switch and a low-output resistor, wherein the positive electrode of the voltage control switch is connected with the output end of the AND gate, the negative electrode of the voltage control switch is grounded, one switch end of the voltage control switch is connected with the negative electrode input port, the other switch end of the voltage control switch is connected with one end of the low-output resistor, and the other end of the low-output resistor is connected with the positive electrode input port;
each high-resistance control module comprises an AND gate, a voltage control switch and a high-output resistor, wherein the positive electrode of the voltage control switch is connected with the output end of the AND gate, the negative electrode of the voltage control switch is grounded, one switch end of the voltage control switch is connected with the negative electrode input port, the other switch end of the voltage control switch is connected with one end of the high-output resistor, and the other end of the high-output resistor is connected with the positive electrode input port;
One input end of the AND gate of each low resistance control module is connected with the Q end of the SR latch, the other input end of the AND gate of each high resistance control module is connected with the output end of one of the N-1 exclusive OR gates, and one input end of the AND gate of each high resistance control module is connected with the SR latch The other input end is connected with the output end of one of the M-1 exclusive OR gates;
the low output resistance values of the N low resistance control modules are different, and the high output resistance values of the M high resistance control modules are different.
It should be noted that the signal input module includes a positive input port v+ and a negative input port V-, and the positive input port v+ and the negative input port V-are connected to the input end of the signal identification module. The signal recognition module is used for recognizing the input voltage change by utilizing specific voltage after subtracting the voltage of the positive input port V+ and the negative input port V-to obtain a signal which can be used for the signal processing module. The signal processing module processes and stores the signals of the previous stage and outputs the control signals required by the signal selection module. The signal selection module selects one of the resistance values to output according to the control signal, and the change process of the resistance values under different voltages can be realized.
The subtracting operational amplifier circuit includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, an operational amplifier U1, and a capacitor C1. One end of the resistor R1 is connected with the positive input port V+, the other end of the first resistor R1 is respectively connected with the positive input end of the operational amplifier U1 and one end of the third resistor R3, and the other end of the third resistor R3 is grounded. One end of the second resistor R2 is connected with the negative electrode input port V-, the other end of the second resistor R2 is respectively connected with the inverting input end of the operational amplifier U1 and one end of the fourth resistor R4, and the other end of the fourth resistor R4 is connected with the output end of the operational amplifier U1. The output end of the operational amplifier U1 is connected with one end of a capacitor C1, and the other end of the capacitor C1 is grounded. The output end of the operational amplifier U1 is respectively connected with a voltage comparator U2 for controlling low-resistance state switching, N specific-value voltage source low-resistance state voltage comparators (U4.1-U4. N), a voltage comparator (U3) for controlling high-resistance state switching and M specific-value voltage source high-resistance state voltage comparators (U5.1-U5. N). The resistance of the first resistor R1, the second resistor R2, the third resistor R3 and the fourth resistor R4 is 1000kΩ, and the capacitance of the capacitor C1 is 200nF.
The signal is input into the subtracting operational amplifier circuit through the positive input port V+ and the negative input port V-, and the output voltage of the operational amplifier U1 is as follows according to the principle of virtual short and virtual break:
U1O＝(U+-U-)
Wherein, U 1O is the output voltage of the operational amplifier U1, U + is the voltage of the positive input port v+ and U - is the voltage of the negative input port V-.
The capacitor C1 has the function that when the frequency is too high, the capacitor is conducted to be grounded, the output IV characteristic curve is a straight line, and the definition of the memristor is met.
The low-resistance state voltage comparator comprises a voltage comparator for controlling low-resistance state switching and N specific value voltage source low-resistance state voltage comparators, and each low-resistance state voltage comparator comprises a specific value voltage source, an operational amplifier and a resistor. The output of the subtraction operational amplifier circuit is connected to the inverting input of operational amplifier U2. The voltage comparator for controlling the low-resistance switching consists of a specific voltage source Vopen, an operational amplifier U2 and a resistor, wherein the specific voltage source Vopen is connected with a non-inverting input end of the operational amplifier U2. The output end of the operational amplifier U2 is connected with the NAND gate U6. The output of the subtraction operational amplifier circuit is connected to the inverting input of the operational amplifier u4.K (k takes a value of 1 to N). The specific value voltage source VLk (k takes the value of 1 to N) is connected with the non-inverting input terminal of the operational amplifier U4. K. One end of the resistor is connected with the positive power input end of the operational amplifier U4.K, and the other end of the resistor is connected with the output end of the operational amplifier U4. K. In the N specific value voltage source low-resistance state voltage comparators, the voltage magnitude relationship of the specific value voltage source VLk is Vclose < VLN < VL (N-1) <. Vopen is the open circuit voltage and Vclose is the short circuit voltage.
When the input signal is the in-phase terminal voltage, the voltage source with the specific value is the in-phase terminal voltage. The low-resistance voltage comparator outputs a high level when the input voltage is smaller than a specific value voltage source, and outputs a low level when the input voltage is larger than the specific value voltage source.
Each high-impedance voltage comparator comprises a specific value voltage source, an operational amplifier and a resistor. The output of the subtraction operational amplifier circuit is connected to the non-inverting input of operational amplifier U3. The specific value voltage source Vclose is connected to the inverting input terminal of the operational amplifier U3. The output end of the operational amplifier U3 is connected with the NAND gate U7. The output of the subtraction operational amplifier circuit is connected to the noninverting input of the operational amplifier u5.K (k takes a value of 1 to M). The specific value voltage source VHk (k takes a value of 1-M) is connected with the inverting input terminal of the operational amplifier U5. K. One end of the resistor is connected with the positive power input end of the operational amplifier U5.K, and the other end of the resistor is connected with the output end of the operational amplifier U5. K. In the M specific voltage source high-impedance voltage comparators, the voltage magnitude relationship of the specific voltage source is Vclose < VH1< VH2 >, < VH (M-1) < VHM < Vopen.
Specifically, when the input signal is the in-phase terminal voltage, the voltage source with the specific value is the anti-phase terminal voltage. When the input voltage is smaller than the voltage source of the specific value, a low level is output, and when the input voltage is larger than the voltage source of the specific value, a high level is output.
As shown in fig. 2, the signal processing module includes (n+m-2) exclusive or gates, 2 and gates, and one SR latch.
When k < N, the outputs of two adjacent operational amplifiers U4.K and U4 (k+1) are connected to the input of an exclusive or gate U8.K (k takes a value of 1 to N-1). Operational amplifiers U4.1, U4.2, an. The output of U4.N is connected to the input of and gate U10.
When k < M, the outputs of two adjacent operational amplifiers U5.K and U5 (k+1) are connected to the input of an exclusive or gate U9.K (k takes a value of 1 to M-1). Operational amplifiers U5.1, U5.2, &.. the output of U5.M is connected to the input of and gate U11.
The input signals of the signal processing modules are operational amplifiers U4.1, U4.2, U4 (N-1), U4.N, operational amplifiers U5.1, U5.2, U5 (M-1), U5.M output signals and output signals of the NOT gates U6, U7, and the output signals of the signal processing modules are exclusive OR gates U8.1, U8.2, U8 (N-2), U8 (N-1), exclusive OR gates U9.1, U9.2, U9 (M-2), U9 (M-1) and the output signals of the SR latches. Assuming that the signal I k is the output signal of the operational amplifier u4.K,The signal is the output signal of the operational amplifier U5.K, the signal I c,Output signals of the not gates U6 and U7, respectively, and the signals O 1、O2、......、ON-1 are output signals of the exclusive-or gates U8.1, U8.2, &.&., U8.(N-1), respectively, and are signals Output signals of exclusive-or gates U9.1, U9.2, and U9 (M-1), respectively, signal O A,The logic functions of the stage circuit are as follows:
Similarly, there are:
Taking a 6-level resistance memristor as an example, if the memristor is in a low resistance state, the low resistance module is turned on, and the high resistance module is turned off, so that a signal for controlling the resistance of the memristor is O 1、......、O5、OA, an input signal I 1......I6 of the signal processing module, and an output signal O 1......O5OA are shown in table 1.
TABLE 1
If the memristor is in a high-resistance state, the high-resistance module is turned on, and the low-resistance module is turned off, so that a signal for controlling the resistance of the memristor isInput signal of signal processing moduleThe output signal O 1......O5OA of the signal processing module is shown in table 2.
TABLE 2
The SR latch is composed of two nor gates. The output of the not gate U6 is connected to the input S of the SR latch and the output of the not gate U7 is connected to the input R of the SR latch.
When the I c is 1, the total number of the components,When 0, q=1,I.e. when the input voltage is greater than Vopen, the output resistance is low. When I c is 0, the number of times,When 1, q=0,I.e. when the input voltage is less than Vclose, the output resistance is high. When I c is 0, the number of times,At 0, the memristor resistance state is unchanged.
As shown in fig. 2, the signal selection module is used for controlling the resistance of the circuit, and the signal selection module includes N low resistance control modules and M high resistance control modules. The kth low resistance control module comprises an and gate u12.K, a voltage control switch u14.K and a resistor RLk. The output Q of the SR latch is connected to the input 1 of the and gates U12.1, U12.2, U12.N, the output of the exclusive or gate U8.K is connected to the input 2 of the and gate U12. K. The positive pole of the voltage control switch u14.K is connected to the output of the and gate u12.K, and the negative pole of the voltage control switch u14.K is grounded. One end of the switch end of the voltage control switch U14.K is connected with the negative electrode input port V-, the other end of the switch end of the voltage control switch U14.K is connected with one end of a resistor RLk, and the other end of the resistor RLk is connected with the positive electrode input port V+. The resistor RLk is the kth low resistance value in the low resistance state, and when the low resistance module is turned on, the signals select RL1, RL2, RL (N-1), RLN in order. Specifically, when the low resistance control module is selected according to the signal output by the signal processing module, that is, when the 1 end of the and gate of the low resistance control module is at a high level, and when the other end is also at a high level, the resistance of the one path is selected, and so on.
The kth high-resistance control module includes an and gate u13.K, a voltage control switch u15.K, and a resistor RHk. Output terminal of SR latchAnd an input terminal 1 of an AND gate U13.1, U13.2, the output of the exclusive or gate U9.K is connected to the input 2 of the and gate U13. K. The positive pole of the voltage control switch u15.K is connected to the output of the and gate u13.K, and the negative pole of the voltage control switch u13.K is grounded. One end of the switch end of the voltage control switch U13.K is connected with the negative electrode input port V-, the other end of the switch end of the voltage control switch U13.K is connected with one end of the resistor RHk, and the other end of the resistor RHk is connected with the positive electrode input port V+. Resistor RHk is the kth high resistance value of the high resistance state, and when the high resistance module is turned on, signals sequentially select RH1, RH2, and/or RH (M-1), and/or RHM. Specifically, when the high-resistance control module is selected according to the signal output by the signal processing module, that is, when the end 1 of the and gate of the high-resistance control module is at a high level, and when the other end is also at a high level, the resistance of the one path is selected, and so on.
Taking a 12-level resistance memristor as an example, specific voltage values and resistance states are assumed as shown in table 3.
TABLE 3 Table 3
Specific voltage/V Resistance value/omega of low resistance module Resistance value/omega of high-resistance module
0.9 0.3 9.9
0.78 0.314 7.5
0.6 0.28 4.0
0.4 0.25 2.6
0.18 0.14 1.3
0.04 0.039 0.9
-0.02 0.0039 0.79
-0.1 0.24 0.64
-0.32 0.19 0.37
-0.66 0.56 0.16
-0.84 0.8 0.073
-0.95 0.9 0.017
Taking a 12-level resistance memristor as an example, an IV characteristic curve of an equivalent circuit is shown in FIG. 3, FIG. 3 is an IV characteristic curve which can simulate an equivalent circuit of the multi-level resistance memristor, current is Current, voltage is Voltage in the drawing, and the IV characteristic curve of the memristor is satisfied.
The invention provides an equivalent circuit of an analog multistage resistance state memristor, which comprises a signal input module, a signal identification module, a signal processing module and a signal selection module, wherein the signal input module comprises an anode input port and a cathode input port, the signal identification module is used for identifying the magnitude of an input voltage signal according to the voltages of the anode input port and the cathode input port, the identification result is input into the signal processing module, the signal processing module is used for determining a level signal for controlling a switch of the signal selection module according to the output of the signal processing module, and the signal selection module is used for controlling the magnitude of an output resistor according to the input of the signal processing module. The equivalent circuit of the analog multi-level resistance memristor provided by the invention can simulate the resistance values of different types of memristors under different voltages, realizes the change process of the resistance values under different voltages, meets the requirements of different types of memristor devices on circuit simulation, can better explore the electrical characteristics of the memristor and the application of the memristor in an actual circuit, and solves the technical problems that the conventional memristor equivalent circuit cannot meet the requirements of different types of memristor equivalent circuits and cannot reflect the change process of the memristor resistance values under different voltages.
The above embodiments are only for illustrating the technical solution of the present invention, and not for limiting the same; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims (3)

1. The equivalent circuit of the analog multi-stage resistance memristor is characterized by comprising a signal input module, a signal identification module, a signal processing module and a signal selection module;
the signal input module comprises an anode input port and a cathode input port;
The signal identification module is used for identifying the magnitude of an input voltage signal according to the voltages of the positive input port and the negative input port, and inputting the identification result into the signal processing module;
The signal identification module comprises a subtraction operational amplifier circuit, a voltage comparator for controlling low-resistance state switching, N specific value voltage source low-resistance state voltage comparators, a voltage comparator for controlling high-resistance state switching, M specific value voltage source high-resistance state voltage comparators and 2 NOT gates, wherein N is more than 2 and M is more than 2;
The output end of the voltage comparator for controlling the high-resistance state switching is connected with the input end of the other NOT gate, and the outputs of the voltage comparator for controlling the low-resistance state switching, the voltage comparators for controlling the high-resistance state switching, the voltage comparators for controlling the M specific-value voltage sources and the 2 NOT gates are all connected with the input end of the signal processing module;
The voltage of the positive input end is higher than the voltage of the negative input end, otherwise, the voltage of the output end is lower than the voltage of the negative input end;
The voltage of the positive input end is higher than the voltage of the reverse input end, otherwise, the voltage of the output end is lower than the voltage of the reverse input end;
The specific value voltage source low-resistance state voltage comparator and the specific value voltage source high-resistance state voltage comparator meet the following conditions: the voltage source sizes of the N specific value voltage source low-resistance state voltage comparators are between the voltage source voltage values of the voltage comparator for controlling low-resistance state switching and the voltage comparator for controlling high-resistance state switching, and are sequentially reduced, and the voltage source sizes of the M specific value voltage source high-resistance state voltage comparators are between the voltage source voltage values of the voltage comparator for controlling high-resistance state switching and the voltage comparator for controlling low-resistance state switching, and are sequentially increased;
the signal processing module is used for determining a level signal of the switch of the control signal selection module according to the output of the signal processing module;
The signal processing module comprises N+M-2 exclusive-OR gates, 2 AND gates and an SR latch, wherein the output end of each two adjacent specific value voltage source low-resistance voltage comparators is connected with the input end of one of the N-1 exclusive-OR gates, the output end of each two adjacent specific value voltage source high-resistance voltage comparators is connected with the input end of one of the M-1 exclusive-OR gates, the output end of each N specific value voltage source low-resistance voltage comparator is connected with the input end of one AND gate, the output end of each M specific value voltage source high-resistance voltage comparator is connected with the input end of the other AND gate, the S end of each SR latch is connected with the output end of the NOT gate connected with the voltage comparator for controlling the low-resistance switching, the R end of each SR latch is connected with the output end of the NOT gate connected with the voltage comparator for controlling the high-resistance switching, and the output end of each SR latch and the output end of the N+M-2 exclusive-OR gates are respectively connected with the input ends of the signal selecting module;
the signal selection module is used for controlling the output resistance according to the input of the signal processing module;
The signal selection module comprises N low-resistance control modules and M high-resistance control modules;
each low-resistance control module comprises an AND gate, a voltage control switch and a low-output resistor, wherein the positive electrode of the voltage control switch is connected with the output end of the AND gate, the negative electrode of the voltage control switch is grounded, one switch end of the voltage control switch is connected with the negative electrode input port, the other switch end of the voltage control switch is connected with one end of the low-output resistor, and the other end of the low-output resistor is connected with the positive electrode input port;
each high-resistance control module comprises an AND gate, a voltage control switch and a high-output resistor, wherein the positive electrode of the voltage control switch is connected with the output end of the AND gate, the negative electrode of the voltage control switch is grounded, one switch end of the voltage control switch is connected with the negative electrode input port, the other switch end of the voltage control switch is connected with one end of the high-output resistor, and the other end of the high-output resistor is connected with the positive electrode input port;
One input end of the AND gate of each low resistance control module is connected with the Q end of the SR latch, the other input end of one of the AND gates of all the low resistance control modules is connected with the output end of the AND gate connected with the low resistance state voltage comparator in the signal processing module, the other input end of the AND gate of the remaining low resistance control module is connected with the output end of one of the N-1 exclusive OR gates, and one input end of the AND gate of each high resistance control module is connected with the SR latch The other input end of one of the AND gates of all the high-resistance control modules is connected with the output end of the AND gate connected with the high-resistance voltage comparator in the signal processing module, and the other input end of the AND gate of the remaining high-resistance control modules is connected with the output end of one of the M-1 exclusive OR gates;
the low output resistance values of the N low resistance control modules are different, and the high output resistance values of the M high resistance control modules are different.
2. The equivalent circuit of an analog multi-level resistive memristor of claim 1, wherein the subtractive operational amplifier circuit comprises a first resistor, a second resistor, a third resistor, a fourth resistor, an operational amplifier, and a capacitor;
one end of the first resistor is connected with the positive input port, the other end of the first resistor is connected with the positive input end of the operational amplifier and one end of the third resistor respectively, the other end of the third resistor is grounded, one end of the second resistor is connected with the negative input port, the other end of the second resistor is connected with the inverting input end of the operational amplifier and one end of the fourth resistor respectively, the other end of the fourth resistor is connected with the output end of the operational amplifier, the output end of the operational amplifier is connected with one end of the capacitor, and the other end of the capacitor is grounded.
3. The equivalent circuit of an analog multi-level resistive memristor of claim 2, wherein the first, second, third and fourth resistances have a resistance of 1000kΩ and the capacitance of the capacitor is 200nF.
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CN116978428A (en) * 2023-07-06 2023-10-31 广东工业大学 Equivalent circuit of nonlinear memristor
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