CN117650056A - Packaging technology of high-reliability special ceramic direct-insert device - Google Patents
Packaging technology of high-reliability special ceramic direct-insert device Download PDFInfo
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- CN117650056A CN117650056A CN202311611164.3A CN202311611164A CN117650056A CN 117650056 A CN117650056 A CN 117650056A CN 202311611164 A CN202311611164 A CN 202311611164A CN 117650056 A CN117650056 A CN 117650056A
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- bonding
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- tube shell
- sintering
- deep cavity
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- 239000000919 ceramic Substances 0.000 title claims abstract description 20
- 238000012536 packaging technology Methods 0.000 title description 2
- 238000000034 method Methods 0.000 claims abstract description 45
- 238000005245 sintering Methods 0.000 claims abstract description 32
- 238000012858 packaging process Methods 0.000 claims abstract description 19
- 238000004806 packaging method and process Methods 0.000 claims abstract description 6
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 21
- 229910000679 solder Inorganic materials 0.000 claims description 18
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 16
- BDAGIHXWWSANSR-UHFFFAOYSA-N methanoic acid Natural products OC=O BDAGIHXWWSANSR-UHFFFAOYSA-N 0.000 claims description 16
- 238000003466 welding Methods 0.000 claims description 14
- 238000007747 plating Methods 0.000 claims description 11
- 229910052757 nitrogen Inorganic materials 0.000 claims description 10
- 238000007789 sealing Methods 0.000 claims description 10
- OSWFIVFLDKOXQC-UHFFFAOYSA-N 4-(3-methoxyphenyl)aniline Chemical compound COC1=CC=CC(C=2C=CC(N)=CC=2)=C1 OSWFIVFLDKOXQC-UHFFFAOYSA-N 0.000 claims description 8
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 8
- 235000019253 formic acid Nutrition 0.000 claims description 8
- 229910052759 nickel Inorganic materials 0.000 claims description 8
- 229910052709 silver Inorganic materials 0.000 claims description 8
- 239000004332 silver Substances 0.000 claims description 8
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 7
- 229910052737 gold Inorganic materials 0.000 claims description 7
- 239000010931 gold Substances 0.000 claims description 7
- 229910052718 tin Inorganic materials 0.000 claims description 7
- 239000000463 material Substances 0.000 claims description 6
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 5
- 238000010438 heat treatment Methods 0.000 claims description 5
- 238000003780 insertion Methods 0.000 claims description 4
- 229910052782 aluminium Inorganic materials 0.000 claims description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 3
- 239000007789 gas Substances 0.000 claims description 3
- 238000001816 cooling Methods 0.000 claims description 2
- 238000005538 encapsulation Methods 0.000 claims description 2
- 239000011800 void material Substances 0.000 abstract description 10
- 238000012360 testing method Methods 0.000 description 10
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 4
- 239000010936 titanium Substances 0.000 description 4
- 229910052719 titanium Inorganic materials 0.000 description 4
- 230000006978 adaptation Effects 0.000 description 2
- 230000032683 aging Effects 0.000 description 2
- CSDREXVUYHZDNP-UHFFFAOYSA-N alumanylidynesilicon Chemical compound [Al].[Si] CSDREXVUYHZDNP-UHFFFAOYSA-N 0.000 description 2
- 239000003153 chemical reaction reagent Substances 0.000 description 2
- 238000002474 experimental method Methods 0.000 description 2
- 229910000833 kovar Inorganic materials 0.000 description 2
- 229910052745 lead Inorganic materials 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000010008 shearing Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 229910001873 dinitrogen Inorganic materials 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000010992 reflux Methods 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
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- Ceramic Products (AREA)
Abstract
The invention relates to the technical field of packaging, in particular to a packaging process of a high-reliability special ceramic direct-insert device. The method aims at ensuring that the packaged device has small electric leakage, low sintering void ratio and high reliability by adopting a deep cavity vacuum sintering process and a deep cavity bonding process.
Description
Technical Field
The invention relates to the technical field of packaging, in particular to a packaging process of a high-reliability special ceramic direct-insert device.
Background
At present, a large number of surface mounting devices which are easy to integrate are used in the fields of aviation, aerospace, ships, weapons and the like, but the surface mounting devices are all surface mounting devices, and the direct insertion devices have the characteristics of convenient subsequent detection operation, high efficiency, high reliability and the like, and provide a premise for improving the reliability of the parameters of the whole machine.
However, the special ceramic direct-insert device has the problems of large leakage, high chip and tube sintering void ratio, unstable bonding wire bonding, low reliability and the like because the special ceramic direct-insert device has the characteristics of deeper cavity and suspended bonding pad when being used for the special ceramic direct-insert device.
Disclosure of Invention
In view of the above, the invention aims to provide a packaging process of a high-reliability special ceramic direct-insert device, which ensures that the packaged device has small leakage, low sintering void ratio and high reliability by adopting a deep cavity vacuum sintering process and a deep cavity bonding process.
The invention solves the technical problems by the following technical means:
a high-reliability special ceramic direct-insert device packaging process comprises the steps of sintering a chip on a conductive area of the direct-insert device through a vacuum sintering process, bonding two ends of a bonding wire on the chip and an outlet end of the direct-insert device through a deep-cavity bonding process, and finally sealing and welding a tube shell to complete device packaging.
According to the technical means, the direct-insert device packaged on the special ceramic has the advantages of small electric leakage, low sintering void ratio and high reliability by adopting the deep cavity vacuum sintering process and the deep cavity bonding process.
Preferably, the direct-insertion device comprises a tube shell, a conductive area is arranged in the tube shell, an insulating area is arranged around the tube shell, and a leading-out end is arranged on one side of the tube shell.
Further preferably, both the conductive region and the terminal are provided as kovar material.
Preferably, the conducting area and the leading-out end are both provided with a gold plating layer and a nickel plating layer, the thickness of the gold plating layer is at least 2um, and the thickness of the nickel plating layer is at least 3um.
Further preferably, the gold plating layer is located above the nickel plating layer, and a titanium layer is further plated between the end surfaces of the conductive region and the lead-out terminal and the nickel plating layer, and the thickness of the titanium layer is 0.4um.
Preferably, an aluminum layer is arranged on one side of the chip, a silver layer is arranged on the other side of the chip, the components of the solder sheet comprise lead, tin and silver, and the ratio of the lead to the tin to the silver is 37:2:1.
Further preferably, the ratio of lead, tin and silver in the solder sheet is 92.5% Pb, 5% Sn, and 2.5% Ag2.
Preferably, the direct-insert device is one or more of a diode, a triode and a MOS tube.
Preferably, the packaging process specifically comprises the following steps:
s1, selecting materials, namely selecting a device tube shell, a solder sheet, a chip and a bonding wire;
s2, fixing the chip on a conductive area of the tube shell through a solder piece by adopting a deep cavity vacuum sintering process;
s3, bonding two ends of the bonding wire on the chip and the leading-out end of the tube shell by adopting a deep cavity bonding process;
s4, sealing and welding the tube shell by adopting a parallel seam welder to finish the encapsulation of the device.
According to the technical means, the chip is sintered on the conductive area through the deep cavity vacuum sintering process, so that the chip and the conductive area have the characteristics of large shearing force, small electric leakage, low void ratio and the like; and the bonding wire is used for electrically connecting the chip and the leading-out end through the deep cavity bonding process, so that the consistency and reliability of the tensile strength of the bonded device can be improved.
Preferably, the step S2 specifically includes:
s21, placing the solder sheet and the chip in the position in the tube shell, and then placing the solder sheet and the chip in a sintering area of a vacuum reflow furnace;
s22, starting a vacuum reflow furnace, increasing the temperature to the sintering temperature, and introducing gas step by step in the heating process;
s23, when the temperature in the vacuum reflow furnace is raised to 320-330 ℃, keeping the sintering time of 25-35s, cooling to room temperature after sintering, and taking out the sintered device.
Preferably, in the step S22, during the heating process, nitrogen is introduced into the gap, the flow rate of the nitrogen is 15-16slm, and formic acid is introduced when the temperature rises to 130-180 ℃, and the time for introducing the formic acid is 300-400S.
According to the technical means, nitrogen is introduced to clean the cavity of the vacuum reflux furnace, and the cavity is kept in a vacuum state of 4mbar after the cleaning is finished; and then formic acid is introduced to form a gas state at high temperature, so that the metal ceramic shell, the solder sheet, the chip and other materials are protected, and the high-temperature oxidation is avoided.
Further preferably, the nitrogen gas is introduced at a flow rate of 15.4slm; the formic acid was introduced for 300s.
Preferably, the step S3 specifically includes:
s31, selecting the types of deep cavity bonding equipment, bonding wires and a riving knife according to the process requirements;
s32, setting process conditions of a first bonding point and a second bonding point through deep cavity bonding equipment, wherein the first bonding point is arranged at a chip bonding position; the second bonding point is arranged on a conductive area of the tube wall at one side of the interior of the tube shell;
s33, reliably connecting the first bonding point chip, the second bonding point and the shell conductive area through bonding wires by using deep cavity bonding equipment.
According to the technical means, the bonding mode which is popular at present is a planar bonding process, and the high-reliability special ceramic surface mount device in the scheme is of a deep cavity three-dimensional structure and is not suitable for the planar bonding process, so that the bonding wire is effectively connected with the chip and the shell conductive area by adopting the deep cavity bonding process, and the reliability and consistency of the bonded device are improved.
Further preferably, the bonding wire is a silicon aluminum wire with a diameter of 100 to 500um.
Preferably, in the step S32, the process conditions of the first bonding point are: bonding power: 195 mW-210 mW, bonding pressure: 375 g-415 g, bonding time: 300 ms-330 ms, and the deformation size is 95-115 um; the second bonding point has the following process conditions: bonding power: 205 mW-220 mW, bonding pressure: 385 g-425 g, bonding time: 300 ms-330 ms, deformation size: 105-125 um.
The application adopting the scheme has the following beneficial effects:
1. the direct-insert device packaged on the surface of the special ceramic has small electric leakage, low sintering void ratio and high reliability by adopting a deep cavity vacuum sintering process and a deep cavity bonding process;
2. the deep cavity vacuum reflow soldering sintering process has the characteristics of large shearing force, high reliability, low void ratio and the like; by adopting the deep cavity bonding process, the reliability and consistency of the bonded devices can be improved, the working temperature range of the devices is between-55 ℃ and 150 ℃, and the practicability is strong;
3. the process is easy to realize automation, so that the production efficiency can be improved.
Drawings
The present application may be further illustrated by the non-limiting examples given in the accompanying drawings;
FIG. 1 is one of the schematic cross-sectional structural diagrams of a TO254 packaged device according TO embodiments of the present application;
FIG. 2 is a second schematic cross-sectional view of a TO 254-type packaged device according TO embodiments of the application;
main symbol element description:
1. a tube shell; 2. a conductive region; 3. a lead-out end; 4. a solder sheet; 5. a chip; 6. and (5) bonding wires.
Detailed Description
The following specific examples are presented to illustrate the embodiments of the present invention and to enable those skilled in the art to make and use the present invention as disclosed herein:
the packaging process of the high-reliability special ceramic direct-insert device comprises the steps of sintering a chip 5 on a conductive area 2 of the direct-insert device through a vacuum sintering process, bonding two ends of a bonding wire 6 on the chip 5 and an outlet end 3 of the direct-insert device through a deep-cavity bonding process, and finally sealing and welding a tube shell 1 to finish device packaging.
Example 1 packaging Process for Special ceramic direct-insert device
In this embodiment, the TO 254-class package device is illustrated as a package on a surface of a special ceramic, as shown in fig. 1-2. The direct-insertion type device comprises a metal ceramic tube shell 1, wherein a conductive area 2 is arranged at the bottom in the tube shell 1, a chip 5 is welded on the conductive area 2 at the bottom of the tube shell through a solder piece 4, a lead-out end 3 is electrically connected with the conductive area 2, a lead-out end 3 is arranged on one side of the tube shell 1, and the chip 5 is electrically connected with the chip through a bonding wire 6. The conductive area and the leading-out end are made of kovar materials, and the conductive area and the leading-out end are plated with a titanium layer, a nickel layer and a gold layer, wherein the thickness of the titanium layer is 0.4um, the thickness of the nickel layer is 3um, and the thickness of the gold layer is 2um. One side surface of the chip 5 is provided with an aluminum layer, and the other side surface is provided with a silver layer. The solder sheet 4 comprises lead, tin and silver in a proportion of 92.5% Pb, 5% Sn and 2.5% Ag2%.
Packaging process
S1, selecting materials, namely selecting a direct-insert device tube shell 1, a solder sheet 4, a chip 5 and a bonding wire 6, wherein the direct-insert device is the TO254 packaging device, and the bonding wire 6 is a silicon aluminum wire with the diameter of 100-500 um;
s2, fixing the chip 5 on the conductive area 2 of the tube shell 1 through a solder piece 4 by adopting a deep cavity vacuum sintering process;
s21, placing the solder sheet 4 and the chip 5 in the position in the tube shell 1, and then placing the tube in a sintering area of a vacuum reflow furnace;
s22, starting a vacuum reflow furnace, increasing the temperature to 325+/-1 ℃, and introducing nitrogen in three stages in the heating process: the temperature of the cavity in the first stage is 60 ℃; the temperature of the cavity in the second stage is 60-130 ℃; the temperature of the cavity in the third stage is 180-230 ℃; the flow rate of the nitrogen is 15.4slm, and when the temperature rises to 130-180 ℃, the formic acid is introduced, and the time for introducing the formic acid is 300s;
s23, when the temperature in the vacuum reflow oven is increased to 325+/-1 ℃, keeping the sintering time for 30 seconds, after sintering, introducing nitrogen, wherein the flow rate of the introduced nitrogen is 15.4slm, so that the temperature in the cavity is reduced from 325+/-1 ℃ to 60 ℃, stopping introducing nitrogen, naturally reducing the temperature to room temperature, and taking out the sintered device;
s3, bonding two ends of the bonding wire 6 on the chip 5 and the leading-out end 3 by adopting a deep cavity bonding process;
s31, selecting the types of deep cavity bonding equipment, bonding wires 6 and a riving knife according to the process requirements, wherein the deep cavity bonding equipment is FS5350& FS5330, and the type of the riving knife is SMW-FK-W15&6780-W7H;
s32, setting process conditions of a first bonding point and a second bonding point through deep cavity bonding equipment, wherein the first bonding point is arranged at a chip bonding position, and the process conditions of the first bonding point are as follows: bonding power: 195 mW-210 mW, bonding pressure: 375 g-415 g, bonding time: 300 ms-330 ms, and the deformation size is 95-115 um; the second bonding point is arranged on the conductive area of the pipe wall at one side of the inside of the pipe shell, and the technological conditions of the second bonding point are as follows: bonding power: 205 mW-220 mW, bonding pressure: 385 g-425 g, bonding time: 300 ms-330 ms, deformation size: 105-125 um;
s33, reliably connecting the first bonding point chip and the second bonding point tube shell conductive area through the bonding wire 6 by using deep cavity bonding equipment.
S4, adopting a parallel seam welder to seal and weld the tube shell, wherein the operation process of the parallel seam welder is divided into two stages: the welding method comprises a spot welding stage and a sealing welding stage, wherein the conditions of the spot welding stage are as follows: initial spot welding current is 0.7KA, and spot welding pressure is 500g; the conditions of the seam welding stage are as follows: the front section 30% current is 0.65KA, the middle section 40% current is 0.7KA, and the end section 30% current is 0.65KA; sealing and welding pressure is 500g; sealing and welding speed is 5mm/s; by the sealing conditions, the sealing performance is better during sealing, and the leakage rate can be controlled at 5 x 10 - 9 pa.m 3 Within/s, thereby completing the device package.
Example 2, test
The ceramic surface TO 254-type package device obtained by the package of example 1 was subjected TO a high temperature life, high and low temperature impact, and power aging test for verifying the shear force strength between the chip and the package, and the bonding strength between the bonding wire and the package and between the bonding wire and the chip.
The specific conditions for the high-temperature life test are as follows: 150 ℃ and continuously for 96 hours;
the specific conditions of high and low temperature impact are as follows: (1) the circulation temperature is between 55 ℃ below zero and 150 ℃; (2) the temperature zone switching time is less than 1min; (3) the holding time of the temperature zone is more than 10min; (4) the cycle times are more than 20 times;
the specific conditions of power aging are as follows: (1) the temperature is 150 ℃, the voltage is 80 percent of the specification of the chip, and the test time is 160h;
the device passing the test is detected by adopting X-RAY equipment, the void fraction is tested under the test conditions of 100-130 KV voltage and 80-110 UA current, and the sintering void fraction is within 5%, which shows that the device has the characteristic of low sintering void fraction by the process of the embodiment 1 of the application.
Carrying out static test on the device passing the test, wherein the value of a test index parameter IDSS (reverse leakage current) is 300-500 nA, the chip specification IDSS is smaller than 10uA, and the test result is as follows: (1) VgsTH (source threshold voltage) < 4V, (2) IDSS < 10uA, (3) BVDSS (breakdown voltage) > 600V, (4) IGSS (gate leakage current) < 100nA; the process of the embodiment 1 of the application proves that the device has the characteristic of small electric leakage.
The packaging process of the high-reliability special ceramic direct-insert device provided by the invention is described in detail. The description of the specific embodiments is only intended to aid in understanding the method of the present invention and its core ideas. It should be noted that it will be apparent to those skilled in the art that various modifications and adaptations of the invention can be made without departing from the principles of the invention and these modifications and adaptations are intended to be within the scope of the invention as defined in the following claims.
What needs to be specifically stated is: the specific experimental procedures or conditions are not noted in the examples and may be followed by the operations or conditions of conventional experimental procedures described in the literature in this field. The reagents or apparatus used were conventional reagent products commercially available without the manufacturer's knowledge.
The above examples are provided for better understanding of the present invention, and are not limited to the preferred embodiments, but are not limited to the content and scope of the present invention, and any product which is the same or similar to the present invention obtained by any person who is in the light of the present invention or combines the present invention with other features of the prior art falls within the scope of the present invention.
Claims (10)
1. A packaging process of a high-reliability special ceramic direct-insert device is characterized in that a chip is sintered in a conductive area of the direct-insert device through a vacuum sintering process, two ends of a bonding wire are bonded on the chip and an outlet end of the direct-insert device through a deep cavity bonding process, and finally a tube shell is subjected to seal welding to complete the packaging of the device.
2. The packaging process according to claim 1, wherein the direct-insertion device comprises a tube shell, a conductive area is arranged in the tube shell, an insulating area is arranged around the inside of the tube shell, and a lead-out end is arranged on one side of the tube shell.
3. The packaging process according to claim 2, wherein a gold plating layer and a nickel plating layer are disposed on the conductive region and the lead-out terminal, the gold plating layer has a thickness of at least 2um, and the nickel plating layer has a thickness of at least 3um.
4. The packaging process according to claim 1, wherein an aluminum layer is provided on one side of the chip and a silver layer is provided on the other side, and the solder sheet comprises lead, tin and silver in a ratio of 37:2:1.
5. The packaging process of claim 1, wherein the in-line device is one or more of a diode, a triode, and a MOS transistor.
6. The packaging process according to any one of claims 1-5, characterized in that it comprises in particular the following steps:
s1, selecting materials, namely selecting a device tube shell, a solder sheet, a chip and a bonding wire;
s2, fixing the chip on a conductive area of the tube shell through a solder piece by adopting a deep cavity vacuum sintering process;
s3, bonding two ends of the bonding wire on the chip and the leading-out end of the tube shell by adopting a deep cavity bonding process;
s4, sealing and welding the tube shell by adopting a parallel seam welder to finish the encapsulation of the device.
7. The packaging process according to claim 6, wherein the step S2 specifically includes:
s21, placing the solder sheet and the chip in the position in the tube shell, and then placing the solder sheet and the chip in a sintering area of a vacuum reflow furnace;
s22, starting a vacuum reflow furnace, increasing the temperature to the sintering temperature, and introducing gas step by step in the heating process;
s23, when the temperature in the vacuum reflow furnace is raised to 320-330 ℃, keeping the sintering time of 25-35s, cooling to room temperature after sintering, and taking out the sintered device.
8. The packaging process according to claim 7, wherein in the step S22, nitrogen is introduced into the gap during the heating process, the flow rate of nitrogen is 15-16slm, and formic acid is introduced when the temperature is raised to 130-180 ℃, and the time for introducing formic acid is 300-400S.
9. The packaging process according to claim 6, wherein the step S3 specifically includes:
s31, selecting the types of deep cavity bonding equipment, bonding wires and a riving knife according to the process requirements;
s32, setting process conditions of a first bonding point and a second bonding point through deep cavity bonding equipment, wherein the first bonding point is arranged at a chip bonding position; the second bonding point is arranged on a conductive area of the tube wall at one side of the interior of the tube shell;
s33, reliably connecting the first bonding point chip, the second bonding point and the shell conductive area through bonding wires by using deep cavity bonding equipment.
10. The packaging process according to claim 9, wherein in the step S32, the process conditions of the first bonding point are: bonding power: 195 mW-210 mW, bonding pressure: 375 g-415 g, bonding time: 300 ms-330 ms, and the deformation size is 95-115 um; the second bonding point has the following process conditions: bonding power: 205 mW-220 mW, bonding pressure: 385 g-425 g, bonding time: 300 ms-330 ms, deformation size: 105-125 um.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311611164.3A CN117650056A (en) | 2023-11-29 | 2023-11-29 | Packaging technology of high-reliability special ceramic direct-insert device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311611164.3A CN117650056A (en) | 2023-11-29 | 2023-11-29 | Packaging technology of high-reliability special ceramic direct-insert device |
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| Publication Number | Publication Date |
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| CN117650056A true CN117650056A (en) | 2024-03-05 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202311611164.3A Pending CN117650056A (en) | 2023-11-29 | 2023-11-29 | Packaging technology of high-reliability special ceramic direct-insert device |
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| Country | Link |
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| CN (1) | CN117650056A (en) |
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- 2023-11-29 CN CN202311611164.3A patent/CN117650056A/en active Pending
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