CN117614461A - Low-density parity check quick decoding method and related equipment - Google Patents

Low-density parity check quick decoding method and related equipment Download PDF

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Publication number
CN117614461A
CN117614461A CN202311449317.9A CN202311449317A CN117614461A CN 117614461 A CN117614461 A CN 117614461A CN 202311449317 A CN202311449317 A CN 202311449317A CN 117614461 A CN117614461 A CN 117614461A
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node
target
column
probability
determining
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吴睿振
王凛
符晖
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Shenzhen Weihe Technology Co ltd
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Shenzhen Weihe Technology Co ltd
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148Structural properties of the code parity-check or generator matrix
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105Decoding
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0061Error detection codes

Abstract

The application discloses a low density parity check quick decoding method and related equipment, comprising the following steps: receiving information to be decoded, and determining a low-density parity check matrix according to the information to be decoded; determining a root node, an extension node and a leaf node according to the low-density parity check matrix; constructing a decoding tree according to the root node, the extension node and the leaf node; calculating each node in the decoding tree according to the information to be decoded to obtain probability values of a plurality of target branches in the decoding tree; verifying each target branch according to the sequence from the big probability value to the small probability value of each target branch in the plurality of target branches; the decoding value of the information to be decoded is determined from the target branch that passed the check first. According to the method, through the decoding tree, unidirectional sequential decoding can be achieved, iterative operation is not needed, and decoding efficiency is greatly improved.

Description

Low-density parity check quick decoding method and related equipment
Technical Field
The invention relates to the technical field of low-density parity check decoding, in particular to a low-density parity check quick decoding method and related equipment.
Background
Currently, the fifth generation mobile communication technology (5th Generation Mobile Communication Technology,5G) is developed, and is deeply applied to various aspects of social production, management and the like, and is an important technology closely related to daily work and life of people. The 5G application scenario is divided into three types, namely an enhanced mobile broadband (Enhanced Mobile Broadband, eMBB) scenario; high reliability Low latency communication (Ultra-Reliable & Low-Latency Communication, uRLLC) scenarios for some automation services in industry; the mass machine type communication (massive Machine Type of Communication, mMTC) scene is used for large-scale machine communication and large-scale Internet of things service, so that the aim of interconnection of everything is fulfilled.
With the continuous development of wireless communication technology, digital signals have become the current main signal processing mode. Compared with analog signals, digital signals have higher anti-interference capability, and security is easier to improve, and can be used in combination with modern signal processing techniques. Due to the complex nature of the channels, the modulated signals are more or less affected by the channels as they are transmitted in the channels. Therefore, in a communication system, an effective method of channel coding is often used to correct errors, thereby reducing the error rate of the system. The channel coding is to add human controllable redundancy on the signal transmitting end, and error detection and correction can be performed by the redundancy on the receiving end.
The third generation partnership project (3rd Generation Partnership Project,3GPP) specifies in the 38.Xxx protocol that data communication under 5G, data information of the physical downlink shared channel (Physical Downlink Shared Channel, PDSCH) will employ Low-density Parity-check (LDPC) as a code seed for coding and decoding. Specifically, the LDPC performs encoding and decoding by selecting a sparse matrix specified by a standard under different environments to implement information transmission, and generally, the decoding of the LDPC uses BP and other improved methods, such as sum-product algorithm, minimum sum algorithm, and the like, to perform operations according to a row-column iteration mode, and generally, the decoding sets a maximum iteration, and if the decoding passes CRC check within the limit of the iteration number, the decoding ends, otherwise, the decoding is retransmitted.
The existing 5G UE hardware implementation, in the aspect of LDPC decoder, the commonly used decoding algorithm is SPA. The SPA algorithm uses BP as an algorithm basis, decoding requirements can be well realized in limited iteration times through iteration, and the relationship between BER obtained by decoding and speed and area has better performance compared with other algorithms. However, if the theoretical basis of the sum algorithm is BP, and the situation that decoding cannot be performed in certain scenes is still caused, the situation is affected by noise, and if decoding cannot be performed, the HARQ process can be entered for retransmission according to the protocol of 3GPP until decoding is correct, so that a lot of time can be wasted, the working efficiency is reduced, and the data throughput capacity is reduced. How to implement an LDPC decoder with a smaller area to achieve a better BER in a shorter time has been a major issue for UE design.
Disclosure of Invention
In order to solve the above-mentioned problems in the prior art, the embodiment of the application provides a low-density parity check quick decoding method and related equipment, which realize unidirectional sequential decoding through a decoding tree, and utilize different screening value settings to obtain different saved values, so that iterative operation is not needed, and the decoding efficiency is improved.
In a first aspect, embodiments of the present application provide a low density parity check fast decoding method, including:
Receiving information to be decoded, and determining a low-density parity check matrix according to the information to be decoded;
determining a root node, an extension node and a leaf node according to the low-density parity check matrix;
constructing a decoding tree according to the root node, the extension node and the leaf node;
calculating each node in the decoding tree according to the information to be decoded to obtain probability values of a plurality of target branches in the decoding tree;
verifying each target branch according to the sequence from the big probability value to the small probability value of each target branch in the plurality of target branches;
the decoding value of the information to be decoded is determined from the target branch that passed the check first.
In one possible implementation, determining the root node from the low density parity check matrix includes:
determining the row weight of each row in the low-density parity check matrix to obtain m first row weights;
determining the column weight of each column in the low-density parity check matrix to obtain n first column weights;
determining a column sequence number of a column corresponding to the maximum value in the weight of n first columns in the low-density parity check matrix to obtain a first column sequence number;
extracting rows corresponding to the minimum value in the m first row weights to obtain a first matrix;
deleting a first target column in the first matrix to obtain a second matrix, wherein the column sequence number of the first target column in the first matrix is the same as the first column sequence number;
Determining a second column sequence number according to the second matrix;
the first sequence number and the second sequence number are used as root nodes.
In one possible implementation, determining the second column sequence number from the second matrix includes:
determining the column weight of each column in the second matrix to obtain p second column weights;
determining if there is a unique maximum value in the p second column weights;
if so, the column number of the column corresponding to the maximum value in the low-density parity check matrix is used as a second column number;
if the number is not present, the column number of the column corresponding to the next largest value in the weight of the n first columns in the low density parity check matrix is used as the second column number.
In one possible implementation, determining the extension node from the low density parity check matrix includes:
deleting columns corresponding to the first column sequence number and the second column sequence number in the low-density parity check matrix to obtain a third matrix;
performing multiple extension node determination processing on the third matrix to determine extension nodes;
wherein the ith extension node determination process includes:
determining the row weight of each row in the fourth matrix Ai to obtain q second row weights, wherein i is an integer greater than or equal to 1, and when i=1, the fourth matrix A1 is a third matrix;
Extracting a row corresponding to the minimum value in the q second row weights to obtain an extension row Bi;
taking the column number of the element with the element value of 1 in the extended row Bi in the low-density parity check matrix as a third column number Ci;
deleting columns corresponding to elements with element values of 1 in the extension rows Bi in the fourth matrix Ai to obtain a fourth matrix ai+1, performing i+1th extension node determination processing until no new third serial number appears, and ending multiple extension node determination processing;
the plurality of third column numbers Ci determined by the plurality of extension node determination processes are taken as extension nodes.
In one possible implementation, determining the leaf node from the low density parity check matrix includes:
deleting columns corresponding to a plurality of third column numbers Ci in the third matrix to obtain a fifth matrix;
determining whether there is a pair of target elements 1 in each row of the fifth matrix, respectively;
if the two column numbers of the paired columns corresponding to the paired target elements 1 in the low-density parity check matrix exist, determining two column numbers of the paired columns corresponding to the paired target elements 1 in the low-density parity check matrix, and obtaining a fourth column number group;
the fourth sequence number group is used as the leaf node.
In one possible implementation manner, each node in the decoding tree is calculated according to the information to be decoded to obtain probability values of multiple target branches in the decoding tree, including:
Carrying out log-likelihood ratio operation on each element in the information to be decoded to obtain the probability that each element is 0 and the probability that each element is 1;
and carrying the probability of each element being 0 and the probability of each element being 1 into each node in the decoding tree to calculate so as to obtain probability values of a plurality of target branches in the decoding tree.
In one possible implementation, the probability that each element is 0 and the probability that each element is 1 are brought into each node in the decoding tree to calculate, so as to obtain probability values of multiple target branches in the decoding tree, where the probability values include:
determining a plurality of first target nodes in a decoding tree, wherein each first target node in the plurality of first target nodes is a node containing a root node or an extension node in the decoding tree;
determining the node probability of each first target node in the probability of each element being 0 and the probability of each element being 1 according to the root node or the extension node contained in each first target node and the value of the root node or the extension node contained in each first target node;
determining a plurality of first candidate branches according to the position relation of the plurality of first target nodes in the decoding tree;
Determining a first branch probability of each first candidate branch in the plurality of first candidate branches according to the node probability of each first target node;
according to a preset screening value g and a first branch probability of each first candidate branch, determining g first target branches in a plurality of first candidate branches, wherein the g first target branches are the first g first candidate branches in the plurality of first candidate branches, and the first branch probabilities are arranged in the order from big to small;
determining a plurality of subsequent second target nodes of each first target branch in the decoding tree according to the position of each first target branch in the g first target branches in the decoding tree, wherein each second target node in the plurality of second target nodes is a node containing leaf nodes in the decoding tree;
determining the node probability of each second target node in the probability of each element being 0 and the probability of each element being 1 according to the leaf node contained in each second target node and the value of the leaf node contained in each second target node;
determining a plurality of second candidate branches according to the position relation of g first target branches and a plurality of second target nodes, which follow each first target branch, in the decoding tree;
Determining a second branch probability of each second candidate branch of the plurality of second candidate branches according to the node probability of each second target node and the first branch probability of each first target branch;
according to the screening value g and the second branch probability of each second candidate branch, determining g second target branches in a plurality of second candidate branches, wherein the g second target branches are the first g second candidate branches of the plurality of second candidate branches, and the second branch probabilities are arranged in the order from big to small;
and taking g second branch probabilities corresponding to the g second target branches as probability values of a plurality of target branches in the decoding tree.
In a second aspect, embodiments of the present application provide a low density parity check fast decoding apparatus, including:
the analysis module is used for receiving the information to be decoded, determining a low-density parity check matrix according to the information to be decoded, determining a root node, an extension node and a leaf node according to the low-density parity check matrix, and constructing a decoding tree according to the root node, the extension node and the leaf node;
the calculation module is used for calculating each node in the decoding tree according to the information to be decoded to obtain probability values of a plurality of target branches in the decoding tree, and checking each target branch according to the sequence from the big to the small of the probability value of each target branch in the plurality of target branches;
And the decoding module is used for determining the decoding value of the information to be decoded according to the target branch which passes the verification first.
In a third aspect, embodiments of the present application provide an electronic device, including: and a processor coupled to the memory, the memory for storing a computer program, the processor for executing the computer program stored in the memory to cause the electronic device to perform the method as in the first aspect.
In a fourth aspect, embodiments of the present application provide a computer-readable storage medium storing a computer program, the computer program causing a computer to perform the method as in the first aspect.
In a fifth aspect, embodiments of the present application provide a computer program product comprising a non-transitory computer readable storage medium storing a computer program, the computer being operable to cause a computer to perform a method as in the first aspect.
The implementation of the embodiment of the application has the following beneficial effects:
it can be seen that in the embodiment of the present application, the root node, the extension node and the leaf node are determined by analyzing the LDPC matrix corresponding to the information to be decoded. And then constructing a decoding tree based on the root node, the extension node and the leaf node, and calculating each node in the decoding tree according to the information to be decoded. And finally, determining the probability value of each branch in the decoding tree according to the calculation result, checking each branch according to the sequence from the large probability value to the small probability value, and determining the decoding value of the information to be decoded according to the branch which passes the checking first. Therefore, unidirectional sequential decoding can be realized, different stored values are obtained by setting different screening values, decoding of information to be decoded can be realized without iterative operation, and decoding efficiency is greatly improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic hardware structure of a low-density parity check fast decoding device according to an embodiment of the present application;
fig. 2 is a flow chart of a low density parity check fast decoding method according to an embodiment of the present application;
FIG. 3 is a schematic diagram of the row weight and column weight of an LDPC matrix H according to an embodiment of the present application;
fig. 4 is a schematic flow chart of a multiple extension node determining process according to an embodiment of the present application;
fig. 5 is a schematic diagram of a decoding tree based on a root node and an extension node according to an embodiment of the present application;
fig. 6 shows a block diagram of a root node, an extension node, and a leaf node (d) 3 ,d 6 ) Schematic representation of the decoding tree of (a);
FIG. 7 is a schematic diagram of a decoding tree based on a root node, an extension node, and all leaf nodes according to an embodiment of the present application;
FIG. 8 is a block diagram of another embodiment of the present application based on root, extension and leaf nodes (d 3 ,d 6 ) Schematic representation of the decoding tree of (a);
fig. 9 shows a block diagram of a root node, an extension node, and a leaf node (d) 4 ,d 7 ) Schematic representation of the decoding tree of (a);
FIG. 10 is a functional schematic of a computing module according to an embodiment of the present disclosure;
FIG. 11 is a functional schematic diagram of a root node and an extension node module according to an embodiment of the present disclosure;
fig. 12 is a functional schematic of a leaf node module according to an embodiment of the present application;
fig. 13 is a functional schematic of an output module according to an embodiment of the present disclosure;
FIG. 14 is a functional block diagram of a low density parity check fast decoding device according to an embodiment of the present application;
fig. 15 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
Detailed Description
The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are some, but not all, of the embodiments of the present application. All other embodiments, based on the embodiments herein, which would be apparent to one of ordinary skill in the art without undue burden are within the scope of the present application.
The terms "first," "second," "third," and "fourth" and the like in the description and in the claims of this application and in the drawings, are used for distinguishing between different objects and not for describing a particular sequential order. Furthermore, the terms "comprise" and "have," as well as any variations thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those listed steps or elements but may include other steps or elements not listed or inherent to such process, method, article, or apparatus.
Reference herein to "an embodiment" means that a particular feature, result, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those skilled in the art will explicitly and implicitly understand that the embodiments described herein may be combined with other embodiments.
First, referring to fig. 1, fig. 1 is a schematic hardware structure of a low-density parity check fast decoding device according to an embodiment of the present application. The low density parity check fast decoding device 100 comprises at least one processor 101, a communication line 102, a memory 103 and at least one communication interface 104.
In this embodiment, the processor 101 may be a general purpose central processing unit (central processing unit, CPU), microprocessor, application-specific integrated circuit (ASIC), or one or more integrated circuits for controlling the execution of programs in the present application.
Communication line 102 may include a pathway to transfer information between the above-described components.
The communication interface 104, which may be any transceiver-like device (e.g., antenna, etc.), is used to communicate with other devices or communication networks, such as ethernet, RAN, wireless local area network (wireless local area networks, WLAN), etc.
The memory 103 may be, but is not limited to, a read-only memory (ROM) or other type of static storage device that can store static information and instructions, a random access memory (random access memory, RAM) or other type of dynamic storage device that can store information and instructions, or an electrically erasable programmable read-only memory (electrically erasable programmable read-only memory, EEPROM), a compact disc (compact disc read-only memory) or other optical disc storage, optical disc storage (including compact disc, laser disc, optical disc, digital versatile disc, blu-ray disc, etc.), magnetic disk storage media or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer.
In this embodiment, the memory 103 may be independently provided and connected to the processor 101 via the communication line 102. Memory 103 may also be integrated with processor 101. The memory 103 provided by embodiments of the present application may generally have non-volatility. The memory 103 is used for storing computer-executable instructions for executing the embodiments of the present application, and is controlled by the processor 101 to execute the instructions. The processor 101 is configured to execute computer-executable instructions stored in the memory 103, thereby implementing the methods provided in the embodiments of the present application described below.
In alternative embodiments, computer-executable instructions may also be referred to as application code, which is not specifically limited in this application.
In alternative embodiments, processor 101 may include one or more CPUs, such as CPU0 and CPU1 in fig. 1.
In alternative embodiments, the low density parity check fast decoding apparatus 100 may include a plurality of processors, such as the processor 101 and the processor 107 in fig. 1. Each of these processors may be a single-core (single-CPU) processor or may be a multi-core (multi-CPU) processor. A processor herein may refer to one or more devices, circuits, and/or processing cores for processing data (e.g., computer program instructions).
In an alternative embodiment, if the low-density parity-check fast decoding device 100 is a server, for example, it may be a stand-alone server, or may be a cloud server that provides cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communication, middleware services, domain name services, security services, content delivery network (Content Delivery Network, CDN), and basic cloud computing services such as big data and artificial intelligence platforms. The low density parity check fast decoding device 100 may further include an output device 105 and an input device 106. The output device 105 communicates with the processor 101 and may display information in a variety of ways. For example, the output device 105 may be a liquid crystal display (liquid crystal display, LCD), a light emitting diode (light emitting diode, LED) display device, a Cathode Ray Tube (CRT) display device, or a projector (projector), or the like. The input device 106 is in communication with the processor 101 and may receive user input in a variety of ways. For example, the input device 106 may be a mouse, a keyboard, a touch screen device, a sensing device, or the like.
The low density parity check fast decoding apparatus 100 may be a general-purpose apparatus or a special-purpose apparatus. The present embodiment does not limit the type of the low density parity check fast decoding apparatus 100.
Hereinafter, a low density parity check fast decoding system disclosed in the present application will be described in detail.
Referring to fig. 2, fig. 2 is a flow chart of a low density parity check fast decoding method according to an embodiment of the present application. Specifically, the low density parity check fast decoding method may include the steps of:
201: and receiving information to be decoded, and determining a low-density parity check matrix according to the information to be decoded.
In this embodiment, the LDPC matrix is a predetermined encoding matrix, and may be obtained according to a decoding rule of an information query contract to be decoded. For ease of understanding, the LDPC codec will be described below by taking a simple codec of an LDPC as an example.
Specifically, in this example, the LDPC matrix H is as follows:
the length of the source code is 4, denoted as s= [ s1, s2, s3, s4], and the check code length is 3, denoted as b= [ b1, b2, b3]. Then for matrix H in the above equation, there is the following coding relationship:
b1=s1⊕s2
b2=s2⊕s3
b3=s1⊕s2⊕s4
the information to be decoded received by the decoding end is as follows:
c=[c1,c2,c3,c4,c5,c6,c7]=[s,b]+noise
wherein c1-c7 are Log-Likelihood Ratio (LLR) values, noise is noise generated in transmission, that is, after transmission, the decoding end obtains a mixture of source code s, check code b and noise. In the existing mode, when decoding is performed, firstly, an LDPC matrix H used in encoding is determined according to information c to be decoded, and then decoding operation is performed based on the information c to be decoded and the LDPC matrix H so as to obtain correct source codes. In general, decoding of LDPC uses SPA decoding, and the received information c (LLR values) to be decoded is first iterated transversely according to the LDPC matrix H, and then iterated longitudinally, so as to implement decoding.
202: and determining a root node, an extension node and a leaf node according to the low-density parity check matrix.
The following will explain the determination modes of the root node, the extension node, and the leaf node, respectively:
<1> root node:
specifically, the root node includes two information nodes, and needs to be confirmed separately. Along with the above example of the information c to be decoded and the LDPC matrix H, it is first necessary to determine the row weight of each row in the LDPC matrix H to obtain m first row weights, and determine the column weight of each column in the LDPC matrix H to obtain n first column weights. Where row weight refers to the number of elements 1 contained in a matrix row and column weight refers to the number of elements 1 contained in a matrix column.
For example, as shown in fig. 3, the LDPC matrix H is a 3X7 matrix, where row 1 contains 3 elements 1, row 2 contains 3 elements 1, row 3 contains 4 elements 1, and then 3 first row weights are obtained, where r1w1=3, r2w1=3, and r3w1=4; column 1 contains 2 elements 1, column 2 contains 3 elements 1, column 3 contains 1 element 1, column 4 contains 1 element 1, column 5 contains 1 element 1, column 6 contains 1 element 1, column 7 contains 1 element 1, 7 first column weights can be obtained, c1w1=2, c2w1=3, c3w1=1, c4w1=1, c5w1=1, c6w1=1, and c7w1=1, respectively.
After determining the row weight of each row and the column weight of each column in the LDPC matrix H, two information nodes corresponding to the root node can be further confirmed according to the obtained row weight and column weight, and specifically, the confirmation method is as follows:
d x =max{CW}
r x =min{RW}
find d x and d y max match in r x
if d y not found
find d y in max{C !=x W}
wherein d is x And d y I.e. two information nodes to be determined, the following will be for the first sequence number d respectively x And a second column number d y The determination method of (1) is described:
(1) First serial number d x
In this embodiment, a column corresponding to the maximum value may be found from the calculated n first column weights, and the column number in the LDPC matrix. In the example described above, the maximum value of the first column weight is c2w=3, corresponding to column 2 of the LDPC matrix, and therefore the first column number obtained is 2, denoted as d 2
(2) Second column number d y
In the present embodiment, the first serial number d is determined 2 After that, first m first rows need to be extractedAnd obtaining a first matrix by the row corresponding to the minimum value in the weight. Along the example using the LDPC matrix H described above, the minimum value in the first row weight is: r1w=3 and r2w=3, corresponding to the 1 st and 2 nd rows of the LDPC matrix H, denoted R 1 And r 2 . Extracting the 1 st row and the 2 nd row to obtain the following first matrix:
And then deleting the first target column with the column sequence number of the first column sequence number in the first matrix to obtain a second matrix. Along with the example using the first matrix described above, it determines the first column number d 2 And if the matrix is 2, deleting the 2 nd column in the first matrix to obtain the following second matrix:
then, the column weights for each column in the second matrix are determined, resulting in p second column weights, and a determination is made as to whether there is a unique maximum value among the p second column weights. If the first row number exists, the row number of the unique maximum value corresponding to the first row in the LDPC matrix H is used as a second row number; if not, the column number of the column corresponding to the next largest value in the n first column weights in the LDPC matrix H is used as the second column number.
Specifically, along with the example using the above second matrix, which is a 2X6 matrix, in which column 1 contains 1 element 1, column 2 contains 1 element 1, column 3 contains 0 element 1, column 4 contains 1 element 1, column 5 contains 1 element 1, column 6 contains 0 element 1, 7 second column weights can be obtained, respectively c1w2=1, c2w2=1, c3w2=0, c4w2=1, c5w2=1, and c6w2=0.
Wherein the maximum value is 1, and is respectively C1W2, C2W2, C4W2 and C5W2, i.e. the maximum value is not unique, then the method returns to the weight of 7 first columns determined before, the 1 st column corresponding to the next largest value C1W1=2 is determined, the column number 1 in the LDPC matrix H is the second column number and is marked as d 1
Thereby, the first column sequence number d is finally determined 2 And a second column number d 1 Is the root node.
<2> extending node:
first, the first column number d in the LDPC matrix H 2 And a second column number d 1 And deleting the corresponding columns to obtain a third matrix. Along with the example using the second matrix described above, after deleting column 1 and column 2, the following third matrix can be obtained:
then, the third matrix is subjected to a plurality of extension node determination processes to determine extension nodes.
Specifically, as shown in fig. 4, in the multiple extension node determination process, the i-th extension node determination process is as follows:
401: the row weights for each row in the fourth matrix Ai are determined, resulting in q second row weights.
In the present embodiment, i is an integer greater than or equal to 1, and when i=1, the fourth matrix A1 is a third matrix.
402: and extracting the row corresponding to the minimum value in the q second row weights to obtain an extension row Bi.
403: in the extension row Bi, the column number of the low density parity check matrix corresponding to the element having the element value of 1 is set as the third column number Ci.
In the present embodiment, after the extension Bi is obtained, the number of extension Bi may be determined first. If the number of the extension Bi is not 1, the multiple-extension node determination processing is directly ended.
404: and deleting columns corresponding to elements with element values of 1 in the extension rows Bi in the fourth matrix Ai to obtain a fourth matrix ai+1, and performing i+1th extension node determination processing.
Thus, the loop ends the multiple-extension node determination process until no new third sequence number appears.
Finally, the plurality of third sequence numbers Ci determined by the above-described plural-extension-node determining process are set as extension nodes.
Illustratively, the above example of the third matrix is taken along, which is taken as the fourth matrix A1 in the first round. First, the row weights of each row in the third matrix are determined, and 3 second row weights can be obtained, which are respectively: r1w2=1, r2w2=2, and r3w2=2. Wherein, if the minimum value is r1w2=1, the 1 st row of the third matrix is determined as the extension row B1 in the current cycle, and meanwhile, the extension row B1 is unique, and the next step can be performed.
Then, in the extension row B1, the column number of the column corresponding to the element having the element value of 1 in the LDPC matrix H is determined as the third column number C1. Specifically, the extracted extension B1 is as follows:
[0 0 1 0 0]
wherein the element with the element value of 1 is the 3 rd column in the third matrix, and the 3 rd column in the third matrix corresponds to the 5 th column in the original LDPC matrix H, the column number of the column corresponding to the element with the element value of 1 in the LDPC matrix H is 5, the third column number C1 determined in the current cycle is 5, and the result is denoted as d 5
Then, in the third matrix, the column corresponding to the element whose element value is 1 in the row B1, that is, the 3 rd column is deleted, to obtain a fourth matrix A2 used in the second cycle as shown below:
again, the row weights for each row in the fourth matrix A2 are determined, and 3 second row weights can be obtained as well, respectively: r '1 w2=0, R '2 w2=2, and R '3 w2=2. Wherein, if the minimum value is R' 1w2=0, the extension B2 in the 1 st row of the fourth matrix A2 is determined, and at the same time, the extension B2 is unique, and the next step can be performed.
Then, in the extension row B2, the column number of the column corresponding to the element having the element value of 1 in the LDPC matrix H is determined as the third column number C2. Specifically, the extracted extension B2 is as follows:
[0 0 0 0]
wherein, no element with element value of 1 is present, so that no new third sequence number appears in the current cycle, the multiple-extension node determination processing is ended, and the obtained third sequence number C1 is taken as d 5 Is an extension node.
<3> leaf node:
in this embodiment, a leaf node typically contains two inodes in pairs. In this regard, first, columns corresponding to a plurality of third column numbers Ci in the third matrix are deleted, and a fifth matrix is obtained. Then, it is determined whether there is a paired target element 1 in each row of the fifth matrix, that is, it is determined whether there is a paired 1 in each row, respectively. If the target element 1 exists, determining two column numbers of the paired columns corresponding to the paired target element 1 in the LDPC matrix H, obtaining a fourth column number group, and taking the fourth column number group as a leaf node.
Illustratively, along with the example using the third column number C1 described above, column 3 in the third matrix is deleted, resulting in a fifth matrix as follows:
wherein the first row does not contain a target element with an element value of 1; the second row contains 2 target elements with 1 element value, and can be paired, wherein the target element with 1 element value is in the 1 st column of the fifth matrix, and the 1 st column of the fifth matrix corresponds to the 3 rd column in the original LDPC matrix H, then the column number of the column corresponding to the target element with 1 element value in the LDPC matrix H is 3, and similarly, the column number of the column corresponding to the target element with 1 element value in the LDPC matrix H is 6, then the first pair of leaf nodes can be determined as follows: the fourth column number 3 and the fourth column number 6 are denoted as (d) 3 ,d 6 ) The method comprises the steps of carrying out a first treatment on the surface of the The third row also contains 2 target elements with element values of 1, and similarly, the first pair of leaf nodes can be obtained as follows: the fourth column number 4 and the fourth column number 7 are denoted as (d) 4 ,d 7 )。
Thus, based on the LDPC matrix H, the root node is obtained as d 1 And d 2 Extending node d 5 The leaf node is (d 3 ,d 6 ) And (d) 4 ,d 7 )。
203: and constructing a decoding tree according to the root node, the extension node and the leaf node.
In the present embodiment, the order of decoding tree drawing is drawn based on the manner of root node-extension node-leaf node, and the following rule is followed:
1. The affiliation of the extension node as the root node does not participate in the branch tree drawing.
2. Leaf nodes grow in pairs and the sequence is arbitrary.
Specifically, since the root node is two information nodes, the root node is fixed with four possibilities of 00, 11, 01 and 10, namely, the values of the two corresponding positions of the root node are all 0, the value of the two corresponding positions of the root node is 1, the value of the first corresponding position of the root node is 0, the value of the second corresponding position of the root node is 1, and the value of the first corresponding position of the root node is 1, and the value of the second corresponding position of the root node is 0.
Meanwhile, the extension node serves as an attachment of the root node, and all extension possibilities can be determined as branches based on the matrix relations between the four possibilities and the matrix relations indicated in the LDPC matrix. Thus, at the root node and the extension node locations, a number of branches corresponding to the number of extension branches may be obtained. The leaf nodes do not depend on each other, but only on the branches obtained before, i.e. each group of leaf nodes are independent of each other, and the growth sequence in the tree is arbitrary.
Illustratively, following the example of LDPC matrix H described above, as shown in FIG. 5, the root node is d 1 And d 2 The fixing has four possibilities of 00, 11, 01 and 10. Extending node d 5 Based on the matrix relationship shown in the LDPC matrix, there are 4 possibilities, namely: 110. 101, 011 and 000. Based on this, 4 branches can be obtained.
In the present embodiment, the leaf nodes are two information nodes, and there are four possibilities of 00, 11, 01 and 10, if the leaf nodes are fixedIn the tree of root nodes and extension nodes determined in fig. 5, leaf nodes may be mounted under any one branch and have 4 branches corresponding to four possibilities, as shown in fig. 6. Meanwhile, the calculation among each leaf node is independent and does not affect each other, so the mounting order of the leaf nodes can be arbitrary, the leaf node (d 3 ,d 6 ) In the case of (a), the decoding tree constructed by the root node, the extension node, and the leaf node determined by the LDPC matrix H is shown in fig. 7.
In an alternative embodiment, the influence relationship between the nodes can be confirmed according to the LDPC matrix H, and then, when the decoding tree is constructed, some leaf node branches with very low probability values or probability values of 0 can be omitted without subsequent calculation, so that subsequent calculation amount is reduced, thereby saving the calculation cost and improving the efficiency. Specifically, the leaf node may take the value of the root node corresponding to the leaf node, and the following rule is followed:
1. If the leaf node is only associated with one root node, when the root node corresponding to the leaf node is 1, the corresponding leaf node can be combined with 01 or 10, and when the root node corresponding to the leaf node is 0, the corresponding leaf node can be combined with 11 or 00.
2. If the leaf node is correlated with both root nodes, when the two root nodes correlated with each other are 00 or 11, that is, the two root nodes have equal values, the corresponding leaf node may take two combinations of 00 or 11, otherwise, the corresponding leaf node may take two combinations of 01 or 10.
Based on this, for the node (d) shown in fig. 6 by the leaf node (d 3 ,d 6 ) In the decoding tree of the structure, leaf nodes (d 3 ,d 6 ) The corresponding columns in LDPC matrix H are 3 rd column and 6 th column, and the elements with element value of 1 in the two columns are located in row 2, and the root node d 1 The corresponding column in the LDPC matrix H is the 1 st column, and the element value of the 2 nd row in the column is 0. Thus, regardless of root node d 1 How the value of (a) changes due to the root node d 1 In LDPC matrix H, with leaf node (d 3 ,d 6 ) The element value of the corresponding position is 0, which cannot affectLeaf node (d) 3 ,d 6 ). Meanwhile, root node d 2 In LDPC matrix H, with leaf node (d 3 ,d 6 ) The element value of the corresponding position is 1, and the element value can be used for the leaf node (d 3 ,d 6 ) An influence is generated. Thereby, the leaf node (d 3 ,d 6 ) Only with root node d 2 Corresponding correlations.
Then, as shown in fig. 8, the leaf node (d 3 ,d 6 ) If the condition of (d) satisfies the rule 1, the leaf node (d 3 ,d 6 ) For branches 110 and 011 in FIG. 6, root node d 2 With a value of 1, then under the two branches, the leaf node (d 3 ,d 6 ) Only branches of the combination of 01 or 10 may be reserved; for branches 101 and 000, root node d 2 With a value of 0, then under the two branches, the leaf node (d 3 ,d 6 ) Only branches of the two combinations 11 or 00 may be reserved.
Similarly, as shown in FIG. 9, for the leaf node (d 4 ,d 7 ) Which is associated with root node d 1 And d 2 Are all correspondingly related, and satisfy the rule 2, if the leaf node (d 4 ,d 7 ) Then for branches 110 and 000, root node d 1 And d 2 Is equal, then under the two branches, the leaf node (d 4 ,d 7 ) Only branches of the two combinations of 00 or 11 may be reserved; for branches 101 and 011, root node d 1 And d 2 Is not equal, under the two branches, the leaf node (d 4 ,d 7 ) Only branches of the combination of 01 or 10 may be reserved.
204: and calculating each node in the decoding tree according to the information to be decoded to obtain probability values of a plurality of target branches in the decoding tree.
In this embodiment, log-likelihood ratio operation may be performed on each element in the information to be decoded to obtain a probability that each element is 0 and a probability that each element is 1, and then the probability that each element is 0 and the probability that each element is 1 are brought into each node in the decoding tree to perform calculation, so as to obtain probability values of multiple target branches in the decoding tree.
Specifically, in the present embodiment, each node d 1 ~d 7 In a one-to-one correspondence with each element in the information to be decoded, specifically, along with the above example of the information to be decoded c, the information to be decoded c is [ c1, c2, c3, c4, c5, c6, c7 ]]. Root node d 1 Corresponding to column 1 of LDPC matrix H, then corresponding to element c1 of information c to be decoded, and the root node d 2 Leaf node d, corresponding to c2 3 Leaf node d, corresponding to c3 4 Corresponding to c4, extend node d 5 Leaf node d, corresponding to c5 6 Leaf node d, corresponding to c6 7 Corresponding to c7.
Meanwhile, each node has two values of 0 or 1, and the two values may correspond to the probability that the c value corresponding to the node is 0 or the probability that the c value is 1 respectively. Specifically, when root node d 1 When the probability value is 0, the probability value corresponding to the probability value is c1 which is 0; when the root node d 1 When the probability value is 1, the corresponding probability value is the probability that c1 is 1.
In the present embodiment, c1 to c7 in the information c to be decoded are LLR values, and thus the probability that each element is 0, 1, respectively, can be determined by the following formula.
Wherein the probability of each element being 0 can be expressed by the formula (1):
wherein P is j=0 LLR (LLR) is the probability that the element value of the jth element cj in the information c to be decoded is 0 j The element value of element cj, e is a natural constant.
Similarly, the probability of each element being 1 can be expressed by the formula (2):
wherein P is j=1 The probability of the element value of cj being 1.
Alternatively, the probability of each element being 1 may be expressed by the formula (3):
P j=1 =1-P j=0 ………③
thus, in this embodiment, the probability value of each branch may be obtained by carrying the corresponding probability value into the calculation according to the value of each branch in the decoding tree. For the leftmost branch in FIG. 6, the value is exemplified as [11011]Corresponding respectively to: d, d 1 =1、d 2 =1、d 5 =0、d 3 =1 and d 6 The probability value of the branch is: p (P) 1=1 *P 2=1 *P 5=0 *P 3=1 *P 6=1 . Then, after the calculation of each branch is completed, branch screening is performed according to the probability value of each branch, for example: and selecting the first k branches with the maximum probability value as target branches, and recording the corresponding probability values.
In this embodiment, a screening value g may be set, and then the branch tree is subjected to segment calculation, that is, the probability value of each branch in the root node-extension node segment is calculated first, and g branches with the largest probability value are screened out and retained for subsequent calculation, so as to reduce the calculation amount and improve the processing efficiency.
For example, a plurality of first target nodes may first be determined in a decoding tree, wherein each of the plurality of first target nodes is a node in the decoding tree that includes a root node or an extension node. And determining the node probability of each first target node according to the root node or the extension node contained in each first target node and the value of the root node or the extension node contained in each first target node in the probability of each element being 0 and the probability of each element being 1. Then, a plurality of first candidate branches are determined according to the position relation of the plurality of first target nodes in the decoding tree. And determining a first branch probability of each first candidate branch of the plurality of first candidate branches according to the node probability of each first target node. And then, determining g first target branches in the first candidate branches according to a preset screening value g and the first branch probability of each first candidate branch, wherein the g first target branches are the first g first candidate branches in the first candidate branches, and the first branch probabilities are arranged in the order from big to small. And then, determining a plurality of second target nodes which follow each first target branch in the decoding tree according to the position of each first target branch in the g first target branches in the decoding tree, wherein each second target node in the plurality of second target nodes is a node containing leaf nodes in the decoding tree. And determining the node probability of each second target node in the probability of each element being 0 and the probability of each element being 1 according to the leaf node contained in each second target node and the value of the leaf node contained in each second target node. Then, a plurality of second candidate branches are determined according to the g first target branches and the following plurality of second target nodes of each first target branch in the decoding tree. And determining a second branch probability of each of the plurality of second candidate branches based on the node probability of each second target node and the first branch probability of each first target branch. And finally, determining g second target branches in the plurality of second candidate branches according to the screening value g and the second branch probability of each second candidate branch, wherein the g second target branches are the first g second candidate branches in which the second branch probabilities are arranged in the order from big to small in the plurality of second candidate branches. And taking g second branch probabilities corresponding to the g second target branches as probability values of a plurality of target branches in the decoding tree.
The above calculation method will be described below with reference to fig. 7 for a decoding tree:
assume that the information to be decoded (LLR) received at this time is: qv=llrvec= [ -6.24001852875549,6.18330048511786, -4.06526954159505,2.89232204313779, -6.20644716160648, -7.09575715216781, -4.17227034767459], the screening value g is set to 2.
First, based on formulas (1) to (3), the probability of each element being 0 or 1 is calculated, resulting in:
P 1=1 =0.9981;P 1=0 =0.0019;
P 2=1 =0.0021;P 2=0 =0.9979;
P 3=1 =0.9831;P 3=0 =0.0169;
P 4=1 =0.0525;P 4=0 =0.9475;
P 5=1 =0.9980;P 5=0 =0.0020;
P 6=1 =0.9992;P 6=0 =0.0008;
P 7=1 =0.9848;P 7=0 =0.0152。
according to the above method, it can be obtained that the first target node including the root node or the extension node is the node of the 2 nd row and the 5 th row in fig. 7, and according to the positional relationship thereof in the decoding tree, 4 first candidate branches are jointly constructed, which are 110, 101, 011 and 000 respectively.
In this regard, the root node is first d 1 And d 2 And (5) performing calculation. The root node is d 1 And d 2 Corresponding to c1 and c2, and four combinations of 00, 01, 10, 11 can be achieved by the root node, and the probability of each combination is calculated correspondingly:
qv12_00=P 1=0 *P 2=0 =0.0019;
qv12_01=P 1=0 *P 2=1 =4.0076e-06;
qv12_10=P 1=1 *P 2=0 =0.9960;
qv12_11=P 1=1 *P 2=1 =0.0021。
after the root node calculation is completed, the root node-extension node calculation is performed according to the graph shown in fig. 6, and the extension node is d 5 In the case of four combinations of the root nodes 00, 01, 10 and 11 corresponding to c5, the first candidate branches may be selected to be 0, 1 and 1, respectively, to obtain the above four first candidate branches 110, 101, 011 and 000, and the probability of each first candidate branch is calculated correspondingly:
qv125_000=qv12_00*P 5=0 =3.8000e-06;
qv125_011=qv12_01*P 5=1 =3.9996e-06;
qv125_101=qv12_10*P 5=1 =0.9940;
qv125_110=qv12_11*P 5=0 =4.1360e-06。
In the present embodiment, since the screening value g is set to 2, the 2 branches 101 and 110 having the largest probability value are reserved as the first target branches.
The calculation then proceeds down with the retained probabilities corresponding to the 2 first target branches 101 and 110. At this time, the plurality of second target nodes subsequent to each first target score are leaf-containing nodes d 3 And d 6 Is a node of (a). Then, according to the decoding tree, 4 second candidate branches corresponding to the first target branch 101 may be obtained, where: 10100. 10101, 10110, and 10111. Similarly, another first target branch 110 corresponds to 4 second candidate branches, which are respectively: 11000. 11001, 11010 and 11011. The probability of each second candidate branch is correspondingly calculated:
qv12536_10100=qv125_101*P 3=0 *P 6=0
qv12536_10101=qv125_101*P 3=0 *P 6=1
qv12536_10110=qv125_101*P 3=1 *P 6=0
qv12536_10111=qv125_101*P 3=1 *P 6=1
qv12536_11000=qv125_110*P 3=0 *P 6=0
qv12536_11001=qv125_110*P 3=0 *P 6=1
qv12536_11010=qv125_110*P 3=1 *P 6=0
qv12536_11011=qv125_110*P 3=1 *P 6=1
similarly, the 2 second candidate branches 10111 and 10100 with the largest probability values are reserved.
Finally, the computation continues downward with the probability corresponding to the reserved 2 branches 10111 and 10100. At this time, the leaf node is selected as d 4 And d 7 The probability of each branch is calculated correspondingly:
qv1253647_1011100=qv12536_10111*P 4=0 *P 7=0
qv1253647_1011101=qv12536_10111*P 4=0 *P 7=1
qv1253647_1011110=qv12536_10111*P 4=1 *P 7=0
qv1253647_1011111=qv12536_10111*P 4=1 *P 7=1
qv1253647_1010000=qv12536_10100*P 4=0 *P 7=0
qv1253647_1010001=qv12536_10100*P 4=0 *P 7=1
qv1253647_1010010=qv12536_10100*P 4=1 *P 7=0
qv1253647_1010011=qv12536_10100*P 4=1 *P 7=1
similarly, the 2 branches 1011101 and 1011110 with the largest probability values are reserved as target branches, and correspond to the following decoding values to be verified respectively:
decVec1011101=[1,0,1,0,1,1,1];
decVec1011110=[1,0,1,1,1,1,0]。
205: each target branch is verified according to the order of the probability value of each target branch in the plurality of target branches from big to small.
In this embodiment, after determining the probability value of each branch in the decoding tree, the decoding value to be verified corresponding to each branch may be verified according to the order of the probability value of each branch from the higher to the lower. Specifically, the verification method can be an LDPC-based verification method, and a CRC-based or LDPC matrix-based verification method is common. The CRC is verified by checking whether the remainder is 0 by using a CRC polynomial, and the CRC is verified by using an LDPC matrix, in which the value obtained by multiplying the value by the check matrix is xored to obtain a value of 0 for each row. Which verification method is selected depends on the implementation requirements, and it is common in hardware to pass the CRC verification method.
In the present embodiment, if the screening value g is set, the number of decoded values having the highest probability of remaining after the above calculation is limited. The final output is checked by sequentially passing through the CRC or LDPC matrix according to the probability size corresponding to the decoded value.
206: the decoding value of the information to be decoded is determined from the target branch that passed the check first.
In this embodiment, the decoding value to be verified corresponding to the branch that first passes the verification may be determined as the decoding value of the information to be decoded. For example, for the 2 decoding values decVec1011101 and decVec1011110 to be verified reserved in the above example, after checking in order from the big probability value to the small probability value, the decoding value to be verified [1,0,1,0,1,1,1] corresponding to decVec1011101 is output as the final decoding result if the decoding value is checked as decVec 1011101.
Meanwhile, if all the outputs do not pass the inspection, decoding errors are indicated, and error prompts are output.
In summary, in the low-density parity check fast decoding method provided by the invention, the root node, the extension node and the leaf node are determined by analyzing the LDPC matrix corresponding to the information to be decoded. And then constructing a decoding tree based on the root node, the extension node and the leaf node, and calculating each node in the decoding tree according to the information to be decoded. And finally, determining the probability value of each branch in the decoding tree according to the calculation result, checking each branch according to the sequence from the large probability value to the small probability value, and determining the decoding value of the information to be decoded according to the branch which passes the checking first. Therefore, unidirectional sequential decoding can be realized, different stored values are obtained by setting different screening values, decoding of information to be decoded can be realized without iterative operation, and decoding efficiency is greatly improved.
Meanwhile, the application provides a low-density parity check fast decoding circuit. Specifically, the circuit may be provided as four modules: the system comprises an initial value settlement module, a root node, an extension node module, a leaf node module and an output module. The function of the initial value calculation module is shown in fig. 10, and the module calculates the probability of 0 or 1 of each element in the information to be decoded based on the input LLR value, and the probability is stored and used as the preparation information for the later calculation. The functions of the root node and the extended node module are as shown in fig. 11, and the module selects a proper value from the initial values, calculates probability values according to fixed combinations, and stores the probability values. The function of the leaf node module is shown in fig. 12, and the module can be used for judging the growth of the leaf node based on the comparison of the branch sizes of the upper node and deleting the residual node values after partial values, then selecting the value of the leaf node in the initial probability value based on the possibility of the grown leaf node, and then multiplying to obtain the probabilities of different branches for storage. The module can be reused for each growth of a leaf node, and only the different possibilities saved, and the probability branches to which the possibilities correspond, are changed. The function of the output module is shown in fig. 13, and after the leaf node module completes the operation, the output module judges and outputs based on the order of the probability.
In this embodiment, the specific operation principle of each module described above may refer to the descriptions of steps 201-206, which are not repeated herein.
Referring to fig. 14, fig. 14 is a functional block diagram of a low density parity check fast decoding device according to an embodiment of the present application. As shown in fig. 14, the low density parity check fast decoding apparatus 1400 includes:
the analysis module 1401 is configured to receive information to be decoded, determine a low-density parity check matrix according to the information to be decoded, determine a root node, an extension node and a leaf node according to the low-density parity check matrix, and construct a decoding tree according to the root node, the extension node and the leaf node;
a calculation module 1402, configured to calculate each node in the decoding tree according to the information to be decoded, obtain probability values of multiple target branches in the decoding tree, and verify each target branch according to a sequence from a high probability value to a low probability value of each target branch in the multiple target branches;
a decoding module 1403 is configured to determine a decoding value of the information to be decoded according to the target branch that passes the check first.
In an embodiment of the present invention, the analysis module 1401 is specifically configured to, in determining the root node according to the low density parity check matrix:
Determining the row weight of each row in the low-density parity check matrix to obtain m first row weights;
determining the column weight of each column in the low-density parity check matrix to obtain n first column weights;
determining a column sequence number of a column corresponding to the maximum value in the weight of n first columns in the low-density parity check matrix to obtain a first column sequence number;
extracting rows corresponding to the minimum value in the m first row weights to obtain a first matrix;
deleting a first target column in the first matrix to obtain a second matrix, wherein the column sequence number of the first target column in the first matrix is the same as the first column sequence number;
determining a second column sequence number according to the second matrix;
the first sequence number and the second sequence number are used as root nodes.
In an embodiment of the present invention, the analysis module 1401 is specifically configured to, in determining the second column number according to the second matrix:
determining the column weight of each column in the second matrix to obtain p second column weights;
determining if there is a unique maximum value in the p second column weights;
if so, the column number of the column corresponding to the maximum value in the low-density parity check matrix is used as a second column number;
if the number is not present, the column number of the column corresponding to the next largest value in the weight of the n first columns in the low density parity check matrix is used as the second column number.
In an embodiment of the present invention, the analysis module 1401 is specifically configured to, in determining the extension node according to the low density parity check matrix:
deleting columns corresponding to the first column sequence number and the second column sequence number in the low-density parity check matrix to obtain a third matrix;
performing multiple extension node determination processing on the third matrix to determine extension nodes;
wherein the ith extension node determination process includes:
determining the row weight of each row in the fourth matrix Ai to obtain q second row weights, wherein i is an integer greater than or equal to 1, and when i=1, the fourth matrix A1 is a third matrix;
extracting a row corresponding to the minimum value in the q second row weights to obtain an extension row Bi;
taking the column number of the element with the element value of 1 in the extended row Bi in the low-density parity check matrix as a third column number Ci;
deleting columns corresponding to elements with element values of 1 in the extension rows Bi in the fourth matrix Ai to obtain a fourth matrix ai+1, performing i+1th extension node determination processing until no new third serial number appears, and ending multiple extension node determination processing;
the plurality of third column numbers Ci determined by the plurality of extension node determination processes are taken as extension nodes.
In an embodiment of the present invention, the analysis module 1401 is specifically configured to, in determining leaf nodes according to the low density parity check matrix:
deleting columns corresponding to a plurality of third column numbers Ci in the third matrix to obtain a fifth matrix;
determining whether there is a pair of target elements 1 in each row of the fifth matrix, respectively;
if the two column numbers of the paired columns corresponding to the paired target elements 1 in the low-density parity check matrix exist, determining two column numbers of the paired columns corresponding to the paired target elements 1 in the low-density parity check matrix, and obtaining a fourth column number group;
the fourth sequence number group is used as the leaf node.
In an embodiment of the present invention, in calculating each node in the decoding tree according to the information to be decoded to obtain probability values of multiple target branches in the decoding tree, the calculating module 1402 is specifically configured to:
carrying out log-likelihood ratio operation on each element in the information to be decoded to obtain the probability that each element is 0 and the probability that each element is 1;
and carrying the probability of each element being 0 and the probability of each element being 1 into each node in the decoding tree to calculate so as to obtain the probability value of each branch in the decoding tree.
In the embodiment of the present invention, in terms of carrying the probability of each element being 0 and the probability of each element being 1 into each node in the decoding tree to calculate, a probability value of a plurality of target branches in the decoding tree is obtained, a calculating module 1402 is specifically configured to:
Determining a plurality of first target nodes in a decoding tree, wherein each first target node in the plurality of first target nodes is a node containing a root node or an extension node in the decoding tree;
determining the node probability of each first target node in the probability of each element being 0 and the probability of each element being 1 according to the root node or the extension node contained in each first target node and the value of the root node or the extension node contained in each first target node;
determining a plurality of first candidate branches according to the position relation of the plurality of first target nodes in the decoding tree;
determining a first branch probability of each first candidate branch in the plurality of first candidate branches according to the node probability of each first target node;
according to a preset screening value g and a first branch probability of each first candidate branch, determining g first target branches in a plurality of first candidate branches, wherein the g first target branches are the first g first candidate branches in the plurality of first candidate branches, and the first branch probabilities are arranged in the order from big to small;
determining a plurality of subsequent second target nodes of each first target branch in the decoding tree according to the position of each first target branch in the g first target branches in the decoding tree, wherein each second target node in the plurality of second target nodes is a node containing leaf nodes in the decoding tree;
Determining the node probability of each second target node in the probability of each element being 0 and the probability of each element being 1 according to the leaf node contained in each second target node and the value of the leaf node contained in each second target node;
determining a plurality of second candidate branches according to the position relation of g first target branches and a plurality of second target nodes, which follow each first target branch, in the decoding tree;
determining a second branch probability of each second candidate branch of the plurality of second candidate branches according to the node probability of each second target node and the first branch probability of each first target branch;
according to the screening value g and the second branch probability of each second candidate branch, determining g second target branches in a plurality of second candidate branches, wherein the g second target branches are the first g second candidate branches of the plurality of second candidate branches, and the second branch probabilities are arranged in the order from big to small;
and taking g second branch probabilities corresponding to the g second target branches as probability values of a plurality of target branches in the decoding tree.
Referring to fig. 15, fig. 15 is a schematic structural diagram of an electronic device according to an embodiment of the present application. As shown in fig. 15, the electronic device 1500 includes a transceiver 1501, a processor 1502, and a memory 1503. Which are connected by a bus 1504. The memory 1503 is used to store computer programs and data, and the data stored in the memory 1503 can be transferred to the processor 1502.
The processor 1502 is configured to read the computer program in the memory 1503 to perform the following operations:
receiving information to be decoded, and determining a low-density parity check matrix according to the information to be decoded;
determining a root node, an extension node and a leaf node according to the low-density parity check matrix;
constructing a decoding tree according to the root node, the extension node and the leaf node;
calculating each node in the decoding tree according to the information to be decoded to obtain probability values of a plurality of target branches in the decoding tree;
verifying each target branch according to the sequence from the big probability value to the small probability value of each target branch in the plurality of target branches;
the decoding value of the information to be decoded is determined from the target branch that passed the check first.
In an embodiment of the present invention, the processor 1502 is specifically configured to perform the following steps in determining the root node according to the low density parity check matrix:
determining the row weight of each row in the low-density parity check matrix to obtain m first row weights;
determining the column weight of each column in the low-density parity check matrix to obtain n first column weights;
determining a column sequence number of a column corresponding to the maximum value in the weight of n first columns in the low-density parity check matrix to obtain a first column sequence number;
Extracting rows corresponding to the minimum value in the m first row weights to obtain a first matrix;
deleting a first target column in the first matrix to obtain a second matrix, wherein the column sequence number of the first target column in the first matrix is the same as the first column sequence number;
determining a second column sequence number according to the second matrix;
the first sequence number and the second sequence number are used as root nodes.
In an embodiment of the present invention, the processor 1502 is specifically configured to perform the following steps in determining the second column number according to the second matrix:
determining the column weight of each column in the second matrix to obtain p second column weights;
determining if there is a unique maximum value in the p second column weights;
if so, the column number of the column corresponding to the maximum value in the low-density parity check matrix is used as a second column number;
if the number is not present, the column number of the column corresponding to the next largest value in the weight of the n first columns in the low density parity check matrix is used as the second column number.
In an embodiment of the present invention, the processor 1502 is specifically configured to perform the following steps in determining the extension node according to the low density parity check matrix:
deleting columns corresponding to the first column sequence number and the second column sequence number in the low-density parity check matrix to obtain a third matrix;
Performing multiple extension node determination processing on the third matrix to determine extension nodes;
wherein the ith extension node determination process includes:
determining the row weight of each row in the fourth matrix Ai to obtain q second row weights, wherein i is an integer greater than or equal to 1, and when i=1, the fourth matrix A1 is a third matrix;
extracting a row corresponding to the minimum value in the q second row weights to obtain an extension row Bi;
taking the column number of the element with the element value of 1 in the extended row Bi in the low-density parity check matrix as a third column number Ci;
deleting columns corresponding to elements with element values of 1 in the extension rows Bi in the fourth matrix Ai to obtain a fourth matrix ai+1, performing i+1th extension node determination processing until no new third serial number appears, and ending multiple extension node determination processing;
the plurality of third column numbers Ci determined by the plurality of extension node determination processes are taken as extension nodes.
In an embodiment of the present invention, the processor 1502 is specifically configured to perform the following steps in determining the leaf nodes according to the low density parity check matrix:
deleting columns corresponding to a plurality of third column numbers Ci in the third matrix to obtain a fifth matrix;
Determining whether there is a pair of target elements 1 in each row of the fifth matrix, respectively;
if the two column numbers of the paired columns corresponding to the paired target elements 1 in the low-density parity check matrix exist, determining two column numbers of the paired columns corresponding to the paired target elements 1 in the low-density parity check matrix, and obtaining a fourth column number group;
the fourth sequence number group is used as the leaf node.
In an embodiment of the present invention, the processor 1502 is specifically configured to perform the following steps in calculating each node in the decoding tree according to the information to be decoded to obtain probability values of multiple target branches in the decoding tree:
carrying out log-likelihood ratio operation on each element in the information to be decoded to obtain the probability that each element is 0 and the probability that each element is 1;
and carrying the probability of each element being 0 and the probability of each element being 1 into each node in the decoding tree to calculate so as to obtain probability values of a plurality of target branches in the decoding tree.
In the embodiment of the present invention, the processor 1502 is specifically configured to perform the following steps in terms of carrying the probability of each element being 0 and the probability of each element being 1 into each node in the decoding tree to calculate probability values of a plurality of target branches in the decoding tree:
determining a plurality of first target nodes in a decoding tree, wherein each first target node in the plurality of first target nodes is a node containing a root node or an extension node in the decoding tree;
Determining the node probability of each first target node in the probability of each element being 0 and the probability of each element being 1 according to the root node or the extension node contained in each first target node and the value of the root node or the extension node contained in each first target node;
determining a plurality of first candidate branches according to the position relation of the plurality of first target nodes in the decoding tree;
determining a first branch probability of each first candidate branch in the plurality of first candidate branches according to the node probability of each first target node;
according to a preset screening value g and a first branch probability of each first candidate branch, determining g first target branches in a plurality of first candidate branches, wherein the g first target branches are the first g first candidate branches in the plurality of first candidate branches, and the first branch probabilities are arranged in the order from big to small;
determining a plurality of subsequent second target nodes of each first target branch in the decoding tree according to the position of each first target branch in the g first target branches in the decoding tree, wherein each second target node in the plurality of second target nodes is a node containing leaf nodes in the decoding tree;
Determining the node probability of each second target node in the probability of each element being 0 and the probability of each element being 1 according to the leaf node contained in each second target node and the value of the leaf node contained in each second target node;
determining a plurality of second candidate branches according to the position relation of g first target branches and a plurality of second target nodes, which follow each first target branch, in the decoding tree;
determining a second branch probability of each second candidate branch of the plurality of second candidate branches according to the node probability of each second target node and the first branch probability of each first target branch;
according to the screening value g and the second branch probability of each second candidate branch, determining g second target branches in a plurality of second candidate branches, wherein the g second target branches are the first g second candidate branches of the plurality of second candidate branches, and the second branch probabilities are arranged in the order from big to small;
and taking g second branch probabilities corresponding to the g second target branches as probability values of a plurality of target branches in the decoding tree.
It should be understood that the low-density parity check fast decoding device in the present application may include a smart Phone (such as an Android Phone, an iOS Phone, a Windows Phone, etc.), a tablet computer, a palm computer, a notebook computer, a mobile internet device MID (Mobile Internet Devices, abbreviated as MID), a robot, a wearable device, etc. The low density parity check fast decoding device described above is merely exemplary and not exhaustive, including but not limited to the low density parity check fast decoding device described above. In practical application, the low-density parity check fast decoding device may further include: intelligent vehicle terminals, computer devices, etc.
From the above description of embodiments, it will be apparent to those skilled in the art that the present invention may be implemented in software in combination with a hardware platform. With such understanding, all or part of the technical solution of the present invention contributing to the background art may be embodied in the form of a software product, which may be stored in a storage medium, such as ROM/RAM, a magnetic disk, an optical disk, etc., including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to perform the methods described in the various embodiments or parts of the embodiments of the present invention.
Accordingly, the present application also provides a computer readable storage medium storing a computer program for execution by a processor to implement some or all of the steps of any one of the low density parity check fast decoding methods as set forth in the method embodiments above. For example, the storage medium may include a hard disk, a floppy disk, an optical disk, a magnetic tape, a magnetic disk, a flash memory, etc.
Embodiments of the present application also provide a computer program product comprising a non-transitory computer readable storage medium storing a computer program operable to cause a computer to perform some or all of the steps of any one of the low density parity check fast decoding methods as set forth in the method embodiments above.
It should be noted that, for simplicity of description, the foregoing method embodiments are all expressed as a series of action combinations, but it should be understood by those skilled in the art that the present application is not limited by the order of actions described, as some steps may be performed in other order or simultaneously according to the present application. Further, those skilled in the art will also appreciate that the embodiments described in the specification are all alternative embodiments, and that the acts and modules referred to are not necessarily required in the present application.
In the foregoing embodiments, the descriptions of the embodiments are focused on, and for those portions of one embodiment that are not described in detail, reference may be made to the related descriptions of other embodiments.
In the several embodiments provided in this application, it should be understood that the disclosed apparatus may be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative, such as the division of the units, merely a logical function division, and there may be additional divisions when actually implemented, such as multiple units or components may be combined or integrated into another system, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, or may be in electrical or other forms.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the embodiment.
In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, each unit may exist alone physically, or two or more units may be integrated into one unit. The integrated units described above may be implemented either in hardware or in software program modules.
The integrated units, if implemented in the form of software program modules, may be stored in a computer-readable memory for sale or use as a stand-alone product. Based on such understanding, the technical solution of the present application may be embodied in essence or a part contributing to the prior art or all or part of the technical solution in the form of a software product stored in a memory, including several instructions for causing a computer device (which may be a personal computer, a server or a network device, etc.) to perform all or part of the steps of the method described in the embodiments of the present application. And the aforementioned memory includes: a U-disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a removable hard disk, a magnetic disk, or an optical disk, or other various media capable of storing program codes.
Those of ordinary skill in the art will appreciate that all or a portion of the steps in the various methods of the above embodiments may be implemented by a program that instructs associated hardware, and the program may be stored in a computer readable memory, and the memory may include: flash disk, read-Only Memory (ROM), random access Memory (Random Access Memory, RAM), magnetic disk or optical disk.
The foregoing has outlined rather broadly the more detailed description of the embodiments herein, and the detailed description of the principles and embodiments herein has been presented in terms of specific examples only to assist in the understanding of the methods and concepts of the present application; meanwhile, as those skilled in the art will have modifications in the specific embodiments and application scope in accordance with the ideas of the present application, the present description should not be construed as limiting the present application in view of the above.

Claims (10)

1. A method for low density parity check fast decoding, the method comprising;
receiving information to be decoded, and determining a low-density parity check matrix according to the information to be decoded;
determining a root node, an extension node and a leaf node according to the low-density parity check matrix;
Constructing a decoding tree according to the root node, the extension node and the leaf node;
calculating each node in the decoding tree according to the information to be decoded to obtain probability values of a plurality of target branches in the decoding tree;
verifying each target branch according to the sequence from the big probability value to the small probability value of each target branch in the target branches;
and determining the decoding value of the information to be decoded according to the target branch which passes the verification first.
2. The method of claim 1, wherein determining a root node from the low density parity check matrix comprises:
determining the row weight of each row in the low-density parity check matrix to obtain m first row weights;
determining the column weight of each column in the low-density parity check matrix to obtain n first column weights;
determining a column sequence number of a column corresponding to the maximum value in the weight of the n first columns in the low-density parity check matrix to obtain a first column sequence number;
extracting a row corresponding to the minimum value in the weight of the m first rows to obtain a first matrix;
deleting a first target column in the first matrix to obtain a second matrix, wherein the column sequence number of the first target column in the first matrix is the same as the first column sequence number;
Determining a second column sequence number according to the second matrix;
and taking the first column sequence number and the second column sequence number as the root node.
3. The method of claim 2, wherein said determining a second column sequence number from said second matrix comprises:
determining the column weight of each column in the second matrix to obtain p second column weights;
determining if there is a unique maximum value in the p second column weights;
if so, taking the column sequence number of the column corresponding to the maximum value in the low-density parity check matrix as the second column sequence number;
and if the second column number does not exist, the column number of the column corresponding to the next largest value in the n first column weights in the low-density parity check matrix is used as the second column number.
4. The method of claim 2, wherein determining an extension node from the low density parity check matrix comprises:
deleting columns corresponding to the first column sequence number and the second column sequence number in the low-density parity check matrix to obtain a third matrix;
performing multiple extension node determination processing on the third matrix, and determining the extension node;
wherein the ith extension node determination process includes:
Determining the row weight of each row in a fourth matrix Ai to obtain q second row weights, wherein i is an integer greater than or equal to 1, and when i=1, a fourth matrix A1 is the third matrix;
extracting a row corresponding to the minimum value in the q second row weights to obtain an extension row Bi;
taking the column number of the element with the element value of 1 in the extension row Bi as a third column number Ci in the column number of the low-density parity check matrix;
deleting columns corresponding to elements with element values of 1 in the extension rows Bi in the fourth matrix Ai to obtain a fourth matrix ai+1, performing i+1th extension node determination processing until no new third serial number appears, and ending the multiple extension node determination processing;
and taking the third column sequence numbers Ci determined by the multiple extension node determination processing as the extension nodes.
5. The method of claim 4, wherein determining leaf nodes from the low density parity check matrix comprises:
deleting columns corresponding to the plurality of third column numbers Ci in the third matrix to obtain a fifth matrix;
determining whether a pair of target elements 1 exists in each row of the fifth matrix;
If so, determining a pair of columns corresponding to the pair of target elements 1, and acquiring two column serial numbers of the pair of columns in the low-density parity check matrix to obtain a fourth column serial number group;
and taking the fourth sequence number group as the leaf node.
6. The method according to any one of claims 1-5, wherein the calculating each node in the decoding tree according to the information to be decoded to obtain probability values of a plurality of target branches in the decoding tree includes:
carrying out log-likelihood ratio operation on each element in the information to be decoded to obtain the probability that each element is 0 and the probability that each element is 1;
and carrying the probability of each element being 0 and the probability of each element being 1 into each node in the decoding tree to calculate so as to obtain probability values of a plurality of target branches in the decoding tree.
7. The method of claim 6, wherein the bringing the probability of 0 for each element and the probability of 1 for each element into each node in the decoding tree to calculate probability values for a plurality of target branches in the decoding tree comprises:
Determining a plurality of first target nodes in the decoding tree, wherein each first target node in the plurality of first target nodes is a node containing the root node or the extension node in the decoding tree;
determining the node probability of each first target node in the probability of each element being 0 and the probability of each element being 1 according to the root node or the extension node contained in each first target node and the value of the root node or the extension node contained in each first target node;
determining a plurality of first candidate branches according to the position relation of the plurality of first target nodes in the decoding tree;
determining a first branch probability of each first candidate branch in the plurality of first candidate branches according to the node probability of each first target node;
according to a preset screening value g and the first branch probability of each first candidate branch, determining g first target branches in the first candidate branches, wherein the g first target branches are the first g first candidate branches in the first candidate branches, and the first branch probabilities are arranged in the order from big to small;
Determining a plurality of second target nodes subsequent to each first target branch in the decoding tree according to the position of each first target branch in the g first target branches in the decoding tree, wherein each second target node in the plurality of second target nodes is a node containing the leaf node in the decoding tree;
determining the node probability of each second target node in the probability of each element being 0 and the probability of each element being 1 according to the leaf nodes contained in each second target node and the values of the leaf nodes contained in each second target node;
determining a plurality of second candidate branches according to the g first target branches and the position relation of a plurality of second target nodes, which are located in the decoding tree and follow each first target branch, in the decoding tree;
determining a second branch probability of each second candidate branch of the plurality of second candidate branches according to the node probability of each second target node and the first branch probability of each first target branch;
determining g second target branches in the plurality of second candidate branches according to the screening value g and the second branch probability of each second candidate branch, wherein the g second target branches are the first g second candidate branches in which the second branch probabilities are arranged in the order from big to small in the plurality of second candidate branches;
And taking g second branch probabilities corresponding to the g second target branches as probability values of a plurality of target branches in the decoding tree.
8. A low density parity check fast decoding apparatus, the apparatus comprising;
the analysis module is used for receiving information to be decoded, determining a low-density parity check matrix according to the information to be decoded, determining a root node, an extension node and a leaf node according to the low-density parity check matrix, and constructing a decoding tree according to the root node, the extension node and the leaf node;
the calculation module is used for calculating each node in the decoding tree according to the information to be decoded to obtain probability values of a plurality of target branches in the decoding tree, and verifying each target branch according to the sequence from the big probability value to the small probability value of each target branch in the plurality of target branches;
and the decoding module is used for determining the decoding value of the information to be decoded according to the target branch which passes the verification first.
9. An electronic device comprising a processor, a memory, a communication interface, and one or more programs, wherein the one or more programs are stored in the memory and configured for execution by the processor, the one or more programs comprising instructions for performing the steps of the method of any of claims 1-7.
10. A computer readable storage medium, characterized in that the computer readable storage medium stores a computer program, which is executed by a processor to implement the method of any of claims 1-7.
CN202311449317.9A 2023-11-01 2023-11-01 Low-density parity check quick decoding method and related equipment Pending CN117614461A (en)

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