CN117581361A - 功率模块 - Google Patents

功率模块 Download PDF

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Publication number
CN117581361A
CN117581361A CN202180099950.2A CN202180099950A CN117581361A CN 117581361 A CN117581361 A CN 117581361A CN 202180099950 A CN202180099950 A CN 202180099950A CN 117581361 A CN117581361 A CN 117581361A
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China
Prior art keywords
main wiring
wiring board
power module
semiconductor elements
case
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CN202180099950.2A
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中原贤太
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Publication of CN117581361A publication Critical patent/CN117581361A/zh
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Abstract

本发明涉及功率模块，其具有：多个半导体元件，它们在厚度方向上流过主电流；基板，其搭载所述多个半导体元件；基座板，其搭载所述基板；壳体，其与所述基座板接合，容纳所述多个半导体元件；多个主配线板，它们装入与所述基座板相反侧的所述壳体的上部，配置为与所述基座板平行；以及多个配线，它们接合于所述多个主配线板的与所述多个半导体元件相对的下表面，所述多个半导体元件的每一者的上表面电极经由所述多个配线及接合材料与所述多个主配线板电连接。

Description

功率模块
技术领域
本发明涉及功率模块，特别涉及改良了配线构造的功率模块。
背景技术
在专利文献1中公开了通过确保稳定的接合强度，从而能够提高可靠性的功率模块。在专利文献1的图1中，示出了具有散热用金属基座板、绝缘基板、功率半导体元件、表面电极、主端子、开口、键合带、壳体、封装树脂的功率模块。
该功率模块在散热用的金属基座板之上通过焊料等接合了绝缘基板。绝缘基板具有绝缘层和金属板。主端子为铜制的板状电极，在与功率半导体元件相对的部位形成有开口部。键合带跨过形成于主端子的开口部而形成为线环状，其两端被超声波熔接于主端子。另外，键合带的线环部分与功率半导体元件的表面电极进行超声波熔接。
专利文献1：国际公开第2015/079600号
发明内容
在专利文献1中，主端子与功率半导体元件的表面电极经由键合带通过超声波熔接进行连接。为了进行超声波熔接，需要从壳体的上表面插入用于接合的器具，因此需要设置开口部，难以小型化。另外，由于将键合带超声波熔接于半导体元件的表面电极，因此半导体元件的尺寸及与半导体元件接合的电极的尺寸的自由度小，在半导体元件的尺寸产生了变化的情况下存在无法灵活地应对这样的问题。
本发明就是为了解决上述那样的问题而提出的，其目的在于提供能够小型化，即使半导体元件的尺寸产生变化，也能够灵活地应对而能够提高生产率的功率模块。
本发明涉及的功率模块具有：多个半导体元件，它们在厚度方向上流过主电流；基板，其搭载所述多个半导体元件；基座板，其搭载所述基板；壳体，其与所述基座板接合，容纳所述多个半导体元件；多个主配线板，它们装入与所述基座板相反侧的所述壳体的上部，配置为与所述基座板平行；以及多个配线，它们接合于所述多个主配线板的与所述多个半导体元件相对的下表面，所述多个半导体元件的每一者的上表面电极经由所述多个配线及接合材料与所述多个主配线板电连接。
发明的效果
根据本发明涉及的功率模块，可以得到能够小型化，即使半导体元件的尺寸产生变化，也能够灵活地应对而能够提高生产率的功率模块。
附图说明
图1是表示实施方式1涉及的功率模块的结构的俯视图。
图2是表示实施方式1涉及的功率模块的结构的剖视图。
图3是表示实施方式1涉及的功率模块的电路结构的图。
图4是说明实施方式1涉及的功率模块的组装方法的第1例的剖视图。
图5是说明实施方式1涉及的功率模块的组装方法的第1例的剖视图。
图6是说明实施方式1涉及的功率模块的组装方法的第2例的剖视图。
图7是说明实施方式1涉及的功率模块的组装方法的第2例的剖视图。
图8是说明实施方式1涉及的功率模块的组装方法的第3例的剖视图。
图9是说明实施方式1涉及的功率模块的组装方法的第3例的剖视图。
图10是表示实施方式2涉及的功率模块的结构的俯视图。
图11是表示实施方式2涉及的功率模块的结构的剖视图。
图12是表示实施方式3涉及的功率模块的结构的俯视图。
图13是表示实施方式3涉及的功率模块的结构的剖视图。
图14是说明抑制实施方式3涉及的功率模块中的振荡现象的图。
图15是说明抑制实施方式3涉及的功率模块中的振荡现象的图。
具体实施方式
<前言>
附图是示意性地示出的，在不同的附图各自示出的图像的尺寸及位置的相互关系未必是准确地记载的，能够进行适当变更。另外，在下面说明中，对相同的结构要素标注相同的标号而进行图示，它们的名称及功能也相同。因此，有时会省略对它们的详细说明。
另外，在本说明书中，在“～之上”及“覆盖～”这样的情况下，不排除在结构要素之间存在夹杂物。例如，在记载为“在A之上设置的B”或“A将B覆盖”的情况下，可能是指在A和B之间设置有其它结构要素C，也可能是指在A和B之间没有设置其它结构要素C。
另外，在下面的说明中，有时使用“上”、“下”、“侧”、“底”、“表”或“背”等表示特定的位置及方向的术语，这些术语只是为了容易对实施方式的内容进行理解，出于方便而使用的，与实际实施时的方向没有关系。
<实施方式1>
图1是表示实施方式1涉及的功率模块100的结构的俯视图，是从上方观察功率模块100的俯视图。另外，在图2中示出图1中的A-A线处的箭头方向剖视图。
如图2所示，功率模块100例如由铜板等金属板构成，绝缘基板ZP通过焊料(未图示)等接合材料而接合于作为散热板起作用的基座板BS的上表面。基座板BS配置为将上表面侧及底面侧成为开口部的框状的树脂制的壳体CS的底面侧的开口部覆盖，基座板BS构成壳体CS的底面。能够在基座板BS的下表面安装冷却散热片等散热机构。
绝缘基板ZP以氮化硅、氧化铝、氮化铝等陶瓷基板为主要材料，如图1所示，在陶瓷基板的上表面形成有导体图案MP1及MP2。作为半导体元件，晶体管Q1及二极管D1经由焊料等接合材料BM接合于绝缘基板ZP的导体图案MP1之上。另外，晶体管Q2及二极管D2经由接合材料BM接合于导体图案MP2之上。另外，在导体图案MP1及MP2之上，以各自与半导体元件成列的方式设置有单独接合材料BM1及BM2。
晶体管Q1及Q2的种类没有特别限定，能够使用MOSFET(Metal OxideSemiconductor Field Effect Transistor)或IGBT(Insulated Gate BipolarTransistor)等。二极管D1、D2的种类没有特别限定，能够使用肖特基势垒二极管(SBD)、PN结二极管等。
另外，如图2所示，在壳体CS的上表面侧，以将晶体管Q1及二极管D1的上方覆盖的方式设置第3主配线板即主配线板M3，以将单独接合材料BM1的上方覆盖的方式设置有第1主配线板即主配线板M1。主配线板M3及M1的一端各自作为输出端子ACT及P侧端子PT从壳体CS的上端垂直地凸出，主配线板M3及M1的另一端埋入至与壳体CS一体地设置的配线支撑部SP。
另外，如图1所示，在壳体CS的上表面侧，以将晶体管Q2及二极管D2的上方覆盖的方式设置有第2主配线板即主配线板M2。主配线板M2的一端作为N侧端子NT从壳体CS的上端垂直地凸出，主配线板M2的另一端埋入至配线支撑部SP。另外，主配线板M3的俯视形状为L字形，将晶体管Q1及二极管D1的上方覆盖，并且将设置于导体图案MP2之上的单独接合材料BM2的上方覆盖。
这里，输出端子ACT设置有两个，它们在壳体CS内部相连。原因在于，输出端子ACT在实际动作时流过的电流量比P侧端子PT及N侧端子NT多，因此将电流容量设得大。
如图1所示，配线支撑部SP在主配线板M1与主配线板M2相邻的部分、主配线板M1与主配线板M3相邻的部分、主配线板M2与主配线板M3相邻的部分沿各配线的轮廓设置，对各配线板进行支撑，使各配线不成为悬臂状态。
另外，如图2所示，在主配线板M3的与晶体管Q1及二极管D1相对的下表面接合有由金属导线或金属带构成的多个配线MR。配线MR与主配线板M3的接合方法没有特别限定，能够使用导线键合、超声波接合等。配线MR以呈从主配线板M3的下表面凸出的线环状的方式两端与主配线板M3接合，线环的前端接合于在晶体管Q1及二极管D1的上表面电极之上设置的接合材料BM。因此，晶体管Q1及二极管D1的上表面电极与主配线板M3电连接。
另外，如图2所示，配线MR也接合于主配线板M1的与单独接合材料BM1相对的下表面。配线MR以呈从主配线板M1的下表面凸出的线环状的方式两端与主配线板M1接合，线环的前端接合于单独接合材料BM1。主配线板M3与主配线板M1通过配线支撑部SP电绝缘，主配线板M1与晶体管Q1及二极管D1的下表面电极电连接。
通过将配线MR设为线环状，从而在所搭载的半导体元件的尺寸产生了变化的情况下，通过对配线MR的配置及高度进行调整，从而能够灵活地进行应对，能够提高生产率。
同样地，主配线板M2与晶体管Q2及二极管D2的上表面电极也经由配线MR和接合材料BM电连接，主配线板M3与单独接合材料BM2也经由配线MR电连接。单独接合材料BM2将晶体管Q2及二极管D2的下表面电极与主配线板M3电连接。
具有以上说明的结构的功率模块100构成图3所示那样的电路。如图3所示，功率模块100在成为第1电位即高电位的主电源端子的P侧端子PT与成为第2电位即低电位的主电源端子的N侧端子NT之间，串联连接有N沟道型的晶体管Q1及Q2，两个晶体管的连接节点CT连接于输出端子ACT，构成单相逆变器电路。此外，在图3中，晶体管Q1及Q2表示为IGBT。
二极管D1及D2各自反并联连接于晶体管Q1及Q2，作为续流二极管起作用。此外，任意晶体管均为在厚度方向上流过主电流的纵向型构造的晶体管，任意二极管均为在厚度方向上流过主电流的纵向型构造的二极管。
此外，向晶体管Q1及Q2的栅极各自从控制电路赋予控制信号，但省略了图示。另外，在图1及图2中也省略了控制电路的图示，但例如能够设为如下结构，即，在晶体管Q1及Q2的上表面电极侧具有栅极焊盘，经由该栅极焊盘和键合导线与控制电路连接。本发明的特征在于晶体管及二极管的主电极与主配线板的连接构造，由于晶体管的栅极与控制电路的连接采用现有技术的结构，因此为了方便说明而省略了图示。
作为主配线板M1～M3及配线MR的材料，通过使用铜(Cu)或铜合金，由此能够降低功率模块100的电流路径的电阻，通过对通电时的发热进行抑制，由此能够使功率模块100的寿命提高。另外，铜还具有易于与接合材料接合的优点。作为其它材料，也可以使用铝(Al)。
使用焊料等接合材料将配线MR与晶体管及二极管进行接合还与半导体元件的上表面电极的金属化处理有关。在以往的配线技术中，为了通过导线键合将铜导线连接于半导体元件的上表面电极，需要利用铜等硬的金属将上表面电极金属化。但是，对于由铜实现的金属化而言，材料的管理变得困难，但通过将接合材料用于半导体元件的上表面电极与配线MR的连接，由此在向上表面电极形成镍(Ni)镀层或在金(Au)镀层之上形成Ni镀层的情况下也能够进行接合，材料的管理变得容易。
另外，使用焊料等接合材料将配线MR与晶体管及二极管接合的主要理由在于，通过回流焊或使用了加热板的加热使接合材料熔融，与配线MR进行接合。
通过采用这样的结构，功率模块100与通过超声波熔接将芯片状的半导体元件的上表面电极和主配线板连接的情况相比能够提高组装性。另外，由于不需要从壳体的上表面插入用于接合的器具，因此不需要设置开口部，功率模块100的小型化变得容易。另外，即使所搭载的半导体元件的尺寸产生变化，也能够通过对配线MR的配置及高度进行调整等实现灵活的应对，能够提高生产率。
<组装方法>
下面，使用图4～图9对功率模块100的组装方法进行说明。
<第1例>
使用图4及图5对组装方法的第1例进行说明。首先，准备装入有主配线板M1～M3的壳体CS。即，在利用树脂对壳体CS进行成型时，通过嵌件成型将主配线板M1～M3埋入至壳体CS。嵌件成型是使用成型机通过注塑成型将电极等金属部件装入树脂部件的制法，使用分为上模和下模的模具将主配线板M1～M3等冲压部件搭载于下模而与上模合在一起，向模具内注入熔融的树脂，进行冷却，由此能够将主配线板M1～M3埋入至壳体CS。此外，在壳体CS成型时也同时形成配线支撑部SP。
以设置配线MR的一侧为上侧的方式配置准备好的壳体CS，如图4所示，将配线MR接合于主配线板M1～M3的规定位置，即与晶体管Q1、二极管D1及单独接合材料BM1相对的位置及与晶体管Q2、二极管D2及单独接合材料BM2相对的位置。在接合中使用导线键合、超声波接合等。此时，配线MR的两端与主配线板M1～M3接合，在两端之间形成线环，以从主配线板至线环前端为止的高度在利用壳体CS覆盖了基座板BS的情况下成为线环的前端到达晶体管Q1及Q2、二极管D1及D2的上表面电极之上的接合材料BM、单独接合材料BM1及BM2的高度的方式，在各位置处对高度进行设定。
接下来，如图5所示，从搭载有晶体管Q1及Q2、二极管D1及D2、单独接合材料BM1及BM2的基座板BS的上侧覆盖壳体CS，将基座板BS和壳体CS接合。接合的方法没有限定，但例如能够使用粘接剂进行接合。
之后，各个基座板BS例如被投入至回流焊炉，通过焊料回流焊使接合材料BM、单独接合材料BM1及BM2熔融，将配线MR接合于接合材料BM、单独接合材料BM1及BM2，由此得到图1及图2所示的结构。之后，将模塑树脂导入至壳体CS的内部，对晶体管Q1及Q2、二极管D1及D2、配线MR进行树脂封装，但为了方便说明而省略了图示。
<第2例>
使用图6及图7对组装方法的第2例进行说明。首先，准备装入有主配线板M1～M3的壳体上部CSX。如图6所示，壳体上部CSX是通过嵌件成型埋入了主配线板M1～M3的部件，呈与图2所示的壳体CS的上侧部分对应的结构。
以设置配线MR的一侧为上侧的方式配置准备好的壳体上部CSX，如图6所示，将配线MR接合于主配线板M1～M3的规定位置，即与晶体管Q1、二极管D1及单独接合材料BM1相对的位置及与晶体管Q2、二极管D2及单独接合材料BM2相对的位置。配线MR的接合方法与使用图4说明过的方法相同。
接下来，如图7所示，将壳体下部CSY接合于壳体上部CSX，完成壳体CS。接合的方法没有限定，但例如能够使用粘接剂进行接合。
之后，从搭载有晶体管Q1及Q2、二极管D1及D2、单独接合材料BM1及BM2的基座板BS的上侧盖上壳体CS，将基座板BS和壳体CS接合。
之后，各个基座板BS例如被投入至回流焊炉，通过焊料回流焊使接合材料BM、单独接合材料BM1及BM2熔融，将配线MR接合于接合材料BM、单独接合材料BM1及BM2，由此得到图1及图2所示的结构。
<第3例>
使用图8及图9对组装方法的第2例进行说明。如图8所示，与第2例的相同点在于，准备装入有主配线板M1～M3的壳体上部CSX，以设置配线MR的一侧为上侧的方式配置准备好的壳体上部CSX，对配线MR进行接合。
接下来，如图9所示，搭载晶体管Q1及Q2、二极管D1及D2、单独接合材料BM1及BM2，从接合有壳体下部CSY的状态下的基座板BS的上侧盖上壳体上部CSX，将壳体下部CSY和壳体上部CSX接合。
之后，各个基座板BS例如被投入至回流焊炉，通过焊料回流焊使接合材料BM、单独接合材料BM1及BM2熔融，将配线MR接合于接合材料BM、单独接合材料BM1及BM2，由此得到图1及图2所示的结构。
如上述第2例及第3例所示，通过分为壳体上部CSX和壳体下部CSY，从而能够将壳体下部CSY设为共通部件，与功率模块的产品规格相匹配地对壳体上部CSX进行变更，能够实现灵活的应对。另外，通过将壳体上部CSX设为独立部件，从而嵌件成型的对象变小，嵌件成型的成品率提高，从结果上来看能够实现由部件的缺陷导致的损耗的降低及部件成本的降低。
<实施方式2>
图10是表示实施方式2涉及的功率模块200的结构的俯视图，是从上方观察功率模块200的俯视图。另外，在图11中示出图10中的A-A线处的箭头方向剖视图。此外，在图10及图11中，对与使用图1及图2说明过的功率模块100相同的结构标注相同的标号，省略重复的说明。
如图10所示，作为半导体元件，晶体管Q10(第1开关元件)经由焊料等接合材料BM接合于绝缘基板ZP的导体图案MP1之上。另外，晶体管Q20(第2开关元件)经由接合材料BM接合于导体图案MP2之上。另外，在导体图案MP1及MP2之上，以各自与半导体元件成列的方式设置有单独接合材料BM1及BM2。
在晶体管Q10及Q20中内置续流二极管(Free Wheeling Diode)，使用以1个构造达成IGBT和续流二极管的特性的反向导通(Reverse-Conducting)IGBT(RC-IGBT)。由于内置有续流二极管，因此搭载于导体图案之上的半导体元件仅为晶体管即可，因此能够减少半导体元件的搭载面积，能够实现功率模块的进一步小型化。此外，在不改变半导体元件的搭载面积的情况下，也能够增加半导体元件的搭载数量，在该情况下能够实现功率模块的通电电流的高密度化。
此外，也可以替代使用RC-IGBT这一作法，作为反向导通晶体管而使用内置有肖特基势垒二极管的MOSFET，在该情况下，也能够实现功率模块的进一步小型化及通电电流的高密度化。
如图11所示，在壳体CS的上表面侧以将晶体管Q10的上方覆盖的方式设置主配线板M3，以将单独接合材料BM1的上方覆盖的方式设置有主配线板M1。主配线板M3及M1的一端各自作为输出端子ACT及P侧端子PT从壳体CS的上端垂直地凸出，主配线板M3及M1的另一端埋入至与壳体CS一体地设置的配线支撑部SP。
另外，如图10所示，在壳体CS的上表面侧以将晶体管Q20的上方覆盖的方式设置有主配线板M2。主配线板M2的一端作为N侧端子NT从壳体CS的上端垂直地凸出，主配线板M2的另一端埋入至配线支撑部SP。另外，主配线板M3将晶体管Q10的上方覆盖，并且将设置于导体图案MP2之上的单独接合材料BM2的上方覆盖。
如图10所示，配线支撑部SP在主配线板M1与主配线板M2相邻的部分、主配线板M1与主配线板M3相邻的部分、主配线板M2与主配线板M3相邻的部分沿各配线的轮廓设置，对各配线进行支撑，使各配线不成为悬臂状态。
另外，如图11所示，在主配线板M3的与晶体管Q10相对的下表面接合有由金属导线或金属带构成的多个配线MR。配线MR以呈从主配线板M3的下表面凸出的线环状的方式两端与主配线板M3接合，线环的前端接合于在晶体管Q10的上表面电极之上设置的接合材料BM。因此，晶体管Q10的上表面电极与主配线板M3电连接。
另外，如图11所示，配线MR也接合于主配线板M1的与单独接合材料BM1相对的下表面。配线MR以呈从主配线板M1的下表面凸出的线环状的方式两端与主配线板M3接合，线环的前端接合于单独接合材料BM1。主配线板M3与主配线板M1通过配线支撑部SP电绝缘，主配线板M1与晶体管Q10的下表面电极电连接。
同样地，主配线板M2与晶体管Q20的上表面电极也经由配线MR和接合材料BM电连接，主配线板M3与单独接合材料BM2也经由配线MR电连接。单独接合材料BM2将晶体管Q20的下表面电极与主配线板M3电连接。
具有以上说明过的结构的功率模块200与实施方式1的功率模块100同样地构成单相逆变器电路。该电路结构与图3所示的功率模块100相同，但为图3的二极管D1及D2各自与晶体管Q1及Q2成为一体的RC-IGBT，即晶体管Q10及Q20。
通过采用这样的结构，功率模块200与通过超声波熔接将芯片状的半导体元件的上表面电极和主配线板连接的情况相比能够提高组装性。另外，由于不需要从壳体的上表面插入用于接合的器具，因此不需要设置开口部，功率模块200的小型化变得容易。另外，即使所搭载的半导体元件的尺寸产生变化，也能够通过对配线MR的配置及高度进行调整等实现灵活的应对，能够提高生产率。
<实施方式3>
图12是表示实施方式3涉及的功率模块300的结构的俯视图，是从上方观察功率模块300的俯视图。另外，在图13中示出图12中的B-B线处的箭头方向剖视图。此外，在图12及图13中，对与使用图1及图2说明过的功率模块100相同的结构标注相同的标号，省略重复的说明。
在图12及图13所示的功率模块300中，搭载于基座板BS的晶体管Q1及Q2、二极管D1及D2、单独接合材料BM1及BM2的个数及配置与使用图1及图2说明过的功率模块100相同，但主配线板M2以将晶体管Q2及二极管D2的上方覆盖，并且将主配线板M1的更上方覆盖的方式，俯视形状呈L字形，该主配线板M1将设置于导体图案MP2之上的单独接合材料BM2的上方覆盖。
即，如图13所示，主配线板M2经由配线MR和接合材料BM与导体图案MP2之上的二极管D2的上表面电极电连接，但延伸至主配线板M1的上方。主配线板M1与其上方的主配线板M2以将配线支撑部SP夹在中间的方式相对，形成平行平板构造。此外，由于将由绝缘材料构成的配线支撑部SP夹在中间，因此主配线板M1与主配线板M2电绝缘。
另外，如图13所示，主配线板M1经由配线MR与导体图案MP1之上的单独接合材料BM1电连接，但主配线板M1的俯视形状与实施方式1的功率模块100相同。
另外，如图12所示，主配线板M3的俯视形状也与实施方式1的功率模块100相同，主配线板M3与晶体管Q1、二极管D1及单独接合材料BM2的经由配线MR的电气连接也与实施方式1的功率模块100相同。
如上所述，主配线板M1与其上方的主配线板M2具有平行平板构造。主配线板M1及M2是流过主电流的主配线板，具有平行平板构造，由此能够减少功率模块300的流过主电流的电路的感应成分，能够对使功率模块300进行通断动作时的振荡现象进行抑制。使用图14及图15对其机制进行说明。
图14是表示不具有上述平行平板构造的情况下的单相逆变器电路的电路图。图14是与在实施方式1中使用图3说明过的逆变器电路基本相同的电路图，对与图3的逆变器电路相同的结构标注相同的标号，省略重复的说明。
如图14所示，在不具有平行平板构造的情况下，在P侧端子PT与晶体管Q1及二极管D1的通电路径存在电感L1，在N侧端子NT与晶体管Q2及二极管D2的通电路径存在电感L2，因此在使功率模块300进行通断动作时产生振荡现象。但是，通过将与P侧端子PT连接的主配线板M1和与N侧端子NT连接的主配线板M2设为平行平板构造，从而如图15所示，在P侧主配线和N侧主配线之间形成电容(电容成分)CP。通过设置电容CP，电路整体的电感成分减少，从结果上来看能够对通断动作时的振荡现象进行抑制，降低通断损耗。
<变形例>
在以上说明过的实施方式1～3中，作为构成半导体元件的半导体没有特别限定，就晶体管、二极管而言，半导体均不限于硅(Si)，能够使用碳化硅(SiC)及氮化镓(GaN)等宽带隙半导体。由宽带隙半导体构成的半导体元件与由Si构成的半导体元件相比，耐压性优异，允许电流密度也高，另外，由于耐热性也高，因此还能够进行高温动作。
虽然对本发明进行了详细的说明，但上述的说明在所有方面都是例示，本发明并不限定于此。应当理解为在不脱离本发明的范围的情况下，会设想到未例示的无数的变形例。
此外，本发明可以在其发明的范围内将各实施方式自由地组合，对各实施方式适当进行变形、省略。

Claims (6)

1.一种功率模块，其具有：
多个半导体元件，它们在厚度方向上流过主电流；
基板，其搭载所述多个半导体元件；
基座板，其搭载所述基板；
壳体，其与所述基座板接合，容纳所述多个半导体元件；
多个主配线板，它们装入与所述基座板相反侧的所述壳体的上部，配置为与所述基座板平行；以及
多个配线，它们接合于所述多个主配线板的与所述多个半导体元件相对的下表面，
所述多个半导体元件的每一者的上表面电极经由所述多个配线及接合材料与所述多个主配线板电连接。
2.根据权利要求1所述的功率模块，其中，
所述多个主配线板及所述多个配线由铜或铜合金构成，
所述接合材料由焊料构成。
3.根据权利要求2所述的功率模块，其中，
所述多个配线以呈从所述多个主配线板的下表面凸出的线环状的方式各自的两端与所述多个主配线板接合，线环的前端经由接合材料与所述多个半导体元件的所述上表面电极接合。
4.根据权利要求2所述的功率模块，其中，
所述壳体由与所述壳体的所述上部对应的壳体上部、与所述基座板接合的壳体下部构成，在将所述壳体上部接合于所述壳体下部的状态下，所述多个配线各自经由所述接合材料与所述多个半导体元件的所述上表面电极接合。
5.根据权利要求1所述的功率模块，其中，
所述多个主配线板具有第1主配线板、第2主配线板及第3主配线板，
所述多个半导体元件具有串联连接于所述第1主配线板和所述第2主配线板之间，互补地进行动作的第1开关元件及第2开关元件，该第1主配线板被赋予第1电位，该第2主配线板被赋予比所述第1电位低的第2电位，
所述第3主配线板连接于所述第1开关元件和所述第2开关元件的连接节点，
所述第2主配线板的一部分具有将绝缘材料夹在中间而将所述第1主配线板覆盖的平行平板构造。
6.根据权利要求1所述的功率模块，其中，
所述多个半导体元件各自为内置有续流二极管的多个反向导通晶体管。
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