CN117578880A - Power supply control circuit, power management chip and display module - Google Patents

Power supply control circuit, power management chip and display module Download PDF

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Publication number
CN117578880A
CN117578880A CN202311617760.2A CN202311617760A CN117578880A CN 117578880 A CN117578880 A CN 117578880A CN 202311617760 A CN202311617760 A CN 202311617760A CN 117578880 A CN117578880 A CN 117578880A
Authority
CN
China
Prior art keywords
module
power supply
transistor
sub
supply terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202311617760.2A
Other languages
Chinese (zh)
Inventor
孙志松
王玉青
谭小平
葛明伟
唐韬
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kunshan Govisionox Optoelectronics Co Ltd
Hefei Visionox Technology Co Ltd
Original Assignee
Kunshan Govisionox Optoelectronics Co Ltd
Hefei Visionox Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kunshan Govisionox Optoelectronics Co Ltd, Hefei Visionox Technology Co Ltd filed Critical Kunshan Govisionox Optoelectronics Co Ltd
Priority to CN202311617760.2A priority Critical patent/CN117578880A/en
Publication of CN117578880A publication Critical patent/CN117578880A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/12Arrangements for reducing harmonics from ac input or output
    • H02M1/126Arrangements for reducing harmonics from ac input or output using passive filters
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02Details of power systems and of start or stop of display operation

Abstract

The application discloses a power supply control circuit, power management chip and display module assembly relates to and shows technical field. The power supply control circuit comprises a first voltage adjustment module and a second voltage adjustment module; the input end of the first voltage adjusting module is connected with a power supply, the input end of the second voltage adjusting module is connected with the output end of the first voltage adjusting module, the output end of the second voltage adjusting module is connected with a first power supply end, and the first power supply end is connected with a first pole of a light emitting element of the display panel; the first voltage adjusting module or the second voltage adjusting module comprises a perfusion absorbing sub-module, and when the second electrode voltage of the light-emitting element is larger than the first electrode voltage, the perfusion absorbing sub-module is conducted with the first power supply end. According to the embodiment of the application, the problem of current backflow in the power supply control circuit is solved, and the usability of a display product is improved.

Description

Power supply control circuit, power management chip and display module
Technical Field
The application relates to the technical field of display, in particular to a power supply control circuit, a power management chip and a display module.
Background
Organic light emitting diodes (Organic Light Emitting Diode, OLEDs) and flat display devices based on the technologies of light emitting diodes (Light Emitting Diode, LEDs) are widely used in various consumer electronic products such as mobile phones, televisions, notebook computers, and desktop computers, and become the mainstream of display devices, because of their advantages such as high image quality, power saving, thin body, and wide application range.
However, the service performance of the current OLED display product needs to be improved.
Disclosure of Invention
The embodiment of the application provides a power supply control circuit, a power management chip and a display module, which are favorable for improving the problem of current backflow in the power supply control circuit, and further are favorable for improving the service performance of display products.
In a first aspect, embodiments of the present application provide a power supply control circuit, including a first voltage adjustment module and a second voltage adjustment module;
the input end of the first voltage adjusting module is connected with a power supply, the input end of the second voltage adjusting module is connected with the output end of the first voltage adjusting module, the output end of the second voltage adjusting module is connected with a first power supply end, and the first power supply end is connected with a first pole of a light emitting element of the display panel;
the first voltage adjusting module or the second voltage adjusting module comprises a perfusion absorbing sub-module, and when the second electrode voltage of the light-emitting element is larger than the first electrode voltage, the perfusion absorbing sub-module is conducted with the first power supply end.
In some optional embodiments of the first aspect, the perfusion absorption submodule includes a first switch submodule and a current limiting submodule, the first switch submodule and the current limiting submodule being connected in series.
In some optional implementations of the first aspect, the first switching submodule includes a first transistor; and/or the current limiting submodule includes a resistor.
In some optional implementations of the first aspect, the first transistor includes a P-type MOS transistor or an N-type MOS transistor.
In some optional embodiments of the first aspect, the power supply control circuit further comprises a dc chopper module, the dc chopper module being connected to the power supply and the second power supply terminal.
In some optional embodiments of the first aspect, the first voltage adjustment module further includes a first inductor, a third switch sub-module, and a first energy storage sub-module, the first inductor is connected to the power supply, the third switch sub-module and the first energy storage sub-module are connected in series between the first inductor and the ground terminal, the perfusion absorption sub-module is connected in parallel with the third switch sub-module, and a connection point between the third switch sub-module and the first energy storage sub-module is connected to the second voltage adjustment module.
In some optional implementations of the first aspect, the first voltage regulation module further includes a second switch sub-module, the first inductor and the second switch sub-module being connected in series between the power supply and the ground.
In some optional embodiments of the first aspect, the second power supply terminal is connected to the second pole of the light emitting element, and the third switching submodule is turned on when the second power supply terminal is not powered, and is turned off when the second power supply terminal is powered.
In some optional implementations of the first aspect, the second switching submodule includes a second transistor, and/or the third switching submodule includes a third transistor; the first energy storage submodule includes a first capacitor.
In some optional implementations of the first aspect, the second transistor and the third transistor are both N-type MOS transistors.
In some optional implementations of the first aspect, the second voltage regulation module includes a second inductor, a fifth switch sub-module, and a second energy storage sub-module;
the second inductor, the fifth switch sub-module and the second energy storage sub-module are connected in series between the first voltage adjusting module and the grounding end, and a connection point between the second inductor and the second energy storage sub-module is connected with the first power supply end.
In some optional implementations of the first aspect, the second voltage adjustment module includes a fourth switch sub-module connected between the first connection point and the ground, the first connection point being located between the fifth switch sub-module and the second inductor.
In some optional implementations of the first aspect, the fourth switching sub-module includes a fourth transistor, and/or the fifth switching sub-module includes a fifth transistor;
the second energy storage sub-module includes a second capacitor.
In some optional implementations of the first aspect, the fourth transistor is an N-type MOS transistor, and the fifth transistor is a P-type MOS transistor.
In some optional embodiments of the first aspect, the second power supply terminal is connected to a second pole of the light emitting element, and the power supply control circuit further includes a filter module connected in series between a second connection point and the ground terminal, where the second connection point is located between the first power supply terminal and the second power supply terminal.
In some optional implementations of the first aspect, the filtering module includes a third capacitor.
In some optional embodiments of the first aspect, the second power supply terminal is connected to the second pole of the light emitting element, and the time when the second power supply terminal is powered is later than the time when the first power supply terminal is powered.
In some optional embodiments of the first aspect, the second power supply terminal is connected to a second pole of the light emitting element, and the first switch submodule is turned off when the second power supply terminal is not powered, and is turned on when the second power supply terminal is powered.
Based on the same inventive concept, in a second aspect, embodiments of the present application provide a power management chip, where the power management chip includes the power supply control circuit of the first aspect.
Based on the same inventive concept, in a third aspect, an embodiment of the present application provides a display module, where the display module includes a display panel and a power supply control circuit as in the first aspect, a first power supply end is connected to a first pole of a light emitting element of the display panel, and a second power supply end is connected to a second pole of the light emitting element.
According to the power supply control circuit, the power management chip and the display module provided by the embodiment of the application, the perfusion absorption sub-module is arranged in the first voltage adjustment module, when the second electrode voltage of the light-emitting element is larger than the first electrode voltage, the perfusion absorption sub-module is conducted with the first power supply end, at least part of current (namely, perfusion current) from the first power supply end can be absorbed, and further the problem of current backflow in the power supply control circuit is improved, so that the service performance of a display product is improved.
Drawings
Other features, objects and advantages of the present application will become more apparent upon reading the following detailed description of non-limiting embodiments, taken in conjunction with the accompanying drawings, in which like or similar reference characters designate the same or similar features, and which are not to scale.
Fig. 1 shows a schematic structural diagram of a power supply control circuit according to an embodiment of the present application;
fig. 2 shows a schematic diagram of a structure of a power supply control circuit in a comparative example;
fig. 3 is a schematic diagram of another structure of a power supply control circuit according to an embodiment of the present application;
fig. 4 shows a schematic diagram of still another structure of the power supply control circuit provided in the embodiment of the present application;
fig. 5 is a schematic structural diagram of a power supply control circuit provided in an embodiment of the present application, where a first power supply terminal is powered and a second power supply terminal is not powered;
fig. 6 is a schematic structural diagram of a power supply control circuit provided in an embodiment of the present application, where the first power supply terminal and the second power supply terminal are powered;
fig. 7 shows a power supply timing diagram of a first power supply terminal and a second power supply terminal in a power supply control circuit according to an embodiment of the present application;
fig. 8 is a schematic structural diagram of a power management chip according to an embodiment of the present disclosure;
fig. 9 is a schematic structural diagram of a display module according to an embodiment of the present application.
Detailed Description
Features and exemplary embodiments of various aspects of the present application are described in detail below to make the objects, technical solutions and advantages of the present application more apparent, and to further describe the present application in conjunction with the accompanying drawings and the detailed embodiments. It should be understood that the specific embodiments described herein are merely configured to explain the present application and are not configured to limit the present application. It will be apparent to one skilled in the art that the present application may be practiced without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the present application by showing examples of the present application.
It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising … …" does not exclude the presence of other like elements in a process, method, article or apparatus that comprises the element.
It will be understood that when a layer, an area, or a structure is described as being "on" or "over" another layer, another area, it can be referred to as being directly on the other layer, another area, or another layer or area can be included between the layer and the other layer, another area. And if the component is turned over, that layer, one region, will be "under" or "beneath" the other layer, another region.
It should be understood that the term "and/or" as used herein is merely one relationship describing the association of the associated objects, meaning that there may be three relationships, e.g., a and/or B, may represent: a exists alone, A and B exist together, and B exists alone. In addition, the character "/" herein generally indicates that the front and rear associated objects are an "or" relationship.
In the embodiments herein, the term "electrically connected" may refer to two components being directly electrically connected, or may refer to two components being electrically connected via one or more other components.
The term "connected" may refer to "electrically connected" or "not electrically connected through an intermediate transistor. The term "insulating" may refer to "electrically insulating" or "electrically isolating". The term "drive" may refer to "control" or "operation". The term "portion" may refer to a "local portion". The term "pattern" may refer to a "member". The term "end" may refer to an "end segment" or an "end edge". The display panel may be a display module or a module/part of a display module.
It will be apparent to those skilled in the art that various modifications and variations can be made in the present application without departing from the spirit or scope of the application. Accordingly, this application is intended to cover such modifications and variations of this application as fall within the scope of the appended claims (the claims) and their equivalents. The embodiments provided in the examples of the present application may be combined with each other without contradiction.
Before describing the technical solution provided by the embodiments of the present application, in order to facilitate understanding of the embodiments of the present application, the present application first specifically describes the problems existing in the related art:
the inventors have found from a lot of researches that the voltage rating of the power management chip (PMIC) input to the medium-sized timing controller (timing controller, TCON) is 3.3V, and there is a need for the first power supply terminal (ELVSS) to be a positive voltage in the oxide circuit. Under the condition that the voltage of the second power supply End (ELVDD) is higher than that of the first power supply end, the problem of current backflow exists in the power supply control circuit, and the use performance of a display product is not improved.
In order to solve the above-mentioned problems, embodiments of the present application provide a power supply control circuit, a power management chip and a display module, and embodiments of the power supply control circuit, the power management chip and the display module will be described below with reference to the accompanying drawings.
The power supply control circuit provided in the embodiment of the present application is first described below.
Fig. 1 shows a schematic structural diagram of a power supply control circuit according to an embodiment of the present application.
As shown in fig. 1, a power supply control circuit 10 provided in an embodiment of the present application may include a first voltage adjustment module 11 and a second voltage adjustment module 12.
The input end of the first voltage adjusting module 11 is connected to the power supply bat, the input end of the second voltage adjusting module 12 is connected to the output end of the first voltage adjusting module 11, the output end of the second voltage adjusting module 12 is connected to the first power supply end ELVSS, and the first power supply end ELVSS may be connected to the first pole of the light emitting element 20 of the display panel.
The voltage range of the first power supply terminal ELVSS may be [1,5] V, for example, the voltage of the first power supply terminal may be 1V, 3V, 5V, etc.
The power supply bat may be a battery, for example. The first pole of the light emitting element 20 may be a cathode.
The first voltage regulation module 11 or the second voltage regulation module 12 may comprise a current sinking sub-module 111, and the current sinking sub-module 111 may be configured to sink at least part of the current from the first power supply terminal ELVSS.
In order to better understand the beneficial effects of the power supply control circuit in the embodiment of the present application, in contrast, in the related art, as shown in fig. 2, the power supply control circuit includes a third voltage adjustment module a and a fourth voltage adjustment module b. The input end of the third voltage adjusting module a is connected with the power supply bat, the output end of the third voltage adjusting module a is connected with the input end of the fourth voltage adjusting module b, the output end of the fourth voltage adjusting module b is connected with the first power supply end ELVSS, and the third voltage adjusting module a does not comprise a perfusion absorbing sub-module. At the first power supply terminal ELVSS is a positive voltage, for example 1V, 2V, etc. Under the condition that currents sequentially flow to the fourth voltage adjustment module b and the third voltage adjustment module a from the first power supply end ELVSS, the current backflow problem in the power supply control circuit is caused because the third voltage adjustment module a does not comprise the perfusion absorption sub-module, and the use performance of a display product is not facilitated.
In the embodiment of the present application, by setting the current absorbing sub-module 111 in the first voltage adjustment module 11, when the second voltage of the light emitting element is greater than the first voltage, the current absorbing sub-module is conducted with the first power supply end, so that at least part of the current (i.e. the current to be absorbed) from the first power supply end ELVSS can be absorbed, thereby being beneficial to improving the problem of current backflow in the power supply control circuit 10, and thus being beneficial to improving the service performance of the display product.
The third voltage adjustment module a may include a third inductor L3, a diode D1, a fourth capacitor C4, and a first N-type MOS transistor M1. The third inductor L3, the diode D1 and the fourth capacitor C4 are connected in series between the power bat and the ground GND, and the first N-type MOS transistor M1 is connected between the connection point between the third inductor L3 and the diode D1 and the ground GND. The fourth voltage adjustment module b may include a fourth inductor L4, a second N-type MOS transistor M2, a P-type MOS transistor M3, and a fifth capacitor C5. The second N-type MOS transistor M2 and the P-type MOS transistor M3 are connected in series between the ground GND and a connection point between the diode D1 and the fourth capacitor C4. The fourth inductor L4 and the fifth capacitor C5 are connected in series between the ground GND and the connection point between the second N-type MOS transistor M2 and the P-type MOS transistor M3. A first power supply terminal ELVSS is disposed between the fourth inductor L4 and the fifth capacitor C5.
In some alternative embodiments, as shown in fig. 4, the perfusion absorbing sub-module 111 may include a first switch sub-module 1a and a current limiter sub-module 1b, the first switch sub-module 1a and the current limiter sub-module 1b being connected in series. In this way, when there is a current from the first power supply terminal ELVSS, that is, when the second voltage of the light emitting element is greater than the first voltage, the first switch sub-module 1a is controlled to be turned on, and the current limiting sub-module 1b is controlled to absorb at least a portion of the current from the first power supply terminal ELVSS, thereby facilitating improvement of the current backflow problem in the power supply control circuit 10, and thus facilitating improvement of the usability of the display product.
The first switch sub-module 1a may be used to control whether current flows through the current limiting sub-module 1 b.
The current limiter sub-module 1b may be used to limit the magnitude of the current from the first power supply terminal ELVSS.
The specific position between the first switch sub-module 1a and the current limiter sub-module 1b is not limited herein, and it is only required to connect the first switch sub-module 1a and the current limiter sub-module 1b in series.
Alternatively, the first switch sub-module 1a may include a first transistor Q1. Illustratively, the first transistor may include a P-type MOS transistor or an N-type MOS transistor.
Alternatively, the current limiter sub-module 1b may include a resistor R. It is understood that the larger the resistance value of the resistor R, the more current limiter sub-module 1b absorbs the current from the first power supply terminal ELVSS. The value of the resistor R may be set according to practical situations, and is not limited herein. For example, the resistance R may be 1k ohms, 3k ohms, etc.
Alternatively, the second power supply terminal ELVDD may be connected to the second pole of the light emitting element 20, and the first switch sub-module 1a is turned off when the second power supply terminal ELVDD is not supplied and the first switch sub-module 1a is turned on when the second power supply terminal ELVDD is supplied. In this way, the first power supply terminal ELVSS is connected to the first electrode of the light emitting element of the display panel, and the second power supply terminal ELVDD is connected to the second electrode of the light emitting element, so that the light emitting element is driven to emit light when the voltage difference between the second electrode and the first electrode is greater than the turn-on voltage.
Further, in the case where the second power supply terminal ELVDD is not supplied with power, the current in the power supply control circuit 10 flows from the power supply bat to the first power supply terminal ELVSS through the first voltage adjustment module 11 and the second voltage adjustment module 12 in this order, and the first switch sub-module 1a is turned off. Under the condition that the second power supply terminal ELVDD is powered, the current in the power supply control circuit 10 sequentially passes through the first power supply terminal ELVSS, the second voltage adjustment module 12 and the first voltage adjustment module 11 from the second power supply terminal ELVDD, at this time, the first switch sub-module 1a is turned on, the perfusion absorbing sub-module is turned on with the first power supply terminal, and then at least part of the current from the first power supply terminal ELVSS can be absorbed by the current limiter sub-module 1b, which is beneficial to improving the problem of current backflow in the power supply control circuit 10, thereby being beneficial to improving the service performance of the display product.
Illustratively, the second pole of the light emitting element 20 may be an anode.
The second power supply terminal ELVDD is not supplied with power, and the power bat may not supply the second power supply terminal ELVDD with power. The second power supply terminal ELVDD may be supplied with power from the power supply bat.
As an example, the pixel circuit of the display panel is a 2T1C pixel circuit, the first power supply terminal ELVSS may be connected to the cathode of the light emitting element 20, and the second power supply terminal ELVDD may be connected to the anode of the light emitting element 20 through the driving module.
As another example, the pixel circuit of the display panel is a 7T1C pixel circuit, the first power supply terminal ELVSS may be connected to the cathode of the light emitting element 20, and the second power supply terminal ELVDD may be connected to the anode of the light emitting element 20 sequentially through the first light emitting control module, the driving module, and the second light emitting control module.
The light emitting element may be an organic light emitting diode (Organic Light Emitting Diode, OLED).
In some alternative embodiments, as shown in fig. 3 to 6, the power supply control circuit 10 may further include a direct current chopper module 13, and the direct current chopper (DC/DC) module 13 may be connected to the power supply bat and the second power supply terminal ELVDD, and the direct current chopper module 13 may be used to convert a fixed direct current voltage of the power supply bat into a variable direct current voltage. In this manner, by providing the dc chopper module 13 between the power bat and the second power supply terminal ELVDD, a stable voltage can be supplied to the second power supply terminal ELVDD.
The second power supply terminal ELVDD may provide a positive voltage. The voltage value provided by the second power supply terminal ELVDD may be set according to practical situations, and is not limited herein. For example, the voltage value provided by the second power supply terminal ELVDD may be 6.5V, 7V, etc.
It is understood that the dc chopper module 13 and the first inductor L1 are both connected to the positive pole of the power supply bat.
In some alternative embodiments, as shown in fig. 3, the first voltage adjustment module 11 may further include a first inductor L1, a third switch sub-module 113, and a first energy storage sub-module 114. The first inductor L1 is connected to the power bat, the third switch sub-module 113 and the first energy storage sub-module 114 may be connected in series between the first inductor L1 and the ground GND, the perfusion absorbing sub-module 111 may be connected in parallel with the third switch sub-module 113, and a connection point between the third switch sub-module 113 and the first energy storage sub-module 114 may be connected to the second voltage adjusting module 12.
It is appreciated that the first energy storage sub-module 114 may be used to store charge and may also be used for filtering. The first energy storage sub-module 114 may include a first capacitor C1.
Optionally, the first voltage adjustment module 11 may further include a second switch sub-module 112, and the first inductor L1 and the second switch sub-module 112 may be connected in series between the power bat and the ground GND.
Optionally, the second switch sub-module 112 may include a second transistor Q2, and/or the third switch sub-module 113 may include a third transistor Q3.
As an example, the second transistor Q2 and the third transistor Q3 may be N-type MOS transistors.
As another example, the second transistor Q2 and the third transistor Q3 may be P-type MOS transistors.
Alternatively, the second power supply terminal ELVDD is connected to the second pole of the light emitting element 20, and the third switching sub-module 113 is turned on to transmit a voltage to the second voltage adjustment module in case the second power supply terminal ELVDD is not supplied with power. In case that the second power supply terminal ELVDD is supplied, the third switching sub-module 113 is turned off to prevent the perfusion absorbing sub-module 111 from being shorted.
As an example, as shown in fig. 5, in the case where the second power supply terminal ELVDD is not supplied with power, the second transistor Q2 is turned on, the first transistor Q1 and the third transistor Q3 are both turned off, the power bat, the first inductor L1, and the ground terminal GND form a loop, and the first inductor L1 receives the first voltage from the power bat and charges. At this time, the fourth transistor Q4 and the fifth transistor Q5 may both be turned off, or at least one of the fourth transistor Q4 and the fifth transistor Q5 may be turned on. In the second stage, the first transistor Q1 and the second transistor Q2 are turned off, the third transistor Q3 is turned on, the power bat, the first inductor L1, the first capacitor C1 and the ground GND form a loop, and the first inductor L1 and the power bat supply power to the first capacitor C1, so that the first capacitor C1 is charged, and a second voltage at a connection point between the third transistor Q3 and the first capacitor C1 is greater than the first voltage. At this time, the fourth transistor Q4 and the fifth transistor Q5 may both be turned off, or at least one of the fourth transistor Q4 and the fifth transistor Q5 may be turned on. That is, in case the second power supply terminal ELVDD is not supplied, the first voltage adjusting module 11 may be used for boosting.
As another example, as shown in fig. 6, in the case where the second power supply terminal ELVDD is powered, in the third stage, the second transistor Q2 and the third transistor Q3 are turned off, the first transistor Q1 is turned on, the third voltage from the second voltage adjustment module 12 charges the first inductor L1 through the resistor R and the first transistor Q1, and the resistor R can absorb at least part of the current from the first power supply terminal ELVSS, which is beneficial to improving the problem of current backflow in the power supply control circuit 10, thereby being beneficial to improving the service performance of the display product. At this time, the fourth transistor Q4 and the fifth transistor Q5 may both be turned off, or at least one of the fourth transistor Q4 and the fifth transistor Q5 may be turned on. In the fourth stage, the second transistor Q2 is turned on, the first transistor Q1 and the third transistor Q3 are turned off, the first inductor L1 discharges, and the fourth voltage at the connection point between the first inductor L1 and the power bat is smaller than the third voltage from the second voltage adjustment module 12. At this time, the fourth transistor Q4 and the fifth transistor Q5 may both be turned off, or at least one of the fourth transistor Q4 and the fifth transistor Q5 may be turned on. That is, in case that the second power supply terminal ELVDD is supplied, the first voltage adjusting module 11 may be used for voltage reduction.
In fig. 5, Q1 of the yoke represents Q1 cut-off, Q3 of the yoke in fig. 6 cut-off, and thick arrows in fig. 5 and 6 represent current directions.
In some alternative embodiments, as shown in fig. 6, the second voltage regulation module 12 includes a second inductance L2, a fifth switching sub-module 122, and a second energy storage sub-module 123. The second inductor L1, the fifth switch sub-module 122 and the second energy storage sub-module 123 may be connected in series between the first voltage adjusting module 11 and the ground GND, and a connection point between the second inductor L2 and the second energy storage sub-module 123 may be connected to the first power supply terminal ELVSS.
It is appreciated that the second energy storage sub-module 123 may be used to store charge and may also be used for filtering. The second energy storage sub-module 123 may include a second capacitor C2.
Alternatively, the second voltage adjustment module 12 may include a fourth switch sub-module 121, and the fourth switch sub-module 121 may be connected between the first connection point N1 and the ground GND, and the first connection point N1 may be located between the fifth switch sub-module 122 and the second inductor L2.
Optionally, the fourth switch sub-module 121 may include a fourth transistor Q4, and/or the fifth switch sub-module 122 may include a fifth transistor Q5.
As an example, the fourth transistor Q4 is an N-type MOS transistor, and the fifth transistor Q5 is a P-type MOS transistor.
As another example, the fourth transistor Q4 is a P-type MOS transistor, and the fifth transistor Q5 is an N-type MOS transistor.
As an example, as shown in fig. 5, in the case where the second power supply terminal ELVDD is not supplied, in the fifth stage, the fourth transistor Q4 is turned off, the fifth transistor Q5 is turned on, and the second inductor L2 receives the second voltage from the first voltage adjusting module 11 and charges. At this time, the first transistor Q1, the second transistor Q2, and the third transistor Q3 may all be turned off, or at least one of the first transistor Q1, the second transistor Q2, and the third transistor Q3 may be turned on. In the sixth stage, the fourth transistor Q4 is turned on, the fifth transistor Q5 is turned off, the second inductor L2 and the second capacitor C1 are discharged, and the fifth voltage of the first power supply terminal ELVSS is less than the second voltage. At this time, the first transistor Q1, the second transistor Q2, and the third transistor Q3 may all be turned off, or at least one of the first transistor Q1, the second transistor Q2, and the third transistor Q3 may be turned on. That is, in the case where the second power supply terminal ELVDD is not supplied, the second voltage adjusting module 12 may be used to step down.
As another example, as shown in fig. 6, in the seventh stage, in the case where the second power supply terminal ELVDD is supplied, the fourth transistor Q4 is turned on, the fifth transistor Q5 is turned off, and the sixth voltage from the first power supply terminal ELVSS charges the second inductor L2. At this time, the first transistor Q1, the second transistor Q2, and the third transistor Q3 may all be turned off, or at least one of the first transistor Q1, the second transistor Q2, and the third transistor Q3 may be turned on. In the eighth stage, the fourth transistor Q4 is turned off, the fifth transistor Q5 is turned on, both the second inductor L2 and the second capacitor C2 are discharged, and the sixth voltage between the fifth transistor Q5 and the first capacitor C1 is greater than the third voltage, i.e. the voltage at the junction between the fifth transistor Q5 and the first capacitor C1 increases. That is, in the case where the second power supply terminal ELVDD is supplied, the second voltage adjusting module 12 may be used for boosting. At this time, the first transistor Q1, the second transistor Q2, and the third transistor Q3 may all be turned off, or at least one of the first transistor Q1, the second transistor Q2, and the third transistor Q3 may be turned on. In the embodiment of the present application, by providing the first transistor Q1 and the resistor R in the perfusion absorbing submodule 111, the voltage between the fifth transistor Q5 and the first capacitor C1 can be stabilized within the preset range by the resistor R. The preset range may be set according to practical situations, and is not limited herein.
It will be appreciated that the operation of the power control circuit 10 may in turn comprise: a first stage, a second stage, a fifth stage, a sixth stage, a seventh stage, an eighth stage, a third stage, and a fourth stage. That is, the first stage, the second stage, the fifth stage, the sixth stage, the seventh stage, the eighth stage, the third stage, and the fourth stage may be sequentially performed.
In some alternative embodiments, as shown in fig. 4, the second power supply terminal ELVDD may be connected to the second pole of the light emitting element 20, and the power supply control circuit 10 may further include a filtering module 14, where the filtering module 14 may be connected in series between the second connection point N2 and the ground terminal GND, and the second connection point N2 may be located between the first power supply terminal ELVSS and the second power supply terminal ELVDD. The filtering module 14 may be used for filtering.
Optionally, the filtering module 14 includes a third capacitor C3. The capacitance of the first capacitor C1, the capacitance of the second capacitor C2, and the capacitance of the third capacitor C3 may be equal or unequal, which is not limited herein.
In some alternative embodiments, as shown in fig. 3 and 7, the second power supply terminal ELVDD may be connected to the second pole of the light emitting element 20, and the second power supply terminal ELVDD is supplied with power at a timing later than the first power supply terminal ELVSS. Where t_delay in fig. 7 represents an interval time between a first rising edge of the first power supply terminal ELVSS and a first rising edge of the second power supply terminal ELVDD, t_set_elvss represents a transition time of the first power supply terminal ELVSS, and t_set_elvdd represents a transition time of the second power supply terminal ELVDD. The first rising edge of the first power supply terminal ELVSS is before the first rising edge of the second power supply terminal ELVDD, which means that the first power supply terminal ELVSS is powered up first and the second power supply terminal ELVDD is powered up later. The alignment of the second rising edge of the first power supply terminal ELVSS and the second rising edge of the second power supply terminal ELVDD may mean that the voltages of the first power supply terminal ELVSS and the second power supply terminal ELVDD are simultaneously adjusted according to actual conditions. Of course, after the first power supply terminal ELVSS is powered on first and the second power supply terminal ELVDD is powered on later, the voltages of the first power supply terminal ELVSS and the second power supply terminal ELVDD may be adjusted respectively according to the actual situation. The first power supply end ELVSS is electrified firstly, and the second power supply end ELVDD is electrified later, so that the problem that the power supply control circuit is damaged due to the fact that the current from the first power supply end ELVSS is generated in the starting stage of the first power supply end ELVSS under the condition that the second power supply end ELVDD is electrified firstly when the first power supply end ELVSS is at a positive voltage can be prevented.
Based on the same inventive concept, the embodiment of the present application further provides a power management chip, and the power management chip provided by the embodiment of the present application is described below with reference to the accompanying drawings.
Fig. 8 is a schematic structural diagram of a power management chip according to an embodiment of the present application.
As shown in fig. 8, the power management chip 100 provided in the embodiment of the present application includes the power supply control circuit 10 provided in any of the embodiments described above.
The power management chip provided in the embodiment of the present application has the beneficial effects of the power supply control circuit provided in the embodiment of the present application, and the specific description of the power supply control circuit in the above embodiments may be referred to specifically, and this embodiment is not repeated here.
Based on the same inventive concept, the embodiment of the present application further provides a display module, and the display module provided by the embodiment of the present application is described below with reference to the accompanying drawings.
Fig. 9 is a schematic structural diagram of a display module according to an embodiment of the present application.
As shown in fig. 9, the display module 1000 provided in the embodiment of the present application includes the display panel 200 and the power supply control circuit 10 provided in any of the embodiments described above, where the first power supply terminal ELVSS is connected to a first pole (not shown) of a light emitting element of the display panel, and the second power supply terminal ELVDD is connected to a second pole (not shown) of the light emitting element. In addition, the display module 100 may further include a touch substrate, a polarizer, and a cover plate.
The display module provided in the embodiment of the present application has the beneficial effects of the power supply control circuit provided in the embodiment of the present application, and the specific description of the power supply control circuit in the above embodiments may be referred to specifically, which is not described herein again.
These embodiments are not all details described in detail in accordance with the embodiments described hereinabove, nor are they intended to limit the application to the specific embodiments described. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and the practical application, to thereby enable others skilled in the art to best utilize the invention and various modifications as are suited to the particular use contemplated. This application is to be limited only by the claims and the full scope and equivalents thereof.

Claims (10)

1. The power supply control circuit is characterized by comprising a first voltage adjustment module and a second voltage adjustment module;
the input end of the first voltage adjusting module is connected with a power supply, the input end of the second voltage adjusting module is connected with the output end of the first voltage adjusting module, and the output end of the second voltage adjusting module is connected with a first power supply end; the first power supply end is connected with a first pole of the light-emitting element of the display panel;
the first voltage adjusting module or the second voltage adjusting module comprises a perfusion absorbing sub-module, and when the second electrode voltage of the light-emitting element is larger than the first electrode voltage, the perfusion absorbing sub-module is conducted with the first power supply end.
2. The power supply control circuit of claim 1, wherein the perfusion absorption submodule includes a first switch submodule and a current limiting submodule, the first switch submodule and the current limiting submodule being connected in series;
preferably, the first switching submodule includes a first transistor;
and/or the current limiting submodule comprises a resistor;
preferably, the first transistor includes a P-type MOS transistor or an N-type MOS transistor.
3. The power control circuit of claim 1, further comprising a dc chopper module connecting the power source and the second power supply terminal.
4. The power supply control circuit of claim 2, wherein the first voltage regulation module further comprises a first inductor, a third switch sub-module, and a first energy storage sub-module, the first inductor is connected to the power supply, the third switch sub-module and the first energy storage sub-module are connected in series between the first inductor and a ground terminal, the current absorption sub-module is connected in parallel with the third switch sub-module, and a connection point between the third switch sub-module and the first energy storage sub-module is connected to the second voltage regulation module;
preferably, the first voltage regulation module further comprises a second switch sub-module, and the first inductor and the second switch sub-module are connected in series between the power supply and the ground terminal;
preferably, a second power supply terminal is connected to a second pole of the light emitting element, and the third switch submodule is turned on when the second power supply terminal is not powered, and is turned off when the second power supply terminal is powered;
preferably, the second switching submodule includes a second transistor and/or the third switching submodule includes a third transistor;
the first energy storage submodule comprises a first capacitor;
preferably, the second transistor and the third transistor are both N-type MOS transistors.
5. The power control circuit of claim 1, wherein the second voltage regulation module comprises a second inductor, a fifth switch sub-module, and a second energy storage sub-module;
the second inductor, the fifth switch sub-module and the second energy storage sub-module are connected in series between the first voltage regulation module and the grounding end, and a connection point between the second inductor and the second energy storage sub-module is connected with the first power supply end;
preferably, the second voltage adjustment module includes a fourth switch sub-module, the fourth switch sub-module is connected between a first connection point and the ground, and the first connection point is located between the fifth switch sub-module and the second inductor;
preferably, the fourth switching sub-module comprises a fourth transistor, and/or the fifth switching sub-module comprises a fifth transistor;
the second energy storage submodule comprises a second capacitor;
preferably, the fourth transistor is an N-type MOS transistor, and the fifth transistor is a P-type MOS transistor.
6. The power supply control circuit of claim 1, wherein a second power supply terminal is connected to a second pole of the light emitting element, the power supply control circuit further comprising a filter module connected in series between a second connection point and a ground terminal, the second connection point being located between the first power supply terminal and the second power supply terminal;
preferably, the filtering module includes a third capacitor.
7. The power supply control circuit of claim 1, wherein a second power supply terminal is connected to a second pole of the light emitting element, the second power supply terminal being powered at a time later than the time at which the first power supply terminal is powered.
8. The power supply control circuit of claim 2, wherein a second power supply terminal is connected to a second pole of the light emitting element, the first switch sub-module being turned off when the second power supply terminal is not powered and the first switch sub-module being turned on when the second power supply terminal is powered.
9. A power management chip comprising the power supply control circuit according to any one of claims 1 to 8.
10. A display module comprising a display panel and a power supply control circuit according to any one of claims 1 to 8, wherein the first power supply terminal is connected to a first pole of a light emitting element of the display panel, and the second power supply terminal is connected to a second pole of the light emitting element.
CN202311617760.2A 2023-11-29 2023-11-29 Power supply control circuit, power management chip and display module Pending CN117578880A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202311617760.2A CN117578880A (en) 2023-11-29 2023-11-29 Power supply control circuit, power management chip and display module

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202311617760.2A CN117578880A (en) 2023-11-29 2023-11-29 Power supply control circuit, power management chip and display module

Publications (1)

Publication Number Publication Date
CN117578880A true CN117578880A (en) 2024-02-20

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Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
CN (1) CN117578880A (en)

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