CN117559217A - High-power addressable VCSEL chip and laser radar - Google Patents

High-power addressable VCSEL chip and laser radar Download PDF

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Publication number
CN117559217A
CN117559217A CN202311001812.3A CN202311001812A CN117559217A CN 117559217 A CN117559217 A CN 117559217A CN 202311001812 A CN202311001812 A CN 202311001812A CN 117559217 A CN117559217 A CN 117559217A
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CN
China
Prior art keywords
vcsel
addressable
light emitting
high power
circuit
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CN202311001812.3A
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Chinese (zh)
Inventor
郭铭浩
杨通辉
赖威廷
李念宜
刘赤宇
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Zhejiang Ruixi Technology Co ltd
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Zhejiang Ruixi Technology Co ltd
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Priority to CN202311001812.3A priority Critical patent/CN117559217A/en
Publication of CN117559217A publication Critical patent/CN117559217A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/04Processes or apparatus for excitation, e.g. pumping, e.g. by electron beams
    • H01S5/042Electrical excitation ; Circuits therefor
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S7/00Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
    • G01S7/48Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S17/00
    • G01S7/481Constructional features, e.g. arrangements of optical elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/10Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
    • H01S5/18Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities
    • H01S5/183Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]

Abstract

The invention provides a high-power addressable VCSEL chip, a VCSEL light-emitting unit, a first light-emitting unit and a second light-emitting unit, wherein the VCSEL light-emitting unit is used for emitting laser under current excitation and comprises at least one VCSEL light-emitting point; an addressable circuit structure comprising a diode structure corresponding to the VCSEL emission point, the diode structure being connected to the VCSEL emission point by an electrical conductor; and the substrate structure is positioned below the VCSEL light emitting unit and the diode structure, and the VCSEL light emitting unit and the diode structure are integrated on the substrate structure. The metal wire is integrated on the VCSEL chip through the process, the length of the wire is reduced, the inductance generated on the wire is reduced, the inductance is reduced under the condition of the same current, the output power of the VCSEL chip is increased, and the efficiency of the high-power radar can be achieved, so that the VCSEL can be used as the vehicle radar.

Description

High-power addressable VCSEL chip and laser radar
Technical Field
The invention belongs to the technical field of semiconductors, and particularly relates to a high-power addressable VCSEL chip and a laser radar.
Background
A VCSEL (Vertical-Cavity Surface Emitting Laser) is a semiconductor Laser that emits Laser light in a direction perpendicular to a substrate. The VCSEL has the characteristics of small divergence angle, symmetrical light beams, high wavelength heat stability, stable light beam quality, single longitudinal mode output, high photoelectric conversion efficiency, small volume, low threshold current, low power consumption, easy integration and the like, and is suitable for being widely applied as a light source, for example, a laser light source of a laser radar.
A Laser Radar (Laser Radar) is a device that detects a characteristic quantity such as a position, a speed, etc. of a target object with Laser light as a medium. Specifically, the laser radar can detect the relative position of the target object and the laser radar by emitting a laser beam to the target object and receiving the reflected signal, thereby realizing detection, tracking and identification of the target object. For example, by using the TOF technique, a laser pulse is emitted to a target area in a very short time, the laser pulse reflected back by an obstacle in the target area is received by a detector, and the time difference between the emitted pulse and the received pulse, which is one-half times the speed of light, is multiplied by the distance between the obstacle and the radar.
In recent years, lidar is widely used in the fields of intelligent traffic, environmental monitoring, military security, etc. For example: the laser radar can be applied to new technologies such as automatic driving of a vehicle, auxiliary driving of the vehicle, active braking and the like, so that the vehicle has the function of automatically avoiding obstacles under the control of a computer, and the driving safety is ensured. Correspondingly, the laser radar can also realize functions such as unmanned aerial vehicle obstacle avoidance and the like. The laser radar takes the VCSEL light source as the laser light source, benefits from good light emitting performance of the VCSEL light source, and the detection function of the laser radar can be effectively improved. And the laser radar can scan the target object step by means of the VCSEL light source in a partitioning manner, so that the scanning stability can be improved, and the difficulty of subsequent three-dimensional modeling is simplified compared with the scanning of the target object by driving the VCSEL light source to rotate through the rotating motor.
However, lidar multi-region addressing requires that the VCSEL chips be driven to light up in regions by multiple channels, where each individual channel contains a tank circuit for powering the VCSEL chips to light up the VCSEL chips. The number of the tank circuits increases with the increase of the number of the channels, which causes insufficient circuit design space around the VCSEL chip and increases the area of the whole circuit board.
The length of the lead wire is lengthened by the energy storage circuits of the channels, so that the inductance of the periphery of the VCSEL chip is increased; after the inductance is increased, in order to achieve the expected output power, the voltage needs to be increased, so that the current is increased, but the increase of the current is affected by the voltage withstand limitation of components around the laser radar, so that the laser radar cannot meet the requirement of high-power output.
Disclosure of Invention
An advantage of the present application is that a high power addressable VCSEL chip is provided in which a diode structure is integrated onto a substrate structure, reducing the volume of the VCSEL light emitting cells and thus the volume of the lidar.
Another advantage of the present application is that a high power addressable VCSEL chip is provided; and metal wires are integrated on the VCSEL chip through a process, so that the length of the wires is reduced, and the wiring difficulty of the laser radar is reduced.
Another advantage of the present application is that a high power addressable VCSEL chip is provided; the metal wire is integrated on the VCSEL chip through the process, the length of the wire is reduced, the inductance generated on the wire is reduced, the inductance is reduced under the condition of the same current, the output power of the VCSEL chip is increased, and the efficiency of the high-power radar can be achieved, so that the VCSEL can be used as the vehicle radar.
To achieve at least one of the above or other advantages and objects, according to one aspect of the present application, there is provided a high power addressable VCSEL chip comprising:
a VCSEL light emitting unit for emitting laser under current excitation, the VCSEL light emitting unit including at least one VCSEL light emitting point;
an addressable circuit structure comprising a diode structure corresponding to the VCSEL emission point, the diode structure being connected to the VCSEL emission point by an electrical conductor;
and the substrate structure is positioned below the VCSEL light emitting unit and the diode structure, and the VCSEL light emitting unit and the diode structure are integrated on the substrate structure.
In a high power addressable VCSEL chip according to the present application, the substrate structure comprises:
a substrate layer;
A neutral region layer integrated on the substrate layer, the VCSEL light emitting cells and the diode structure being mechanically integrated on the neutral region layer.
In the high power addressable VCSEL chip according to the present application, the electrical leads are formed by process attachment to the VCSEL light emitting cells.
In the high power addressable VCSEL chip according to the present application, the process is one of an evaporation process, a sputtering process, and an electroplating process.
In the high power addressable VCSEL chip according to the present application, an insulating protective layer is provided between the electrical leads and the VCSEL light emitting cells.
In the high power addressable VCSEL chip according to the present application, the diode structure is a schottky diode.
In a high power addressable VCSEL chip according to the present application, the diode structure comprises:
a semiconductor;
and the metal conductor is in ohmic contact with the semiconductor, and the electric wire is connected with the metal conductor.
In the high power addressable VCSEL chip according to the present application, the electrical leads are gold wires.
In the high power addressable VCSEL chip according to the present application, the substrate layer is a gallium arsenide substrate.
In the high power addressable VCSEL chip according to the present application, the neutral zone layer is a gallium arsenide layer.
The application also discloses a laser radar, include:
a laser projection device for projecting laser light, wherein the laser projection device comprises any of the high power addressable VCSEL chips described above;
a laser receiving device for receiving a laser signal; and
a processor communicatively coupled to the laser projection device and the laser receiving device.
These and other objects, features, and advantages of the present application will become more fully apparent from the following detailed description, the accompanying drawings, and the appended claims.
Drawings
Fig. 1 illustrates a schematic block diagram of circuitry of a high power addressable VCSEL chip, a lidar and a smart device according to an embodiment of the present application.
Fig. 2 illustrates a schematic diagram of circuitry of a high power addressable VCSEL chip according to an embodiment of the present application.
Fig. 3 illustrates a circuit diagram of an addressable boost control circuit in accordance with an embodiment of the present application.
Fig. 4 illustrates another circuit diagram of an addressable boost control circuit in accordance with an embodiment of the present application.
Fig. 5 illustrates another circuit diagram of an addressable boost control circuit in accordance with an embodiment of the present application.
Fig. 6 illustrates a schematic diagram of an addressable boost control circuit in accordance with an embodiment of the present application.
Fig. 7 illustrates a schematic diagram of a high power addressable VCSEL chip according to an embodiment of the present application.
Fig. 8 illustrates another schematic diagram of a high power addressable VCSEL chip according to an embodiment of the present application.
Detailed Description
The terms and words used in the following description and claims are not limited to literal meanings, but are used only by the inventors to enable a clear and consistent understanding of the application. It will be apparent to those skilled in the art, therefore, that the following description of the various embodiments of the present application is provided for the purpose of illustration only and not for the purpose of limiting the application as defined by the appended claims and their equivalents.
It will be understood that the terms "a" and "an" should be interpreted as referring to "at least one" or "one or more," i.e., in one embodiment, the number of elements may be one, while in another embodiment, the number of elements may be plural, and the term "a" should not be interpreted as limiting the number.
Although ordinal numbers such as "first," "second," etc., will be used to describe various components, those components are not limited herein. The term is used merely to distinguish one component from another. For example, a first component may be referred to as a second component, and likewise, a second component may be referred to as a first component, without departing from the teachings of the present application. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
The terminology used herein is for the purpose of describing various embodiments only and is not intended to be limiting. As used herein, the singular is intended to include the plural unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, or groups thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, or groups thereof.
Summary of the application
The prior laser radar mainly uses an addressable VCSEL chip and an addressable drive control circuit to realize each zone of the VCSEL chip to light up, thereby realizing gradual scanning. In some of the existing addressable drive control circuits, control lighting of the light emitting points of the respective partitions of the addressable light source is achieved by a Switch chip (which may also be referred to as a MUX chip). However, there is a contradiction that is difficult to reconcile between the withstand voltage (voltage) property of the Switch chip and the requirement of the driving voltage of the light source module.
More specifically, the Switch chip is low in withstand voltage (voltage). Currently, the highest operating voltage of the Switch chip is only 100V, which limits the voltage value of the driving voltage provided by the addressable driving control circuit for the addressable light source, so that the power supply cannot provide a higher input voltage to the addressable driving control circuit, and further makes it difficult for the addressable driving control circuit to provide a higher driving voltage for the addressable light source. The maximum operating voltage of the Switch chip can only be 100V, and the driving current is difficult to be increased, so that the input voltage becomes a bottle of the optical power of the addressable light source for the above reasons.
In the application, the problems that the optical power of the addressable light source is limited and the optical pulse width is difficult to further reduce are solved by increasing the voltage after the Switch chip is passed, so that the detection performance and the eye safety of the laser radar are improved.
Specifically, the technical scheme of the application is that the voltage is increased through the oscillating circuit, so that the energy storage capacitor in the oscillating circuit can break through the limitation of the input voltage of the addressable driving control circuit, and the input voltage higher than that of the addressable driving control circuit is provided for the addressable light source.
Further, the voltage at two ends of the energy storage capacitor in the oscillating circuit changes regularly, and the voltage gradually decreases after reaching the maximum value without external factor interference, and finally is stabilized at the input voltage of the addressable driving control circuit. According to the technical scheme, the voltage at the two ends of the energy storage capacitor is maintained to be higher than the input voltage through a specific interference mechanism, so that stable and higher voltage is provided for the light source.
Based on this, the present application proposes an oscillation boosting circuit, which includes: the voltage holding unit is used for holding the voltage at two ends of the energy storage capacitor of the oscillating circuit to be larger than the input voltage value (namely 100V) of the oscillating circuit.
Accordingly, the present application also proposes an addressable boost control circuit comprising: the device comprises a switch integrator of at least two switch units, at least two oscillation boosting circuits which are respectively and electrically connected with at least two switch units, and a driving circuit which is electrically connected with at least two oscillation boosting circuits, wherein each oscillation boosting circuit is suitable for being electrically connected with at least one luminous point, and all the oscillation boosting circuits are connected with the same driving circuit.
The application also proposes a light source module, comprising: a plurality of light emitting points and an addressable light source and an addressable boost control circuit as described above, and portions of the addressable boost control circuit are integrated onto the addressable light source by a process.
The application also provides a boosting method, which comprises the following steps: raising the voltage at two ends of an energy storage capacitor of an oscillating circuit to be greater than the input voltage of the oscillating circuit; and maintaining the voltage across the storage capacitor of the oscillating circuit at a specific value, the specific value being greater than the input voltage value of the oscillating circuit.
Preferred, exemplary addressable boost control Circuit
Referring to fig. 1 to 4 of the drawings, an addressable boost control circuit 100 according to an embodiment of the present application is illustrated, wherein the addressable boost control circuit 100 includes a switch integrator 10, at least two oscillating boost circuits 20, and one driving circuit 30 electrically connected to at least two of the oscillating boost circuits 20. Specifically, the addressable boost control circuit 100 is adapted for an addressable light source comprising a light emitting area divided into a plurality of zones that are selectively turned on, each zone comprising at least one light emitting point, the addressable boost control circuit 100 being adapted to control the illuminated zones of the addressable light source and their sequence of illumination.
The type of the addressable light source is not limited in this application, and for example, the addressable light source may be implemented as a VCSEL (vertical cavity surface emitting laser) type light source, an EEL (edge emitting laser) type light source, or the like.
In a specific example, the addressable boost control circuit 100 is adapted for use with a VCSEL-type light source, which may be implemented as a VCSEL-type light source. In this specific example, each light emitting point of the VCSEL-type light source to which the addressable boost control circuit 100 is adapted includes a light emitting body and a cathode (i.e., negative electrode) electrically connected to the light emitting body and an anode (i.e., positive electrode) electrically connected to the light emitting body, wherein the light emitting body includes a negative conductive layer, an N-DBR layer, an active region 53, a confinement layer 52 having a confinement hole, a P-DBR layer, and the preselected partition can be conducted by conducting the anode and the cathode of the light emitting point of the preselected partition.
In this specific example, the parameters of the VCSEL-type light source are chosen to be configured as: the VCSEL-type light source comprises 96 x 28 light emitting points, i.e. the VCSEL-type light source comprises 28 rows of light emitting points, each row of light emitting points comprising 96 light emitting points, which VCSEL-type light source is suitable for use in an on-board lidar.
It is worth mentioning that in existing driving schemes for driving an addressable light source, a distributed control mode is used to control the individual zones of the addressable light source. More specifically, the driving circuits 30 are respectively configured for the respective sections of the addressable light sources, and there is a difference in circuit design, device parameters, and the like between the respective driving circuits 30, so that even if the control timings of the respective driving circuits 30 are uniform, the intervals at which the respective sections of the addressable light sources corresponding to the respective driving circuits 30 are lit may be non-uniform, which affects the performance of the laser radar, for example, the ranging accuracy of the laser radar. Configuring the drive circuit 30 for each partition of the addressable light source also results in many electronic components of the overall circuitry, large circuit board area, and high cost.
Accordingly, the present application proposes to employ a centrally managed control mode to control the individual zones of the addressable light sources. Specifically, in the embodiment of the present application, the switch integrator 10 includes at least two switch units, each of which is electrically connected to each of the oscillating-boost circuits 20, and each of which forms a control channel with its corresponding oscillating-boost circuit 20. Each of the oscillating-up circuits 20 is adapted to be electrically connected to one of the partitions of the addressable light source, and each of the partitions includes at least one light emitting point, that is, each of the oscillating-up circuits 20 is adapted to be electrically connected to at least one light emitting point, and all of the oscillating-up circuits 20 are connected to the same driving circuit 30, so that there is no difference in circuit design, device parameters, etc. between the driving circuits as occurs in the conventional driving circuit for driving the addressable light source, uniformity of the driving circuit 30 corresponding to each of the partitions electrically connected to each of the control channels can be ensured, and uniformity of lighting intervals when lighting a plurality of the partitions at the same timing can be further ensured, and performance of the laser radar can be improved, for example, ranging accuracy of the laser radar can be improved. Further, by controlling each oscillation boosting circuit 20 by one driving circuit 30, the number of electronic components can be reduced to a certain extent, the area of the circuit board can be reduced, and the cost can be reduced.
It is worth mentioning that there is a conflict between the voltage resistance of the switch integrator 10 and the driving voltage requirement of the addressable light source that is difficult to reconcile. The voltage that the switching integrator 10 can withstand is low, and therefore the input voltage of the addressable boost control circuit 100 is not too high. While the addressable light source requires the oscillating boost circuit 20 to provide it with a higher driving voltage to improve the performance of the lidar.
In this embodiment, the oscillating-boost circuit 20 is capable of breaking through the limitation of its input voltage, providing a voltage higher than the input voltage to the addressable light source under the condition that its input voltage is limited, and maintaining the voltage provided to the addressable light source in a state higher than the input voltage, and providing a stable, higher voltage to the addressable light source. Here, the input voltage of the oscillating boost circuit 20 coincides with the input voltage of the addressable boost control circuit 100.
Specifically, in the embodiment of the present application, the voltage boosting is implemented by the oscillating circuit 21, so that the oscillating circuit 21 can break through the limitation of the input voltage thereof, and provide a higher driving voltage (higher than the input voltage of the addressable boost control circuit 100) for the addressable light source.
Further, the oscillating circuit 21 includes a storage capacitor 213, and the voltage across the storage capacitor 213 changes regularly, and gradually decreases after reaching a maximum value without external factor interference, and finally stabilizes at the input voltage of the addressable boost control circuit 100. In the embodiment of the present application, the voltage across the energy storage capacitor 213 is maintained at a state higher than the input voltage by a specific interference mechanism.
Accordingly, in the embodiment of the present application, each of the oscillation boosting circuits 20 includes an oscillation circuit 21 and a voltage holding unit 22. The oscillating circuit 21 is implemented as an RLC series resonant circuit, and includes a charging resistor 211, a storage inductance 212 electrically connected to the charging resistor 211, and a storage capacitor 213, where the charging resistor 211, the storage inductance 212, and the storage capacitor 213 are connected in series. It should be noted that, in the embodiment of the present application, each of the oscillating-booster circuits 20 shares one charging resistor 211.
Based on resonance principle, when the oscillating boost circuit 20 is in under damping condition and the switch integrator 10 is turned on to power up, the voltage across the energy storage capacitor 213 will be greater than the input voltage, for example, when the input voltage is 100V, the maximum value of the voltage across the energy storage capacitor 213 is greater than 100V.
The boosting capacity of the oscillating circuit 21 is related to the damping coefficient of the oscillating circuit 21, and the maximum voltage across the energy storage capacitor 213 after boosting is the input voltage through the series resonant circuitThe charging resistor 211, the energy storage inductor 212 and the energy storage capacitor 213 can be selected according to actual requirements so that the voltage across the energy storage capacitor 213 reaches an expected value, in a specific example of the present application, the maximum voltage across the energy storage capacitor 213 is 1.5 times the input voltage.
In this embodiment, the voltage holding unit 22 is configured to hold a voltage across the energy storage capacitor 213 of the oscillating circuit 21 at a specific value, where the specific value is close to (less than or equal to) a voltage maximum value of the energy storage capacitor 213 when the oscillating circuit 21 is under an under-damped condition, and is greater than an input voltage value of the boost oscillating circuit 20.
In this embodiment of the present application, the unidirectional conductivity of the switching diode is used to block the channel of the energy storage capacitor 213 for releasing the voltage by using the switching diode with a low reverse junction capacitance as an interference mechanism, and in this way, the voltages across the energy storage capacitor 213 are interfered, so that the voltages across the energy storage capacitor 213 of the oscillating circuit 21 are kept at the specific values. Here, the reverse junction capacitance of the switching diode refers to a capacitance value when the switching diode is reverse biased.
Accordingly, in the embodiment of the present application, the voltage holding unit 22 includes a switching diode 221 electrically connected to the oscillating circuit 20, and the voltage holding unit 22 is electrically connected between the energy storage capacitor 213 and the charging resistor 211, so as to prevent the energy storage capacitor 213 from being reduced after being charged to the voltage between the two ends thereof is maximized, in this way, the voltage between the two ends of the energy storage capacitor 213 is maintained at a higher level. Specifically, the switching diode 221 may be disposed between the charging resistor 211 and other electronic components (e.g., the switching integrator 10, the energy storage inductor 212) between the energy storage capacitor 213 and the charging resistor 211. Accordingly, the switching diode 221 may be connected between the energy storage inductor 212 and the charging resistor 211, or between the energy storage capacitor 213 and the charging resistor 211.
More specifically, in the embodiment of the present application, the charging resistor 211 is connected to a power source for supplying power to the addressable boost control circuit 100, the switch integrator 10 is electrically connected between the charging resistor 211 and the energy storage inductor 212, and the energy storage capacitor 213 is electrically connected between the energy storage inductor 212 and the driving circuit 30. In one specific example of the present application, the switching diode 221 is disposed between the switching integrator 10 and the energy storage inductor 212. In another specific example of the present application, the switching diode 221 is disposed between the energy storage capacitor 213 and the energy storage inductor 212.
It should be noted that, in a variant embodiment of the present application, as shown in fig. 4, the switching diode 221 is disposed between the charging resistor 211 and the switching integrator 10, that is, before the switching integrator 10, so that each oscillating boost circuit 20 can maintain the voltage across the energy storage capacitor 213 to be greater than the input voltage of the addressable boost control circuit 100 through only one switching diode 221. That is, each oscillating boost circuit 20 shares one switching diode 221, and the shared switching diode 221 can maintain the voltage across the storage capacitor 213 of each oscillating boost circuit 20 in a state greater than the input voltage of the addressable boost control circuit 100. In this way, the circuit can be simplified, and when the addressable boost control circuit 100 is applied to a lidar, the overall lidar volume can be reduced while reducing costs.
In this embodiment, the switching diode 221 is implemented as a schottky diode, which is a diode with extremely low reverse junction capacitance, and the schottky diode is a metal-semiconductor device made by using noble metals (gold, silver, aluminum, platinum, etc.) as the positive electrode, using N-type semiconductors as the negative electrode, and using the barrier formed on the contact surface of the two to have rectifying characteristics, so that the reverse junction capacitance of the switching diode 221 is low. Specifically, the ratio between the reverse junction capacitance value of the switching diode 221 and the capacitance value of the storage capacitor 213 is 1% or less. In a specific example of the present application, the reverse junction capacitance value of the switching diode 221 is less than or equal to 2pF, and may be even as low as 1pF. In a variant embodiment of the present application, the switching diode 221 may be implemented as another type of diode, which is not limited to the present application.
In this embodiment of the present application, the reverse junction capacitance value of each switching diode 221 may be set according to the actual requirement, and the reverse capacitance values of the switching diodes 221 in each oscillating boost circuit 20 may be equal or unequal, which is far lower than the capacitance value of the energy storage capacitor 213.
It should be noted that, since the oscillating-up circuit 20 can provide a higher voltage to the addressable light source, the driving current of the addressable light source can be correspondingly increased, so as to increase the optical power of the addressable light source. When the light source module provided with the oscillation boosting circuit 20 is applied to a laser radar, the light source module can improve the detection performance of the laser radar, for example, the detection distance, because the oscillation boosting circuit 20 can improve the optical power of the addressable light source. In addition, the oscillating-up circuit 20 is capable of increasing the driving current of the addressable light source without increasing the pulse width, which is advantageous in various aspects compared to the conventional increasing of the driving current by increasing the pulse width, on the one hand, reducing the electrical power consumption; on the other hand, because the pulse width is not increased, the distance measurement resolution is improved compared with the mode of increasing the pulse width; furthermore, when the light source module provided with the oscillation boosting circuit 20 is applied to a laser radar, the safety of human eyes can be protected to a certain extent.
It is further noted that the oscillating-up circuit 20 is applicable not only to the addressable light source, but also to other light sources requiring a higher operating voltage or current, or other electronic components.
In this embodiment, the addressable boost control circuit 100 sequentially controls the charging process of the energy storage capacitor 213 in the oscillating boost circuit 20 corresponding to the pre-conduction partition through each switch unit of the switch integrator 10, sequentially controls the discharging process of the energy storage capacitor 213 in each oscillating boost circuit 20 through the one-way driving circuit 30, and sequentially lights each partition of the addressable light source in this way. Specifically: the at least two oscillating boost circuits 20 include a first oscillating boost circuit and a second oscillating boost circuit, and the switch integrator 10 includes a first switch unit corresponding to the first oscillating boost circuit and a second switch unit corresponding to the second oscillating boost circuit, respectively. In the process of alternately charging and discharging the at least two oscillating boost circuits 20, after the first oscillating boost circuit is charged, under an external instruction, a first switch unit connected with the first oscillating boost circuit in the switch integrator 10 is switched to a closed state, and then a control switch of the driving circuit 30 is switched to an on state, so that an energy storage capacitor 213 of the first oscillating boost circuit is discharged; then, when the second switch unit in the switch integrator 10 is switched to the on state, the energy storage capacitor 213 in the second oscillating boost circuit enters a charging state, and after the charging is completed, the second switch unit in the switch integrator 10 connected to the second oscillating boost circuit is switched to the off state, and then the control switch of the driving circuit 30 is switched to the on state, so that the energy storage capacitor 213 of the second oscillating boost circuit is discharged, and in this way, the alternate charging and discharging of the energy storage capacitors 213 in the at least two oscillating boost circuits 20 are realized. Here, the first oscillation boosting circuit and the second oscillation boosting circuit are only used for illustrating two different oscillation boosting circuits, and distinguishing one oscillation boosting circuit from the other oscillation boosting circuit does not refer to any two oscillation boosting circuits; likewise, the first and second switching units are not specific to any two switching units.
Correspondingly, the driving circuit 30 is adapted to control the energy storage capacitor of the first oscillating boost circuit to enter the discharging state after the energy storage circuit of the first oscillating boost circuit is charged and the switch switching unit electrically connected with the first oscillating boost circuit is switched to the off state.
The drive circuit 30 comprises a control switch electrically connected to all the oscillating boost circuits 20, the control switch and a switching unit connected to the first oscillating boost circuit being configured to operate in an alternating conductive manner, wherein when the switching unit is in a conductive state and the control switch is in a closed state, the drive circuit 30 and the switch integrator 10 are configured such that the storage capacitor 213 of the first oscillating boost circuit is in a charged state, and when the switching unit is in a closed state and the control switch is in a conductive state, the drive circuit 30 and the switch integrator 10 are configured to discharge the storage capacitor 213 of the first oscillating boost circuit.
In this embodiment, the Switch integrator 10 may be implemented as a Switch chip, and integrated with multiple switching units, and the charging process of the storage capacitor 213 in each of the oscillating boost circuits 20 may be controlled sequentially by switching the states (on/off) of the respective switching units.
The control switch of the driving circuit 30 may be implemented as a GaN field effect transistor, or may be implemented as another type of switch, which is not limited in this application.
It is worth mentioning that when the addressable light source is implemented as a VCSEL type light source, each light emitting point has a P-electrode (i.e. the anode of the light emitting point) and an N-electrode (i.e. the cathode of the light emitting point), which will form a parasitic capacitance parallel to the light emitting point between its P-electrode and N-electrode. In some existing driving schemes for driving VCSEL-type light sources, cathodes of light emitting points of respective segments of the VCSEL-type light source are electrically connected to each other. Since each pre-selected section of the VCSEL-type light source is formed with parasitic capacitances in parallel, each parasitic capacitance forms a parasitic capacitance charging electrical connection channel, which is prone to channel crosstalk. When the storage capacitor 213 in the control channel electrically connected to the preselected section of the VCSEL-type light source is charged, the storage capacitor 213 in the control channel electrically connected to the other section of the VCSEL-type light source will also be charged. Thus, when a preselected sector of the VCSEL-type light source is illuminated, the other sectors are also illuminated.
For example, in one specific example of the present application, the cathodes of the light emitting points of the respective partitions of the VCSEL-type light source are integrally connected such that a common cathode is formed between the respective light emitting points.
In still another specific example of the present application, the cathodes of the light emitting points of the respective sections of the VCSEL-type light source are electrically connected to the same driving circuit 30, and the cathodes of the light emitting points of the respective sections of the VCSEL-type light source are electrically connected to each other.
Accordingly, the present application proposes to provide at least two diode structures electrically connected to at least two of the oscillating boost circuits 20, respectively, to block the charging electrical connection channels between the parasitic capacitances formed by the respective partitions.
In this embodiment of the present application, the diode structure electrically connected to the oscillating boost circuit 20 is disposed between the parasitic capacitance and other oscillating boost circuits 20, and the reverse junction capacitance of the oscillating boost circuit 20 is smaller than the capacitance value of the parasitic capacitance, so that the charging electrical connection channel formed by each parasitic capacitance can be prevented from charging the energy storage capacitor 213 in the control channel electrically connected to the non-preselected partition, thereby avoiding the non-preselected partition from being lit.
Specifically, in the embodiment of the present application, the diode structure is implemented as a schottky diode, and the ratio between the reverse junction capacitance value of the diode structure and the capacitance value of the parasitic capacitance of the light emitting point is 1% or less. In a specific example of the present application, the reverse junction capacitance value of the diode structure is less than or equal to 2pF, and may even be as low as 1pF. In variant embodiments of the present application, the diode structure may be implemented as other types of diodes, which are not limiting of the present application.
In this embodiment of the present application, the reverse junction capacitance value of each diode structure may be set according to the actual requirement, and the reverse capacitance values of the diode structures electrically connected to each oscillating boost circuit 20 may be equal or unequal, which is far lower than the parasitic capacitance value.
In a specific example of the present application, the diode structure is adapted to be electrically connected between a light emitting point and the storage capacitor 213, and the diode structure is adapted to have its positive electrode connected to the positive electrode of the storage capacitor 213 and its negative electrode connected between the positive electrodes (anodes) of the light emitting point. In other specific examples of the present application, the diode structure may be disposed at other locations.
In the present embodiment, the addressable boost control circuit 100 also includes a power supply that provides power to the overall circuitry. The voltage of the power supply is greater than 0V and less than or equal to 100V, and can be used to adjust the energy of the energy storage capacitor 213, thereby adjusting the output power of the addressable light source.
Fig. 3 illustrates one specific example of the addressable boost control circuit 100 in accordance with an embodiment of the present application. In this particular example, the addressable boost control circuit 100 includes: the power supply VIN, the charging resistor RIN, the Switch chip, the switching diode, the diode structure, the energy storage inductor L1, the energy storage capacitor C and the driving circuit.
In this specific example, the Switch chip is electrically connected to the power source VIN, and the Switch chip includes a plurality of Switch units integrated together, each of which is electrically connected to one of the oscillation boosting circuits 20. The Switch chip can be set to sequentially open a plurality of channels according to any sequence through an addressable circuit, or only sequentially open certain channels, so that the energy storage capacitor C is charged.
Each oscillating boost circuit 20 is adapted to be electrically connected to at least one segment of the common cathode VCSEL array DL, each segment comprising at least one luminous point, each segment forming a parasitic capacitance in parallel to the segment. Each oscillation boosting circuit 20 includes an oscillation circuit 21 and a voltage holding unit 22 electrically connected to a switching unit of the Switch chip. The oscillating circuit 21 is an RLC series resonant circuit, and includes a charging resistor RIN, an energy storage inductor L1, and an energy storage capacitor C, where each oscillating boost circuit 20 shares a charging resistor RIN. The voltage holding unit 22 includes a switching diode adapted to be electrically connected between the tank inductor L1 and the switching unit of the Switch chip to maintain the capacitance across the tank capacitor C in a state higher than the input voltage of the oscillating-boost circuit 20 (i.e., the voltage of the power supply VIN). When a certain main selection channel is opened for charging, in the RLC series resonant circuit, the voltage at two ends of the energy storage capacitor C is larger than the input power supply voltage under the underdamping condition based on the resonance principle, and as the RLC series resonant circuit is also connected with a switching diode in series, the reverse junction capacitance of the switching diode is extremely low, the reverse leakage current is extremely low, and when the reverse bias voltage is applied, the voltage at two ends of the energy storage capacitor C can be regarded as being equivalent to open circuit, so that the voltage at two ends of the energy storage capacitor C is kept at the maximum value and hardly reduced. Thereby realizing that a lower input supply voltage can charge the storage capacitor C to a higher voltage.
All oscillating boost circuits 20 are electrically connected to the same driving circuit, which comprises at least one control switch Q1, said control switch Q1 being implemented as a gallium nitride (GaN) field effect transistor.
After the charging of the storage capacitor C of the VCSEL main channel is completed, the single-path driving circuit 30 inputs a high-level ns-level narrow pulse to the GaN field effect transistor through the gate driving control command, and turns on the GaN field effect transistor to discharge, so as to realize the lighting (i.e., on) of the main channel.
Fig. 5 illustrates another specific example of the addressable boost control circuit 100 in accordance with an embodiment of the present application. In this specific example, compared to the addressable boost control circuit 100 illustrated in fig. 3, according to the embodiment of the present application, each oscillating boost circuit 20 adds a diode structure with extremely low reverse junction capacitance between the storage capacitor C and the light emitting point of the common cathode VCSEL array DL, so as to avoid channel crosstalk. Specifically, the cathodes of the VCSEL segments of each channel in the common cathode VCSEL array DL are connected, and since the VCSEL devices of each channel have larger parasitic capacitance, such as a switching diode with very low reverse junction capacitance is not connected in series between the anode of the VCSEL segment of each channel and the storage capacitor C, any other channel is reversely charged by the parasitic capacitance of the VCSEL device itself, so when the driving circuit is turned on, not only the VCSEL segment of the main selected channel but also the VCSEL segment of any other channel emits light, resulting in crosstalk problem.
As can be seen from the foregoing description, the addressable boost control circuit 100 illustrates that the energy storage capacitor 213 of the oscillating boost circuit 20 in the addressable boost control circuit 100 can provide a voltage higher than the input voltage for the light source under a limited input voltage, and maintain the voltage across the energy storage capacitor 213 in a state higher than the input voltage, so as to provide a stable, higher voltage for the light source.
Based on the driving circuit 30 shown in fig. 5, energy storage circuits are respectively arranged on a plurality of channels, so that the length of a wire of the addressable light source is lengthened, the inductance of the periphery of the addressable light source is increased, the increase of the inductance can be influenced by the voltage-resistant limitation of the components of the periphery of the laser radar, and the laser radar cannot meet the requirement of high-power output.
In order to solve the technical problems, the application proposes to integrate the diode structure with the addressable light source through a process to reduce the length of a wire, thereby reducing the inductance, increasing the output power of the addressable light source and reducing the volume of the laser radar.
Specifically, the addressable light source is formed by a plurality of light emitting regions, and each light emitting region includes, from top to bottom, a first bragg reflector 51, a confinement layer 52, an active region 53, and a second bragg reflector 54, which are sequentially formed by at least one VCSEL light emitter 500. Wherein the first bragg mirror 51 and the second bragg mirror 54 are a system of alternating layers of different refractive index materials forming a distributed bragg mirror (Distributed Bragg Reflector). The choice of material for the alternating layers depends on the operating wavelength of the laser light desired. For example, in one specific example of the present application, the first and second bragg mirrors 51 and 54 may be formed of alternating layers of high aluminum content AlGaAs and low aluminum content AlGaAs. It is worth mentioning that the optical thickness of the alternating layers is equal to or approximately equal to 1/4 times the laser operating wavelength lambda. In particular, in the present embodiment, the first Bragg reflector 51 is a P-doped distributed Bragg reflector, i.e., a P-DBR, and the second Bragg reflector 54 is an N-doped distributed Bragg reflector, i.e., an N-DBR.
In order to limit the light exit aperture of the VCSEL emitter, the confinement layer 52 of the VCSEL emitter of the embodiments of the present application is an oxidation confinement layer 52 located above the active region 53, the oxidation confinement layer 52 having an oxidation opening 521 for limiting the light exit aperture of the VCSEL emitter 500. In particular, the oxidation limiting layer 52 is formed on the bottom region of the first bragg mirror 51 by an oxidation process, that is, the oxidation layer is formed by oxidizing a part of the material of the bottom region of the first bragg mirror 51.
The active region 53 is sandwiched between the first bragg reflector 51 and the second bragg reflector 54 to form a resonant cavity, wherein photons are repeatedly amplified by back and forth reflection within the resonant cavity after being excited to form laser oscillation, thereby forming laser light. It will be appreciated by those of ordinary skill in the art that the direction of the laser light emission can be selectively controlled by the configuration and design of the first and second bragg mirrors 51, 54, for example, from the first bragg mirror 51 (i.e., from the top surface of the VCSEL laser) or from the second bragg mirror 54 (i.e., from the bottom surface of the VCSEL laser). In the embodiment of the present application, the first bragg reflector 51 and the second bragg reflector 54 are designed such that, after the laser light oscillates in the resonant cavity, the laser light exits from the first bragg reflector 51, that is, the VCSEL laser is a semiconductor laser with front side light.
In the embodiment of the present application, the first bragg reflector 51, the confinement layer 52, the active region 53 and the second bragg reflector 54 form an epitaxial structure of the VCSEL light emitter. The VCSEL light 500 further includes a first electrode 55 (i.e., anode or positive electrode) and a second electrode 56 (i.e., cathode or negative electrode) on the epitaxial structure, wherein the first electrode 55 is formed on the upper surface of the epitaxial structure and the second electrode 56 is formed on the lower surface of the epitaxial structure.
More specifically, in the embodiment of the present application, the first electrode 55 is a noble metal electrode, and the noble metal is gold, silver, aluminum, platinum, or the like, and the first electrode 55 is sputtered, evaporated, chemically plated, or electroplated onto the upper end surface of the first bragg reflector 51, thereby forming a P electrode with an epitaxial structure. The second electrode 56 is located on the lower end surface of the second bragg reflector 54, and the second electrode 56 is an N-type semiconductor, and the N-type semiconductor is SiN; the second bragg mirror 54 is grown to the second electrode 56 by a growth process.
In addition, the driving circuit 30 includes a diode structure 31 and an electrical lead 32. Wherein the diode structure 31 is located beside the outermost VCSEL emitter 500 of the plurality of VCSEL emitters, i.e. the diode structure 31 is adjacent to the VCSEL emitter 500 with a certain spacing.
The diode structure 31 is a schottky diode, and the diode structure 31 includes an N-type semiconductor wafer 311, a cathode metal electrode 312, and an anode metal electrode 313; wherein the N-type semiconductor wafer 311 is N-type silicon. The cathode metal electrode 312 is in ohmic contact with the upper end surface of the N-type semiconductor wafer 311. Wherein the cathode metal electrode 312 is plated onto the upper end surface of the N-type semiconductor wafer 311 by a process. The anode metal electrode 313 is in contact with the other end of the upper end surface of the N-type semiconductor wafer 311, and the anode metal electrode 313 is plated on the N-type semiconductor wafer 311 by a process. Wherein the above-mentioned processes are sputtering, evaporation, chemical plating, electroplating, etc. The cathode metal electrode 312 and the anode metal electrode 313 are both gold (Au) metals.
As shown in fig. 1, the first electrode 55 and the cathode metal electrode 312 are connected by the above-mentioned electric wire 32, the electric wire 32 is a gold wire, one end of the electric wire 32 is connected to the first electrode 55, and the other end is connected to the cathode metal electrode 312. As shown in fig. 2, the electrical lead 32 is integrated onto the sidewall of the VCSEL illuminant by sputtering, vapor deposition, chemical plating, electroplating, etc., and the electrical lead 32 is integrally formed with the first electrode 55 by a process, and the electrical lead 32 is integrally formed with the cathode metal electrode 312 by a process. The electrical conductor 32 is thus formed in a flat, vertical state without a bent section.
In addition, in order to avoid unnecessary influence of the electrical leads on the VCSEL emitter 500 and the diode structure 31, an insulating protective layer 60 is integrated on the VCSEL emitter 500 by means of a process, the insulating protective layer 60 being a silicon dioxide layer, and the insulating protective layer 60 being grown by means of a process, and the electrical leads 32 being integrated on the insulating protective layer 60.
The addressable VCSEL light emitter 500 further comprises a substrate structure 57, the substrate structure 57 being an important component of the integrated whole VCSEL light emitter 500, the substrate structure 57 comprising a substrate layer 571 and a neutral zone layer 572, the substrate layer 571 being a gallium arsenide substrate and the neutral zone layer 572 being a gallium arsenide layer, the neutral zone layer 572 being integrated into an upper cross section of the substrate layer. The VCSEL light 500 is integrated onto the neutral region layer 572, and the N-type semiconductor die 311 described above is also integrated onto the neutral region layer 572.
It is noted that in the apparatus and method of the present application, components or steps in different embodiments may be disassembled and/or assembled without departing from the principles of the present invention. Such decomposition and/or recombination should be considered to be included within the inventive concepts of the present application.
The basic principles of the present application have been described above in connection with specific embodiments, however, it should be noted that the advantages, benefits, effects, etc. mentioned in the present application are merely examples and not limiting, and these advantages, benefits, effects, etc. are not to be considered as necessarily possessed by the various embodiments of the present application. Furthermore, the specific details disclosed herein are for purposes of illustration and understanding only, and are not intended to be limiting, as the application is not intended to be limited to the details disclosed herein as such.

Claims (12)

1. A high power addressable VCSEL chip comprising:
a VCSEL light emitting unit for emitting laser under current excitation, the VCSEL light emitting unit including at least one VCSEL light emitting point;
an addressable circuit structure comprising a diode structure corresponding to the VCSEL emission point, the diode structure being connected to the VCSEL emission point by an electrical conductor;
and the substrate structure is positioned below the VCSEL light emitting unit and the diode structure, and the VCSEL light emitting unit and the diode structure are integrated on the substrate structure.
2. The high power addressable VCSEL chip of claim 1, wherein the substrate structure comprises:
A substrate layer;
a neutral region layer integrated on the substrate layer, the VCSEL light emitting cells and the diode structure being mechanically integrated on the neutral region layer.
3. A high power addressable VCSEL chip as claimed in claim 1, wherein the electrical leads are formed by process attachment to the VCSEL light emitting cells.
4. A high power addressable VCSEL chip as claimed in claim 3, wherein the process is one of an evaporation process, a sputtering process and an electroplating process.
5. A high power addressable VCSEL chip as claimed in claim 3, wherein an insulating protective layer is provided between the electrical conductors and the VCSEL light emitting cells.
6. A high power addressable VCSEL chip as claimed in claim 1, wherein the diode structure is a schottky diode.
7. The high power addressable VCSEL chip of claim 6, wherein the diode structure comprises:
a semiconductor;
and the metal conductor is in ohmic contact with the semiconductor, and the electric wire is connected with the metal conductor.
8. A high power addressable VCSEL chip as claimed in claim 5, wherein a gap is provided between the VCSEL light emitting cell and the diode structure, the insulating layer portion being located within the gap.
9. A high power addressable VCSEL chip as claimed in claim 1, wherein the electrical leads are gold wires.
10. A high power addressable VCSEL chip as claimed in claim 2, wherein the substrate layer is a gallium arsenide substrate.
11. A high power addressable VCSEL chip as claimed in claim 2, wherein the neutral zone layer is a gallium arsenide layer.
12. A lidar, comprising:
a laser projection device for projecting laser light, wherein the laser projection device comprises a high power addressable VCSEL chip according to any of claims 1 to 11;
a laser receiving device for receiving a laser signal; and
a processor communicatively coupled to the laser projection device and the laser receiving device.
CN202311001812.3A 2023-08-10 2023-08-10 High-power addressable VCSEL chip and laser radar Pending CN117559217A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202311001812.3A CN117559217A (en) 2023-08-10 2023-08-10 High-power addressable VCSEL chip and laser radar

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202311001812.3A CN117559217A (en) 2023-08-10 2023-08-10 High-power addressable VCSEL chip and laser radar

Publications (1)

Publication Number Publication Date
CN117559217A true CN117559217A (en) 2024-02-13

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Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
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