CN117613669A - Semiconductor laser, control method thereof and laser device - Google Patents
Semiconductor laser, control method thereof and laser device Download PDFInfo
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- CN117613669A CN117613669A CN202311628044.4A CN202311628044A CN117613669A CN 117613669 A CN117613669 A CN 117613669A CN 202311628044 A CN202311628044 A CN 202311628044A CN 117613669 A CN117613669 A CN 117613669A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 78
- 238000000034 method Methods 0.000 title claims abstract description 19
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- 239000007924 injection Substances 0.000 claims abstract description 97
- 238000007667 floating Methods 0.000 claims abstract description 68
- 210000000746 body region Anatomy 0.000 claims abstract description 17
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 17
- 230000003647 oxidation Effects 0.000 claims abstract description 16
- 239000000758 substrate Substances 0.000 claims abstract description 11
- 239000007943 implant Substances 0.000 claims description 17
- 238000002513 implantation Methods 0.000 claims description 17
- 230000005669 field effect Effects 0.000 claims description 13
- 230000005641 tunneling Effects 0.000 claims description 9
- 239000004020 conductor Substances 0.000 claims description 4
- 238000004891 communication Methods 0.000 claims description 2
- 238000004519 manufacturing process Methods 0.000 abstract description 6
- 238000010586 diagram Methods 0.000 description 9
- 230000000694 effects Effects 0.000 description 8
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- 239000007769 metal material Substances 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- 238000013461 design Methods 0.000 description 3
- 239000002019 doping agent Substances 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- 230000017525 heat dissipation Effects 0.000 description 3
- 238000005286 illumination Methods 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 2
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- KXNLCSXBJCPWGL-UHFFFAOYSA-N [Ga].[As].[In] Chemical compound [Ga].[As].[In] KXNLCSXBJCPWGL-UHFFFAOYSA-N 0.000 description 2
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- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- RNQKDQAVIXDKAG-UHFFFAOYSA-N aluminum gallium Chemical compound [Al].[Ga] RNQKDQAVIXDKAG-UHFFFAOYSA-N 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 230000004313 glare Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/10—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
- H01S5/12—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region the resonator having a periodic structure, e.g. in distributed feedback [DFB] lasers
- H01S5/125—Distributed Bragg reflector [DBR] lasers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/06—Arrangements for controlling the laser output parameters, e.g. by operating on the active medium
- H01S5/0607—Arrangements for controlling the laser output parameters, e.g. by operating on the active medium by varying physical parameters other than the potential of the electrodes, e.g. by an electric or magnetic field, mechanical deformation, pressure, light, temperature
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/10—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
- H01S5/18—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities
- H01S5/183—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
- H01S5/18308—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL] having a special structure for lateral current or light confinement
- H01S5/18322—Position of the structure
- H01S5/18327—Structure being part of a DBR
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Optics & Photonics (AREA)
- Semiconductor Lasers (AREA)
Abstract
The embodiment of the invention provides a semiconductor laser, a control method thereof and laser equipment, wherein the semiconductor laser comprises a plurality of light emitting units, each light emitting unit comprises a substrate, a first electrode, a second electrode, a bottom DBR layer, an active layer, an oxide layer, a top DBR layer and a floating gate structure layer; an oxidation limiting hole is formed on the oxidation layer; the top DBR layer includes: a body region; the first injection region is arranged on one side of the main body region far away from the active layer; a second injection region located at an end of the top DBR layer remote from the active layer and surrounded by the first injection region; orthographic projection of the second injection region on the oxide layer surrounds the oxidation limiting hole; the floating gate structure layer is arranged on the surface of the top DBR layer far away from the active layer and is electrically connected with the first injection region; wherein the first electrode is electrically connected to the substrate; the second electrode is electrically connected with the second injection region. The semiconductor laser provided by the embodiment of the invention has the advantages that the light-emitting unit can be edited, the editing can be selected according to different requirements, and the manufacturing is more convenient.
Description
Technical Field
The present invention relates to the field of semiconductor technologies, and in particular, to a semiconductor laser, a control method thereof, and a laser device.
Background
VCSEL (Vertical-Cavity Surface Emitting Laser) is a Laser with a light Emitting direction perpendicular to the Surface of a resonant Cavity, has the advantages of small threshold current, small divergence angle, circular symmetry of light spots, easy two-dimensional integration and the like, and is widely applied, and the position of a lighting window on the same VCSEL chip is fixed after the VCSEL is designed in the prior art, so that differentiated operation is required according to different requirements of different customers before the VCSEL is designed and manufactured. However, different customers have different requirements on the light type of the chip, whether the chip is addressable or not, and the like, so that the manufacturing and developing costs are high when special development is performed according to different customer requirements.
Disclosure of Invention
Therefore, in order to overcome the problem of high manufacturing and research costs caused by the fact that the position of the lighting window of the VCSEL is fixed after the design is completed in the prior art, the embodiment of the invention provides a semiconductor laser, wherein the light emitting unit of the semiconductor laser can be edited, and the semiconductor laser can be selectively edited according to different requirements, so that the semiconductor laser is more convenient to manufacture.
An embodiment of the present invention provides a semiconductor laser including a plurality of light emitting units, each of the light emitting units including a first electrode, a second electrode, a substrate, and a bottom DBR layer, an active layer, a top DBR layer, and a floating gate structure layer sequentially stacked on the substrate, one of the bottom DBR layer and the top DBR layer being a P-type DBR layer, each of the light emitting units further including an oxide layer between the active layer and the P-type DBR layer, the oxide layer having an oxide confinement hole formed thereon; the doping type of the bottom DBR layer is a first doping type, and the top DBR layer includes: the doping type of the body region is a second doping type; the first injection region is arranged on one side of the main body region, which is far away from the active layer, and the doping type of the first injection region is the first doping type; a second injection region located at an end of the top DBR layer remote from the active layer and surrounded by the first injection region; the doping type of the second injection region is the second doping type; orthographic projection of the second injection region on the oxide layer surrounds the oxidation limiting hole; the floating gate structure layer is arranged on the surface of the top DBR layer far away from the active layer, and the orthographic projection of the floating gate structure layer on the top DBR layer is surrounded by the second injection region; the floating gate structure layer is electrically connected with the first injection region; wherein the first electrode of each of the light emitting units is electrically connected to the substrate; the second electrode is electrically connected with the second injection region; the semiconductor laser further includes reset electrodes electrically connected to the first injection regions in the plurality of light emitting cells, respectively.
The embodiment of the invention also provides a control method of the semiconductor laser, which is based on the semiconductor laser described in the previous embodiment, and comprises the following steps: editing: applying a first voltage to the floating gate structure layer of a target editing light-emitting unit in the plurality of light-emitting units to obtain an edited light-emitting unit; and (3) a lighting step: applying a second voltage between a first electrode and a second electrode of the plurality of light emitting units, and applying a third voltage to floating gate structure layers of the plurality of light emitting units, so that light emitting units of the plurality of light emitting units except the edited light emitting unit emit light; the third voltage is less than the first voltage.
The embodiment of the invention also provides laser equipment comprising the semiconductor laser described in the previous embodiment.
The above embodiments of the present invention have at least one or more of the following advantages: through the special design of top DBR layer, form first injection zone and second injection zone in top DBR layer, the accessible is to floating gate structure application voltage in order to produce tunneling effect, realize the editor to specific light emitting unit, make the light emitting unit that is edited can not be lighted by normal, the light emitting unit that is not edited can be lighted by normal, realize on same semiconductor laser accessible edit specific light emitting unit realize the luminous effect in different regions, consequently need not to design according to different customer demands, can reduce manufacturing production cost.
Drawings
The following detailed description of specific embodiments of the invention refers to the accompanying drawings.
Fig. 1 is a schematic diagram of a light emitting unit in a semiconductor laser according to an embodiment of the present invention.
Fig. 2 is a schematic structural diagram of an embodiment of a light emitting unit in the semiconductor laser shown in fig. 1.
Fig. 3 is a schematic structural diagram of another embodiment of a light emitting unit in the semiconductor laser shown in fig. 1.
Fig. 4 is a schematic diagram illustrating a principle of an editing process of one light emitting unit of the semiconductor laser shown in fig. 2.
Fig. 5 is a schematic diagram illustrating the working principle of an edited light emitting unit of the semiconductor laser shown in fig. 2.
Fig. 6 is a schematic diagram illustrating the operation of an unedited light emitting unit in the semiconductor laser of fig. 2.
Fig. 7 is a schematic diagram illustrating a resetting process of an edited light emitting unit of the semiconductor laser shown in fig. 2.
Fig. 8 is a schematic top view of a semiconductor laser according to an embodiment of the present invention.
Fig. 9 is an enlarged view of a part of the area in fig. 8.
Fig. 10 is a schematic view of section B-B of fig. 9.
Fig. 11 is a schematic structural diagram of a light emitting unit of a semiconductor laser partial region according to an embodiment of the present invention from a top DBR layer.
[ reference numerals description ]
100: a semiconductor laser; 101: a light-emitting region; 102: a light emitting unit; 103: a data line; 104: a scanning line; 105: a second insulating layer; 10: a bottom DBR layer; 20: an active layer; 30: a top DBR layer; 31: a body region; 32: a first implant region; 33: a second implant region; 34: a field effect tube region; 341: a third implant region; 342: a fourth implant region; 343: a fifth implant region; 40: a floating gate structure; 41: a tunneling layer; 42: a floating gate layer; 43: a first insulating layer; 44: a gate electrode; 50: a reset electrode; 60: a first electrode; 70: a second electrode; 80: an oxide layer; 81: oxidation limiting pores.
Detailed Description
In order that the above objects, features and advantages of the invention will be readily understood, a more particular description of the invention will be rendered by reference to the appended drawings.
In order that those skilled in the art will better understand the technical solutions of the present invention, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and the claims of the present invention and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the terms so used are interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
It should be further noted that the division of the embodiments in the present invention is only for convenience of description, and should not be construed as a specific limitation, and features in the various embodiments may be combined and mutually referenced without contradiction.
One embodiment of the present invention provides a semiconductor laser 100, the semiconductor laser 100 including a plurality of light emitting units 102, each light emitting unit 102 having a light emitting region 101. Each light emitting unit 102 includes a first electrode 60, a second electrode 70, a substrate 90, and a bottom DBR layer 10, an active layer 20, a top DBR layer 30, and a floating gate structure layer 40 sequentially stacked on the substrate 90. One of the bottom DBR layer 10 and the top DBR layer 30 is a P-type DBR layer, and each light emitting unit 102 further includes an oxide layer 80 between the active layer 20 and the P-type DBR layer, and an oxidation restricting hole 81 is formed on the oxide layer 80, the oxidation restricting hole 81 corresponding to the light emitting region 101. The doping type of the bottom DBR layer 10 is a first doping type. In each light emitting unit 102, the top DBR layer 30 includes: a body region 31, a first implanted region 32 and a second implanted region 33.
The body region 31 is doped to a second doping type. The first implant region 32 is disposed on a side of the body region 31 remote from the active layer 20. The doping type of the first implant region 32 is a first doping type. The second injection region 33 is located at an end of the top DBR layer 30 remote from the active layer 20 and is surrounded by the first injection region 32. The doping type of the second implantation region 33 is the second doping type, and the orthographic projection of the second implantation region 33 on the oxide layer 80 surrounds the oxidation limiting hole 81. I.e. the second injection zone 33 surrounds the light exit zone 101.
The floating gate structure layer 40 is disposed on a surface of the top DBR layer 30 remote from the active layer 20, and an orthographic projection of the floating gate structure layer 40 on the top DBR layer 30 is surrounded by the second injection region 33, and the floating gate structure layer 40 is electrically connected to the first injection region 32.
In each light emitting cell 102, the first electrode 60 is electrically connected to the substrate 90, and the second electrode 70 is electrically connected to the second injection region 33. The plurality of light emitting units 102 may share the first electrode 60. The second electrodes 70 of the plurality of light emitting cells 102 may be connected through a common line.
Wherein the semiconductor laser 100 further comprises reset electrodes 50, the reset electrodes 50 being electrically connected to the first injection regions 32 within the plurality of light emitting cells 102, respectively.
Wherein the oxidation limiting hole 81 on the oxide layer 80 corresponds to the light emitting region 101 of the light emitting unit 102. The sizes of the oxidation limiting holes 81 in different light emitting units 102 may be different, and the sizes of the different light emitting regions 101, that is, the different spot sizes, may be realized by controlling the sizes of the oxidation limiting holes 81.
The bottom DBR layer 10 and the top DBR layer 30 are respectively DBR (Distributed Bragg Reflector ) structures with different doping types, for example, aluminum gallium arsenic materials with different aluminum compositions can be alternatively laminated. For example, the first doping type is N-type doping and the second doping type is P-type doping. That is, the bottom DBR layer 10 is an N-type DBR layer, and the top DBR layer 30 is a P-type DBR layer. Or the first doping type is P-type doping, and the second doping type is N-type doping. Namely, the bottom DBR layer 10 is a P-type DBR layer, and the top DBR layer 30 is an N-type DBR layer. When the bottom DBR layer 10 is a P-type DBR layer, the oxide layer 80 is located between the bottom DBR layer 10 and the active layer 20; when the top DBR layer 30 is a P-type DBR layer, the oxide layer 80 is located between the top DBR layer 30 and the active layer 20. In fig. 1 to 3 and 10, the top DBR layer 30 is exemplified as a P-type DBR layer. The first electrode 60 corresponds to the type of the bottom DBR layer 10, the second electrode 70 corresponds to the type of the top DBR layer 30, and the reset electrode 50 corresponds to the type of the first injection region 32. The bottom DBR layer 10 is an N-type DBR layer, and the first electrode 60 is an N-electrode and the second electrode 70 is a P-electrode when the top DBR layer 30 is a P-type DBR layer. The bottom DBR layer 10 is a P-type DBR layer, and when the top DBR layer 30 is an N-type DBR layer, the first electrode 60 is a P-electrode and the second electrode 70 is an N-electrode. The material of the N electrode may be a metal material such as Au (gold), ge (germanium), ni (nickel), or the like. The material of the P electrode may be a metal material such as Ti (titanium), pt (platinum), or Au. The reset electrode 50 may be selected from the same type of metal material as the first electrode 60.
The active layer 20 may be called a multiple quantum well layer, and may be made of various materials according to emission wavelength, for example, indium gallium arsenide, gallium arsenide phosphide, indium gallium arsenide phosphide, or the like.
The first injection region 32 and the second injection region 33 are formed by, for example, ion implantation in the top DBR layer 30, and the doping type of the first injection region 32 is the same as the doping type of the bottom DBR layer 10, and is the first doping type. For example, the bottom DBR layer 10 is an N-type DBR layer, the first injection region 32 is N-type doped, and specifically the first injection region 32 is an N-type lightly doped region. Or the bottom DBR layer 10 is a P-type DBR layer, the first injection region 32 is a P-type dopant, and specifically the first injection region 32 is a P-type lightly doped region.
The doping type of the second implantation region 33 is opposite to that of the first implantation region 32, and the second implantation region 33 is P-type doped when the first doping type is N-type doped, and the second implantation region 33 is a P-type heavily doped region. The first doped region 33 is doped with a P-type dopant, and the second doped region 33 is doped with an N-type dopant.
In one embodiment, the bottom DBR layer 10 is an N-type DBR layer, the top DBR layer 30 is a P-type DBR layer, and the first injection region 32 is an N-type lightly doped region (N - ) The second implantation region 33 is a P-type heavily doped region (P + )。
In another embodiment, the bottom DBR layer 10 is a P-type DBR layer, the top DBR layer 30 is an N-type DBR layer, and the first injection region 32 is a P-type lightly doped region (P - ) The second implantation region 33 is an N-type heavily doped region (N + )。
Wherein "heavily doped" means, for example, that the doping concentration (number of impurity atoms per cubic centimeter) is 1E+18 to 1E+19/cm 3 "lightly doped" means, for example, that the doping concentration is 1E+14 to 1E+15/cm 3 . The doping element of the first implanted region 32 and the second implanted region 33 is, for example, carbon, or may be other trivalent or pentavalent elements.
The first injection region 32 includes, for example, an approximately circular (projection shape at the bottom DBR layer 10) first sub-region 321 corresponding to the light-exiting region 101, where the first sub-region 321 corresponds to the light-exiting region 101 and means that the orthographic projection of the first sub-region 321 on the oxide layer 80 covers the oxidation limiting aperture 81. The second injection region 33 is, for example, an annular (projection shape at the bottom DBR layer 10) region surrounding the first sub-region 321, although the second injection region 33 may not be a complete annular, for example, the second injection region 33 may be a "C" shaped region surrounding one half a week, three quarters of a week, or the like of the first sub-region 321.
The floating gate structure layer 40 can capture and store electrons, compared to a normal gate structure, and electrons are not lost even after power is turned off. The conductive state of the first electrode 60 and the second electrode 70 may be controlled by varying the potential of the floating gate structure 40. The floating gate structure layer 40 may refer to a gate structure in a floating gate transistor.
In the present embodiment, by forming the first injection region 32 and the second injection region 33 in the top DBR layer 30, and the first injection region 32 electrically connects the floating gate structure layer 40, holes can be tunneled into the floating gate structure layer 40 at a first voltage by applying the first voltage to the floating gate structure layer 40 of a target editing light emitting unit among the plurality of light emitting units 102, and when the first voltage is removed, holes are trapped in the floating gate structure layer 40, editing of the target editing light emitting unit is completed, and the target editing light emitting unit is changed to a post-editing light emitting unit. Specifically, when the first voltage is applied to the floating gate structure layer 40, a first voltage difference is formed between the floating gate structure layer 40 and the reset electrode 50, for example, the potential of the floating gate structure layer 40 is-20V, the potential of the reset electrode 50 is 0V, and the first voltage difference is-20V, which may also be referred to as applying a voltage of-20V to the floating gate structure layer 40.
When a second voltage is applied between the first electrode 60 and the second electrode 70 of a certain first light emitting unit 102, and a third voltage is applied to the floating gate structure layer 40, and the third voltage is lower than the first voltage, for example, the third voltage is-10V, if the light emitting unit 102 is an unedited light emitting unit, holes may form a first inversion layer in the first sub-region 321 of the first injection region 32, and current conduction between the first electrode 60 and the second electrode 70 may be achieved, and the light emitting unit 102 may be lit to emit light from the light emitting region 101. If the light emitting unit 102 is an edited light emitting unit, the holes in the first sub-region 321 are repelled by the holes in the floating gate structure layer 40, so that the first inversion layer cannot be formed, and the current between the first electrode 60 and the second electrode 70 is not conducted, so that the light emitting unit cannot be lighted. Wherein a third voltage is applied to the floating gate structure layer 40, i.e. a third voltage difference is formed between the floating gate structure layer 40 and the reset electrode 50, e.g. the potential of the floating gate structure layer 40 is-10V, the potential of the reset electrode 50 is 0V, the third voltage difference is-10V, wherein a third voltage lower than the first voltage means that the absolute value of the third voltage difference is smaller than the absolute value of the first voltage difference.
The structure of the semiconductor laser 100 provided in this embodiment may further realize resetting of the edited light emitting units, for example, a fourth voltage is applied to the floating gate structure layer 40 of any one edited light emitting unit, the fourth voltage is opposite to the first voltage, for example, the potential of the floating gate structure layer 40 is 20V, the potential of the reset electrode 50 is 0V, and the voltage difference between the floating gate structure layer 40 and the reset electrode 50 is 20V, so that holes trapped in the floating gate structure layer 40 are sucked out, and resetting of the edited light emitting unit 102 is completed. When a second voltage is applied between the first electrode 60 and the second electrode 70 of the reset light emitting unit 102 and a third voltage is applied to the floating gate structure layer 40, since holes in the floating gate structure layer 40 are sucked out, an inversion layer can be normally formed in the first sub-region 321, and the first electrode 60 and the second electrode 70 are conducted, so that the reset light emitting unit 102 can emit light normally.
Therefore, with the above structure of the semiconductor laser 100 provided in this embodiment, the plurality of light emitting units 102 can be edited by applying the first voltage to the floating gate structure layer 40, the edited light emitting units cannot be lightened, and the light emitting units 102 that are not edited can be lightened normally, so that the produced semiconductor laser 100 can edit specific light emitting units in the plurality of light emitting units 102 according to different requirements, and the same semiconductor laser 100 can have different effects. And the edited light-emitting units can be reset by applying a fourth voltage to the floating gate structure layer 40, so that repeated editing of a plurality of light-emitting units 102 in the semiconductor laser 100 can be realized, namely, different light-emitting effects can be realized in the process of resetting and editing after editing of the same semiconductor laser 100, and the use is more flexible and convenient.
In a specific embodiment, referring to fig. 2, the floating gate structure layer 40 includes a tunneling layer 41, a floating gate layer 42, a first insulating layer 43, and a gate electrode 44 sequentially stacked on the top DBR layer 30. Where the tunneling layer 41 uses, for example, thin (thickness in the lamination direction of 80-120 nm) intrinsic GaAS (gallium arsenide) in order to achieve tunneling effect. When the first doping type is N-type and the second doping type is P-type, the floating gate layer 42 is, for example, P-type lightly doped GaAS, and the thickness of the floating gate layer 42 in the stacking direction is, for example, 200 to 300nm. The first insulating layer 43 is, for example, siN (silicon nitride) material, and the thickness of the first insulating layer 43 in the lamination direction is, for example, 100 to 200nm. The gate electrode 44 is a conductive material, and the thickness of the gate electrode 44 in the stacking direction is 300 to 500nm, for example.
In some embodiments, the gate electrode 44 is made of a transparent conductive material, such as ITO (indium tin oxide), to ensure that light is emitted from the transparent gate electrode 44. Alternatively, referring to fig. 3, the floating gate structure layer 40 including the gate electrode 44 has a ring structure, and a through hole corresponding to the light emitting region 101 is formed in the ring structure, so as to ensure that light can exit through the through hole, and then the gate electrode 44 may also be made of a metal conductive material, and the gate electrode 44 may be made of a metal material of the same type as the material of the first electrode 60. Alternatively, the semiconductor laser 100 may be configured to have a back light emitting structure, that is, light is emitted from one side of the bottom DBR layer 10, and a through hole corresponding to the light emitting region 101 (or the oxidation limiting hole 81) may be formed in the corresponding first electrode 60 structure.
Specifically, referring to fig. 4, when a first voltage is applied to the floating gate structure layer 40, that is, when the first voltage satisfies the energy required for holes to pass through the tunneling layer 41, holes pass through the tunneling layer 41 and enter the floating gate layer 42, holes cannot continue to move due to the insulating layer 43, and when the first voltage is removed, holes cannot pass through the tunneling layer 41 and are trapped in the floating gate layer 42, thereby completing editing of the light emitting unit 102.
Referring to fig. 5, when a second voltage is applied between the first electrode 60 and the second electrode 70 of the edited light emitting cell and a third voltage is applied to the gate electrode 44 of the floating gate structure layer 40, holes of the first sub-region 321 are repelled by holes in the floating gate layer 42 to fail to form a first inversion layer, and a current between the first electrode 60 and the second electrode 70 is not conducted to be lighted.
Referring to fig. 6, when a second voltage is applied between the first electrode 60 and the second electrode 70 of the unedited light emitting cell, which may be lit, and a third voltage is applied to the floating gate structure layer 40, a first inversion layer may be formed at the first sub-region 321 of the first injection region 32. The specific value of the first voltage may be selected according to the actual material, thickness, doping concentration, etc. of each material layer.
Referring to fig. 7, when the floating gate structure layer 40 of the post-editing light emitting unit 102 applies the fourth voltage, holes trapped in the floating gate structure layer 40 are sucked out, and the reset of the post-editing light emitting unit 102 is completed.
In some embodiments, body region 31 has a raised portion 311 and a recessed portion 312 surrounding raised portion 311. The protruding portion 311 protrudes on the side close to the floating gate structure layer 40 on the self-oxidation limiting hole 81, that is, the protruding portion 311 is located in the light emitting region 101. Wherein the distance between the protrusion 311 and the surface of the top DBR layer 30 away from the active layer 20 is H1 (see fig. 2), and H1 is, for example, 3 to 5 micrometers. The distance between the concave portion 321 and the surface of the top DBR layer 30 away from the active layer 20 is H2 (see fig. 2), and H2 is, for example, 10 to 15 micrometers. The effect of forming the first inversion layer in the first sub-region 321 can be ensured by providing the protruding portion 311 so that the light emitting cells 102 which are not edited can be normally lighted.
In some embodiments, the first injection regions 32 of the plurality of light emitting cells 102 are in communication with each other, and the reset electrode 50 may be disposed on a surface of the first injection region 32 of any one of the light emitting cells 102 remote from the body region 31. Editing and resetting of all the light emitting cells 102 can be achieved by providing only one reset electrode 50.
In some embodiments, referring to fig. 10 and 11, in each of the light emitting units 102, the top DBR layer 30 further includes a field effect region 34, the field effect region 34 is disposed at a side of the body region 31 remote from the active layer 20, and the field effect region 34 is isolated from the first injection region 32 and the second injection region 33, respectively. Specifically, the second implanted region 33 is surrounded by the first implanted region 32, and the field effect region 34 is isolated from the second implanted region 33 by the body region 31. The field effect tube 34 includes a third implantation region 341, and a fourth implantation region 342 and a fifth implantation region 343 disposed on opposite sides of the third implantation region 341, wherein the doping type of the third implantation region 341 is the second doping type, and the doping type of the fourth implantation region 342 and the fifth implantation region 343 is the first doping type. Wherein the gate electrode 44 is electrically connected to the fifth implant region 343. Wherein for example the first doping type is N-type and the second doping type is P-type. In this embodiment, by disposing the field effect tube region 34 in each light emitting unit 102 and electrically connecting the field effect tube region 34 through the gate electrode 44, independent editing and control of the plurality of light emitting units 102 can be achieved by using the field effect tube region 34 as a switch.
More specifically, referring to fig. 8, a plurality of light emitting units are arranged in an array of a plurality of rows and columns. The semiconductor laser 100 includes a plurality of rows of data lines 103 (which may also be referred to as data lines), each row of data lines 103 being connected to a fourth injection region 342 of a row of light emitting cells 102, respectively, in conjunction with fig. 9 and 10. The semiconductor laser further includes a plurality of columns of scan lines 104 (which may also be referred to as gate lines), each column of scan lines 104 being connected to a side of the third injection region 341 of one column of light emitting cells 102, which is away from the active layer 20, and the semiconductor laser 100 further includes a second insulating layer 105 between the scan lines 104 and the third injection region 341, and the gate electrode 44 of each light emitting cell 102 is electrically connected to the fifth injection region 343. Referring specifically to fig. 9 (fig. 1 to 7 are schematic structural diagrams of section A-A of fig. 9, for example, without data lines), fig. 9 shows two rows and two columns of light emitting cells 102, and the first row data lines 103 are respectively connected to the fourth injection regions 342 of the first row light emitting cells 102. The second row data lines 103 are respectively connected to the fourth injection regions 342 of the second row light emitting cells 102. Referring to fig. 9 and 10, the first column scan lines 104 are respectively located above the third injection regions 341 of the first column light emitting units 102 and are isolated by the second insulating layer 105, and the second column scan lines 104 are respectively located above the third injection regions 341 of the second column light emitting units 102 and are isolated by the second insulating layer 105.
For example, the first doping type is N-type, the second doping type is P-type, and corresponding to each light emitting cell 102, the semiconductor portion fourth injection region 342, the third injection region 341 and the fifth injection region 343, and the metal portion data line 103, the scan line 104, the gate electrode 44, and the second insulating layer 105 (silicon nitride or silicon oxide) between the scan line 104 and the third injection region 341 form an NPN-type metal-oxide-semiconductor field effect transistor structure, so that a voltage can be applied to the scan line 104, carrier electrons of the third injection region 341 are attracted to the top, and an N-type inversion layer (second inversion layer) is formed on top of the third injection region 341, thereby realizing conduction of the fourth injection region 342 and the fifth injection region 343, so that the voltage applied from the data line 103 can be applied to the gate electrode 44 through the fourth injection region 342, the second inversion layer, and the fifth injection region 343, respectively. This makes it possible to control the individual light emitting cells 102 by control of voltages applied to the data lines 103 and the scan lines 104.
For example, when a voltage is applied to the data line 103 of the first row in fig. 9 and a voltage is applied to the scan line 104 of the first column, the voltage applied to the first column scan line 104 in the light emitting cell 102 of the first row and the first column in fig. 9 may form the second inversion layer in the third injection region 341, so that the fourth injection region 342 and the fifth injection region 343 are turned on, and the voltage applied to the data line 103 of the first row may reach the gate electrode 44 through the fourth injection region 342, the second inversion layer and the fifth injection region 343, thereby implementing the application of the first voltage to the floating gate structure layer 40. For the light emitting cells 102 of the first row and the second column in fig. 9, although the first row data line 103 applies a voltage to the fourth injection region 342, since the second column scan line 104 does not apply a voltage, the second inversion layer is not formed in the third injection region 341, and the voltage applied to the first row data line 103 cannot be applied to the gate electrode 44 of the first row and the second column light emitting cells. For the light emitting cells 102 of the first column and the second row in fig. 9, although the voltage applied to the first column scan line 104 causes the second inversion layer to be formed in the third injection region 341, the fourth injection region 342 and the fifth injection region 343 are turned on, the voltage is not applied to the fourth injection region 342 by the second row data line 103, and the voltage is not applied to the gate electrode 44. For the light emitting cells 102 of the second row and the second column, neither the data line 103 of the second row nor the scan line 104 of the second column is energized, nor a voltage is applied to the gate electrode 44 of the light emitting cell 102 of the second row and the second column. Therefore, by electrically connecting the data line 103 with the fourth injection region 342 of the corresponding column and controlling whether the scan line 104 forms the second inversion layer for the third injection region 341 of the corresponding row, editing and resetting of any one light emitting unit 102 can be realized in the semiconductor laser 100 including the light emitting units 102 of multiple rows and multiple columns, and editing and resetting are convenient.
The semiconductor laser 100 provided by the above embodiment of the present invention can achieve the following effects:
for example, in some embodiments, the light emitting units 102 with different light emitting areas 101 may be disposed in the semiconductor laser 100, when a higher power operation is required, the light emitting unit 102 with a larger light emitting area 101 of the light emitting units 102 may be edited as a target editing light emitting unit, so that only the light emitting unit 102 with a smaller light emitting area 101 is lighted, and the current density may be increased to increase the peak power under the condition of uniform current.
For example, in some embodiments, when the semiconductor laser 100 is applied to an on-vehicle radar, the requirements of laser power and divergence angle are different in the daytime and at night, different light emitting units 102 can be selected as target editing light emitting units according to the daytime and at night to respectively obtain different light emitting powers and divergence angles in the daytime and at night, and the anti-interference capability can be improved.
Or in some embodiments, the arrangement density of the light emitting units 102 in the semiconductor laser 100 is different, when the semiconductor laser 100 is applied to a scene with a low requirement for heat dissipation, the light emitting units 102 in the region with a sparse arrangement density can be used as target editing light emitting units, so that the light emitting units 102 in the region with a dense arrangement density can be lightened. When the heat dissipation requirement is high, the light emitting units 102 in the region with a denser arrangement density can be used as target editing light emitting units, so that only the light emitting units 102 with a sparser arrangement density can be lightened to improve the heat dissipation performance of the semiconductor laser 100.
The embodiment of the invention also provides a control method of the semiconductor laser, based on any one of the semiconductor lasers 100, the control method of the semiconductor laser comprises the following steps: editing step S1: a first voltage is applied to the floating gate structure layer 40 of the target editing light emitting cell among the plurality of light emitting cells 102, resulting in an edited light emitting cell. And a lighting step S2: a second voltage is applied between the first electrode 60 and the second electrode 70 of the plurality of light emitting cells 102, and a third voltage is applied to the floating gate structure layer 40 of the plurality of light emitting cells 102 to cause the light emitting cells 102 other than the edited light emitting cells of the plurality of light emitting cells 102 to emit light. Wherein the third voltage is less than the first voltage.
According to the explanation of the principle of the editing implemented with respect to the semiconductor laser 100 in the foregoing embodiment, the edited light-emitting units can be made unable to be lighted in the lighting step S2 by the editing step S1, and the light-emitting units other than the edited light-emitting units can be lighted. Therefore, editing of a specific light emitting unit among the plurality of light emitting units 102 of the semiconductor laser 100 can be realized, and a spot of a specific shape of the semiconductor laser 100 can be realized.
In some embodiments, the semiconductor laser control method further includes a reset step S3: a fourth voltage is applied to the floating gate structure layer 40 of the edited light-emitting cell, the fourth voltage being opposite to the first voltage. According to the principle of resetting the structure of the semiconductor laser 100, the reset of the edited light-emitting unit can be realized through the resetting step S3, and the reset light-emitting unit can be normally lightened or can be edited again. Therefore, the repetitive editing, lighting and resetting operations of the plurality of light emitting units 102 in the semiconductor laser 100 can be realized, and the light emitting effect of the semiconductor laser 100 can be switched according to different requirements.
An embodiment of the present invention further provides a laser device, including the semiconductor laser 100 according to any of the foregoing embodiments, where the laser device may be, for example, a laser sensing device such as a laser radar, a TOF (Time of Flight) depth camera, or a laser light source device that combines critical illumination and flood illumination. The laser light source apparatus to which the aforementioned semiconductor laser 100 is applied can realize the scalability of illumination power by region division. The application in laser sensing equipment can improve the space resolution of TOF or laser radar, reduce unnecessary object glare and the like.
The present invention is not limited to the above-mentioned embodiments, but is intended to be limited to the following embodiments, and any modifications, equivalent changes and variations in the above-mentioned embodiments can be made by those skilled in the art without departing from the scope of the present invention.
Claims (11)
1. A semiconductor laser comprising a plurality of light emitting cells, each of the light emitting cells comprising a first electrode, a second electrode, a substrate, and a bottom DBR layer, an active layer, a top DBR layer, and a floating gate structure layer laminated in this order on the substrate, one of the bottom DBR layer and the top DBR layer being a P-type DBR layer, each of the light emitting cells further comprising an oxide layer between the active layer and the P-type DBR layer, the oxide layer having an oxide limiting aperture formed thereon; the doping type of the bottom DBR layer is a first doping type, and the top DBR layer includes:
the doping type of the body region is a second doping type;
the first injection region is arranged on one side of the main body region, which is far away from the active layer, and the doping type of the first injection region is the first doping type;
a second injection region located at an end of the top DBR layer remote from the active layer and surrounded by the first injection region; the doping type of the second implantation region is the second doping type, and the orthographic projection of the second implantation region on the oxide layer surrounds the oxidation limiting hole;
the floating gate structure layer is arranged on the surface of the top DBR layer, which is far away from the active layer, and the orthographic projection of the floating gate structure layer on the top DBR layer is surrounded by the second injection region, and the floating gate structure layer is electrically connected with the first injection region;
wherein the first electrode in each light emitting unit is electrically connected to the substrate; the second electrode is electrically connected with the second injection region; the semiconductor laser further includes reset electrodes electrically connected to the first injection regions in the plurality of light emitting cells, respectively.
2. The semiconductor laser of claim 1, wherein the floating gate structure layer comprises a tunneling layer, a floating gate layer, a first insulating layer, and a gate electrode sequentially stacked on the top DBR layer.
3. The semiconductor laser of claim 2, wherein first injection regions within said plurality of light emitting cells are in communication with one another, said reset electrode being disposed in any one of said light emitting cells at a surface of said first injection region remote from said body region.
4. A semiconductor laser as claimed in claim 1 wherein the bottom DBR layer is an N-type DBR layer and the top DBR layer is a P-type DBR layer; the first injection region is an N-type lightly doped region, and the second injection region is a P-type heavily doped region; alternatively, the bottom DBR layer is a P-type DBR layer, and the top DBR layer is an N-type DBR layer; the first injection region is a P-type lightly doped region, and the second injection region is an N-type heavily doped region.
5. A semiconductor laser as claimed in claim 3 wherein in each light emitting cell, the top DBR layer further comprises a field effect region disposed on a side of the body region remote from the active layer, the field effect region being isolated from the first implant region and the second implant region, respectively, the field effect region comprising a third implant region and fourth implant region and fifth implant region disposed on opposite sides of the third implant region, respectively, the third implant region having a doping type of the second doping type, the fourth implant region and the fifth implant region having a doping type of the first doping type; the gate electrode is electrically connected with the fifth injection region.
6. The semiconductor laser of claim 5, wherein the plurality of light emitting cells are arranged in an array of rows and columns; the semiconductor laser comprises a plurality of rows of data lines, and each row of data lines is respectively connected with the fourth injection region of one row of light emitting units; the semiconductor laser further comprises a plurality of rows of scanning lines, each row of scanning lines is respectively positioned at one side of the third injection region of one row of the light emitting units, which is far away from the active layer, and the semiconductor laser further comprises a second insulating layer positioned between the scanning lines and the third injection region.
7. The semiconductor laser of claim 1, wherein the body region has a raised portion and a recessed portion surrounding the raised portion; the protruding portion protrudes from the oxidation limiting hole toward one side close to the floating gate structure layer.
8. The semiconductor laser of claim 2, wherein the gate electrode is a transparent conductive material; or the gate electrode is of an annular structure, and a through hole corresponding to the oxidation limiting hole is formed in the annular structure.
9. A control method of a semiconductor laser, characterized in that the control method of a semiconductor laser according to any one of claims 1 to 8 comprises:
editing: applying a first voltage to the floating gate structure layer of a target editing light-emitting unit in the plurality of light-emitting units to obtain an edited light-emitting unit;
and (3) a lighting step: applying a second voltage between a first electrode and a second electrode of the plurality of light emitting units, and applying a third voltage to floating gate structure layers of the plurality of light emitting units, so that light emitting units of the plurality of light emitting units except the edited light emitting unit emit light; the third voltage is less than the first voltage.
10. The method for controlling a semiconductor laser according to claim 9, wherein the method for controlling a semiconductor laser further comprises:
resetting: and applying a fourth voltage to the floating gate structure layer of the edited light-emitting unit, wherein the fourth voltage is opposite to the first voltage.
11. A laser device comprising a semiconductor laser as claimed in any one of claims 1 to 8.
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