CN117558328B - Electronic fuse, control method, and computer-readable storage medium - Google Patents
Electronic fuse, control method, and computer-readable storage medium Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 39
- 238000003860 storage Methods 0.000 title claims abstract description 10
- 238000007664 blowing Methods 0.000 claims description 10
- 238000004590 computer program Methods 0.000 claims description 5
- 230000015654 memory Effects 0.000 description 16
- 238000010586 diagram Methods 0.000 description 12
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 8
- 229920005591 polysilicon Polymers 0.000 description 8
- 230000000052 comparative effect Effects 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
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Classifications
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
- G11C29/785—Masking faults in memories by using spares or by reconfiguring using programmable devices with redundancy programming schemes
- G11C29/787—Masking faults in memories by using spares or by reconfiguring using programmable devices with redundancy programming schemes using a fuse hierarchy
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
- G11C17/16—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
- G11C29/80—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout
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Abstract
The present disclosure provides an electronic fuse, a control method, and a computer-readable storage medium, wherein the electronic fuse includes: the device comprises at least one fuse module, at least one judging logic module, a reading logic module and a programming logic module. Each fuse module comprises n electronic fuses; n is greater than or equal to 2, and each fuse module corresponds to one data bit. And the reading logic module is connected with the at least one fuse module and is configured to read the state of each electronic fuse. Each judgment logic module is connected with the reading logic module and is configured to output a logic value according to the states of n electronic fuses in the corresponding fuse modules; and the programming logic module is connected with the at least one fuse module and is configured to receive programming signals and blow the electronic fuse based on the programming signals. Thus, the states of the plurality of electronic fuses correspond to one logical value. Therefore, logic value errors caused by electronic fuse faults are avoided, and the yield of the fuse module is improved.
Description
Technical Field
The present disclosure relates to the field of semiconductors, and more particularly, to an electronic fuse, a control method, and a computer-readable storage medium.
Background
A Read-Only Memory (ROM) is typically required in the chip to store some fixed information such as the ID, security code, TRIM data, etc. of the chip. Read-only memory typically includes a nonvolatile memory device for storing information. Electronic fuses (EFuse) have become widely used non-volatile memory devices due to their ease of use characteristics.
Compared with other fuses realized by laser cutting or mechanical cutting, the electronic fuse can control programming by a pure circuit mode. Illustrated by polysilicon fuse (Poly EFUSE): the polysilicon fuse is typically a very thin section of polysilicon (Poly). When the chip leaves the factory, the thin polysilicon fuse is in an unblown state, and low resistance is displayed between the two ends. If data is to be programmed, a high voltage is applied across the thin polysilicon fuse, and a high current is passed through the high voltage, so that the generated heat will blow the polysilicon fuse, thereby rendering a high resistance between the two ends. If the data is to be read, a low voltage or a low current is applied to both ends of the polysilicon fuse, and the resistance of the polysilicon fuse is measured, so that the corresponding binary data can be generated. During the use of electronic fuses, problems may occur that affect the yield of the electronic fuses. For example, an electronic fuse that should be in an unblown state changes to a blown state due to manufacturing defects or the like; the electronic fuse cannot be normally blown for a variety of reasons.
Disclosure of Invention
In view of this, the embodiments of the present disclosure provide an electronic fuse and a control method, so as to reduce the probability of error and improve the yield of the electronic fuse.
The embodiment of the disclosure provides an electronic fuse, comprising: the device comprises at least one fuse module, at least one judging logic module, a reading logic module and a programming logic module; the fuse module comprises n electronic fuses, n is more than or equal to 2, and each fuse module corresponds to one data bit; the reading logic module is connected with at least one fuse module and is configured to read the state of each electronic fuse, wherein the state comprises a fused state or an unblown state; the judging logic module is connected with the reading logic module and is configured to output a logic value according to the states of n electronic fuses in the corresponding fuse module, wherein the number of different states of the n electronic fuses when the logic value is 1 and the number of different states of the n electronic fuses when the logic value is 0; the programming logic module is connected with at least one fuse module and is configured to receive programming signals; and the programming logic module fuses the electronic fuse based on the programming signal.
The embodiment of the disclosure also provides a control method for operating the electronic fuse in the above scheme, which comprises the following steps: the reading logic module is controlled to read the initial state of each electronic fuse, wherein the judging logic module outputs the initial state of the logic value for each fuse module; determining whether the electronic fuse in the fuse module needs to be programmed according to the target level state of the data to be written and the initial state of the logic value of the fuse module; when the initial state is consistent with the target level state of the data to be written, the programming is not needed; when the initial state is inconsistent with the target level state of the data to be written, programming is needed; if the programming is needed, a programming signal is sent to the programming logic module, and the programming logic module is controlled to perform programming operation on the corresponding electronic fuse.
The disclosed embodiments also provide a computer-readable storage medium having stored thereon a computer program or instructions that, when executed, cause a computer to perform a control method as described in the above schemes.
In the embodiment of the disclosure, a plurality of electronic fuses in the fuse module correspond to a logic value, and one logic value characterizes one stored data bit. In this way, in the event of a failure of a portion of the electronic fuses in the fuse block, the logic value of the fuse block may also be changed by changing the state of the remaining electronic fuses. Therefore, the probability of failure of the fuse module is reduced, and the yield of the fuse module is improved.
Drawings
Fig. 1 is a schematic structural diagram of an electronic fuse according to an embodiment of the present disclosure;
Fig. 2 is a schematic structural diagram of a second electronic fuse according to an embodiment of the present disclosure;
Fig. 3 is a schematic structural diagram III of an electronic fuse according to an embodiment of the present disclosure;
Fig. 4 is a schematic structural diagram of an electronic fuse according to an embodiment of the present disclosure;
fig. 5 is a schematic diagram of an electronic fuse according to an embodiment of the present disclosure;
fig. 6 is a schematic structural diagram of an electronic fuse according to an embodiment of the present disclosure;
Fig. 7 is a schematic structural diagram seven of an electronic fuse provided in an embodiment of the present disclosure;
Fig. 8 is a schematic flow chart of a control method according to an embodiment of the disclosure;
fig. 9 is a second flow chart of a control method according to an embodiment of the disclosure;
Fig. 10 is a schematic structural diagram of a storage system according to an embodiment of the present disclosure.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the present disclosure more apparent, the technical solutions of the present disclosure are further elaborated below in conjunction with the drawings and the embodiments, and the described embodiments should not be construed as limiting the present disclosure, and all other embodiments obtained by those skilled in the art without making inventive efforts are within the scope of protection of the present disclosure.
In the following description, reference is made to "some embodiments" which describe a subset of all possible embodiments, but it is to be understood that "some embodiments" can be the same subset or different subsets of all possible embodiments and can be combined with one another without conflict.
If a similar description of "first/second" appears in the application document, the following description is added, in which the terms "first/second/third" merely distinguish similar objects and do not represent a specific ordering of the objects, it being understood that "first/second/third" may, where allowed, interchange a specific order or precedence, to enable embodiments of the disclosure described herein to be practiced otherwise than as illustrated or described herein.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. The terminology used herein is for the purpose of describing embodiments of the present disclosure only and is not intended to be limiting of the present disclosure.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
Fig. 1 is a schematic diagram of an alternative structure of an electronic fuse 100 according to an embodiment of the present disclosure, where an external control module may perform control such as programming or reading on the electronic fuse 100, and the control module may perform an addressing operation on the electronic fuse 100. For example, when it is required to burn the electronic fuse 100, the control module sends a burn signal to the electronic fuse 100 to burn the electronic fuse 100. The control module may be a host computer program.
Referring to fig. 1, an electronic fuse 100 includes: a fuse module 10, a determination logic module 20, a read logic module 30 and a programming logic module 40. Each fuse module 10 includes n electronic fuses, where n is greater than or equal to 2, and each fuse module 10 corresponds to one data bit. The read logic module 30 is connected to the at least one fuse module 10 and configured to read the status of each electronic fuse. Each of the determination logic modules 20, coupled to the read logic module 30, is configured to output a logic value based on the status of the n electronic fuses in the corresponding fuse module 10, wherein the status includes blown or unblown, thereby characterizing the stored data of one data bit. Each of the determination logic modules 30 corresponds to one of the fuse modules 10. The programming logic module 40 is connected to the at least one fuse module 10, and is configured to receive the programming signal and blow the electronic fuse based on the programming signal. The programming signal is sent to the programming logic module by a control module after receiving the logic value.
It will be appreciated that a plurality of electronic fuses in the fuse block correspond to a logic value that characterizes the data of a stored data bit. In this way, under the condition that part of the electronic fuses in the fuse module fail, the logic value of the fuse module can be changed by changing the states of the rest electronic fuses, so that the data stored in the fuse module is ensured to meet the target, the probability of the failure of the fuse module 10 is reduced, and the yield of the fuse module 10 is improved.
In other embodiments of the present disclosure, referring to fig. 2, the electronic fuse 100 includes a plurality of fuse modules 10, a plurality of determination logic modules 20, and a plurality of programming logic modules 40. The plurality of fuse modules 10 and the plurality of determination logic modules 20 are connected to the same read logic module 30.
In the embodiment shown in fig. 1, since each fuse module 10 is configured with one read logic module 30, the read logic module 30 can directly read the state of each electronic fuse in the corresponding fuse module 10. In the embodiment shown in fig. 2, a plurality of fuse modules 10 share one read logic module 30, and thus, the shared read logic module 30 needs to read the state of each fuse module 10 separately by means of on-chip addressing. The read logic module 30 may apply a low voltage or a low current across each of the electronic fuses to measure the resistance of the electronic fuses, and read the state of each of the electronic fuses; or the read logic module 30 may read the level across each electronic fuse to read the state of each electronic fuse. The read logic 30 may include internal registers, each for storing the status of one of the electronic fuses, and the determination logic 20 may obtain the status of the electronic fuse stored in the register. When the read logic module 30 receives the read command sent by the control module, the states of the electronic fuses in the fuse module 10 are read, and the states of the electronic fuses in the fuse module 10 are stored in the internal registers thereof. The judgment logic module 20 acquires the state of the electronic fuse stored in the register. Thus, the judgment logic module 20 may output one logic value based on the states corresponding to the n electronic fuses.
When the fuse module 10 includes two electronic fuses, for each fuse module 10, in the case where both electronic fuses are blown or neither is blown, the logic value output by the corresponding determination logic module 20 may be low level, that is, the logic value of the fuse module 10 is low level; in contrast, in the case where only one of the two electronic fuses is blown, the logic value output by the corresponding determination logic module 20 is at a high level, that is, the logic value of the fuse module 10 is at a high level.
For each fuse module 10, in the case where n is an odd number, the judgment logic module 20 is configured to: if the number m of blown electronic fuses is greater than or equal to (n+1)/2, the output logic value is a first value (for example, high level); or if the number m of blown electronic fuses is less than (n+1)/2, the output logic value is a second value (e.g., low level). In some embodiments, the first value may also be low and the second value may be high. In the case where n is 2, the judgment logic module 20 is configured to: if the states of the two electronic fuses are inconsistent, the output logic value is high level; or if the states of the two electronic fuses are identical, the output logic value is low. The method for judging the output logic value of the logic module 20 enables the number of different states of the n electronic fuses when the logic value is 1 to be equal to the number of different states of the n electronic fuses when the logic value is 0, thereby further reducing the probability of failure of the fuse module 10 and being beneficial to further improving the yield of the electronic fuse 100.
The manner in which the electronic fuse 100 of the present embodiment operates and its benefits are described below in connection with specific embodiments.
Referring first to fig. 3, the fuse module 10 illustrated in fig. 3 includes 3 electronic fuses, which are an electronic fuse 101a, an electronic fuse 101b, and an electronic fuse 101c, respectively. In some embodiments of the present disclosure, referring to fig. 3, in the case where n is an odd number, each judgment logic module 20 includes a first operator module 210 and a second operator module 220. Wherein the first operation sub-module 210 is configured to perform a first operation on each (n+1)/2 of the n electronic fuses to obtainA first operation result; wherein, each electronic fuse only performs a first operation with other electronic fuses. The second operator module 220 is configured as a pair/>And performing a second operation on the first operation result, and outputting the logic value of the fuse module. The first operation includes an AND operation and the second operation includes an OR operation; or the first operation comprises a nand operation and the second operation comprises a nand operation.
The following description will take the example that the fuse module includes 3 electronic fuses: referring to fig. 3, the fuse module 10 includes 3 electronic fuses, which are an electronic fuse 101a, an electronic fuse 101b, and an electronic fuse 101c, respectively. The level of the electronic fuse 101a is a, the level of the electronic fuse 101B is B, and the level of the electronic fuse 101C is C. The first operation submodule 210 may perform an and operation on every two of the 3 electronic fuses to obtain 3 first operation results, namely AB, AC and BC. Then, the second operation sub-module 220 performs an or operation on the 3 first operation results AB, AC and BC, and outputs the logic value of the fuse module 10. That is, the digital logic implemented by the judgment logic module 20 is ab+ac+bc.
Fig. 4 and fig. 5 are schematic diagrams showing an alternative structure of the determination logic module 20 according to the embodiment of the present disclosure, and it should be noted that the circuits illustrated in fig. 4 and fig. 5 are used for performing logic determination in a case that 3 electronic fuses are included in the fuse module. The number of electronic fuses included in the fuse block is other, and the corresponding circuitry can be understood with reference to the circuitry shown in fig. 4 and 5.
Referring to fig. 3 and 4, the first operator module 210 may include 3 and gates, namely, and gate 201a, and gate 201b, and gate 201c, respectively. The two inputs of each AND gate respectively receive the levels of different electronic fuses. The and gate 201a receives the level a of the electronic fuse 101a and the level B of the electronic fuse 101B, and performs an and operation on the level a of the electronic fuse 101a and the level B of the electronic fuse 101B to obtain a first operation result AB; the and gate 201B may receive the level B of the electronic fuse 101B and the level C of the electronic fuse 101C, and perform an and operation on the level B of the electronic fuse 101B and the level C of the electronic fuse 101C to obtain a first operation result BC; the and gate 201C may receive the level a of the electronic fuse 101a and the level C of the electronic fuse 101C, and perform an and operation on the level a of the electronic fuse 101a and the level C of the electronic fuse 101C to obtain a first operation result AC.
Further, the second operation sub-module 220 includes 1 three-input logic or gate 202, and three input terminals of the three-input logic or gate 202 are respectively connected to output terminals of an and gate. For example, three input terminals of the three-input logic or gate 202 are respectively connected to the and gate 201a, the and gate 201b, and the and gate 201c, and receive 3 first operation results, that is, AB, AC, and BC. Thus, the three-input logical OR gate 202 can OR the first operation results AB, AC and BC, and output the logical value AB+AC+BC of the fuse module 10. For example, when A, B, C is 1, 0, and 0, respectively, AB, BC, and AC output from and gate 201a, and gate 201b, and gate 201c are 0, and 0, respectively, and logical value ab+ac+bc output from three-input logical or gate 202 is 0.
In the disclosed embodiment, with reference to fig. 3 and 5, the first operation includes an and operation, and the second operation includes an or operation. The correspondence between the levels of each and gate receiving the electronic fuse can be understood by referring to the correspondence in fig. 4, and will not be described here again. The second operator module 220 may include 2 or gates, or gate 203a and or gate 203b, respectively. The two inputs of or gate 203a are connected to the outputs of and gate 201a and gate 201b, respectively, and the output of or gate 203a is connected to one input of or gate 203b. The other input of or gate 203b is connected to the output of and gate 201 c. For example, when A, B, C is 1,0, respectively, AB, BC, AC output from and gate 201a, and gate 201b, and gate 201c are 0, respectively, input to or gate 203a is 0, output of 203a is 0, input to or gate 203b is 0, and logic value of output of or gate 203b is 0.
It should be noted that, table 1 shows the correspondence between the states of the electronic fuses and the logic values in the case that the fuse module includes three electronic fuses. A "0" in the state indicates that the electronic fuse is in an unblown state, and a "1" in the state indicates that the electronic fuse is in a blown state. For example, referring to fig. 3, the state corresponding to the fuse block is "001", indicating that the states of the electronic fuse 101a, the electronic fuse 101b, and the electronic fuse 101c are 0, and 1, respectively. A "0" in the logic value indicates that the logic value of the fuse block 10 is low, and the data stored in the fuse block is "0"; a "1" in the logic value indicates that the logic value of the fuse block, which stores data of "1", is high. p is the probability that an electronic fuse is in the blown state at the initial state. The initial state is a state that an electronic fuse is produced in a production line and is not subjected to programming operation. The occurrence probability indicates the probability that 3 electronic fuses are in different initial states, for example, the probability that the initial state of an electronic fuse is "000" is (1-p) 3, and the probability that the initial state of an electronic fuse is "001" is p (1-p) 2.
TABLE 1
In the embodiment of the present disclosure, in the case where the fuse module 10 includes 3 electronic fuses, (n+1)/2=2, so that the number of electronic fuses blown in the fuse module 10 is equal to or greater than 2, it is determined that the logic value output by the logic module 20 is at a high level; the number of blown electronic fuses in the fuse block 10 is less than 2, and the logic value output by the logic block 20 is judged to be a low level. Referring to fig. 3 and table 1, when the logic value of the fuse block 10 is 1, the states of 3 electronic fuses include 4 states of "110", "111", "011" and "101", and the number of states of 3 electronic fuses is 4 when the logic value is 1. The states of the 3 electronic fuses include 4 states of "000", "001", "010" and "100" when the logic value of the fuse block 10 is 0, and the number of states of the 3 electronic fuses is 4 when the logic value is 0. That is, the number of states of the electronic fuses corresponding to the logical values 1 and 0 of the fuse module 10 is equal to 4.
The following analysis: error probability of fuse block 10 in the case of 3 electronic fuses:
case one: when the target level state of the data to be written corresponding to the fuse module 10 is 0:
If the initial states of the fuse block 10 are "000", "001", "010" and "100", the initial state of the logic value of the fuse block 10 is 0, the target level state is the same as the initial state of the logic value, and the fuse block 10 does not need to be programmed, so that the logic value of the fuse block 10 does not have an error.
If the initial states of the fuse block 10 are "111", "110", "101" and "011", the initial state of the logic value of the fuse block 10 is 1, the logic value of the fuse block 10 cannot be programmed to 0, and the logic value of the fuse block 10 may be erroneous.
So in case, the probability that the logic value of the fuse block 10 is erroneous is the sum of the probabilities of the four cases that the initial states are "111", "110", "101" and "011", that is:。
In the comparative embodiment, only one electronic fuse is included in the fuse module 10. Assuming that w and p are both 0.1%, the expected logic value of the fuse block 10 is 0, and the probability of an error in the logic value of the fuse block 10 is: p=0.1%. Therefore, the yield of the control embodiment is lower in case, and the yield of the embodiment of the scheme is higher than that of the control embodiment.
And a second case: when the target level state of the data to be written corresponding to the fuse module 10 is 1:
When the initial state of the electronic fuse is 000, if the level of the programmed fuse block 10 is still 0 level, the logic value of the fuse block 10 may be in error. Referring to table 1, the probability of the initial state of the electronic fuse being 000 is (1-p) 3. Referring to Table 2, the initial state of the electronic fuse is 000, w is the probability that one electronic fuse cannot be normally blown, and the probability that the logic value after programming is 0 is . At this time, the probability of error occurrence of the fuse module 10 is。
TABLE 2
Correspondingly, when the initial states of the fuse module 10 are "001", "010" and "100", the fuse module 10 is programmed, and the programmed results are shown in tables 3 to 5 below, and the probability calculation of error occurrence is similar to the case where the initial state of the electronic fuse is 000, and will not be described here.
TABLE 3 Table 3
TABLE 4 Table 4
TABLE 5
In combination with tables 2 to 5, in the case where the target level state of the data to be written corresponding to the fuse block 10 is high, the total probability of error of the fuse block 10 is the sum of the probabilities of error of the above four initial states, that is:
。
in the comparative embodiment, the fuse module 10 only includes one electronic fuse, and when the expected logic value of the fuse module 10 is 1, the probability of error of the logic value of the fuse module 10 is: . Therefore, the yield of the control embodiment is lower in case, and the yield of the embodiment of the scheme is higher than that of the control embodiment.
The circuit illustrated in fig. 6 is used for making a logic determination of the case where 5 electronic fuses are included in the fuse block. It should be noted that the levels corresponding to the 5 electronic fuses are E, F, G, H and I, respectively. Only 3 three-input and gates in the first operator module 210 are shown in fig. 6, three-input and gate 204a, three-input and gate 204b, and three-input and gate 204c, respectively. Only 3 or gates, or gate 205a, or gate 205b, and or gate 205c, respectively, in the second operator module 220 are shown in fig. 6. The other three-input AND gates included in the first operator module 210, the other OR gates included in the second operator module 220, and the manner in which the OR gates are connected to the three-input AND gates can be understood with reference to the illustration shown in FIG. 6.
In the disclosed embodiment, the first operator module 210 may include 10 three-input AND gates. Each three-input and gate may perform an and operation on every third of the 5 electronic fuses. The levels received by the 10 three-input AND gates are respectively: E. f and G; E. f and H; E. f and I; E. g and H; E. g and I; E. h and I; F. g and H; F. g and I; F. h and I; G. h and I. For example, the levels of 3 fuses received by the three-input and gate 204a are E, F and G, the levels of 3 electronic fuses received by the three-input and gate 204b are E, F and H, and the levels of 3 electronic fuses received by the three-input and gate 204c are G, H and I. Thus, the first operation submodule 210 may perform an and operation on each 3 of the 5 electronic fuses to obtain 10 first operation results, that is: EFG, EFH, EFI, EGH, EGI, EHI, FGH, FGI, FHI and GHI.
Further, the second operation sub-module 220 may perform an or operation on the 10 first operation results output by the first operation sub-module 210, and output the logic value of the fuse module 10. For example, the two input terminals of the or gate 205a are connected to the output terminals of the three-input and gate 204a and the three-input and gate 204b, respectively, and the first operation results EFG and EFH output from the three-input and gate 204a and the three-input and gate 204b may be ored. The multiple input terminals of the or gate 205c are connected to the output terminals of the or gates 205a and 205c, respectively, and the operation results of the or gate 205a and 205c are ored. The judgment logic of the judgment logic module 20 shown in fig. 6 is similar to that of fig. 5 and 6, and will not be described again.
Fig. 7 is a schematic diagram of an alternative structure of the electronic fuse 100 according to the embodiment of the present disclosure, and it should be noted that the fuse module 10 illustrated in fig. 7 includes two electronic fuses, namely, the electronic fuse 101e and the electronic fuse 101d.
In some embodiments of the present disclosure, referring to fig. 7, each judgment logic module 20 includes: exclusive or gate, or exclusive or gate.
In the embodiment of the disclosure, referring to fig. 7, the judging logic module 20 may be an exclusive or gate, and two input ends of the exclusive or gate respectively receive the level of one electronic fuse. For example, the fuse module 10 may include an electronic fuse 101d and an electronic fuse 101e. Two input terminals of the exclusive or gate may be connected to the read logic module, receive the levels of the electronic fuse 101d and the electronic fuse 101e, and exclusive or the levels of the electronic fuse 101d and the electronic fuse 101e.
In the embodiment of the disclosure, referring to fig. 7, the judging logic module 20 may be an exclusive or gate, and two input ends of the exclusive or gate respectively receive the level of one electronic fuse. The exclusive nor gate may exclusive nor the levels of the electronic fuse 101d and the electronic fuse 101 e. Thus, the states of the electronic fuse 101d and the electronic fuse 101e in the fuse block 10 are not identical, and the logic value of the fuse block 10 is low; the states of the electronic fuse 101d and the electronic fuse 101e in the fuse block 10 are identical, and the logic value of the fuse block 10 is high.
It should be noted that, table 6 shows the correspondence between the states of the electronic fuses and the logic values in the case that the fuse module includes two electronic fuses. A "0" in the state indicates that the electronic fuse is in an unblown state, and a "1" in the state indicates that the electronic fuse is in a blown state. For example, referring to fig. 7, the fuse block corresponds to a state of "01", indicating that the states of the electronic fuse 101d and the electronic fuse 101e are 0 and 1, respectively. The "0" in the logic value indicates that the logic value of the fuse block 10 is at a low level, and the "1" in the logic value indicates that the logic value of the fuse block 10 is at a high level. p is the probability that the initial state of an electronic fuse is a blown state. The initial state is a state that an electronic fuse is produced in a production line and is not subjected to programming operation. The occurrence probability indicates a probability that two electronic fuses are in different initial states, for example, a probability that the initial state of the electronic fuse is "00" is (1-p) 2, and a probability that the initial state of the electronic fuse is "01" is (1-p) p.
TABLE 6
In the embodiment of the disclosure, referring to table 6 above in conjunction with fig. 1 and 7, if the fuse module 10 includes two electronic fuses, if the electronic fuse 101e and the electronic fuse 101d are both in the unblown state, the corresponding state of the fuse module 10 is "00", at this time, if the blown states of the two electronic fuses are identical, it is determined that the logic value output by the logic module 20 is at the low level, that is: the logic value of the fuse block 10 is low. If one of the electronic fuse 101e and the electronic fuse 101d is in a blown state and the other is in an unblown state, the corresponding state of the fuse module 10 is "01" or "10", and at this time, the states of the two electronic fuses are inconsistent, the logic value output by the logic module 20 is determined to be a high level, that is: the logic value of the fuse block 10 is high. When the logic value of the fuse module 10 is 1, the states of the two electronic fuses include two states of "10" and "01", and the number of states of the 3 electronic fuses is 2 when the logic value is 1. When the logic value of the fuse module 10 is 0, the states of the two electronic fuses include two states of "00" and "1", and the number of states of the 3 electronic fuses is 2 when the logic value is 0. That is, the state numbers of the electronic fuses corresponding to the logical values 1 and 0 of the fuse module 10 are equal to each other and are both 2.
The error probability of the fuse module 10 in the case of two electronic fuses is analyzed as follows:
case one: when the target level state of the data to be written corresponding to the fuse module 10 is 0:
If the initial states of the fuse block 10 are "01" and "10", the initial state of the logic value of the fuse block 10 is 1, and the target level state and the initial state of the logic value are different, so that it is necessary to blow both electronic fuses in the fuse block 10.
If the initial states of the fuse module 10 are "00" and "11", the initial state of the logic value of the fuse module 10 is 0, the target level state is the same as the initial state of the logic value, and it is not necessary to blow two electronic fuses in the fuse module 10, so that the logic value of the fuse module 10 will not be wrong.
TABLE 7
TABLE 8
Therefore, in this case, the probabilities of "01" and "10" for the initial state of the fuse block 10 in table 6, the probability of "01" for the initial state of the fuse block 10 in table 7, and the probability of "10" for the initial state of the fuse block 10 in table 8 are combined, and the total error probability is:
。
In the comparative embodiment, only one electronic fuse is included in the fuse module 10. Assuming that w and p are both 0.1%, the expected logic value of the fuse block 10 is 0, and the probability of an error in the logic value of the fuse block 10 is: p=0.1%. Therefore, the yield of the control embodiment is lower in case, and the yield of the embodiment of the scheme is higher than that of the control embodiment.
And a second case: when the target level state of the data to be written corresponding to the fuse module 10 is 1:
If the initial states of the fuse module 10 are "01" and "10", the initial state of the logic value of the fuse module 10 is 1, the target level state is the same as the initial state of the logic value, and it is not necessary to blow two electronic fuses in the fuse module 10, so that the logic value of the fuse module 10 will not be wrong.
If the initial states of the fuse block 10 are "00" and "11", the initial state of the logic value of the fuse block 10 is 0, and the target level state and the initial state of the logic value are different, so that it is necessary to blow both electronic fuses in the fuse block 10.
TABLE 9
Table 10
Therefore, in the second case, the probabilities of "00" and "11" for the initial state of the fuse block 10 in table 6, the probability of "00" for the initial state of the fuse block 10 in table 9, and the probability of "11" for the initial state of the fuse block 10 in table 10 are combined, and the total error probability is:。
in the comparative embodiment, the fuse module 10 only includes one electronic fuse, and when the expected logic value of the fuse module 10 is 1, the probability of error of the logic value of the fuse module 10 is: . Therefore, the yield of the control embodiment is lower in case, and the yield of the embodiment of the scheme is higher than that of the control embodiment.
Fig. 8 is a schematic flow chart of an alternative control method provided by an embodiment of the present disclosure, which may be used to operate the electronic fuse described above, and which may be executed by the control module, will be described with reference to the steps shown in fig. 8.
S101, controlling the reading logic module 30 to read the initial state of each electronic fuse, wherein an internal register of the reading logic module 30 can store the initial state of each electronic fuse, and can record the position information of each electronic fuse. Then, the judgment logic module 20 outputs the initial state of the logic value of the fuse module 10 for the levels corresponding to the plurality of electronic fuses in each fuse module 10.
S102, for each fuse module, the control module determines whether to burn an electronic fuse in the fuse module according to a target level state of data to be written and an initial state of a logic value of the fuse module; when the initial state is consistent with the target level state of the data to be written, the programming is not needed; when the initial state is inconsistent with the target level state of the data to be written, programming is required. Wherein the target level state of the data to be written is determined by the content to be written.
And S103, if programming is required, the control module sends a programming signal to the programming logic module 40, and controls the programming logic module 40 to perform programming operation on the corresponding electronic fuses so as to program the logic value of each fuse module 10 from the initial state to the target level state corresponding to the data to be written.
In some embodiments of the present disclosure, where n is an odd number, S103 in fig. 1 may be implemented through S201, and the description will be continued with respect to each step.
S201, if the initial state of the logic value is low level and the corresponding target level state of the data to be written is high level, the programming logic module is controlled to perform programming operation on the corresponding electronic fuses, for example, programming is performed on all the electronic fuses, so that the number of the blown electronic fuses in the corresponding fuse module is greater than or equal to (n+1)/2, and the fuse module 10 is programmed from low level to high level.
No programming is required in the following cases: 1. if the initial state of the logic value is high level, the corresponding target level state of the data to be written is low level; 2. if the initial state of the logic value is a low level, the corresponding target level state of the data to be written is a low level; 3. if the initial state of the logic value is a low level and the corresponding target level state of the data to be written is a low level, the programming is not needed.
In some embodiments of the present disclosure, where n is 2, S103 in fig. 1 may be implemented through S301 or S302, and the description will be continued with respect to each step.
S301, if the initial state is at a low level, any one of two electronic fuses of the fuse module is blown, and the position of the electronic fuse subjected to the blowing is recorded.
In the embodiment of the disclosure, referring to fig. 1, in the case where the number of electronic fuses in the fuse module 10 is 2, if the initial state of the logic value of the fuse module 10 is a low level and the target level state of the data to be written is a high level, any one of the two electronic fuses in the fuse module 10 is blown. In this way, when the electronic fuse subjected to the blowing processing fails to be blown normally, another electronic fuse may be blown according to the position information recorded in step S101; thus, the probability of logic value errors is reduced.
S302, if the initial state is high level, blowing out the two electronic fuses of the fuse module.
In the embodiment of the disclosure, referring to fig. 1, when programming the fuse module 10, if the initial state of the logic value of the fuse module 10 is a high level and the target level state of the data to be written is a low level, both electronic fuses in the fuse module 10 are blown.
In some embodiments of the present disclosure, after all the steps of fig. 1 are completed, the control method may further include S401 and S402, which will be further described in connection with the steps.
S401, reading the logic value of each programmed fuse module, and judging whether the level of the logic value of each programmed fuse module is consistent with the target level state of the data to be written.
S402, if the level of the logic value of any one of the programmed fuse modules is inconsistent with the level state of the data to be written, performing secondary programming on the fuse module; if the target level state of the data to be written is at the high level, the electronic fuse that is not blown in the fuse module is blown according to the position of the electronic fuse recorded in step S101.
In the embodiment of the disclosure, referring to fig. 1, it is determined whether the logic level of each fuse module after programming is consistent with the target level state corresponding to the data to be written, and if not, the programming failure is indicated. For example, when writing a high level into the fuse block 10, if the level of the fuse block 10 after programming is a low level, it is described that the electronic fuse subjected to the blowing process cannot be normally blown. At this time, the control module may also control the programming logic module 40 to perform the secondary programming on the fuse module 10, that is, to perform the blowing process on another electronic fuse according to the position of the electronic fuse recorded in step S101. In this way, errors in the logic value of the fuse module 10 can be avoided, thereby improving the yield of the electronic fuse.
In some embodiments, the control method may be implemented through S501 to S509 shown in fig. 9. To clearly illustrate how this control method stores data, it is described in connection with the structure of the storage system in fig. 10. Fig. 10 is a schematic structural diagram of a memory system according to an embodiment of the present disclosure, and it should be noted that fig. 10 specifically illustrates a location of an electronic fuse in a read-only memory. Each data bit (data bit 1 to data bit N in fig. 10) in fig. 10 corresponds to one fuse block 10 and one logic determination block 20 in fig. 1, and one fuse block 10 is used to output one data bit. The plurality of data bits are connected to the address decoder 50 for address control, and read and write operations are performed on the data bits of a specific address.
S501, the initial states of all the fuse modules 10 are read and saved. For example, after the electronic fuse 100 is manufactured, the state of each electronic fuse is read by the read logic module 30, and then the logic determination module 20 determines the initial logic value of each fuse module 10 as the initial state of the fuse module 10.
S502, judging a target level state of data to be written. The control module may learn, for each fuse module, a target level state of data to be written by the fuse module.
S503, judging the initial state of the fuse module. The judging process of this step can be realized by an external control module of the electronic fuse.
If the target level state of the data to be written in the fuse module is 0 and the initial state of the fuse module is also 0, the external control module may control the programming logic module 40 not to perform the blowing operation on the fuse module; if the target level state of the data to be written of the fuse module is 0 and the initial state of the fuse module is 1, step S504 is performed; if the target level state of the data to be written in the fuse module is 1 and the initial state of the fuse module is also 1, the external control module can control the programming logic module 40 not to perform the blowing operation on the fuse module; if the target level state of the data to be written of the fuse block is 1 and the initial state of the fuse block is 0, step S505 is performed.
In the embodiment of the present disclosure, referring to fig. 1 and 10, the programming logic module 40 receives an initial state of data to be written and a data bit, that is, receives an initial state of a logic value of the fuse module 10 and a target level state corresponding to the data to be written. Then, the programming logic module 40 may program the logic value of each fuse module 10 into the target level state corresponding to the data to be written based on the initial state of the logic value of each fuse module 10 and the target level state of the data to be written.
S504, performing one-time programming on two electronic fuses in the fuse module. For example, the external control module may control the programming logic module 40 to perform one programming on both electronic fuses in the fuse module.
In the embodiment of the disclosure, referring to fig. 1 and 10, when the manufacturing defect causes an error in the initial state of the electronic fuse, the programming logic module 40 may restore the logic value of the fuse module 10 to the initial state by programming the fuse module 10. In this way, errors in the logic value of the fuse module 10 can be avoided, thereby improving the yield of the electronic fuse.
S505, programming any one electronic fuse in the fuse module, and recording the programming position. For example, the external control module may control the programming logic module 40 to perform one programming on any one of the electronic fuses in the fuse module.
In the embodiment of the disclosure, referring to fig. 1 and 10, when the initial state of the data bit 60 is a low level and the target level state corresponding to the data to be written is a high level, the programming logic module 40 may program any one of the electronic fuses in the data bit 60.
S506, after the steps are carried out on all the fuse modules, judging whether the unwritten fuse modules exist or not. If there is no unwritten fuse block, step S507 is performed.
S507, reading back all fuse modules.
S508, judging whether a fuse module which is expected to be 1 but is actually 0 exists, if so, proceeding to step S509.
S509, according to the previously recorded programming position, programming another electronic fuse which is not programmed in the fuse module.
In the disclosed embodiment, with reference to fig. 1 and 10, the expected value of the data bit 60 is 1 but actually 0, i.e., the logic value after programming is still low when writing high to the fuse module 10. That is, the electronic fuse subjected to the blowing process cannot be normally blown. The programming logic 40 may also blow another electronic fuse in the fuse module 10 through the recorded location. Thus, the logic value error of the fuse module 10 is avoided, and the yield of the electronic fuse is improved. Meanwhile, compared with the related art, the present disclosure does not need to record the position of the electronic fuses, and all the electronic fuses write the same value in the process of programming the fuse module 10; thus, the burning process is simplified.
The present disclosure also provides a computer-readable storage medium having stored thereon a computer program or instructions that, when executed, cause a computer to perform the control method as in the above-described embodiments. In addition, the control method in the embodiment may be executed by a control module, which may be an upper computer.
Note that the computer readable storage medium may be a Read Only Memory (ROM), a programmable read only memory (Programmable Read-only memory, PROM), an erasable programmable read only memory (Erasable Programmable Read-only memory, EPROM), an electrically erasable programmable read only memory (ELECTRICALLY ERASABLE PROGRAMMABLE READ-only memory, EEPROM), a magnetic random access memory (Ferromagnetic Random Access Memory, FRAM), a flash memory (flash memory), a magnetic surface memory, an optical disk, or a compact disc-read only memory (CD-ROM), or the like; but may be various electronic devices such as mobile phones, computers, tablet devices, personal digital assistants, etc., that include one or any combination of the above-mentioned memories.
The foregoing embodiment numbers of the present disclosure are merely for description and do not represent advantages or disadvantages of the embodiments. The methods disclosed in the several method embodiments provided in the present disclosure may be arbitrarily combined without collision to obtain a new method embodiment. The features disclosed in the several product embodiments provided in the present disclosure may be combined arbitrarily without conflict to obtain new product embodiments. The features disclosed in the several method or apparatus embodiments provided in the present disclosure may be arbitrarily combined without any conflict to obtain new method embodiments or apparatus embodiments.
The foregoing is merely specific embodiments of the disclosure, but the protection scope of the disclosure is not limited thereto, and any person skilled in the art can easily think about changes or substitutions within the technical scope of the disclosure, and it is intended to cover the scope of the disclosure.
Claims (8)
1. An electronic fuse, comprising: the device comprises at least one fuse module, at least one judging logic module, a reading logic module and a programming logic module; wherein,
The fuse module comprises n electronic fuses, n is greater than 2 and is an odd number, and each fuse module corresponds to one data bit;
The reading logic module is connected with at least one fuse module and is configured to read the state of each electronic fuse, wherein the state comprises a fused state or an unblown state;
The judging logic module is connected with the reading logic module and is configured to output logic values according to the states of n electronic fuses in the corresponding fuse module, wherein the number of different states of the n electronic fuses when the logic values are 1 is equal to the number of different states of the n electronic fuses when the logic values are 0;
The programming logic module is connected with at least one fuse module and is configured to receive programming signals and blow the electronic fuse;
each judgment logic module comprises: a first operator module and a second operator module; wherein,
The first operation submodule is configured to perform a first operation on each (n+1)/2 of the n electronic fuses to obtainA first operation result; each electronic fuse performs the first operation with other electronic fuses only once;
The second operator module is configured to perform a second operation on And performing a second operation on the first operation result, and outputting the logic value of the fuse module.
2. The electronic fuse of claim 1, wherein for each of the fuse modules, in the case where n is an odd number, the determination logic module is configured to:
if the number m of the blown electronic fuses is greater than or equal to (n+1)/2, outputting the logic value as a first value; or alternatively
If the number m of the blown electronic fuses is smaller than (n+1)/2, the output logic value is a second value.
3. The electronic fuse of claim 1 wherein said fuse is configured to be electrically connected to said fuse,
The first operation includes an and operation, and the second operation includes an or operation; or alternatively
The first operation includes a NAND operation and the second operation includes a NAND operation.
4. The electronic fuse of claim 2, wherein n is 3 or 5.
5. A control method for operating the electronic fuse of any one of claims 1-4, the control method comprising:
The reading logic module is controlled to read the initial state of each electronic fuse, wherein the judging logic module outputs the initial state of the logic value for each fuse module;
Determining whether the electronic fuse in the fuse module needs to be programmed according to the target level state of the data to be written and the initial state of the logic value of the fuse module; when the initial state is consistent with the target level state of the data to be written, the programming is not needed; when the initial state is inconsistent with the target level state of the data to be written, programming is needed;
If the programming is needed, a programming signal is sent to the programming logic module, and the programming logic module is controlled to perform programming operation on the corresponding electronic fuse.
6. The control method according to claim 5, wherein, in the case where n is an odd number, controlling the programming logic module to perform programming operation on the corresponding electronic fuse includes:
And if the initial state is a low level, controlling the programming logic module to perform programming operation on the corresponding electronic fuses, so that the number of the electronic fuses blown in the corresponding fuse modules is greater than or equal to (n+1)/2.
7. The control method according to claim 5, characterized in that the control method further comprises:
reading the logic value of each programmed fuse module, and judging whether the level of the logic value of each programmed fuse module is consistent with the level state of the data to be written;
If the level of the logic value of any one of the programmed fuse modules is inconsistent with the level state of the data to be written, performing secondary programming on the fuse module; and if the level state of the data to be written is high level, performing blowing processing on the electronic fuse which is not subjected to blowing processing in the fuse module according to the recorded position of the electronic fuse.
8. A computer-readable storage medium, on which a computer program or instructions is stored, characterized in that the computer program or instructions, when executed, cause a computer to perform the control method according to any one of claims 5 to 7.
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