CN117556598A - Modeling method of transient analysis model of power device based on dynamic charge - Google Patents
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- 229910002601 GaN Inorganic materials 0.000 claims description 30
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 29
- 230000010355 oscillation Effects 0.000 claims description 9
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- 239000003990 capacitor Substances 0.000 claims description 7
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Abstract
The invention discloses a modeling method of a transient analysis model of a power device based on dynamic charge, which is characterized in that an accurate switch analysis model of a GaN-HEMT is established, parasitic inductance, nonlinear capacitance and unique reverse characteristics of GaN-HEMTs of a circuit are considered, and compared with other switch analysis models, the method is based on charge balance relation and charge related curve information in a data table, a switch transient analysis model of a half-bridge GaN HEMT is provided, and inaccuracy caused by insufficient dynamic measurement data and strong nonlinear capacitance characteristics available in the data table in other methods is avoided.
Description
Technical Field
The invention relates to the technical field of application of power electronic wide bandgap power devices, in particular to a power device transient analysis model modeling method based on dynamic charges.
Background
In recent years, gallium nitride (GaN) which is a wide-bandgap semiconductor material has become a research hot spot for high-frequency high-power microwave devices and systems due to the advantages of high electron mobility, high thermal conductivity, low dielectric constant and the like. Because of these material advantages, a GaN device can achieve less on-resistance and gate charge than Si and SiC devices with equivalent voltage and current capabilities, which also means that it has better on and switching performance. Unfortunately, the excessive switching speed of GaN HEMTs makes the devices more susceptible to severe switching oscillations that can cause negative effects such as voltage and current overshoots, electromagnetic interference, additional power loss, and even device damage, severely affecting system performance. Therefore, related researches on suppression of switching oscillation of the GaN HEMT device are very necessary. Furthermore, an accurate on-off analysis model is necessary to achieve quantitative suppression of device switching oscillations.
The device model mainly comprises a physical model, a behavior model and an analysis model. Among them, the physical model can achieve a simulation result very close to an experimental result, but it is very time-consuming and requires many parameters related to device fabrication. The behavior model is also called a simulation model, and due to the specificity of the simulation language, the circuit working mode of the device in each switch transient state is difficult to reflect. The analysis model is obtained by carrying out equivalence on each stage of the switching transient state so as to obtain an equivalent sub-circuit model and finally writing an equivalent equation through a circuit basic criterion column. Compared with the former two models, the model has the advantages of good precision and short calculation time, and can clearly show the working state of the device in the transient process.
To date, some existing analysis models of GaN HEMT are mostly directly applied from analysis models of Si or SiC mosfets, and are not suitable for GaN HEMTs. A switch analysis model of GaN hemt has been proposed, but they do not consider the reverse conduction characteristics of the device. Later, although the reverse conduction characteristics were considered during the modeling, the nonlinearity of the GaN HEMT transconductance was not considered, especially near the low current region. The defects of the model are considered, an analytical model of GaN hemt is established, but V is ignored in the description process ds For C gd Is introduced into the error.
Disclosure of Invention
Therefore, the embodiment of the invention provides a modeling method for a transient analysis model of a power device based on dynamic charge, which aims to solve the problem of inaccuracy caused by insufficient dynamic measurement data and nonlinear capacitance characteristics thereof.
In order to achieve the above object, the present invention provides the following technical solutions:
the invention provides a modeling method of a transient analysis model of a power device based on dynamic charges, which comprises the following steps:
an equivalent circuit model based on double pulse test is adopted for a half-bridge circuit structure, and the on and off processes of the device are respectively analyzed and an analysis model is built:
the switching-on process is divided into four stages of a switching-on delay stage, a drain current rising stage, a drain-source voltage falling stage and a switching-on oscillation stage, wherein each stage is described by an equivalent circuit;
the turn-off process is divided into four stages of turn-off delay stage, drain-source voltage rising stage, drain current falling stage and drain current falling stage, and each stage is described by an equivalent circuit;
the state equations of each stage of the turn-on process and the turn-off process comprise at least two state variables, and in order to solve the state equation time domain, the equations are summarized into the form of a five-order state space equation comprising five state variables:
wherein x (t) = [ i ] g ,v gs ,i d ,v ds ,v ds1 ]A and B are coefficient matrixes, comprise modeling results of nonlinear capacitors and transconductance, and adopt Matlab software to calculate numerical solutions of all state quantities.
Preferably, to build a reliable switching model, the nonlinear dynamic capacitance C thereof needs to be set up first gs 、C gd 、C ds And transconductance modeling:
based on the electric performance of the power device, an equivalent circuit of the power device model is obtained, and a nonlinear dynamic capacitor C is obtained gs 、C gd 、C ds And transconductance modeling:
characterizing the charge of the nonlinear capacitance model by adopting Q g -V gs Curve and according to specific on-off process, and notIn the same stage C iss The charged differences are fitted;
modeling the nonlinear transconductance, which represents a channel current i ch And gate-source voltage V gs Nonlinear relationship between the two.
Preferably, a staged fit is used, the basic fit formula being as follows:
C oss is based on Qos-V ds Curve, get fitting formula of Qos:
the resulting parasitic capacitance takes the exact form of the charge representation entirely.
Preferably, modeling the nonlinear transconductance, fitting a transconductance curve by adopting a piecewise fitting method, wherein a fitting equation is specifically expressed as:
preferably, the power device includes:
gallium nitride transistor (GaN HEMT), silicon carbide power device (SiC MOSFET), insulated gate bipolar transistor (IGBTI, nsulatedGateBipolarTransistor).
The embodiment of the invention has the following advantages:
according to the technical scheme provided by the invention, an accurate switch analysis model of the GaN-HEMT is established, parasitic inductance, nonlinear capacitance and unique reverse characteristics of GaN-HEMTs of a circuit are considered, and compared with other switch analysis models, the method provides a switch transient analysis model of the half-bridge GaN HEMT based on charge balance relation and charge related curve information in a data table, and inaccuracy caused by insufficient dynamic measurement data and strong nonlinear capacitance characteristics in the data table in other methods is avoided.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below. It will be apparent to those of ordinary skill in the art that the drawings in the following description are exemplary only and that other implementations can be derived from the drawings provided without undue effort.
The structures, proportions, sizes, etc. shown in the present specification are shown only for the purposes of illustration and description, and are not intended to limit the scope of the invention, which is defined by the claims, so that any structural modifications, changes in proportions, or adjustments of sizes, which do not affect the efficacy or the achievement of the present invention, should fall within the scope of the invention.
Fig. 1 is an equivalent circuit schematic diagram of a GaN HEMT device level model provided by an embodiment of the present invention;
FIG. 2 shows the Q of EPC2045 provided in example 1 of the present invention g -V gs A curve;
FIG. 3 is a circuit diagram of a dual-pulse test with parasitic parameters according to embodiment 1 of the present invention;
fig. 4 is a waveform diagram of a GaN HEM switching process provided in embodiment 1 of the invention;
FIGS. 5 (a) -5 (d) are equivalent circuit diagrams of four stages of the turn-on process provided in example 1 of the present invention;
FIGS. 5e-5h are equivalent circuit diagrams of four stages of the shutdown procedure provided in embodiment 1 of the present invention;
FIGS. 6a-6d are graphs of switching waveform comparisons of a conventional model and a charge model provided by an embodiment of the present invention;
fig. 7a-7f are graphs comparing switching waveforms at different voltages for the on phase and the off phase.
Detailed Description
Other advantages and advantages of the present invention will become apparent to those skilled in the art from the following detailed description, which, by way of illustration, is to be read in connection with certain specific embodiments, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Accurate modeling of C-V characteristics plays a vital role in describing the dynamic switching transients of GaN hemt. In previous studies, the C-V relationship of a device was typically characterized by an empirical formula and curve fitting was performed using the C-V curve in the device data table. This inevitably brings about two major problems. First, the C-V curve is small signal measurement data at a particular frequency in a static condition when the device is in an off state. However, the nonlinear capacitance varies with the bias voltage and frequency of the external signal and is highly dynamic in nature, particularly during the miller phase of the switching transient, and the data of the C-V curve cannot represent the full characteristics of the device during the switching transient. Basically, the charge balance remains physically unchanged and can be used to directly describe the charge/discharge process, which can represent the overall dynamic characteristics of the system and prevent the difficulty of obtaining C-V data by dynamic measurements, rather than just providing a data table. At the same time, Q in the data table g -V gs The data is derived from the dynamic measurement of the device and can be directly used as initial data in the Q-V modeling process. Based on the consideration, based on the charge balance relation and charge related curve information in the data table, a switching transient analysis model of the half-bridge GaN HEMT is provided to avoid inaccuracy caused by insufficient dynamic measurement data and strong nonlinear capacitance characteristics available in the data table.
D GaN HEMT device level model
An equivalent circuit diagram of the E-GaN HEMT device model is shown in FIG. 1, so that the nonlinear dynamic capacitor C is needed to be established for a reliable switch model gs 、C gd 、C ds And transconductance modeling.
(1) Charge characterization of the nonlinear capacitance model:
FIG. 2 shows Q of EPC2045 g -V gs A curve.
As shown in FIG. 2, Q in the data sheet g -V gs The curve shows the dynamic process of the GaN HEMT device under certain test conditions, and the gate charge (Q g ) For measuring the amount of charge input from the gate in order to turn on to a certain voltage. The gate charge is more significant to the driver circuit designer than the parasitic capacitance, which is not sufficiently accurate to indicate its capacitance value at a certain fixed voltage because its input capacitance is non-linear. Q for EPC2045 g -V gs The curve can be seen at Q g <Q gth When=1.3 nC, the device is not yet on, and at this time, mainly given to C gs Charging; reach Q gth After starting to conduct, C iss Is charged; v (V) gs About=2.3v enters miller plateau, when the gate current is given to C gd Charging; q (Q) g The miller plateau phase ends at about 2.7nC, continuing to give C iss And (5) charging. Thus C iss Is characterized by Q g -V gs Curve, and according to specific on-off process, consider different stage C iss Charged differences and stage fits are made. The basic fitting formula is as follows:
similarly, C oss Can be referred to the Q of the datasheet oss -V ds Curve to obtain Q oss Is a fitting formula of (2).
The resulting parasitic capacitance thus takes the exact form of the charge representation entirely.
(2) Nonlinear transconductance modeling of GaN HEMTs:
(3)the transconductance represents the channel current i ch And gate-source voltage V gs Nonlinear relationship between the two. The transconductance curve is fitted by adopting a segmentation fitting method, and a fitting equation is specifically expressed as follows:
1) Charge-initiated GaN HEMT switching process modeling
The GaN HEMT double pulse test equivalent circuit model taking into account the effect of parasitic parameters is shown in fig. 3. Wherein Q2 and Q1 are respectively the driving tube and the driven tube of the test circuit, C gs Is parasitic capacitance of gate and source, C gd For parasitic capacitance of drain and source, C ds Is the parasitic capacitance of the gate and the drain. L (L) S Parasitic inductance L of source line d Parasitic inductance L of drain line g L is parasitic inductance between the gate drive loop and the device loop R is the total stray inductance of the power loop g To drive the resistor.
The waveform of the switching process of the GaN HEMT device is shown in fig. 4, and the switching-on and switching-off processes of the device are respectively analyzed in detail and an analysis model is built.
And (1) opening the process: the opening process is divided into four phases, each of which can be described by an equivalent circuit from which the corresponding equations can be listed.
First stage (t 0-t 1): delay stage of opening
The equivalent circuit at this stage is shown in FIG. 5 (a), driving power V g Input a high level, the signal goes from low to high, C gs Is charged V gs Rising. During this phase, the drive tube Q2 is in an off state; drain voltage V ds And drain current i d No change occurs. The state equation at this stage is as follows:
second stage (t 1-t 2): drain current rising stage
The equivalent circuit at this stage is shown in FIG. 5 (b), at time t1, V gs Reaching the threshold voltage V th Thereafter, the drive tube Q2 is in the saturation region and the channel of Q2 begins to conduct. Channel current i ch Can be represented by formula (3). Gate drive voltage V g Continuing to supply the input capacitance C iss Charging, gate-source voltage V gs And continues to increase. Load current i due to channel open L Gradually transfer to GaN HEMT channel, its drain current I d Rapidly increasing due to parasitic inductance L of the power loop loop Generates a drain-source voltage V ds Reverse voltage, drain-source voltage V ds Slightly decrease while the passive tube Q1 is in reverse conduction phase, when the drain current id increases to the load current I L At the end of this stage, the gate-source voltage V gs Reaching near the miller plateau voltage Vmiller. The state equation at this stage is as follows:
third stage (t 2-t 3): drain-source voltage drop stage
As shown in fig. 5 (c), the drain current i is at time t2 d Reaching the load current I L Output of Q2Capacitor C oss Rapidly discharge, so V ds Rapidly decrease, while the output capacitance C of Q1 oss 1, and the induced voltage on the parasitic capacitance due to the high speed change of dv/dt will cause id current to overshoot. At this time, V gs Rising to Miller plateau voltage Vmiller, gate current ig gives gate-drain capacitance C gd Charge to almost rarely give the gate-source capacitance C gs Charging, thus stage C gd The effect on dv/dt is great, but due to C gd The miller plateau time is short because of the small size, which is also why GaN HEMTs can be switched at high speed. When the drain-source voltage V ds When falling to 0V, this phase ends.
Fourth stage (t 3-t 4): switching on the oscillation phase
The equivalent circuit is shown in FIG. 5 (d), when the drain-source voltage V of the driving tube Q2 ds After the voltage drops to 0V, the channel is basically closed, and the GaN HEMT is in a variable resistance region and is resistive. Gate input driving voltage V g Will continue to the input capacitance C iss Charging, and finally achieving the driving forward direction. Voltage V CC Parasitic inductor current in the line charges the parasitic capacitance, resulting in voltage overshoot. At this time, L loop And the parasitic inductance of the circuit forms a second-order oscillating circuit, voltage and current oscillation can be generated, and the system can be gradually stabilized under the action of Ron. The equation for this stage is:
(II) shutdown procedure: similar to the turn-on process, the turn-off process is still divided into four phases, each of which may be described by an equivalent circuit from which the corresponding equations may be listed.
Fifth stage (t 5-t 6): off delay stage
The equivalent circuit at this stage is shown in FIG. 5 (e), driving power V g The input signal changes from high level to 0, V gs Decline, C iss The discharge is started. In this stage, the drain voltage V ds And drain current i d No change occurs. At time t6, V gs Down to miller plateau voltage V miller This phase ends. The state equation at this stage is as follows:
sixth stage (t 6-t 7): drain-source voltage rising stage
As the driving voltage decreases, the channel current of Q2 starts to decrease, giving C as shown in FIG. 5 (f) oss Charging V ds And starts to increase. Meanwhile, the output capacitance C of Q1 oss Discharge, thus i d The decrease starts. When V is ds Increased to V in +V r When this phase ends. The equivalent circuit of the process is similar to the third stage of the opening process, and the only difference is the driving voltage V g =0. The state equation at this stage is as follows:
seventh stage (t 7-t 8): drain current drop stage
With V gs Reduced to threshold voltage V th ，i d Quick take-downDown to 0A, this phase ends. And the Q2 channel is closed, the device is turned off, and the high speed di/dt generates a voltage V with the drain and the source on the parasitic inductance of the power loop ds The voltages in the same direction result in drain-source voltage V ds Rise and generate an overshoot voltage Δvp to cause V ds An overvoltage is generated. As shown in fig. 5 (g), the equivalent circuit at this stage is shown as follows:
eighth stage (t 8-t 9): drain current drop stage
The equivalent circuit diagram of this stage is shown in FIG. 5 (h), in which Q1 is turned off and Q2 is turned on in the opposite direction. L (L) loop And C oss Forming a second-order oscillating circuit, resulting in a drain current id and a drain-source voltage V ds Is provided. Typically, this is an under damped system and the process ends when the oscillations are completely damped. The process may list the following equation:
the state equations listed above for each stage of the on-process and off-process include at least two state variables, which can be uniformly written in the form of a 5-order state space equation including 5 state variables for solving the state equation time domain solution:
wherein x (t) = [ i ] g ,v gs ,i d ,v ds ,v ds1 ]A and B are coefficient matrixes, comprise modeling results of nonlinear capacitors and transconductance, and adopt Matlab software to calculate numerical solutions of all state quantities.
In order to verify the effectiveness of the proposed switch model, the traditional capacitance model is compared with the charge-based switch analysis model proposed by the patent and the LTspice simulation result. Table 1 is some key parameters of the simulation and experiment system, as shown in fig. 6, compared with a traditional model based on capacitor construction, the analysis model provided herein has better matching with LTspice simulation results and higher accuracy, wherein the change rate of voltage and current is basically consistent with the oscillation frequency, and the model in the off state and the LTspice simulation results even show strong consistency.
Next, to verify the universality of the model in the low-voltage state and the high-voltage state, the matching effect is good under the conditions of vdc=12v, 48v and 80v compared with LTspice simulation results, as shown in fig. 7. Therefore, the analysis model for representing the GaN HEMT switching process by using the electric charge can accurately study the working state of the GaN HEMT in the transient state in the large signal state and the small signal state.
In summary, the invention has the following advantages:
according to the technical scheme provided by the invention, an accurate switch analysis model of the GaN-HEMT is established, and parasitic inductance, nonlinear capacitance and unique reverse characteristics of GaN-HEMTs of a circuit are considered.
Compared with other on-off analysis models, the method provides a on-off transient analysis model of the half-bridge GaN HEMT based on the charge balance relation and charge related curve information in the data table, and avoids inaccuracy caused by insufficient dynamic measurement data and strong nonlinear capacitance characteristics in the data table in other methods.
While the invention has been described in detail in the foregoing general description and specific examples, it will be apparent to those skilled in the art that modifications and improvements can be made thereto. Accordingly, such modifications or improvements may be made without departing from the spirit of the invention and are intended to be within the scope of the invention as claimed.
Claims (5)
1. The modeling method of the transient analysis model of the power device based on the dynamic charge is characterized by comprising the following steps of:
an equivalent circuit model based on double pulse test is adopted for a half-bridge circuit structure, and the on and off processes of the device are respectively analyzed and an analysis model is built:
the switching-on process is divided into four stages of a switching-on delay stage, a drain current rising stage, a drain-source voltage falling stage and a switching-on oscillation stage, wherein each stage is described by an equivalent circuit;
the turn-off process is divided into four stages of turn-off delay stage, drain-source voltage rising stage, drain current falling stage and drain current falling stage, and each stage is described by an equivalent circuit;
the state equations of each stage of the turn-on process and the turn-off process comprise at least two state variables, and in order to solve the state equation time domain, the equations are summarized into the form of a five-order state space equation comprising five state variables:
wherein x (t) = [ i ] g ,v gs ,i d ,v ds ,v ds1 ]A and B are coefficient matrixes, comprise modeling results of nonlinear capacitors and transconductance, and adopt Matlab software to calculate numerical solutions of all state quantities.
2. The modeling method of transient analysis model of power device of claim 1,
to build a reliable switch model, the nonlinear dynamic capacitance C of the switch model needs to be firstly set gs 、C gd 、C ds And transconductance modeling:
based on the electric performance of the power device, an equivalent circuit of the power device model is obtained, and a nonlinear dynamic capacitor C is obtained gs 、C gd 、C ds And transconductance modeling:
characterizing the charge of the nonlinear capacitance model by adopting Q g -V gs Curve and according to specific on-off process, and different stage C iss The charged differences are fitted;
modeling the nonlinear transconductance, which represents a channel current i ch And gate-source voltage V gs Nonlinear relationship between the two.
3. The modeling method of transient analysis model of power device of claim 2, wherein,
the fitting is a staged fitting, and the basic fitting formula is as follows:
C oss is based on Qos-V ds Curve, get fitting formula of Qos:
the resulting parasitic capacitance takes the exact form of the charge representation entirely.
4. The modeling method of transient analysis model of power device according to claim 2, wherein modeling said nonlinear transconductance, fitting a transconductance curve by a piecewise fitting method, and the fitting equation is specifically expressed as:
5. the power device transient analysis model modeling method of claim 1, wherein said power device comprises:
gallium nitride transistors (GaN HEMTs), silicon carbide power devices (SiC MOSFETs), insulated Gate Bipolar Transistors (IGBTIs).
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