CN117475848A

CN117475848A - Display panel, driving method thereof and electronic terminal

Info

Publication number: CN117475848A
Application number: CN202311229933.3A
Authority: CN
Inventors: 郭耀明
Original assignee: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
Current assignee: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
Priority date: 2023-09-20
Filing date: 2023-09-20
Publication date: 2024-01-30

Abstract

The invention provides a display panel, a driving method thereof and an electronic terminal, wherein the display panel comprises the following components: each pixel group comprises a plurality of pixel units, and each pixel unit at least comprises a first sub-pixel and a second sub-pixel which are different in color; the number of the source lines is smaller than that of the pixel groups, the first source lines are electrically connected to the first sub-pixels in the first pixel groups and the first sub-pixels in the second pixel groups in a time sharing manner, and the second source lines are electrically connected to the second sub-pixels in the first pixel groups and the second sub-pixels in the second pixel groups in a time sharing manner; the driving chip is electrically connected to the source lines and is used for transmitting first data information corresponding to the first pixel groups and second data information corresponding to the second pixel groups to the source lines in a time-sharing mode, so that resolution of the display panel is achieved, and cost is reduced.

Description

Display panel, driving method thereof and electronic terminal

Technical Field

The invention relates to the technical field of display, in particular to manufacturing of a display device, and specifically relates to a display panel, a driving method thereof and an electronic terminal.

Background

Display panels are used as electronic devices such as televisions, desktop computers, notebooks, and cellular phones, and transmit information to users through screen display.

At present, a large number of devices and circuits are integrated in the display panel, especially in large-size equipment, the number of sub-pixels is increased, that is, the resolution is increased, so that the number of circuits connected with a chip is increased, and the manufacturing cost of the display panel is greatly increased.

Therefore, the manufacturing cost of the conventional display panel is high, and improvement is urgently required.

Disclosure of Invention

The invention aims to provide a display panel, a driving method thereof and an electronic terminal, so as to solve the problem that the manufacturing cost is high because the resolution of the display panel is considered.

An embodiment of the present invention provides a display panel including:

the pixel units at least comprise first sub-pixels and second sub-pixels with different colors;

the number of the source lines is smaller than that of the pixel groups, the source lines at least comprise a plurality of first source lines and a plurality of second source lines, the first source lines are electrically connected to the first sub-pixels in the first pixel groups and the first sub-pixels in the second pixel groups in a time sharing manner, and the second source lines are electrically connected to the second sub-pixels in the first pixel groups and the second sub-pixels in the second pixel groups in a time sharing manner;

The driving chip is electrically connected to the source lines and is used for transmitting first data information corresponding to the first pixel groups and second data information corresponding to the second pixel groups to the source lines in a time-sharing mode.

In an embodiment, at least one second pixel group is disposed between two adjacent first pixel groups, and at least one first pixel group is disposed between two adjacent second pixel groups.

In an embodiment, the driving chip is configured to receive a plurality of initial frame image information corresponding to a plurality of initial frames, where each of the initial frame image information includes a first sub-initial frame image information corresponding to a plurality of the first pixel groups and a second sub-initial frame image information corresponding to a plurality of the second pixel groups;

in a first frame, the driving chip is electrically connected to a plurality of first pixel groups through a plurality of source lines, so as to be used for transmitting the first data information generated according to the first sub-initial frame image information of one of the initial frame image information;

in a second frame adjacent to the first frame, the driving chip is electrically connected to a plurality of the second pixel groups through a plurality of the source lines for transmitting the second data information generated according to the second sub-initial frame image information of the other of the initial frame image information.

in a second frame adjacent to the first frame, the driving chip is electrically connected to a plurality of the second pixel groups through a plurality of the source lines, so as to be used for transmitting the second data information generated according to the second sub-initial frame image information of the same initial frame image information.

In an embodiment, further comprising:

the switch module comprises a plurality of switch units, wherein the input ends of the switch units are electrically connected with the corresponding source lines, and the output ends of the switch units are at least electrically connected with the corresponding first pixel groups and the corresponding second pixel groups;

The switch module is used for responding to a control signal to electrically connect the corresponding source line to the corresponding first pixel group and the corresponding second pixel group in a time-sharing manner.

In one embodiment, the driving chip includes:

the frame buffer module is used for receiving a plurality of initial frame image information, generating first initial data information according to the corresponding first sub-initial frame image information, and generating second initial data information according to the corresponding second sub-initial frame image information;

the time sequence control module is electrically connected with the frame buffer module and is used for generating an initial comprehensive data signal and the control signal according to the first initial data information and the second initial data information;

the source electrode driving module is electrically connected between the time sequence control module and the source electrode lines and is used for generating a target comprehensive data signal according to the initial comprehensive data signal, wherein the target comprehensive data signal comprises the first data information and the second data information.

The embodiment of the invention also provides a driving method of a display panel, which is used for driving the display panel according to any one of the above, and the driving method comprises the following steps:

In a first frame, controlling the driving chip to transmit first data information corresponding to a plurality of first pixel groups to a plurality of source lines, controlling the plurality of first source lines to be electrically connected to a plurality of first sub-pixels in the plurality of first pixel groups, and controlling the plurality of second source lines to be electrically connected to a plurality of second sub-pixels in the plurality of first pixel groups;

in a second frame adjacent to the first frame, controlling the driving chip to transmit second data information corresponding to a plurality of second pixel groups to a plurality of source lines, controlling a plurality of first source lines to be electrically connected to a plurality of first sub-pixels in a plurality of first pixel groups, and controlling a plurality of second source lines to be electrically connected to a plurality of second sub-pixels in a plurality of first pixel groups;

The step of controlling the driving chip to transmit first data information corresponding to the plurality of first pixel groups to the plurality of source lines includes:

the driving chip generates the first data information according to the first sub-initial frame image information of one of the initial frame image information, and transmits the first data information to a plurality of source lines;

the step of controlling the driving chip to transmit second data information corresponding to the plurality of second pixel groups to the plurality of source lines includes:

the driving chip generates the second data information according to the second sub-initial frame image information of the other initial frame image information, and transmits the second data information to a plurality of source lines.

the driving chip generates the second data information according to the second sub-initial frame image information of the same initial frame image information, and transmits the second data information to a plurality of source lines.

The embodiment of the invention also provides an electronic terminal, which comprises the display panel according to any one of the above.

The invention provides a display panel, a driving method thereof and an electronic terminal, wherein a first source line is electrically connected to a plurality of first sub-pixels in a plurality of first pixel groups and a plurality of first sub-pixels in a plurality of second pixel groups in a time sharing manner, and a plurality of second source lines are electrically connected to a plurality of second sub-pixels in a plurality of first pixel groups and a plurality of second sub-pixels in a plurality of second pixel groups in a time sharing manner, so that the number of first source lines and the number of second source lines are reduced, and the manufacturing cost of the display panel can be reduced when the resolution of the display panel is considered.

Drawings

The invention is further illustrated by the following figures. It should be noted that the drawings in the following description are only for illustrating some embodiments of the invention, and that other drawings may be obtained from these drawings by those skilled in the art without the inventive effort.

Fig. 1 is a schematic top view of a display panel according to an embodiment of the invention.

Fig. 2 is a waveform diagram of a portion of signals in a display panel according to an embodiment of the invention.

Fig. 3 is a schematic connection diagram of a module of a display panel according to an embodiment of the invention.

Fig. 4 is a flowchart of a driving method of a display panel according to an embodiment of the invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. It will be apparent that the described embodiments are only some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to fall within the scope of the invention.

In the description of the present invention, it should be understood that the terms "forward," "rearward," "forward," and the like indicate an orientation or a positional relationship based on that shown in the drawings, and the above orientation or positional relationship is merely for convenience of describing the present invention and simplifying the description, and does not indicate or imply that the apparatus or element to be referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more of the described features. In the description of the present invention, the meaning of "a plurality of" means two or more, and unless specifically defined otherwise, "electrically connected" means that the two are electrically connected, and is not limited to direct connection or indirect connection.

In addition, it should be noted that the drawings merely provide structures and steps closely related to the present invention, and some details not related to the present invention are omitted, so as to simplify the drawings, and make the points of the present invention clear, not to indicate that the actual device is the same as the drawings, and not to limit the actual device.

The present invention provides display panels that may include, but are not limited to, the following embodiments and combinations between the following embodiments.

In one embodiment, as shown in fig. 1, the display panel 100 includes: the pixel groups 10 include a plurality of first pixel groups 101 and a plurality of second pixel groups 102, each pixel group 10 includes a plurality of pixel units 01, each pixel unit 01 includes at least a first sub-pixel 011 and a second sub-pixel 012 with different colors, and the plurality of first sub-pixels 011 and the plurality of second sub-pixels 012 in the same pixel group 10 are electrically connected; the number of the source lines 20 is smaller than that of the pixel groups 10, and at least includes a plurality of first source lines 201 and a plurality of second source lines 202, wherein the plurality of first source lines 201 are electrically connected to the plurality of first sub-pixels 011 in the plurality of first pixel groups 101 and the plurality of first sub-pixels 011 in the plurality of second pixel groups 102 in a time sharing manner, and the plurality of second source lines 202 are electrically connected to the plurality of second sub-pixels 012 in the plurality of first pixel groups 101 and the plurality of second sub-pixels 012 in the plurality of second pixel groups 102 in a time sharing manner; the driving chip 30 is electrically connected to the source lines 20, and is configured to transmit first data information data a corresponding to the first pixel groups 101 and second data information data B corresponding to the second pixel groups 102 to the source lines 20 in a time-sharing manner.

The type of the display panel 100 is not limited in this embodiment, and the display panel 100 may include, but is not limited to, a self-luminous display panel or a liquid crystal display panel. The display panel 100 may include a plurality of pixel units 01, where the pixel units 01 may be understood as the smallest repeating units, and the pixel group 10 in this embodiment may be formed by a plurality of pixel units 01, and each pixel unit 01 may include a plurality of sub-pixels (including, but not limited to, the first sub-pixel 011 and the second sub-pixel 012 described above) with different colors for convenience of description, and the plurality of pixel units 01 are described in the present invention by taking a row direction and a column direction as an example.

Further, the display panel 100 may further include a plurality of gate lines and a plurality of data lines, each gate line may be electrically connected to a plurality of sub-pixels located in the same row, each data line may be electrically connected to a plurality of sub-pixels located in the same column, the plurality of rows of sub-pixels are turned on under the control of a plurality of gate signals transmitted by the corresponding plurality of gate lines, and when the sub-pixels in the next row are turned on, the sub-pixels in the previous rows may be maintained in an on state, and when the sub-pixels in each row are turned on for the first time, the plurality of sub-pixels may be loaded with a plurality of data voltages corresponding to the corresponding plurality of data lines, so as to emit light with corresponding brightness. For each data line, a plurality of data voltages corresponding to a plurality of sub-pixels in at least one corresponding column of sub-pixels may be sequentially transmitted, where the plurality of data voltages are configured as data signals corresponding to the data lines, and a period of time when the plurality of data voltages reach the corresponding sub-pixels should be matched with a period of time when the corresponding sub-pixels are turned on for the first time (i.e., at least includes an overlapping period of time).

Specifically, the pixel unit 01 includes first and second sub-pixels 011, 012 of different colors, and here, a third sub-pixel 013 further including another color is illustrated, and the first, second, and third sub-pixels 011, 012, 013 in each sub-pixel unit 01 are arranged in the row direction. That is, the pixel group 10 in the present invention may include at least three columns of subpixels (one column of first subpixels 011, one column of second subpixels 012, one column of third subpixels 013 arranged in order).

Still further, the driving chip 30 in this embodiment may be electrically connected to the corresponding plurality of data lines through the plurality of source lines 20, so as to respectively transmit the corresponding plurality of data signals to the corresponding plurality of columns of sub-pixels, thereby respectively transmitting the corresponding data voltages to the corresponding plurality of sub-pixels in each column of sub-pixels. Therefore, it can be considered that the number of source lines 20 may be equal to the number of columns of sub-pixels (i.e. the number of data lines), for example, three times the number of pixel groups 10, and the number of source lines 20 electrically connects the plurality of pixel units 01 and the driving chip 30, so that when the number of pixel units 01 in the display panel 100 is greater, the demand for the source lines 20 increases, resulting in an increase in the cost of the display panel 100.

It can be understood that the number of the source lines 20 is set to be smaller than the number of the pixel groups 10 in the present embodiment, wherein the plurality of first source lines 201 are electrically connected to the plurality of first sub-pixels 011 in the plurality of first pixel groups 101 and the plurality of first sub-pixels 011 in the plurality of second pixel groups 102 in a time-sharing manner, that is, the first source lines 201 are electrically connected to the corresponding plurality of first sub-pixels 011 in the different pixel groups 10 in different time periods, so that the plurality of first source lines 201 are not separately electrically connected to the corresponding plurality of first sub-pixels 011 in the different pixel groups 10, so that the number of first source lines 201 is reduced, and it can be understood that each first source line 201 can be electrically connected to at least the corresponding plurality of first sub-pixels 011 in the corresponding first pixel groups 101 or the second pixel groups 102 in a time-sharing manner, and, of course, if the types of the pixel groups 10 are larger than two, the first source lines 201 can be electrically connected to the corresponding plurality of first sub-pixels 011 in all the pixel groups 10 in a time-sharing manner.

Similarly, the plurality of second source lines 202 are electrically connected to the plurality of second sub-pixels 012 in the plurality of first pixel groups 101 and the plurality of second sub-pixels 012 in the plurality of second pixel groups 102 in a time-sharing manner, so as to reduce the number of second source lines 202; further, the plurality of source lines 20 may further include a plurality of third source lines 203 based on the pixel unit 01 further includes a third sub-pixel 013, and the plurality of third source lines 203 are electrically connected to the plurality of third sub-pixels 013 in the plurality of first pixel groups 101 and the plurality of third sub-pixels 013 in the plurality of second pixel groups 102 in a time-sharing manner, so as to reduce the number of third source lines 203.

In this embodiment, the arrangement order of the first pixel group 101 and the second pixel group 102 is not limited, and the first pixel group 101 and the second pixel group 102 may be separately arranged or alternatively arranged, and the driving chip 30 may be considered to time-division control the plurality of first pixel groups 101 and the plurality of second pixel groups 102 to perform the image display. Of course, if there are third pixel groups different from the first pixel group 101 and the second pixel group 102, the plurality of third pixel groups may be controlled to perform the screen display in still another period.

In one embodiment, as shown in fig. 1, at least one second pixel set 102 is disposed between two adjacent first pixel sets 101, and at least one first pixel set 101 is disposed between two adjacent second pixel sets 102. Specifically, in this embodiment, the arrangement sequence of the first pixel group 101 and the second pixel group 102 is defined, that is, the two pixel groups may be staggered, that is, the first pixel group 101 and the second pixel group 102 are staggered with respect to a plurality of first pixel groups 101 and second pixel groups 102 for performing image display in different time periods, so that the boundary of two image displays may have an intersection in space, even if the refresh rate is lower, due to the intersection of the areas covered by the two image displays, the tearing feeling of the image display or the dual-image display feeling may be reduced.

Further, as shown in fig. 1, the first pixel groups 101 and the second pixel groups 102 are alternately arranged. As can be seen from the above discussion, in this embodiment, since the first pixel groups 101 and the second pixel groups 102 are alternately arranged, that is, the pixel groups 10 in the odd columns and the pixel groups 10 in the even columns in the display panel 100 alternately perform the image display, the size of the area covered by the image display is extremely large, even any one of the image electrodes can be considered to be a complete image, the similarity of the overall (including the display position and the display content) of the image display performed continuously twice is extremely high, and the fluency of the image display is improved.

In an embodiment, as shown in fig. 1 and fig. 2, the driving chip 30 is configured to receive a plurality of initial frame image information corresponding to a plurality of initial frames, where each of the initial frame image information includes first sub-initial frame image information corresponding to a plurality of the first pixel groups 101 and second sub-initial frame image information corresponding to a plurality of the second pixel groups 102; in a first frame, the driving chip 30 is electrically connected to the plurality of first pixel groups 101 through the plurality of source lines 20, so as to transmit the first data information data a generated according to the first sub-initial frame image information of one of the initial frame image information; in a second frame adjacent to the first frame, the driving chip 30 is electrically connected to the plurality of second pixel groups 102 through the plurality of source lines 20 for transmitting the second data information data B generated according to the second sub-initial frame image information of the other initial frame image information.

The initial frame may be understood as a frame number preset for display before the display panel 100 performs the image display, and the corresponding initial frame image information may be used to control all the pixel units 01 to perform the image display, where information for controlling the plurality of first pixel groups 101 to display the initial frame image is referred to as first sub-initial frame image information, and information for controlling the plurality of second pixel groups 102 to display the initial frame image is referred to as second sub-initial frame image information.

Further, the present embodiment controls, for a first frame and a second frame that are adjacently disposed, the plurality of first pixel groups 101 to be loaded with first data information data a generated from first sub-initial frame image information of one of the initial frame image information (corresponding to one of the initial frames) in the first frame so as to correspond to a picture that displays a corresponding position in the initial frame, and controls the plurality of second pixel groups 102 to be loaded with second data information data B generated from second sub-initial frame image information of the other initial frame image information (corresponding to the other initial frame) in the second frame so as to correspond to a picture that displays a corresponding other position in the other initial frame.

The initial frame corresponding to the "another initial frame image information" may be located after the initial frame corresponding to the "one of the initial frame image information". That is, in this embodiment, pictures at positions corresponding to the two initial frames, respectively, may be displayed in two adjacent frames, respectively, and the two positions are different, so that the driving chip 30 may transmit only the data signal (the first data information data a or the second data information data B) generated according to the sub-initial frame image information (the first sub-initial frame image information or the second sub-initial frame image information) corresponding to the display position (the position where the plurality of first pixel groups 101 or the plurality of second pixel groups 102 are located) in the corresponding initial frame image information in each frame.

In one embodiment, as shown in connection with fig. 1 and 2, the display panel 100 further includes: the switch module includes a plurality of switch units 40, wherein input ends of the switch units are electrically connected to the corresponding source lines 20, and output ends of the switch units 40 are electrically connected to at least the corresponding first pixel groups 101 and the corresponding second pixel groups 102; the switch module is configured to respond to the control signal Con to electrically connect the corresponding source line 20 to the corresponding first pixel group 101 and the corresponding second pixel group 102 in a time-sharing manner.

Specifically, the plurality of switch units 40 may include a plurality of first switch units 401 corresponding to the plurality of first source lines 201, a plurality of second switch units 402 corresponding to the plurality of second source lines 202, wherein an input end of each first switch unit 401 is electrically connected to the corresponding first source line 201, two output ends of each first switch unit 401 are respectively electrically connected to a plurality of first sub-pixels 011 in the corresponding first pixel group 101, a plurality of first sub-pixels 011 in the corresponding second pixel group 102, an input end of each second switch unit 402 is electrically connected to the corresponding second source line 202, and two output ends of each first switch unit 401 are respectively electrically connected to a plurality of second sub-pixels 012 in the corresponding first pixel group 101 and a plurality of second sub-pixels 012 in the corresponding second pixel group 102.

Wherein the number of input terminals of the switching unit 40 may be 1, and the number of output terminals may be equal to the number of kinds of pixel groups. Further, if the pixel unit 01 further includes a third sub-pixel 013, the plurality of switch units 40 may further include a plurality of third switch units 403 corresponding to the plurality of third source lines 203, and similarly, an input end of the third switch unit 403 is electrically connected to the third source line 203, and two output ends of the third switch unit 403 are respectively electrically connected to the plurality of third sub-pixels 013 in the corresponding first pixel group 101 and the plurality of third sub-pixels 013 in the corresponding second pixel group 102.

In the present embodiment, the specific structure of each switch unit 40 is not limited, and the number of input terminals and output terminals is only required to meet the above requirement and can be controlled by the control signal Con. Further, the Switch unit 40 may include two sub-Switch units, where the two sub-Switch units connect the corresponding source lines 20 to the corresponding first pixel groups 101 and the corresponding second pixel groups 102, respectively, the control signal Con may include a first control signal Switch a and a second control signal Switch B, and the control ends of the two Switch units load the first control signal Switch a and the second control signal Switch B, respectively, where the first control signal Switch a may be used to control whether the corresponding source lines 20 are electrically connected to the corresponding first pixel groups 101, and the second control signal Switch B may be used to control whether the corresponding source lines 20 are electrically connected to the corresponding second pixel groups 102.

It should be noted that, since the source line 20 needs to be electrically connected to the corresponding first pixel group 101 and the corresponding second pixel group 102 in a time-sharing manner, i.e. the time periods when the two sub-switch units in the corresponding switch unit 40 are turned on cannot be overlapped. Specifically, in connection with fig. 1 and 2, the plurality of pixel groups 10 are described herein as including only the plurality of first pixel groups 101 and the plurality of second pixel groups 102, that is, the active levels of the first control signal Switch a and the second control signal Switch B may not overlap, for example, the active levels of the first control signal Switch a and the second control signal Switch B may be high, and the high level period of the first control signal Switch a may be set corresponding to the low level period of the second control signal Switch B, and the low level period of the first control signal Switch a may be set corresponding to the high level period of the second control signal Switch B.

In one embodiment, as shown in fig. 3, the driving chip 30 includes: a frame buffer module 301, configured to receive a plurality of the initial frame image information, and generate first initial data information according to the corresponding first sub-initial frame image information, and generate second initial data information according to the corresponding second sub-initial frame image information; the timing control module 302, electrically connected to the frame buffer module 301, is configured to generate an initial integrated Data signal Data1 and the control signal Con (including a first control signal Switch a and a second control signal Switch B) according to the first initial Data information and the second initial Data information; the source driving module 303 is electrically connected between the timing control module 302 and the source lines 20, and is configured to generate a target integrated Data signal Data 2 according to the initial integrated Data signal Data1, and as shown in fig. 2 and 3, the target integrated Data signal Data 2 includes the first Data information Data a and the second Data information Data B.

Specifically, the display panel 100 may further include a main board 50 (i.e., a signal source), where the main board 50 is exemplified to transmit a plurality of initial frame image information at a frequency of 120HZ, that is, 120 initial frame image information corresponding to 120 frames per second may be transmitted, and each initial frame image information corresponding to each frame includes first initial data information corresponding to a plurality of first pixel groups and second initial data information corresponding to a plurality of second pixel groups; further, based on the assumption that the initial frame corresponding to the "another initial frame image information" is located after the initial frame corresponding to the "one of the initial frame image information", the timing control module 302 may extract the first initial Data information in the previous initial frame image information and discard the corresponding second initial Data information, and extract the first initial Data information in the subsequent initial frame image information and discard the corresponding first initial Data information, and maintain a time period in which the corresponding first initial Data information or the second initial Data information is located entirely, that is, the initial integrated Data signal Data1 is still transmitted at a frequency of 120HZ, where a sum of each initial Data information or the second initial Data information and the corresponding frame blanking duration is still equal to 8.333ms.

Still further, as shown in fig. 2 and 3, the source driving module 303 may perform corresponding processing on each first initial Data information in the initial integrated Data signal Data1 to generate corresponding first Data information Data a, and perform corresponding processing on each second initial Data information in the initial integrated Data signal Data1 to generate corresponding second Data information Data B, where the formed target integrated Data signal Data 2 also includes first Data information Data a (e.g., initial frame image information from an odd frame) and second Data information Data B (e.g., initial frame image information from an even frame) that are alternately arranged.

Still further, as shown in fig. 1 to 3, each of the Switch units 40 turns on the electrical connection between the source line 20 and the corresponding first pixel group 101 (e.g. Switch a is at a high level and Switch B is at a low level) under the action of the corresponding first control signal Switch a and the second control signal Switch B, so as to transmit the first data information data a transmitted at this time to the corresponding first pixel group 101, or turns on the electrical connection between the source line 20 and the corresponding second pixel group 102 (e.g. Switch a is at a low level and Switch B is at a high level), so as to transmit the second data information data B transmitted at this time to the corresponding second pixel group 102.

It can be understood that in this embodiment, only the first data information data a corresponding to the first pixel group 101 or the second data information data B corresponding to the second pixel group 102 is transmitted in each frame, and both are from the initial frame image information of different frames, because the first pixel group 101 and the second pixel group 102 are staggered, the frame can still maintain the original resolution, but the transmission of the data amount can be reduced in each frame, and the power consumption of the display panel can be reduced.

In an embodiment, as shown in fig. 1 to 3, in comparison with the case where the initial frame corresponding to "another initial frame image information" is located after the initial frame corresponding to "one of the initial frame image information", it may be set that: in the first frame, the driving chip 30 is electrically connected to the plurality of first pixel groups 101 through the plurality of source lines 20, for transmitting first data information data a generated according to the first sub-initial frame image information of one of the initial frame image information; in a second frame adjacent to the first frame, the driving chip 30 is electrically connected to the plurality of second pixel groups 102 through the plurality of source lines 20 for transmitting second data information data a generated according to second sub-initial frame image information of the same initial frame image information.

That is, in this embodiment, the first data information data a and the second data information data a determined by the first sub-initial frame image information and the second sub-initial frame image information originally corresponding to the same initial frame image information are transmitted in the first frame and the second frame, respectively, so that a frame of picture corresponding to the same initial frame image information is displayed by two frames; that is, the timing control module 302 may alternately arrange a plurality of first initial Data information and a plurality of second initial Data information corresponding to a multi-frame picture in order to form an initial integrated Data signal Data1; that is, the target integrated Data signal Data 2 also includes first Data information Data a (for example, initial frame image information from one frame) and second Data information Data B (for example, initial frame image information from the same frame) alternately arranged.

It can be understood that, in the present embodiment, only the first data information data a corresponding to the first pixel group 101 or the second data information data B corresponding to the second pixel group 102 are transmitted in each frame, and both are derived from the initial frame image information of the same frame, compared with the previous embodiment, although the transmission of the data amount in each frame cannot be reduced here, the resolution of the display screen can be further improved visually.

The present invention provides a driving method of a display panel for driving the display panel as described in any one of the above, which may include, but is not limited to, the following embodiments and combinations between the following embodiments.

In one embodiment, as shown in fig. 4, the driving method includes, but is not limited to, the following steps and combinations between the following steps.

S1, in a first frame, controlling the driving chip to transmit first data information corresponding to a plurality of first pixel groups to a plurality of source lines, controlling the plurality of first source lines to be electrically connected to a plurality of first sub-pixels in the plurality of first pixel groups, and controlling the plurality of second source lines to be electrically connected to a plurality of second sub-pixels in the plurality of first pixel groups.

As can be seen from the above discussion, in connection with fig. 1 to 3, in the first frame, the target integrated Data signal Data 2 transmitted by the source driving module 303 in the driving chip 30 to the source lines 20 may be the first Data information Data a at this time, and be matched, at this time, switch a may be high, switch B may be low, so as to enable the electrical connection between the first source line 201 and the corresponding first sub-pixels 011 in the first pixel group 101, and enable the electrical connection between the second source line 202 and the corresponding second sub-pixels 012 in the first pixel group 101, and likewise, enable the electrical connection between the third source line 203 and the corresponding third sub-pixels 013 in the first pixel group 101.

S2, in a second frame adjacent to the first frame, controlling the driving chip to transmit second data information corresponding to a plurality of second pixel groups to the source lines, controlling the first source lines to be electrically connected to a plurality of first sub-pixels in the first pixel groups, and controlling the second source lines to be electrically connected to a plurality of second sub-pixels in the first pixel groups.

As can be seen from the above discussion, in connection with fig. 1 to 3, in the second frame, the target integrated Data signal Data 2 transmitted by the source driving module 303 in the driving chip 30 to the plurality of source lines 20 may be the second Data information Data B at this time, and be matched, at this time, switch a may be low, switch B may be high, so as to enable the electrical connection between the first source line 201 and the plurality of first sub-pixels 011 in the corresponding second pixel group 102, and enable the electrical connection between the second source line 202 and the plurality of second sub-pixels 012 in the corresponding second pixel group 102, and likewise, enable the electrical connection between the third source line 203 and the plurality of third sub-pixels 013 in the corresponding second pixel group 102.

In an embodiment, the step S1 may include, but is not limited to, the following steps:

s11, the driving chip generates the first data information according to the first sub-initial frame image information of one initial frame image information, and transmits the first data information to a plurality of source lines;

the step S2 may include, but is not limited to, the following steps:

s21, the driving chip generates the second data information according to the second sub-initial frame image information of the other initial frame image information, and transmits the second data information to a plurality of source lines.

As can be seen from the above discussion, referring to fig. 1 to 3, the frame buffer module 301 in the driving chip 30 may be configured to receive a plurality of initial frame image information, generate first initial data information according to the corresponding first sub-initial frame image information, and generate second initial data information according to the corresponding second sub-initial frame image information; further, the timing control module 302 generates an initial integrated Data signal Data1 and a control signal Con (including a first control signal Switch a and a second control signal Switch B) according to the first initial Data information and the second initial Data information; still further, the source driving module 303 generates a target integrated Data signal Data 2 according to the initial integrated Data signal Data1, the target integrated Data signal Data 2 including the first Data information Data a and the second Data information Data B.

the step S2 may include, but is not limited to, the following steps:

s22, the driving chip generates the second data information according to the second sub-initial frame image information of the same initial frame image information, and transmits the second data information to a plurality of source lines.

The invention also provides an electronic terminal comprising a display panel as defined in any one of the above.

The display panel, the driving method thereof and the structure of the electronic terminal provided by the embodiment of the invention are described in detail, and specific examples are applied to the description of the principle and the implementation mode of the invention, and the description of the above embodiments is only used for helping to understand the technical scheme and the core idea of the invention; those of ordinary skill in the art will appreciate that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the invention.

Claims

1. A display panel, comprising:

2. The display panel of claim 1, wherein at least one of the second pixel groups is disposed between two adjacent first pixel groups, and at least one of the first pixel groups is disposed between two adjacent second pixel groups.

3. The display panel of claim 1, wherein the driving chip is configured to receive a plurality of initial frame image information corresponding to a plurality of initial frames, each of the initial frame image information including first sub-initial frame image information corresponding to a plurality of the first pixel groups, second sub-initial frame image information corresponding to a plurality of the second pixel groups;

4. The display panel of claim 1, wherein the driving chip is configured to receive a plurality of initial frame image information corresponding to a plurality of initial frames, each of the initial frame image information including first sub-initial frame image information corresponding to a plurality of the first pixel groups, second sub-initial frame image information corresponding to a plurality of the second pixel groups;

5. The display panel of any one of claims 3 or 4, further comprising:

6. The display panel of claim 5, wherein the driving chip comprises:

7. A driving method of a display panel, characterized by being used for driving the display panel according to any one of claims 1 to 6, the driving method comprising:

And in a second frame adjacent to the first frame, controlling the driving chip to transmit second data information corresponding to a plurality of second pixel groups to a plurality of source lines, controlling the plurality of first source lines to be electrically connected to a plurality of first sub-pixels in the plurality of first pixel groups, and controlling the plurality of second source lines to be electrically connected to a plurality of second sub-pixels in the plurality of first pixel groups.

8. The method of claim 7, wherein the driver chip is configured to receive a plurality of initial frame image information corresponding to a plurality of initial frames, each of the initial frame image information including first sub-initial frame image information corresponding to a plurality of the first pixel groups, second sub-initial frame image information corresponding to a plurality of the second pixel groups;

9. The method of claim 7, wherein the driver chip is configured to receive a plurality of initial frame image information corresponding to a plurality of initial frames, each of the initial frame image information including first sub-initial frame image information corresponding to a plurality of the first pixel groups, second sub-initial frame image information corresponding to a plurality of the second pixel groups;

10. An electronic terminal comprising the display panel according to any one of claims 1 to 6.