CN117423753A - Solar cell and preparation method thereof - Google Patents

Solar cell and preparation method thereof Download PDF

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CN117423753A
CN117423753A CN202311379794.2A CN202311379794A CN117423753A CN 117423753 A CN117423753 A CN 117423753A CN 202311379794 A CN202311379794 A CN 202311379794A CN 117423753 A CN117423753 A CN 117423753A
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silicon nitride
nitride layer
type
silicon substrate
solar cell
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王子港
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Trina Solar Co Ltd
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Trina Solar Co Ltd
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    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
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    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
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    • H01L31/1804Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table

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Abstract

The application relates to the technical field of photoelectricity, in particular to a solar cell and a preparation method thereof. So as to improve the passivation performance of the solar cell. A solar cell, comprising: the semiconductor device comprises an N-type silicon substrate, a P-type emitter arranged on the surface of the N-type silicon substrate and a passivation layer; the passivation layer includes: the silicon nitride layer is arranged on one side of the P-type emitter far away from the N-type silicon substrate, and the fixed negative charge density in the silicon nitride layer is more than 1 multiplied by 10 12 q/cm 2

Description

Solar cell and preparation method thereof
Technical Field
The application relates to the technical field of photoelectricity, in particular to a solar cell and a preparation method thereof.
Background
For a silicon-based solar cell, minority carrier lifetime in a silicon wafer is greatly influenced by the surface state of the silicon wafer, such as surface dangling bonds of the silicon wafer, defects and lattice distortion remained in the slicing process of the silicon wafer, impurities with positive charges and negative charges adsorbed in the preparation process of the silicon-based solar cell and the like can become carrier recombination centers, so that the carriers are recombined on the surface of the silicon-based solar cell.
In order to improve the conversion efficiency of the battery, passivation of the surface of the battery is increasingly emphasized by either PERC (Passivated Emitter and Rear Cell, emitter and back passivation battery), TOPCon (Tunnel Oxide Passivated Contact solar cell, tunnel oxide passivation contact solar cell), or HJT (Hereto-junction with Intrinsic Thin-layer, heterojunction battery), IBC (Interdigitated Back Contact, all back electrode contact battery) technologies.
The silicon nitride film (also called as silicon nitride layer) can form a large amount of fixed positive charges and free hydrogen atoms in the film during deposition, and the large amount of fixed positive charges form a built-in electric field at the surface of the battery, so that the surface is in an inversion state, and the probability of carrier meeting and recombination at the surface is reduced; a large amount of free hydrogen atoms can diffuse to the interface of Si and silicon nitride and combine with silicon dangling bonds at the interface, so that the interface state density of the surface is reduced to achieve the effect of reducing the surface recombination rate, and the surface of the battery is passivated; in addition, the silicon nitride film has good anti-reflection effect; the passivation method has good passivation effect when being applied to passivation of the surface of N-type silicon (such as a phosphorus diffusion layer of a P-type battery) and the non-diffusion surface. And when it is applied to N-type battery P + The passivation effect of the emitter is poor during passivation, which is unfavorable for the P-type battery + And the passivation performance of the emitter surface is exerted.
Disclosure of Invention
Based on this, it is necessary to provide a solar cell and a method for manufacturing the same to improve passivation performance of the solar cell.
In a first aspect, there is provided a solar cell comprising: the semiconductor device comprises an N-type silicon substrate, a P-type emitter arranged on the surface of the N-type silicon substrate and a passivation layer;
the passivation layer includes: the silicon nitride layer is arranged on one side of the P-type emitter far away from the N-type silicon substrate, and the fixed negative charge density in the silicon nitride layer is more than 1 multiplied by 10 12 q/cm 2
Optionally, the silicon nitride layer has a surface state density of less than 10 10 /cm 2
Optionally, the silicon nitride layer is a nitrogen-rich silicon nitride layer.
Optionally, the number ratio of nitrogen atoms to silicon atoms of the silicon nitride layer is 1.2-2.0.
Optionally, the silicon nitride layer has a hydrogen atom content of 3×10 21 ~8×10 21 Individual/cm 3
Optionally, the passivation layer further includes an aluminum oxide layer, and the aluminum oxide layer is disposed on a side of the silicon nitride layer close to the N-type silicon substrate.
In a second aspect, there is provided a method for manufacturing a solar cell according to the first aspect, comprising:
forming a P-type emitter on the surface of the N-type silicon substrate;
forming a passivation layer on one side of the P-type emitter far away from the N-type silicon substrate;
the passivation layer comprises a silicon nitride layer with a fixed negative charge density of greater than 1×10 12 q/cm 2
Optionally, forming a passivation layer on a side of the P-type emitter away from the N-type silicon substrate, including:
and depositing a nitrogen-rich silicon nitride layer on one side of the P-type emitter far away from the N-type silicon substrate by adopting a chemical vapor phase method so as to prepare the silicon nitride layer.
Optionally, the reaction gas used in the chemical vapor phase method includes: siH (SiH) 4 、N 2 And NH 3 Wherein SiH is 4 And N 2 Total flow of mixed gas and NH of (C) 3 The flow ratio of (2) to (50) SiH 4 And N 2 N in the mixed gas of (a) 2 The volume ratio of (2) is 1-10%.
Optionally, the deposition temperature is 350-450 ℃ and the deposition time is 300-900 s.
Optionally, the method further comprises:
and carrying out illumination on the N-type silicon substrate on which the silicon nitride layer is formed, so that partial minority carriers in the P-type emitter are neutralized with sodium ions on the surface of the silicon nitride layer.
Optionally, the illumination intensity is 10-100 Suns; the time is 1 min-10 min.
Optionally, the method further comprises:
annealing the N-type silicon substrate on which the silicon nitride layer is formed so as to overflow part of hydrogen atoms in the silicon nitride layer;
wherein the temperature of the annealing treatment is 100-400 ℃ and the time is 10-100 min.
Optionally, the method further comprises: in the case of irradiating the N-type silicon substrate on which the silicon nitride layer is formed, the annealing treatment may occur before or after the irradiation, or the annealing treatment may be performed simultaneously with the irradiation.
Optionally, the method further comprises: forming an electrode pattern on the silicon nitride layer;
wherein the illumination occurs before or after the electrode pattern is formed.
Optionally, the method further comprises: an aluminum oxide layer is deposited on a side of the P-type emitter remote from the N-type silicon substrate prior to depositing the silicon nitride layer.
The solar cell and the preparation method thereof have the beneficial effects that:
due to the fixed negative charge density of more than 1×10 in the silicon nitride layer 12 q/cm 2 Therefore, compared with the silicon nitride layer containing a large amount of fixed positive charges in the related art, the silicon nitride layer provided in the embodiment of the invention contains a large amount of fixed negative charges, so that P can be formed on the surface of the P-type emitter ++ A layer weakening the inversion layer of the surface of the P-type emitter and strengthening P ++ The field passivation effect of the layer reduces minority carrier recombination on the surface and improves the passivation effect.
Drawings
Fig. 1 is a schematic cross-sectional structure of a solar cell according to an embodiment of the present application.
Detailed Description
In order to make the above objects, features and advantages of the present application more comprehensible, embodiments accompanied with figures are described in detail below. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present application. This application is, however, susceptible of embodiment in many other forms than those described herein and similar modifications can be made by those skilled in the art without departing from the spirit of the application, and therefore the application is not to be limited to the specific embodiments disclosed below.
Throughout the specification and claims, the term "comprising" is to be interpreted as an open, inclusive meaning, i.e. "comprising, but not limited to, unless the context requires otherwise. In the description of the present specification, the terms "one embodiment," "some embodiments," "example embodiments," "exemplary," or "some examples," etc., are intended to indicate that a particular feature, structure, material, or characteristic associated with the embodiment or example is included in at least one embodiment or example of the present disclosure. The schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics may be combined in any suitable manner in any one or more embodiments or examples.
Exemplary embodiments are described herein with reference to cross-sectional and/or plan views as idealized exemplary figures. In the drawings, the thickness of layers and regions are exaggerated for clarity. Thus, variations from the shape of the drawings due to, for example, manufacturing techniques and/or tolerances, are to be expected. Thus, the exemplary embodiments should not be construed as limited to the shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. For example, an etched region shown as a rectangle will typically have curved features. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of example embodiments.
Herein, "for example," "such as," "example," "illustrated," and the like are used for descriptive purposes to indicate that there is a relationship between different technical solutions before and after the description, but are not to be construed as limiting the former technical solution nor as limiting the scope of protection herein. In this context, a (e.g., B), where B is one non-limiting example of a, is understood not to be limited to B, unless otherwise stated.
Herein, "optional" refers to the presence or absence of the possibility, i.e., to any one of the two juxtaposed schemes selected from "with" or "without". If multiple "alternatives" occur in a technical solution, if no particular description exists and there is no contradiction or mutual constraint, then each "alternative" is independent.
Herein, "optionally containing," optionally comprising, "and the like are described as" containing or not containing. "optional component X" means that component X is present or absent, or that component X is present or absent.
In this document, the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or quantity, nor as implying an importance or quantity of a feature being indicated.
It will be understood that when an element is referred to as being "fixed" or "disposed" on another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "upper," "lower," "left," "right," and the like are used herein for illustrative purposes only and are not meant to be the only embodiment.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
In this context, the technical features described in open form include closed technical solutions composed of the listed features, and also include open technical solutions containing the listed features.
As used herein, "at least one" means more than one, such as one, two, and more than two. The meaning of "plural" or "several" is at least two, for example, two, three, etc.
Herein, reference is made to a value interval (i.e., a range of values), where the distribution of the values selected within the value interval is considered continuous, and includes two value endpoints (i.e., a minimum value and a maximum value) of the value interval, and each value between the two value endpoints, unless otherwise indicated. When a numerical range merely points to integers within the numerical range, unless expressly stated otherwise, both endpoints of the numerical range are inclusive of the integer between the two endpoints, and each integer between the two endpoints is equivalent to the integer directly recited. When multiple numerical ranges are provided to describe a feature or characteristic, the numerical ranges may be combined. In other words, unless otherwise indicated, the numerical ranges disclosed herein are to be understood as including any and all subranges subsumed therein. The "numerical value" in the numerical interval may be any quantitative value, such as a number, a percentage, a proportion, or the like. "numerical intervals" allows for the broad inclusion of numerical interval types such as percentage intervals, proportion intervals, ratio intervals, and the like.
Reference herein to percent concentration refers to the final concentration unless otherwise indicated. The final concentration refers to the ratio of the additive component in the system after the component is added.
The Fill Factor (FF) as used herein refers to the ratio of the actual maximum available power (Pm or Vmp Jmp) to the theoretical (not actually available) power (Jsc). Thus, FF may be determined by:
FF=(Vmp*Jmp)/(Jsc*Voc)
wherein Jmp and Vmp represent the current density and voltage, respectively, at a maximum power point (Pm) obtained by varying the resistance in the circuit until J x V is maximum; jsc and Voc represent a short circuit current and an open circuit voltage, respectively. The fill factor is a key parameter in evaluating solar cells. Commercial solar cells typically have a fill factor of about 60% or more.
As used herein, the open circuit voltage (Voc) is the potential difference between the anode and cathode of the device under connectionless external load conditions.
The Power Conversion Efficiency (PCE) of a solar cell as used herein refers to conversion from absorbed lightIs the power percentage of the electrical energy. The Power Conversion Efficiency (PCE) of the solar cell can be determined by the incident light irradiance (E: W/m) under Standard Test Conditions (STC) 2 ) Surface area of the solar cell (Ac: m is m 2 ) Calculated by dividing the maximum power point (Pm). STC is generally referred to as the irradiance 1000W/m at a temperature of 25 DEG C 2 Spectrum of air quality 1.5 (AM 1.5).
In this document, a plurality of steps are referred to in a method flow, and unless explicitly stated differently herein, the steps are not strictly limited to the order of execution, which may be performed in other orders than as described. Moreover, any step may comprise a plurality of sub-steps or phases, which are not necessarily performed at the same time, but may be performed at different times, the order of their execution is not necessarily sequential, but may be performed in turn or alternately or simultaneously with other steps or sub-steps or portions of phases of other steps.
Based on the above technical problem, in a first aspect, some embodiments of the present application provide a solar cell, as shown in fig. 1, the solar cell 10 includes: an N-type silicon substrate 1, a P-type emitter 2 arranged on the surface of the N-type silicon substrate 1, and a passivation layer 3. Wherein the passivation layer 3 includes: a silicon nitride layer 31 arranged on the side of the P-type emitter 2 far from the N-type silicon substrate 1, wherein the fixed negative charge density in the silicon nitride layer 31 is larger than 1×10 12 q/cm 2
The solar cell 10 may be any N-type cell having a P-type emitter 2, for example, and is not particularly limited herein.
The solar cell 10 may be an IBC cell, in which case, the P-type emitter and the n+ back field region are formed on the back surface of the IBC cell, and the passivation layer 3 may be a passivation layer formed on the P-type emitter corresponding region.
Further exemplary, the solar cell 10 may be a TOPCon cell, in which case the P-type emitter 2 may be disposed on the front side of the N-type silicon substrate 1, and the passivation layer 3 may be a front side passivation layer.
The front surface of the N-type TOPCO battery can be doped with boron to form N-P + Knot to therebyA P-type emitter 2 is formed on the front surface of the N-type silicon substrate 1.
In the related art, when a silicon nitride layer is used as a passivation layer, a silicon nitride layer and an aluminum oxide layer are generally stacked to be used for passivation of a P-type emitter of an N-type cell, the silicon nitride layer contains a large amount of fixed positive charges, an inversion layer is formed on the surface of the P-type emitter, and minority carriers are prevented (or suppressed) from flowing to N-P + The N region of the junction migrates to increase its multiple sub-recombination with the P-type emitter surface.
In the solar cell 10 provided in the embodiment of the present application, since the fixed negative charge density in the silicon nitride layer 31 is greater than 1×10 12 q/cm 2 Therefore, compared with the silicon nitride layer containing a large amount of positive fixed charges in the related art, the silicon nitride layer 31 provided in the embodiment of the present application contains a large amount of negative fixed charges, so that P-type emitter 2 can be formed on its surface ++ A layer weakening the inversion layer on the surface of the P-type emitter 2 and strengthening P ++ The field passivation effect of the layer reduces minority carrier recombination on the surface and improves the passivation effect.
In the embodiment of the present application, the silicon nitride layer 31 may be any silicon nitride layer that can increase the fixed negative charge density in the silicon nitride layer 31, and the composition thereof is not particularly limited herein.
In the silicon nitride layer 31, whether positive or negative fixed charges are formed is related to bonding mode of silicon, and the main form of Si-H bonds in the hydrogen-rich silicon nitride film grown by chemical vapor deposition is H-Si (SiN 2 ) And H-Si (Si) 2 N), and the predominant form of N-H bond is HSi-N (Si 2 ) And a small amount of Si-NH-Si. The hydrogen atoms in the film being mainly H 2 -Si-N 2 And H-Si-N 3 The two structural units exist, so that a large number of holes are generated in the film, and excessive Si atoms are embedded in the holes, so that a large number of fixed positive charges are formed. When N-H bonds in the silicon nitride layer 31 are broken, an unsaturated dangling bond of nitrogen, N, is formed 0 Center, N 0 The centre needs to trap electrons or holes to be converted to N - Center or N + And a center. Due to the formation of N - Center is compared with N + Center stationLow energy is required, so N-H bonds in the silicon nitride film are mostly formed into N after being broken - At the center, a negative fixed charge is formed.
In some embodiments, the silicon nitride layer 31 is a nitrogen-rich silicon nitride layer. In the deposited SiNx: H film, the defect density associated with the nitrogen-hydrogen bond density increases with the increase of the nitrogen-silicon ratio, and thus, the nitrogen-rich film is more suitable for the formation of negatively charged nitride films.
In some embodiments, the silicon nitride layer 31 has a nitrogen atom to silicon atom number ratio of 1.2 to 2.0.
In these embodiments, by setting the nitrogen atom to silicon atom number ratio of the silicon nitride layer 31 to 1.2 to 2.0, the nitrogen-silicon ratio in the silicon nitride layer can be effectively increased, thereby facilitating the preparation of a silicon nitride layer having a higher negative fixed charge density.
In some embodiments, the surface state density of the silicon nitride layer 31 is less than 10 10 /cm 2
The surface state density, also known as defect state density, is a parameter used to characterize the dangling bond density of a silicon surface.
In these embodiments, the surface state density of the silicon nitride layer 31 is small, which means that the solar cell has a good hydrogen passivation effect.
In some embodiments, the silicon nitride layer 31 has a hydrogen atom content of 3×10 21 ~8×10 21 Individual/cm 3
In these embodiments, the hydrogen atom content of the silicon nitride layer 31 is controlled to be 3×10 21 ~8×10 21 Individual/cm 3 In this range, a high hydrogen atom content in the silicon nitride layer can be maintained, and the hydrogen passivation effect can be improved.
In some embodiments, the passivation layer 3 further includes an aluminum oxide layer 32, and the aluminum oxide layer 32 is disposed on a side of the silicon nitride layer 31 near the N-type silicon substrate 1.
In these embodiments, the passivation layer 3 is a laminated structure of an aluminum oxide layer 32 and a silicon nitride layer 31, the aluminum oxide layer 32 contains a large amount of negative fixed charges, the negative fixed charges form a surface field on the surface of the P-type emitter 2, and the minority carrier is increased to N-P + The migration of the N region of the junction reduces minority carrier recombination, namely field passivation effect; meanwhile, H in the alumina layer 32 can also saturate the silicon surface dangling bonds, reducing the surface defect density, and thus further improving the passivation effect. In addition, the provision of the silicon nitride layer 31 may further activate the passivation effect of the aluminum oxide layer 32.
In some embodiments, taking the solar cell as a TOPCon cell as an example, the solar cell 10 may further include a back passivation layer 4, and the back passivation layer 4 may include: and a silicon nitride layer with higher fixed positive charge density.
In a second aspect, some embodiments of the present application provide a method for manufacturing a solar cell, the method comprising:
s21), forming a P-type emitter on the surface of the N-type silicon substrate;
here, taking the solar cell as an N-type TOPCon cell as an example, a boron diffusion doping process may be used to form a P-type emitter on the front side of the N-type silicon substrate 1.
S22), forming a passivation layer on one side of the P-type emitter far away from the N-type silicon substrate; the passivation layer comprises a silicon nitride layer with a fixed negative charge density of more than 1×10 12 q/cm 2
The silicon nitride layer may be any silicon nitride layer with a relatively high fixed negative charge density, and the composition thereof is not limited herein.
In practical applications, the fixed negative charge density in the silicon nitride layer is related to the film preparation process, for example, the deposition conditions and thermal annealing process affect the charge trapping performance of the silicon nitride layer. Under proper technological conditions, the silicon nitride layer (also called film) prepared by chemical vapor deposition method can contain a large amount of negative fixed charges, so that the field effect passivation effect of the N-type battery can be improved.
In some embodiments, forming a passivation layer on a side of the P-type emitter remote from the N-type silicon substrate may include:
and depositing a nitrogen-rich silicon nitride layer on one side of the P-type emitter far away from the N-type silicon substrate by adopting a chemical vapor phase method to prepare the silicon nitride layer.
In these embodiments, the silicon nitride layer is advantageously formed by depositing a silicon nitride rich layer having a relatively high silicon nitride content, which facilitates the preparation of a silicon nitride layer having a relatively high negative fixed charge density.
The chemical vapor process may be, for example, PECVD (Plasma Enhanced Chemical Vapor Deposition, plasma-enhanced chemical vapor deposition).
In some embodiments, the reactant gases employed in the chemical vapor process include: siH (SiH) 4 、N 2 And NH 3 Wherein SiH is 4 And N 2 Total flow of mixed gas and NH of (C) 3 The flow ratio of (2) to (50) SiH 4 And N 2 N in the mixed gas of (a) 2 The volume ratio of (2) is 1-10%.
In these embodiments, it is advantageous to control the silicon nitride layer to be a nitrogen-rich silicon nitride layer by controlling the flow rates of the components of the reactive gas to satisfy the above conditions.
In some embodiments, the deposition temperature is 350 to 450 ℃ for 300 to 900 seconds.
In these embodiments, the film thickness, quality, and deposition uniformity of the silicon nitride layer can be effectively controlled.
In some embodiments, the method further comprises:
and (3) irradiating the N-type silicon substrate with the silicon nitride layer so as to neutralize partial minority carriers in the P-type emitter and sodium ions on the surface of the silicon nitride layer.
PID (Potential Induced Degradation) also referred to as potential induced degradation refers to a phenomenon in which solar cells undergo power degradation under a certain external voltage over a long period of time. The main formation mechanism is that leakage current in the passivation layer is generated, so that a large amount of charges are accumulated on the surface of the battery to form an electric field opposite to the passivation layer, and the passivation effect of the surface of the battery is deteriorated; meanwhile, a large amount of free moving sodium ions may be introduced during the preparation of the battery or after the subsequent encapsulation, and hidden defects (such as dislocation, grain boundary defects, impurity defects and the like in the silicon substrate) in the battery accumulate in a large amount of Na + Under the action, new charge traps or recombination centers in the forbidden band are formed, thereby leading to PID phenomenon.
Researches and experiments show that PID phenomenon has close relation with preparation process of the battery, performance of base material, surface resistance of the emitter and antireflection film on the surface of the battery. The silicon nitride layer has the most obvious influence on PID (potential induced degradation) caused by the antireflection film, such as refractive index, film thickness, uniformity and the like of the antireflection film, and can influence PID, so that the passivation quality of the silicon nitride film can be improved to further reduce surface defects or reduce Na (sodium) + Diffusion rate in the silicon nitride layer makes it harder to reach the surface of the silicon substrate combined with the recessive defects. A prerequisite for PID to occur is a certain amount of charge (Na + ) Is gathered on the surface of the silicon nitride anti-reflection film, drifts through the silicon nitride layer under the action of an electric field, and moves Na + Penetration to the surface of the silicon substrate causes PID leakage. The anti-PID strength can be increased by increasing the refractive index of the silicon nitride, and the stability of the anti-PID can be slightly increased by using a double-layer film comprising a three-layer film structure, but the occurrence of the PID can not be effectively prevented, and the main reason is that the thickness of the high refractive index film layer is limited; the multilayer film structure can be prepared by controlling deposition conditions, pretreatment, additional gas flow and the like, and aims to inhibit the generation of leakage current or increase conductivity to block the generation of charges in the anti-reflection film, and the replacement methods can improve the PID resistance of the battery.
In these embodiments, the irradiation of the silicon nitride layer can accelerate the carrier in N-P + Mobility at the junction so that part of minority carriers in the P-type emitter can be adsorbed with sodium ions (Na + ) Neutralization occurs, thereby preventing and reducing sodium ions from entering the silicon substrate and decaying.
In some embodiments, the illumination has an intensity of 10 to 100Suns for 1 to 10 minutes.
In the embodiments, the migration of sodium ions to the inside of the silicon substrate can be effectively reduced by controlling the intensity and time of illumination, and the influence of the sodium ion pollution on the surface of the battery on the PID attenuation of the battery is reduced.
In some embodiments, the method further comprises: annealing the N-type silicon substrate with the silicon nitride layer formed so as to overflow part of hydrogen atoms in the silicon nitride layer;
wherein the temperature of the annealing treatment is 100-400 ℃ and the time is 10-100 min.
The content of hydrogen atoms in the silicon nitride film decreases with increasing annealing temperature because Si-H bonds and N-H bonds in the film are opened and a large amount of hydrogen atoms escape when annealing is performed at a higher temperature, and the film is more dense and the refractive index increases accordingly. At lower annealing temperature, si-H bonds in the film are broken, and the released hydrogen atoms are diffused to the interface of the silicon nitride layer and the silicon substrate and combined with silicon dangling bonds, so that the interface state density is reduced.
Studies have shown that: when the temperature is too high (such as above 500 ℃), si-H bonds, N-H bonds and Si-H bonds at the interface in the silicon nitride film body are broken in a large amount, and released hydrogen atoms are continuously diffused outside the body, so that the hydrogen bond content in the film is reduced, the interface state density in the film and at the interface is increased, and the passivation effect is reduced. The large amount of hydrogen element contained in the silicon nitride layer is mainly generated by cleavage of si—h bond and n—h bond.
In these embodiments, by using low temperature annealing, the negative charge and the hydrogen atom content in the silicon nitride film and the valence state distribution on the front surface and in the body can be adjusted, so that the field passivation effect can be effectively improved and minority carrier recombination can be reduced, and meanwhile, the overflow amount of hydrogen atoms generated by high temperature annealing in the related art can be reduced, and the high hydrogen atom content in the silicon nitride layer is kept, so that the hydrogen atoms diffuse to the interface of the silicon substrate and the silicon nitride layer and are combined with the silicon dangling bond at the interface, so that the interface state density is reduced, and the passivation effect is achieved.
In some embodiments, the method further comprises: in the case of irradiating the N-type silicon substrate on which the silicon nitride layer is formed, the irradiation and the annealing treatment may be performed simultaneously, or the annealing treatment may occur before or after the irradiation.
The redistribution of the fixed negative charge traps in the silicon nitride layer can be effectively stabilized on the one hand and the surface of the N-type battery is weakened by adopting the light irradiation and low-temperature annealing treatment processInversion layer, enhancement P ++ The layer field passivation effect reduces minority carrier recombination; on the other hand, the migration of sodium ions introduced in the preparation process to the inside of the silicon substrate can be reduced, and the PID resistance of the battery is improved. And simultaneously, the valence distribution of hydrogen atoms in a silicon interface and a silicon body can be adjusted, so that minority carrier recombination is reduced.
In some embodiments, the method further comprises: forming an electrode pattern on the silicon nitride layer;
wherein the illumination occurs before or after the electrode pattern is formed.
Forming an electrode pattern on the silicon nitride layer may include, by way of example: silver paste was printed on the silicon nitride layer, and an electrode pattern was prepared by sintering. The irradiation of the silicon substrate before or after the formation of the electrode pattern can generate carriers on the silicon substrate, so that the minority carrier mobility is improved, and the minority carrier is neutralized with sodium ions.
In some embodiments, the illumination occurs after the electrode pattern is formed.
In these examples, after the electrode pattern is prepared, the solar cell is subjected to illumination treatment for a certain time and intensity, so that minority carriers can be accelerated to migrate, and on one hand, minority carriers can neutralize sodium ions entering the inside of the silicon substrate, so that the PID resistance of the cell is improved. On the other hand, when dark current formed by minority carrier migration meets the electrode pattern, metal contact recombination can be promoted, so that redundant carriers can be recombined in advance, and metal contact recombination in the use process is reduced.
In addition, by performing the light irradiation treatment after the electrode pattern is formed, the entire battery may be subjected to the light irradiation and annealing treatment after the electrode pattern is prepared without changing the original process steps.
In some embodiments, the illumination and annealing treatments may be performed simultaneously. The process operation can be saved.
In some embodiments, the method further comprises: an aluminum oxide layer is deposited on the side of the P-type emitter remote from the N-type silicon substrate prior to depositing the silicon nitride layer.
In order to objectively evaluate the technical effects of the embodiments of the present application, the present application will be exemplarily described in detail by the following examples and comparative examples.
In the following examples and comparative examples, all the raw materials were purchased commercially and, in order to maintain the reliability of the experiment, the raw materials used in the following examples and comparative examples all had the same physical and chemical parameters or were prepared by the same treatment method.
Example 1
The solar cell of example 1 was prepared as follows:
performing a high-temperature boron diffusion process on the silicon wafer with the textured surface to form a front N-P + A structure; removing BSG (Borosilicate Glass ) by single-sided etching, and depositing an alumina film on the front side in an ALD mode, wherein the thickness of the alumina film is 3nm;
depositing a nitrogen-rich silicon nitride film on the front aluminum oxide film by using a PECVD process; wherein the deposition temperature of the PECVD process is 350 ℃; siH (SiH) 4 And N 2 Total flow of mixed gas and NH of (C) 3 Is 10 in terms of flow ratio of SiH 4 And N 2 N in the mixed gas 2 Is 1% by volume; the deposition thickness of the silicon nitride film is 70nm;
preparing a back passivation layer, wherein the back passivation layer is a silicon nitride layer containing a large amount of fixed positive charges;
after the preparation of the passivation layer on the back surface is finished, printing a metal electrode, sintering at high temperature, and carrying out illumination treatment on the sintered battery piece for a certain time; wherein, the peak temperature of high-temperature sintering is 780 ℃, and the sintering time is 20s; the illumination intensity is 10Suns, and the illumination time is 1min;
carrying out low-temperature annealing treatment on the battery piece subjected to the light treatment for a certain time; wherein the temperature is 100deg.C and the time is 10min.
Example 2
The solar cell of example 2 was prepared as follows:
performing a high-temperature boron diffusion process on the silicon wafer with the textured surface to form a front N-P + A structure; after removing BSG by single-sided etching, depositing an alumina film on the front side by ALD mode, wherein the thickness of the alumina film is as thick as that of the front sideThe degree is 7nm;
depositing a nitrogen-rich silicon nitride film on the front aluminum oxide film by using a PECVD process; wherein in the PECVD process, the deposition temperature is 450 ℃; siH (SiH) 4 And N 2 Total flow of mixed gas and NH of (C) 3 Is 50 in terms of flow ratio of SiH 4 And N 2 N in the mixed gas 2 Is 10% by volume; the deposition thickness of the silicon nitride film is 80nm;
preparing a back passivation layer, wherein the back passivation layer is a silicon nitride layer containing a large amount of fixed positive charges;
after the preparation of the passivation layer on the back surface is finished, printing a metal electrode, sintering at high temperature, and carrying out illumination treatment on the sintered battery piece for a certain time; wherein, the peak temperature of high-temperature sintering is 730 ℃, and the sintering time is 25s; the illumination intensity is 100Suns, and the illumination time is 10min;
carrying out low-temperature annealing treatment on the battery piece subjected to the light treatment for a certain time; wherein the temperature is 400 ℃ and the time is 100min.
Example 3
The solar cell of example 3 was prepared as follows:
performing a high-temperature boron diffusion process on the silicon wafer with the textured surface to form a front N-P + A structure; after removing BSG by single-sided etching, depositing an alumina film on the front side in an ALD mode, wherein the thickness of the alumina film is 5nm;
depositing a nitrogen-rich silicon nitride film on the front aluminum oxide film by using a PECVD process; wherein in the PECVD process, the deposition temperature is 400 ℃; siH (SiH) 4 And N 2 Total flow of mixed gas and NH of (C) 3 Is 30 in terms of flow ratio of SiH 4 And N 2 N in the mixed gas 2 Is 5% by volume; the deposition thickness of the silicon nitride film is 75nm;
preparing a back passivation layer, wherein the back passivation layer is a silicon nitride layer containing a large amount of fixed positive charges;
after the preparation of the passivation layer on the back surface is finished, printing a metal electrode, sintering at high temperature, and carrying out illumination treatment on the sintered battery piece for a certain time; wherein, the peak temperature of high-temperature sintering is 750 ℃, and the sintering time is 25s; the illumination intensity is 50Suns, and the illumination time is 5min;
carrying out low-temperature annealing treatment on the battery piece subjected to the light treatment for a certain time; wherein the temperature is 200deg.C and the time is 60min.
Comparative example 1
The front side silicon nitride process uses a PECVD process to deposit a silicon-rich silicon nitride film; wherein in the PECVD process, the deposition temperature is 400 ℃; siH (SiH) 4 Total flow of (2) and NH 3 The flow ratio of (2) was 50, and the deposited thickness of the silicon nitride film was 75nm. The difference from examples 1 to 3 is that SiH is not used 4 And N 2 And SiH 4 And NH 3 The flow ratio of (2) is relatively high.
Test case
The open circuit voltage Voc, the short circuit current Jsc, the fill factor FF, and the power conversion efficiency PCE were tested by the test of examples 1 to 3 and comparative example 1, and the test results are shown in table 1 below.
TABLE 1
Test item PCE(%) Jsc(mA/cm 2 ) Voc(V) FF(%)
Comparative example 1 25.58 41.970 0.7179 84.89
Example 1 25.60 41.980 0.7183 84.95
Example 2 25.63 41.940 0.7214 84.70
Example 3 25.65 41.950 0.7205 84.85
As can be seen from table 1: by preparing a silicon nitride layer containing a large amount of fixed negative charges, the photoelectric conversion efficiency of the battery can be effectively improved, compared with the silicon nitride layer adopting a large amount of fixed positive charges in the related art, which indicates that the passivation effect of the battery can be improved.
The technical features of the above-described embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above-described embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples only represent a few embodiments of the present application, which are described in more detail and are not to be construed as limiting the scope of the claims. It should be noted that it would be apparent to those skilled in the art that various modifications and improvements could be made without departing from the spirit of the present application, which would be within the scope of the present application. Accordingly, the scope of protection of the present application is to be determined by the claims appended hereto.

Claims (16)

1. A solar cell, comprising: the semiconductor device comprises an N-type silicon substrate, a P-type emitter arranged on the surface of the N-type silicon substrate and a passivation layer;
the passivation layer includes: the silicon nitride layer is arranged on one side of the P-type emitter far away from the N-type silicon substrate, and the fixed negative charge density in the silicon nitride layer is more than 1 multiplied by 10 12 q/cm 2
2. The solar cell according to claim 1, wherein,
the surface state density of the silicon nitride layer is less than 10 10 /cm 2
3. The solar cell according to claim 1 or 2, wherein,
the silicon nitride layer is a nitrogen-rich silicon nitride layer.
4. The solar cell according to claim 3, wherein,
the number ratio of nitrogen atoms to silicon atoms of the silicon nitride layer is 1.2-2.0.
5. The solar cell according to claim 3, wherein,
the silicon nitride layer has a hydrogen atom content of 3×10 21 ~8×10 21 Individual/cm 3
6. The solar cell of claim 1 or 2, wherein the passivation layer further comprises an aluminum oxide layer disposed on a side of the silicon nitride layer adjacent to the N-type silicon substrate.
7. A method of manufacturing a solar cell according to any one of claims 1 to 6, comprising:
forming a P-type emitter on the surface of the N-type silicon substrate;
forming a passivation layer on one side of the P-type emitter far away from the N-type silicon substrate;
the passivation layer comprises a silicon nitride layer with a fixed negative charge density of greater than 1×10 12 q/cm 2
8. The method of claim 7, wherein forming a passivation layer on a side of the P-type emitter remote from the N-type silicon substrate comprises:
and depositing a nitrogen-rich silicon nitride layer on one side of the P-type emitter far away from the N-type silicon substrate by adopting a chemical vapor phase method so as to prepare the silicon nitride layer.
9. The method of claim 8, wherein the reaction gas used in the chemical vapor process comprises: siH (SiH) 4 、N 2 And NH 3 Wherein SiH is 4 And N 2 Total flow of mixed gas and NH of (C) 3 The flow ratio of (2) to (50) SiH 4 And N 2 N in the mixed gas of (a) 2 The volume ratio of (2) is 1-10%.
10. The method of claim 8, wherein the step of determining the position of the first electrode is performed,
the deposition temperature is 350-450 ℃ and the deposition time is 300-900 s.
11. The method of claim 8, wherein the method further comprises:
and carrying out illumination on the N-type silicon substrate on which the silicon nitride layer is formed, so that partial minority carriers in the P-type emitter are neutralized with sodium ions on the surface of the silicon nitride layer.
12. The method of claim 11, wherein the illumination has an intensity of 10-100 Suns for 1-10 min.
13. The method according to any one of claims 7 to 12, further comprising:
annealing the N-type silicon substrate on which the silicon nitride layer is formed so as to overflow part of hydrogen atoms in the silicon nitride layer;
wherein the temperature of the annealing treatment is 100-400 ℃ and the time is 10-100 min.
14. The method according to claim 13, wherein the method further comprises: in the case of irradiating the N-type silicon substrate on which the silicon nitride layer is formed, the annealing treatment may occur before or after the irradiation, or the annealing treatment may be performed simultaneously with the irradiation.
15. The method of claim 11, wherein the method further comprises: forming an electrode pattern on the silicon nitride layer;
wherein the illumination occurs before or after the electrode pattern is formed.
16. The method according to any one of claims 8 to 12, further comprising: an aluminum oxide layer is deposited on a side of the P-type emitter remote from the N-type silicon substrate prior to depositing the silicon nitride layer.
CN202311379794.2A 2023-10-23 2023-10-23 Solar cell and preparation method thereof Pending CN117423753A (en)

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