CN117410361A

CN117410361A - Solar cell module and TOPCON structure cell with double-sided texturing

Info

Publication number: CN117410361A
Application number: CN202311717451.2A
Authority: CN
Inventors: 张满良; 宋怡潇
Original assignee: Huai'an Jietai New Energy Technology Co ltd
Current assignee: Huai'an Jietai New Energy Technology Co ltd
Priority date: 2023-12-14
Filing date: 2023-12-14
Publication date: 2024-01-16
Anticipated expiration: 2043-12-14
Also published as: CN117410361B

Abstract

The application discloses solar module and TOPCon structure battery of two-sided shoemaking thereof belongs to solar module technical field, wherein solar module includes that a plurality of TOPCon structure battery pieces establish ties and forms, still include support and connecting piece, the support sets up in solar module one side, one side that solar module was kept away from to the support is equipped with the connecting piece, TOPCon structure battery piece is TOPCon structure battery of two-sided shoemaking, its silicon chip is close to the first face of projecting pole and has first matte structure, the silicon chip is close to the second face of tunneling oxide layer and has second matte structure, first matte structure and second matte structure all contain the square cone matte arch of a plurality of equidistance arrangements, the average size of the square cone of first matte structure is less than the average size of the square cone of second matte structure. The solar cell module has the advantages that the passivation effect can be maintained, the light trap effect can be increased, and the back of the cell is not leaked.

Description

Solar cell module and TOPCON structure cell with double-sided texturing

Technical Field

The application relates to the technical field of solar cells, in particular to a solar cell module and a TOPCON structure cell with double-sided texturing.

Background

With the gradual depletion of conventional energy, solar energy is definitely the most common, cleanest and most potential alternative energy among the current sustainable energy, the development and utilization of solar energy are particularly important, and a solar power generation device is also called a photovoltaic cell or a solar battery, and the power generation principle is based on the photovoltaic effect of a semiconductor PN junction, so that solar energy can be directly converted into a battery. At present, the conventional battery is limited by materials, processes, equipment and the like, has no large space for improving efficiency, is based on cost reduction and efficiency improvement of the solar battery, realizes low-price internet surfing, and finally is truly used as a new energy source for large-scale application.

The high-efficiency crystalline silicon solar cell occupies more than 90% of the photovoltaic market due to the advantages of low cost, high efficiency and mature process, and is the main force of photovoltaic power generation. Improving cell efficiency is a constant pursuit of the photovoltaic world. Tunneling silicon oxide passivation contact (TOPCon) solar cells are attracting wide attention in the industry by virtue of their excellent passivation properties and lower manufacturing costs. The tunneling oxide passivation contact solar cell (Tunnel Oxide Passivated Contact solar cell, TOPCon) is a novel passivation contact solar cell which is first proposed by Fraunhofer solar institute in 28 th European PVSEC photovoltaic society in 2013, and is characterized in that a tunneling oxide layer with the thickness of 1-2 nm is firstly prepared on the back of the cell, then a doped polysilicon layer is deposited, and the tunneling oxide layer and the doped polysilicon layer form a passivation contact structure together, so that good interface passivation is provided for the back of a silicon wafer.

In order to improve the current density and the electrical performance of a TOPCon cell, the light trapping capability of the cell can be greatly improved by texturing both sides of a silicon substrate, for example, chinese patent CN115863456a discloses a perovskite/TOPCon stacked solar cell comprising a perovskite top cell and a TOPCon bottom cell, the TOPCon bottom cell comprising a silicon substrate, wherein the silicon substrate has a double-sided inverted pyramid textured structure, the double-sided inverted pyramid textured structure comprises a bottom inverted pyramid structure and a top inverted pyramid structure, and the included angle between the side wall of the bottom inverted pyramid structure and the plane of the silicon substrate is 6 ° to 25 °.

According to the application, the silicon substrate is subjected to double-sided texturing to improve the performance of the battery, but the textured surface on one side of the silicon substrate, which is close to the tunneling oxide layer, is large in fluctuation, so that the thickness of the silicon substrate is unstable, adhesion of the tunneling oxide layer is not facilitated, good tunneling contact cannot be formed after an electrode is formed, and the conversion efficiency is low.

Disclosure of Invention

The content of the present application is intended to introduce concepts in a simplified form that are further described below in the detailed description. The section of this application is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter.

Some embodiments of the present application provide a solar cell module and a TOPCon structure cell with double-sided texturing thereof, so as to solve the technical problems mentioned in the background section.

As a first aspect of the present application, some embodiments of the present application provide a solar cell module, which includes a plurality of TOPCon structural cells connected in series, and further includes a support and a connecting piece, where the support is disposed on one side of the solar cell module, and the side of the support, which is far away from the solar cell module, is provided with the connecting piece, and the TOPCon structural cells are TOPCon structural cells with double-sided texturing;

the connecting piece comprises a fixing part and a rotating part, wherein the fixing part is fixedly connected to the bracket, a rotating groove is formed in the fixing part, the rotating part comprises a rotating shaft, and the rotating shaft stretches into the rotating shaft groove so that the rotating part is rotationally connected to the fixing part by taking a first rotating axis as a rotating shaft;

wherein, TOPCon structure battery piece contains:

the emitter, the silicon wafer, the tunneling oxide layer and the doped conductive layer are sequentially overlapped and arranged, one side of the emitter, which is far away from the silicon wafer, is provided with a first passivation layer, one side of the doped conductive layer, which is far away from the tunneling oxide layer, is provided with a second passivation layer, a first surface of the silicon wafer, which is close to the emitter, is provided with a first textured structure, a second surface of the silicon wafer, which is close to the tunneling oxide layer, is provided with a second textured structure, the first textured structure and the second textured structure all comprise square cone textured protrusions which are arranged at equal intervals, and the average size of square cones of the first textured structure is smaller than that of square cones of the second textured structure.

Further, tips of the square cone pile protrusions of the second pile structure are configured to be arc-shaped structures.

Further, the bottoms between the square cone pile protrusions of two adjacent second pile structures are formed into arc-shaped structures.

Further, the average slope of the square pyramidal pile protrusions of the first pile structure is greater than the average slope of the square pyramidal pile protrusions of the second pile structure.

Further, the plane which simultaneously passes through the axes of the square cone pile protrusions of the two adjacent second pile structures is defined as the projection plane of the square cone pile protrusions of the two second pile structures, and the included angle range of the side tangent projection of the square cone pile protrusions of the two adjacent second pile structures on the projection plane is larger than or equal to 120 degrees.

Further, the silicon wafer is N-type monocrystalline silicon.

Further, the emitter is a P-type emitter.

Further, the emitter is an emitter with a structure of a parallel oxide layer and a P+ polysilicon layer.

Further, the first passivation layer is an aluminum oxide layer.

Further, the second passivation layer is a silicon nitride layer.

Further, a third passivation layer is arranged on one side, far away from the tunneling oxide layer, of the doped conductive layer.

Further, the third passivation layer is a silicon nitride layer.

Further, the tunneling oxide layer is a silicon oxide layer.

Further, the doped conductive layer is a polysilicon layer.

Further, the doped conductive layer is a laminated structure of a plurality of polysilicon layers.

Further, the silicon wafer manufacturing device also comprises a front electrode and a back electrode, wherein the front electrode and the back electrode are respectively arranged on two sides of the silicon wafer.

Further, the back electrode is a silver electrode.

Further, the front electrode is a silver electrode or a silver-aluminum electrode.

As a second aspect of the present application, some embodiments of the present application provide TOPCon structural cells suitable for double sided texturing of the solar cell modules described above.

The beneficial effects of this application lie in: provided are a solar cell module capable of increasing an optical trap effect while maintaining a passivation effect and preventing electric leakage at the back of the cell, and a TOPCO structure cell for double-sided texturing thereof.

The method has the following specific beneficial effects:

1, the texture structure on the back of the battery is gentle, so that the uniformity of the film thickness of the tunneling oxide layer is ensured, local electric leakage of the battery is effectively prevented, the passivation effect is also ensured, and the unnecessary doping of the polysilicon layer into the silicon wafer is prevented.

2, the suede structure at the back of the battery is gentle to prevent gaps from being generated on the contact surface of the tunneling oxide layer and the silicon wafer possibly occurring during film coating, so that the performance of the battery is affected.

And 3, the suede structure at the back of the battery is gentle, the film thickness of the doped conductive layer is reduced, and the current is effectively improved.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this application, are included to provide a further understanding of the application and to provide a further understanding of the application with regard to the other features, objects and advantages of the application. The drawings of the illustrative embodiments of the present application and their descriptions are for the purpose of illustrating the present application and are not to be construed as unduly limiting the present application.

In addition, the same or similar reference numerals denote the same or similar elements throughout the drawings. It should be understood that the figures are schematic and that elements and components are not necessarily drawn to scale.

In the drawings:

fig. 1 is a schematic front view of a battery assembly according to an embodiment of the present application;

fig. 2 is a schematic view of a rear structure of a battery pack according to an embodiment of the present application;

fig. 3 is a schematic overall structure of a double-sided textured TOPCon structural battery according to one embodiment of the present application;

FIG. 4 is a schematic structural view of a second pile structure according to one embodiment of the present application;

fig. 5 is a schematic view of incident light at a first pile structure according to one embodiment of the present application.

The meaning of the specific reference numerals in the figures are:

10. TOPCon structure battery piece;

100. an emitter;

200. a silicon wafer; 210. a first pile structure; 220. a second pile structure; 230. a protrusion;

300. tunneling oxide layer;

400. doping the oxide layer;

500. a first passivation layer;

600. a second passivation layer;

700. a third passivation layer;

800. a front electrode;

900. a back electrode;

20. a bracket;

30. a connecting piece; 31. a fixing part; 31a, a rotating groove; 32. a rotating part; 32a, a rotating shaft;

l1, a first axis of rotation.

Detailed Description

The present disclosure may be understood more readily by reference to the following description taken in conjunction with the accompanying drawings and examples, all of which form a part of this disclosure. It is to be understood that this disclosure is not limited to the particular products, methods, conditions, or parameters described and/or shown herein. Further, the terminology used herein is for the purpose of describing particular embodiments by way of example only and is not intended to be limiting unless otherwise indicated.

It is also to be appreciated that certain features of the disclosure may, for clarity, be described herein in the context of separate embodiments, but may also be provided in combination with each other in a single embodiment. That is, each separate embodiment is contemplated to be combinable with any other embodiment, and to be considered as representing a different embodiment, unless expressly incompatible or specifically excluded. Conversely, various features of the disclosure that are, for brevity, described in the context of a single embodiment, may also be provided separately or in any subcombination. Finally, although a particular embodiment may be described as part of a series of steps or as part of a more general structure, each step or sub-structure itself may also be considered a separate embodiment.

Unless otherwise indicated, it should be understood that each individual element in the list and each combination of individual elements in the list are to be construed as different embodiments. For example, a list of embodiments denoted as "A, B or C" should be construed to include embodiments "a", "B", "C", "a or B", "a or C", "B or C" or "A, B or C".

In this disclosure, the singular forms "a," "an," and "the" also include the corresponding plural referents, and reference to a particular value includes at least the particular value unless the context clearly dictates otherwise. Thus, for example, reference to "a substance" is a reference to at least one of such a substance and equivalents thereof.

Terms including ordinal numbers such as "first" and "second" may be used to explain various components or fluids, but the components, fluids are not limited by these terms. Accordingly, these terms are merely used to distinguish one component/fluid from another component/fluid without departing from the teachings of the present disclosure.

When items are described using the conjunctive terms "… … and/or … …" and the like, the description should be understood to include any one of the associated listed items, and all combinations of one or more thereof; such as a and/or B, should be construed as including embodiments of "a" but not "B", including embodiments of "B" but not "a", including embodiments of "a" and also "B".

In general, the use of the term "about" refers to an approximation that may vary depending on the desired properties obtained by the disclosed subject matter, and will be interpreted in a context-dependent manner based on the function. Thus, one of ordinary skill in the art will be able to interpret a degree of variability on an individual case basis. In some cases, the number of significant digits used in expressing a particular value can be a representative technique for determining the variance allowed by the term "about. In other cases, a gradient in a series of values may be used to determine the range of differences permitted by the term "about". Further, all ranges in this disclosure are inclusive and combinable, and reference to a value recited in a range includes each value within the range.

Throughout the specification of this application, when a certain component is described as "comprising" a certain portion, unless explicitly stated to the contrary, it is not intended to exclude other components, but it is also intended that other components may also be included.

In the present invention, when a step is described as being "on" or "before" another step, the present invention includes not only a case where the step has a direct time-series relationship with the other step but also a case where the time-series relationship of the order of the two steps is changed, such as a mixing step after each step, and the like, and also includes the same rights as in a case where the time-series relationship has an indirect time-series relationship.

Throughout the description of the present invention, reference to "… … of any embodiment according to … … of the … … th object of the present invention" is not intended to exclude constituent elements of the illustrated arrangement that occur before and after it, unless explicitly stated to the contrary, but is intended to include other constituent elements as well.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs; the term and/or any and all combinations including one or more of the associated listed items.

The present disclosure will be described in detail below with reference to the accompanying drawings in conjunction with embodiments.

As shown in fig. 1 to 2, a solar cell module of the present application includes a plurality of TOPCon structural cells 10 connected in series, and further includes a support 20 and a connecting member 30, wherein the support 20 is disposed on one side of the solar cell module, and a connecting member 30 is disposed on a side of the support 20 away from the solar cell module. The connecting piece 30 includes a fixing portion 31 and a rotating portion 32, the fixing portion 31 is fixedly connected to the bracket 20, a rotating groove 31a is formed in the fixing portion 31, the rotating portion 32 includes a rotating shaft 32a, and the rotating shaft 32a extends into the rotating shaft groove 31a so that the rotating portion 32 is rotatably connected to the fixing portion 31 by taking a first rotating axis L1 as a rotating shaft 32 a.

Specifically, the solar cell assembly includes a frame, a TOPCon structural battery sheet, a cover plate, an encapsulant, electrical connectors, and a junction box. The solar cell assembly is formed by connecting TOPCon structural cells in series and parallel through an electric connector, sealing the cells through a cover plate and an encapsulating material, installing a frame on the periphery of the cells, and installing a junction box to transmit current generated in the photovoltaic assembly to an external circuit.

The electrical connector, also called a photovoltaic solder strip or a solder strip, is used for being electrically connected with an electrode of the TOPCO structure battery piece to collect current converted by the TOPCO structure battery piece, is a component for realizing electrical connection between the TOPCO structure battery pieces in the solar battery assembly, and is a core electrical connection component in the solar battery assembly. The quality of the electrical connection directly affects the efficiency of the solar module in collecting electricity. In some embodiments, the electrical connection includes an interconnecting strap and a bus strap. The interconnecting strip is used for connecting the battery pieces in series, and the back of each battery piece is welded with one interconnecting strip, so that a plurality of battery pieces are welded together in series to form a battery string. The bus belt is a carrier for connecting the battery strings, the bus belt connects the battery strings which are well connected in series, and finally, the positive electrode and the negative electrode are led out and connected to the junction box. In some embodiments, both the interconnect and bus tapes are tin-coated copper tapes.

More specifically, the support 20 is disposed on one side of the cover plate and fixedly connected with the cover plate, the connecting piece 30 is further disposed on one side of the support 20, the connecting piece 30 is used for connecting the solar cell module in an external environment, and in order to enable the solar cell module to convert solar energy into electric energy at an optimal angle, the angle and the position of the solar cell module can be adjusted by the connecting piece 30.

Specifically, the connecting piece 30 includes the fixing portion 31 and the rotating portion 32, the fixing portion 31 is further provided with an arc groove, the fixing portion 31 can rotate for adapting to the relative angle between the rotating portion 32 and the bracket 20, and the rotating portion 32 is provided with a connecting groove for connecting an external support, so that the connecting portion 32 can adjust the angle between itself and the solar cell module according to the actual topography condition, so that the solar cell module can be conveniently installed and can convert solar energy into electric energy at the optimal orientation angle.

As shown in fig. 3 to 5, in a specific embodiment, the TOPCon structure battery 10 is a double-sided textured TOPCon structure battery, the double-sided textured TOPCon structure battery includes an emitter 100, a silicon wafer 200, a tunneling oxide layer 300, and a doped conductive layer 400, the emitter 100, the silicon wafer 200, the tunneling oxide layer 300, and the doped conductive layer 400 are sequentially stacked, a first passivation layer 500 is disposed on a side of the emitter 100 away from the silicon wafer 200, a second passivation layer 600 is disposed on a side of the doped conductive layer 400 away from the tunneling oxide layer 300, a first texture 210 is disposed on a first side of the silicon wafer 200 adjacent to the emitter 100, a second texture 220 is disposed on a second side of the silicon wafer 200 adjacent to the tunneling oxide layer 300, and each of the first texture 210 and the second texture 220 includes a plurality of square texture protrusions 230 that are equidistantly arranged, and an average slope of the square taper protrusions 230 of the first texture 210 is larger than an average slope of the square taper protrusions 230 of the second texture protrusions 220. That is, the first pile structure 210 and the second pile structure 220 each comprise a plurality of square pyramids arranged at equal intervals, and the average size of the square pyramids of the first pile structure 210 is smaller than the average size of the square pyramids of the second pile structure 220.

Specifically, the TOPCon structure battery is sequentially stacked and arranged with the emitter 100, the silicon wafer 200, the tunneling oxide layer 300 and the doped conductive layer 400 from the top surface to the bottom surface, the first passivation layer 500 is an aluminum oxide layer, the second passivation layer 600 is a silicon nitride layer, a third passivation layer 700 is disposed on one side of the doped conductive layer 400 away from the tunneling oxide layer 300, the third passivation layer 700 is a silicon nitride layer, and the doped conductive layer 400 is a polysilicon layer. Emitter 100 is disposed on a first side of silicon wafer 200, and in this application, the terms "top" and "bottom", "top" and "bottom" or "bottom" and "top" or "front" and "back" refer to: the direction from the light-receiving front side to the back side of the solar cell is called "top" near the light-receiving front side and "bottom" near the back side. The tunneling oxide layer 300 is arranged on the back surface of the silicon wafer 200, provides good surface passivation for the back surface of the silicon wafer 200, and the tunneling oxide layer 300 can enable multi-electron tunneling into the doped conductive layer 400 and simultaneously block minority carrier (hole) recombination, so that the multi-electron is transversely transmitted and collected by metal in the doped conductive layer 400, thereby greatly reducing metal contact recombination current, improving open-circuit voltage and short-circuit current of the battery, and realizing passivation contact structure without opening holes by depositing a layer of metal as an electrode on the metal.

More specifically, the first passivation layer 500 is disposed on the side of the emitter 100 away from the silicon wafer 200, the second passivation layer 600 is disposed on the side of the doped conductive layer 400 away from the tunnel oxide layer 300, and the passivation layer can effectively improve the cell efficiency, and a key factor of further improving the efficiency of the conventional crystalline silicon (c-Si) solar cell is the loss caused by carrier recombination at the interface between the metal electrode and the silicon wafer 200, resulting in a higher Jo load current.

More specifically, the silicon wafer 200 has a first textured surface 210 on a first side near the front surface and a second textured surface 220 on a second side near the bottom surface, and the silicon wafer 200 is cleaned with a solution containing hydrofluoric acid to remove the native oxide layer on the surface. Then, the silicon wafer 200 is put into alkali liquor for texturing treatment, so that a plurality of square cone textured protrusions 230, namely pyramid textured surfaces, are formed on the surface of the silicon wafer 200, the pyramid textured surfaces can reduce the reflectivity of the surface of the silicon wafer 200 to incident light of the sun, the absorption of the silicon wafer 200 to the sunlight is increased, and the photoelectric conversion efficiency of the TOPCO battery is improved to a certain extent.

Specifically, the concentration of alkali solution, the treatment conditions, etc. are different at different stages in the treatment process of double-sided texturing. In the main thinning stage, a 12% high-concentration KOH solution is selected to treat the silicon wafer for 12min at 80 ℃ to obtain the 130 mu m N-type silicon wafer 200. And then the concentration of KOH is reduced to 4%, the treatment temperature is reduced to 70 ℃, and a small amount of additive is added to treat the silicon wafer 100s to finish double-sided texturing of the silicon wafer 200, wherein the reflectivity of the double textured surfaces is about 12%.

In another practical embodiment, the inverted pyramid suede structure can be formed on the bottom surface and the top surface of the silicon substrate respectively by adopting a copper metal catalytic etching method. The copper metal catalytic etching comprises the following steps: a plating solution with a copper nitrate concentration of about 40mol/L, HF concentration of about 5mol/L and a hydrogen peroxide concentration of about 0.8mol/L was used, and the treatment was carried out at about 30℃for about 5 minutes.

The pyramid suede has a certain included angle with the incident angle of sunlight, so that the pyramid suede can enter the battery again after sunlight is reflected, the incident quantity of the sunlight entering the battery can be increased, the light trapping principle can know that when the light is incident on the inclined plane with a certain angle, the light can be reflected to the inclined plane with another angle to form secondary or repeated absorption, the light absorption rate is increased, the light generation current density can be finally improved, and the photoelectric conversion efficiency of the battery is effectively improved.

More specifically, the slope of the square pyramidal pile protrusions 230 of the first pile structure 210 is greater than the slope of the square pyramidal pile protrusions 230 of the second pile structure 220. That is, the square pyramidal textured protrusions 230 of the first textured structure 210 are more densely arranged on the silicon wafer 200 relative to the square pyramidal textured protrusions 230 of the second textured structure 220. In other words, the number of square pyramidal textured protrusions 230 of the first textured structure 210 on the front surface of the silicon wafer 200 is greater than that of square pyramidal textured protrusions 230 of the second textured structure 220, so that light incident from the front surface of the cell is more easily reflected by the square pyramidal textured protrusions 230 of the second textured structure 220 on the back surface of the silicon wafer 200, which is more 'gentle' with respect to the square pyramidal textured protrusions 230 of the first textured structure 210, after passing through the silicon wafer 200, so that the moving path of light in the silicon wafer 200 can be increased, and the photoelectric conversion efficiency of the cell is effectively improved.

In a specific embodiment, the tips of the square pyramidal pile protrusions 230 of the second pile structure 220 are configured in an arc-shaped structure. The bottoms between the square pyramidal pile protrusions 230 of two adjacent second pile structures 220 are formed into an arc-shaped structure.

Specifically, the texture structure of the bottom surface of the silicon wafer 200 is more gentle relative to the texture structure of the top surface, the tunneling oxide layer 300 is arranged on the bottom surface of the silicon wafer 200, and the size of the tunneling oxide layer 300 is thinner (0.9 to 3 nanometers), so that the more gentle silicon wafer 200 can enable the tunneling oxide layer 300 to be better attached to the silicon wafer 200, gaps are effectively prevented from being generated on the contact surface with the silicon wafer 200 possibly occurring when the tunneling oxide layer 300 is coated, the battery performance of the TOPCO battery is further affected, the surface area of the silicon wafer can be reduced, and the area needing passivation is reduced.

More specifically, the gentle texture surface on the bottom surface enables the tunneling oxide layer 300 to have better film thickness uniformity, so that local leakage of the TOPCon structure battery is effectively prevented, and unwanted doping of the polysilicon layer dopant into the silicon wafer 200 can be prevented. Since the uniformity of the film thickness of the tunnel oxide layer 300 is ensured, the film thickness of the tunnel oxide layer 300 can be reduced to a certain extent, so as to increase the current of the TOPCon structure battery, and meanwhile, the phenomenon that the electrode arranged on the back of the silicon wafer 200 is not directly touched or is excessively close to the surface of the back silicon wafer 200 can be ensured, wherein the error range of the uniformity is between 0.1 and 0.3 nanometers.

In a specific embodiment, the plane that passes through the axes of the square pyramidal pile protrusions 230 of two adjacent second pile structures 220 at the same time is defined as the projection plane of the square pyramidal pile protrusions 230 of two second pile structures 220 that are passed through, and the included angle range of the side tangential projection of the square pyramidal pile protrusions 230 of two adjacent second pile structures 220 on the projection plane is greater than or equal to 120 °.

In other words, the back surface of the silicon wafer 200 is provided with a plurality of square cone suede protrusions 230 of second suede structures 220 which are equidistantly arranged, an arc-shaped structure is arranged between any two square cone suede protrusions 230 of two adjacent second suede structures 220 on the back surface of the silicon wafer 200, and an included angle between two surfaces tangent to an arc line of the arc-shaped structure on a projection surface is more than or equal to 120 degrees. The square pyramid-shaped textured protrusions 230 of the second textured structure 220 on the bottom surface of the silicon wafer 200 are more gentle than the square pyramid-shaped textured protrusions 230 of the first textured structure 210 on the top surface of the silicon wafer 200, so that the tunneling oxide layer 300 has better film thickness uniformity.

In a specific embodiment, the silicon wafer 200 is N-type monocrystalline silicon, and the N-type silicon substrate has no boron-oxygen recombination when being irradiated by light, so that the situations of photoinduced attenuation and thermally assisted photoinduced attenuation are reduced to a certain extent. The emitter 100 is a P-type emitter, and a p+ layer formed by diffusing boron element into the silicon wafer 200 is adopted, so that a PN junction is formed, and PECVD low-temperature deposition is adopted. The P-type polysilicon layer comprises intrinsic characteristics with protective effect by SiH4, H2 and B2H6 reaction deposition, and a poly-Si film is doped in the intrinsic characteristics. The emitter is provided with an parallel oxide layer and a P+ polysilicon layer structure.

In a specific embodiment, the tunneling oxide layer 300 is a silicon oxide layer, and utilizes quantum tunneling effect, not only can make electrons pass smoothly, but also can prevent hole recombination, and the surface is passivated in a full area so as to avoid a silicon/metal contact interface, thereby being beneficial to improving open-circuit voltage Voc, collecting carriers in a full area, reducing service life sensitivity, being beneficial to improving filling factor FF, blocking minority carriers from passing through and simultaneously enabling majority carriers to pass through easily without barriers, and therefore being capable of reducing recombination. The carrier recombination on the surface of the silicon wafer 200 can be restrained, the minority carrier lifetime of the silicon wafer 200 and the open-circuit voltage of the battery can be improved, the carrier selective collection passivation contact structure can be applied to the whole surface of the battery without forming local passivation contact through holes, the manufacturing process is simplified, meanwhile, carriers only need to be transported in one-dimensional direction without additional transverse transmission, and therefore higher filling factors can be obtained.

Specifically, preparing an ultrathin silicon oxide tunneling layer on the back surface by using a low-pressure chemical vapor deposition method; polysilicon is deposited on the ultra-thin silicon oxide tunneling layer and phosphorus doped using a pulsed laser. And then, depositing a silicon nitride anti-reflection layer (a third passivation layer 700) on the back surface of the silicon wafer 200 by adopting a plasma enhanced chemical vapor deposition method, wherein the doped conductive layer is a laminated structure of a plurality of polysilicon layers.

In a specific embodiment, the TOPCon structure cell with double-sided texturing further includes a front electrode 800 and a back electrode 900, where the front electrode 800 and the back electrode 900 are disposed on two sides of the silicon wafer 200, respectively. The back electrode 900 is a silver electrode. The front electrode 800 is a silver electrode or an aluminum electrode.

Specifically, the metal electrode is prepared by screen printing or sintering on the front and back surfaces of the silicon wafer 200, and the electrode material configuration can obtain more conductive performance and connection tensile force between the electrode material and the silicon wafer 200, so that the conductive effect is improved, and meanwhile, the structural stability of the battery is improved.

In a specific embodiment, the above structure can improve the passivation effect of the second suede structure 220, and can also be applied to a stacked solar cell structure, and the surface with a relatively gentle suede can better form structural contact with other cells such as a perovskite cell, so as to ensure the process stability of the perovskite cell and improve the power generation efficiency of the cell.

The foregoing description is only of the preferred embodiments of the present disclosure and description of the principles of the technology being employed. It will be appreciated by those skilled in the art that the scope of the invention in the embodiments of the present disclosure is not limited to the specific combination of the above technical features, but encompasses other technical features formed by any combination of the above technical features or their equivalents without departing from the spirit of the invention. Such as the above-described features, are mutually substituted with (but not limited to) the features having similar functions disclosed in the embodiments of the present disclosure.

Claims

1. A solar cell module, characterized in that: the solar cell module comprises a plurality of TOPCon structure cell pieces (10) which are connected in series, and further comprises a bracket (20) and a connecting piece (30), wherein the bracket (20) is arranged on one side of the solar cell module, the connecting piece (30) is arranged on one side, away from the solar cell module, of the bracket (20), and the TOPCon structure cell pieces (10) are TOPCon structure cells which are subjected to double-sided texturing; the connecting piece (30) comprises a fixing part (31) and a rotating part (32), the fixing part (31) is fixedly connected to the bracket (20), a rotating groove (31 a) is formed in the fixing part (31), the rotating part (32) comprises a rotating shaft (32 a), and the rotating shaft (32 a) stretches into the rotating shaft groove (31 a) so that the rotating part (32) is rotationally connected to the fixing part (31) by taking a first rotating axis (L1) as a rotating shaft; wherein, TOPCon structure battery piece (10) contains: emitter (100), silicon chip (200), tunnel oxide layer (300) and doped conducting layer (400), emitter (100) silicon chip (200) tunnel oxide layer (300) and doped conducting layer (400) stack in proper order and arrange, one side that emitter (100) kept away from silicon chip (200) is equipped with first passivation layer (500), one side that doped conducting layer (400) kept away from tunnel oxide layer (300) is equipped with second passivation layer (600), silicon chip (200) are close to the first face of emitter (100) has first matte structure (210), silicon chip (200) are close to the second face of tunnel oxide layer (300) has second matte structure (220), first matte structure (210) and second matte structure (220) all contain square cone pile face protruding (230) of a plurality of equidistance arrangements, the average size of square cone of first matte structure (210) is less than the average size of the square cone of second matte structure (220).

2. The solar cell module of claim 1, wherein:

the tips of the tetragonal pyramidal pile protrusions (230) of the second pile structure (220) are configured in an arc-shaped structure.

3. The solar cell module of claim 2, wherein:

the bottoms between the square cone pile projections (230) of two adjacent second pile structures (220) are formed into arc-shaped structures.

4. A solar cell module according to claim 3, wherein:

the average slope of the square pyramidal pile protrusions (230) of the first pile structure (210) is greater than the average slope of the square pyramidal pile protrusions (230) of the second pile structure (220).

5. The solar cell module according to any one of claims 1 to 4, wherein:

the plane which simultaneously passes through the axes of the square cone pile protrusions (230) of two adjacent second pile structures (220) is defined as the projection plane of the square cone pile protrusions (230) of the two second pile structures (220) which pass through, and the included angle range of the side tangent projection of the square cone pile protrusions (230) of the two adjacent second pile structures (220) on the projection plane is more than or equal to 120 degrees.

6. The solar cell module of claim 5, wherein:

the silicon wafer (200) is N-type monocrystalline silicon.

7. The solar cell module of claim 5, wherein:

the emitter (100) is a P-type emitter.

8. The solar cell module of claim 7, wherein:

the emitter (100) is an emitter with a tunneling oxide layer and a P+ polysilicon layer structure.

9. The solar cell module of claim 8, wherein:

the first passivation layer (500) is an aluminum oxide layer.

10. The solar cell module of claim 9, wherein:

the second passivation layer (600) is a silicon nitride layer.

11. The solar cell module of claim 10, wherein:

a third passivation layer (700) is arranged on one side of the doped conductive layer (400) far away from the tunneling oxide layer (300).

12. The solar cell module of claim 11, wherein:

the third passivation layer (700) is a silicon nitride layer.

13. The solar cell module of claim 12, wherein:

the tunnel oxide layer (300) is a silicon oxide layer.

14. The solar cell module of claim 13, wherein:

the doped conductive layer (400) is a polysilicon layer.

15. The solar cell module of claim 14, wherein:

the doped conductive layer (400) is a laminated structure of a plurality of polysilicon layers.

16. The solar cell module of claim 5, wherein:

the silicon wafer structure further comprises a front electrode (800) and a back electrode (900), wherein the front electrode (800) and the back electrode (900) are respectively arranged on two sides of the silicon wafer (200).

17. The solar cell module of claim 16, wherein:

the back electrode (900) is a silver electrode.

18. The solar cell module of claim 16, wherein:

the front electrode (800) is a silver electrode or an aluminum electrode.

19. TOPCon structural cells suitable for double sided texturing of the solar cell modules according to any one of claims 1 to 18.