CN117410182A

CN117410182A - Manufacturing method of SiC MOSFET

Info

Publication number: CN117410182A
Application number: CN202311324956.2A
Authority: CN
Inventors: 李春财; 张永胜
Original assignee: Jiangsu Jingliheng Semiconductor Technology Co ltd
Current assignee: Jiangsu Jingliheng Semiconductor Technology Co ltd
Priority date: 2023-10-13
Filing date: 2023-10-13
Publication date: 2024-01-16

Abstract

The invention discloses a manufacturing method of a SiC MOSFET, which comprises the following steps: s1, providing a SiC substrate, which is provided with a source electrode, a grid electrode and a drain electrode; s2, forming a gate oxide layer on the SiC substrate; s3, forming a conductive film on the gate oxide layer; s4, patterning the conductive film to form conductive areas of a source electrode, a grid electrode and a drain electrode; s5, forming a metal layer on the conductive areas of the source electrode and the drain electrode; and S6, forming an insulating layer on the conductive region of the grid electrode. According to the invention, the gate oxide layer is formed on the SiC substrate, then the conductive film is formed, patterning treatment is carried out to form the conductive areas of the source electrode, the gate electrode and the drain electrode, finally the metal layer is formed on the conductive areas of the source electrode and the drain electrode, the insulating layer is formed on the conductive areas of the gate electrode, and then doping is carried out to form the conductive channels of the source electrode, the gate electrode and the drain electrode, so that the structure is more stable.

Description

Manufacturing method of SiC MOSFET

Technical Field

The invention relates to the technical field of semiconductor devices, in particular to a manufacturing method of a SiC MOSFET.

Background

SiC MOSFET devices are a new type of power semiconductor devices that consist of silicon carbide (SiC) and Metal Oxide Semiconductor Field Effect Transistors (MOSFETs). The SiC MOSFET device has excellent performances of high voltage resistance, high temperature, high frequency and the like, and is widely applied to the fields of power electronics, new energy sources and the like.

Silicon carbide (SiC) power electronics, particularly Metal Oxide Semiconductor Field Effect Transistors (MOSFETs), have important applications in power conversion and delivery systems due to their high withstand voltage, low on-resistance, high switching speed, etc. However, it remains a challenge to manufacture high quality, large area, well-consistent SiC MOSFETs. Accordingly, the present invention provides a method of manufacturing a SiC MOSFET that aims to solve the problems in the prior art.

Disclosure of Invention

In order to solve the above-mentioned shortcomings in the prior art, the present invention provides a method for manufacturing a SiC MOSFET, so as to solve the problems existing in the prior art.

The invention aims at realizing the following technical scheme:

a method of manufacturing a SiC MOSFET, comprising the steps of:

s1, providing a SiC substrate, which is provided with a source electrode, a grid electrode and a drain electrode;

s2, forming a gate oxide layer on the SiC substrate;

s3, forming a conductive film on the gate oxide layer;

s4, patterning the conductive film to form conductive areas of a source electrode, a grid electrode and a drain electrode;

s5, forming a metal layer on the conductive areas of the source electrode and the drain electrode;

s6, forming an insulating layer on the conductive region of the grid electrode;

s7, doping the conductive areas of the source electrode, the grid electrode and the drain electrode to form conductive channels of the source electrode, the grid electrode and the drain electrode.

Preferably, in S1, the SiC semiconductor substrate is 6H-SiC or 4H-SiC, and the substrate is prepared by chemical vapor deposition or physical vapor deposition.

Preferably, in S2, the gate oxide layer is silicon dioxide (SiO 2) or silicon nitride (Si 3N 4), and methods such as thermal oxidation, plasma Enhanced Chemical Vapor Deposition (PECVD), atomic Layer Deposition (ALD) and the like may be used.

Preferably, in S3, the conductive film is nickel (Ni) or cobalt (Co), and the conductive film may be prepared by evaporation, sputtering, chemical Vapor Deposition (CVD), or the like, and phosphorus and boron may be doped during the preparation process to provide conductivity.

Preferably, in S4, lithography, electron Beam Lithography (EBL), ion Beam Etching (IBE), or the like may be used.

Preferably, the substrate material is high-purity monocrystalline silicon, a silicon carbide film is prepared by adopting a Chemical Vapor Deposition (CVD) method or a Physical Vapor Deposition (PVD) method, a proper doping agent is selected, and an N-type or P-type semiconductor region is formed by adopting ion implantation or thermal diffusion technology.

Preferably, in S5, evaporation, sputtering, chemical Vapor Deposition (CVD) or the like may be used, and the metal layer may be composed of aluminum, nickel, gold, silver or the like.

Preferably, in S6, a method such as PECVD or ALD may be used, and the material may be silicon oxide, silicon nitride, silicon fluoride, or the like.

Preferably, in the step S7, doping may use ion implantation or solid diffusion, in which step, phosphorus may be used to enhance conductivity, boron may be used to adjust threshold voltage, PECVD or ALD may be used, and materials may be selected from silicon oxide, silicon nitride, silicon fluoride, and the like.

Compared with the prior art, the invention has the beneficial effects that:

(1) According to the manufacturing method, the gate oxide layer is formed on the SiC substrate, the conductive film is formed, patterning treatment is carried out, the conductive areas of the source electrode, the gate electrode and the drain electrode are formed, the metal layer is formed on the conductive areas of the source electrode and the drain electrode, the insulating layer is formed on the conductive areas of the gate electrode, and doping is carried out to form the conductive channels of the source electrode, the gate electrode and the drain electrode, so that the structure is more stable.

(2) By optimizing the SiC single crystal growth process, lattice defects can be reduced, and the crystal quality can be improved, thereby improving the performance of the SiC MOSFET.

Detailed Description

The technical solutions of the embodiments of the present invention will be clearly and completely described below in conjunction with the embodiments of the present invention, and it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.

An embodiment of the present invention provides:

a method of manufacturing a SiC MOSFET, comprising the steps of:

s2, forming a gate oxide layer on the SiC substrate;

s3, forming a conductive film on the gate oxide layer;

s6, forming an insulating layer on the conductive region of the grid electrode;

Further, in S1, the SiC semiconductor substrate is 6H-SiC or 4H-SiC, which is prepared by chemical vapor deposition or physical vapor deposition, and Chemical Vapor Deposition (CVD) has an advantage in that it can introduce carbon into a raw material gas and then deposit carbon atoms on the substrate by changing the temperature and pressure, thereby forming a SiC layer. The method can obtain the SiC film with high quality, large area and stable structure. Physical Vapor Deposition (PVD) is a process in which solid SiC targets are vaporized into atoms or molecules by physical means, such as magnetron sputtering, electron beam evaporation, etc., and then cooled in the vapor phase and deposited on a substrate to form a SiC layer. The method can form the SiC film with high quality, high density and excellent heat conduction performance.

Further, in S2, the gate oxide layer is silicon dioxide (SiO 2) or silicon nitride (Si 3N 4), and methods such as thermal oxidation, plasma Enhanced Chemical Vapor Deposition (PECVD), atomic Layer Deposition (ALD), and the like may be used, and the thermal oxidation method: at high temperatures, the silicon surface reacts with oxygen to form a layer of silicon dioxide, which is known as thermally oxidized silicon dioxide or thermal oxide. The method has the advantages that the formed oxide is stable, the interface is clean, and the method can be used for mass production. Plasma Enhanced Chemical Vapor Deposition (PECVD): the method uses radio frequency glow discharge to decompose gas molecules into reactive particles that react with the silicon surface to produce silicon nitride or silicon dioxide. PECVD has the advantages of being capable of being carried out at lower temperature and preparing a film with higher quality. Atomic Layer Deposition (ALD): this is an advanced thin film fabrication technique that can deposit silicon nitride or silicon dioxide layer by layer on a silicon surface. ALD has the advantages of high film quality and good compatibility, and can be applied to complex three-dimensional structures.

Further, in S3, the conductive film is nickel (Ni) or cobalt (Co), and may be prepared by evaporation, sputtering, or Chemical Vapor Deposition (CVD), and the like, and phosphorus and boron may be doped during the preparation process to provide conductivity, where the phosphorus and boron may form positive or negative ions in the conductive film, and these ions may provide free electrons or holes, increase carrier concentration, thereby improving conductivity, and doping phosphorus and boron may form defect energy levels, where these energy levels may scatter carriers, reduce mobility of carriers, thereby reducing resistivity, and where the phosphorus and boron may form stable compounds with silicon or carbon, so as to help stabilize the structure of the conductive film, improve stability, and where the addition of phosphorus and boron may improve chemical stability of the conductive film, so that the conductive film may adapt to more severe environmental conditions.

Further, in S4, lithography, which is a technique of projecting a designed pattern onto a photosensitive material by light to realize pattern transfer, electron Beam Lithography (EBL) or Ion Beam Etching (IBE) may be used. In S4, the micro-nano structure may be prepared using optical lithography or electron beam lithography. The optical lithography uses ultraviolet rays or visible rays for exposure, and has the advantages of high precision, high resolution, mass production and the like; electron beam lithography uses electron beams for exposure, and has the advantages of high precision, high resolution, low cost, and the like. Electron Beam Lithography (EBL): electron beam lithography is a technique in which an electron beam is directed at the surface of a photosensitive material to effect pattern transfer. In S4, the micro-nano structure may be prepared using electron beam lithography. The technology has the advantages of high precision and high resolution, and can be used for manufacturing high-precision and small-scale micro-nano structures. Meanwhile, the electron beam lithography technology has small damage to the surface of the sample and higher fidelity to the micro-nano structure. Ion Beam Etching (IBE): ion beam etching is a technique in which an ion beam is directed at the surface of a material, and material removal is achieved by ion bombardment. In S4, the micro-nano structure may be prepared using ion beam etching techniques. The technology has the advantages of high precision and high resolution, and can be used for manufacturing high-precision and small-scale micro-nano structures. Meanwhile, the ion beam etching technology has small damage to the surface of the sample and higher fidelity to the micro-nano structure. Compared with the electron beam lithography technology, the ion beam lithography technology has a faster processing speed and is more suitable for mass production. The combined use of different techniques can also produce more complex micro-nano structures.

Further, in the liner S5, evaporation, sputtering, chemical Vapor Deposition (CVD) or the like may be used, and the metal layer may be composed of elements such as aluminum, nickel, gold, or silver, and evaporated: evaporation is a technique in which atoms or molecules of a solid substance are evaporated from a surface and deposited on a substrate by heating the solid substance under a vacuum environment. In S5, the metal layer may be prepared using an evaporation method. The method has the advantages of high precision, high purity, large-area uniform deposition and the like, and can be used for preparing high-quality and high-stability metal films. Sputtering: sputtering is a technique in which a target surface is bombarded with a high-speed ion beam, and target atoms or molecules are ejected from the surface and deposited on a substrate. In S5, a metal layer may be prepared using a sputtering method. The method has the advantages of high deposition rate, high adhesive force, large-area uniform deposition and the like, and can be used for preparing metal films with complex shapes and structures. CVD: CVD is a technique that utilizes chemical reactions to deposit one or more layers of a substance on a substrate. In S5, a metal layer may be prepared using a CVD method. The method has the advantages of high purity, large-area uniform deposition, low temperature and the like, and can be used for preparing high-quality and high-stability metal films. The metal layer is composed of aluminum, nickel, gold or silver, and the like, and the elements have the advantages of high conductivity, high chemical stability and the like. The use of these elements to prepare the metal layer can improve the performance and stability of the electronic device while reducing the manufacturing cost.

Further, in S6, a method such as PECVD (plasma enhanced chemical vapor deposition) or ALD may be used, and the material may be silicon oxide, silicon nitride, silicon fluoride, or the like, and PECVD (plasma enhanced chemical vapor deposition): the technique uses glow discharge or arc discharge to ionize the reactant gases to form active particles that interact with the substrate surface to form a solid film. In S6, a thin film of silicon oxide, silicon nitride, silicon fluoride, or the like may be prepared using a PECVD method. The PECVD method has the advantages of low temperature, high deposition rate, high purity, large-area uniform deposition and the like, has good compatibility to substrate materials, and can be used for preparing various complex micro-nano structures. ALD (atomic layer deposition): the technology forms a thin film by introducing a reactive gas into a reaction chamber in a pulsed manner, so that the gas is deposited layer by layer on the surface of a substrate. In S6, a thin film of silicon oxide, silicon nitride, silicon fluoride, or the like may be prepared using an ALD method. The ALD method has the advantages of high precision, high purity, large-area uniform deposition, low temperature and the like, and can realize the preparation of the three-dimensional micro-nano structure. Silicon oxide, silicon nitride and silicon fluoride are all common semiconductor materials with excellent physical, chemical and electrical properties. The choice of these materials can meet different application requirements.

Further, in S7, doping may use ion implantation or solid diffusion, in which step, phosphorus element may be used to enhance conductivity, and boron element may be used to adjust threshold voltage, PECVD or ALD may be used, and materials may be selected from silicon oxide, silicon nitride, silicon fluoride, etc., and ion implantation is a common doping technique that implements doping of elements by implanting ion beams into semiconductor materials. In S7, an element such as phosphorus or boron may be doped into the transistor by using an ion implantation method. The ion implantation has the advantages of high precision, high purity, large area and uniform doping, and the like, and simultaneously has small damage to the semiconductor material, and can obtain high-quality doping effect. Solid state diffusion is a common diffusion technique by introducing impurity atoms from the outside into the surface of the semiconductor material and letting these atoms enter the interior of the material by diffusion. In S7, elements such as phosphorus, boron, and the like may be doped into the transistor using a solid state diffusion method. The solid diffusion has the advantages of simplicity, easiness, low cost, large-area uniform doping and the like, can realize low-temperature doping, and is suitable for large-scale production. In the doping process, the phosphorus element can be used for enhancing the conductivity, and can form an acceptor level in the semiconductor material to improve the carrier concentration of the material, so that better conductivity is realized. And boron element can be used to adjust the threshold voltage, which can form donor energy level in the semiconductor material, change the fermi level of the material, thereby adjusting the threshold voltage and realizing better electrical performance. By selecting appropriate dopants and doping methods, and combining PECVD or ALD methods to prepare thin films, transistor performance and reliability can be further optimized

It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The present embodiments are, therefore, to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.

Claims

1. A method of manufacturing a SiC MOSFET, comprising the steps of:

s2, forming a gate oxide layer on the SiC substrate;

s3, forming a conductive film on the gate oxide layer;

s6, forming an insulating layer on the conductive region of the grid electrode;

2. The method of manufacturing a SiC MOSFET according to claim 1, wherein in S1, the SiC semiconductor substrate is 6H-SiC or 4H-SiC, and the substrate is prepared by chemical vapor deposition or physical vapor deposition.

3. The method according to claim 1, wherein in S2, the gate oxide layer is silicon dioxide (SiO 2) or silicon nitride (Si 3N 4), and thermal oxidation, plasma Enhanced Chemical Vapor Deposition (PECVD), atomic Layer Deposition (ALD), or the like is used.

4. The method according to claim 1, wherein in S3, the conductive film is nickel (Ni) or cobalt (Co), and the conductive film is prepared by evaporation, sputtering, chemical Vapor Deposition (CVD), or the like, and phosphorus and boron may be doped during the preparation process to provide conductivity.

5. The method according to claim 1, wherein in S4, photolithography, electron Beam Lithography (EBL), ion Beam Etching (IBE), or the like is used.

6. The method of manufacturing a SiC MOSFET according to claim 1, wherein in S5, a method such as evaporation, sputtering or Chemical Vapor Deposition (CVD) is used, and the metal layer is made of an element such as aluminum, nickel, gold or silver.

7. The method of manufacturing a SiC MOSFET according to claim 1, wherein in S6, a method such as PECVD or ALD is used, and the material is selected from silicon oxide, silicon nitride, silicon fluoride, and the like.

8. The method of manufacturing a SiC MOSFET according to claim 1, wherein in S7, doping may use ion implantation or solid diffusion, and in this step, phosphorus element may be used to enhance conductivity, and boron element may be used to adjust threshold voltage, and PECVD, ALD, or the like may be used, and the material may be silicon oxide, silicon nitride, silicon fluoride, or the like.