CN117389818B - Verification method and device applied to UVM verification platform - Google Patents

Verification method and device applied to UVM verification platform Download PDF

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CN117389818B
CN117389818B CN202311696781.8A CN202311696781A CN117389818B CN 117389818 B CN117389818 B CN 117389818B CN 202311696781 A CN202311696781 A CN 202311696781A CN 117389818 B CN117389818 B CN 117389818B
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initialization
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CN117389818A (en
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崔金欢
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Niuxin Semiconductor Shenzhen Co ltd
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Niuxin Semiconductor Shenzhen Co ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2273Test methods
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2289Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing by configuration test

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Abstract

The embodiment of the application provides a verification method and device applied to a UVM verification platform, wherein the method comprises the following steps: generating a corresponding basic unit sequence according to the demand characteristic parameters in the design to be tested; creating an initialization case and a test case which correspond to each function to be tested in the design to be tested respectively based on the basic unit sequence; and updating the verification program in the UVM verification platform according to the initialization case and the test case. According to the technical scheme, the required characteristic parameters in the basic unit sequence can be directly obtained based on the basic unit sequence when the initialization cases and the test cases respectively corresponding to the functions to be tested are created, so that the required parameters for creating the initialization cases and the test cases are reduced, the whole code amount and development complexity are reduced, and the purposes of improving the development efficiency and shortening the development time are achieved.

Description

Verification method and device applied to UVM verification platform
Technical Field
The application relates to the technical field of design verification, in particular to a verification method and device applied to a UVM verification platform.
Background
With the continuous expansion of the design scale of digital integrated circuits, the duty ratio of the chip verification workload in the chip design period is larger and larger, and in related technology, in order to efficiently complete the verification of the design to be tested, a UVM (Universal Verification Methodology ) verification platform is generally adopted to verify the design to be tested, wherein the UVM verification platform provides a complete framework and a set of specifications.
However, when the verification program in the UVM verification platform is updated according to the design to be tested, if the design to be tested includes a plurality of functions to be tested, a developer needs to develop and write verification cases corresponding to the functions to be tested respectively, and update the verification cases corresponding to the functions to be tested to the verification program in which the UVM verification platform verifies the design to be tested, the UVM verification platform can verify the functions to be tested in the design to be tested, so that the workload of development is greatly increased, and the development efficiency is reduced and the development time is prolonged.
Disclosure of Invention
In order to solve the technical problems, embodiments of the present application provide an authentication method, an apparatus, a computer readable storage medium and an electronic device applied to a UVM authentication platform.
According to an aspect of the embodiments of the present application, there is provided an authentication method applied to a UVM authentication platform, including: generating a corresponding basic unit sequence according to the demand characteristic parameters in the design to be tested; creating an initialization case and a test case which correspond to each function to be tested in the design to be tested respectively based on the basic unit sequence; and updating the verification program in the UVM verification platform according to the initialization case and the test case.
According to an aspect of an embodiment of the present application, there is provided an authentication apparatus applied to a UVM authentication platform, including: the sequence generation module is configured to generate a corresponding basic unit sequence according to the demand characteristic parameters in the design to be tested; the case creation module is configured to create an initialization case and a test case which respectively correspond to each function to be tested in the design to be tested based on the basic unit sequence; and the updating module is configured to update the verification program in the UVM verification platform according to the initialization case and the test case.
In some embodiments of the present application, based on the foregoing solution, the case creation module is further configured to: acquiring initialization parameters corresponding to the design to be tested; generating an initialization sequence corresponding to the design to be tested according to the initialization parameter, wherein the initialization sequence is a subclass of the basic unit sequence; creating an initialization case corresponding to the design to be tested based on the initialization sequence, and taking the initialization case corresponding to the design to be tested as an initialization case corresponding to each function to be tested.
In some embodiments of the present application, based on the foregoing solution, the case creation module is further configured to: acquiring an initialization adjustment parameter in the function to be tested; generating an initialization adjustment sequence based on the initialization adjustment parameters; and updating the initialization case corresponding to the function to be tested according to the initialization adjusting sequence.
In some embodiments of the present application, based on the foregoing solution, the case creation module is further configured to: acquiring execution parameters corresponding to different actions to be executed in the function to be tested; generating a driving sequence according to the execution parameters corresponding to each action to be executed to obtain driving sequences corresponding to the actions to be executed in the function to be tested, wherein the driving sequences are subclasses of the basic unit sequences; and creating the test case based on the driving sequences corresponding to the actions to be executed respectively.
In some embodiments of the present application, based on the foregoing solution, the case creation module is further configured to: acquiring priority parameters of each action to be executed in the function to be tested; generating a test sequence corresponding to the function to be tested according to priority parameters corresponding to each action to be executed, wherein the test sequence is a subclass of the basic unit sequence; packaging driving sequences corresponding to all actions to be executed in the function to be tested into the test sequence, and adjusting the calling grade corresponding to the driving sequences in the test sequence to the calling grade of the test sequence; the test cases are created based on the test sequences.
In some embodiments of the present application, based on the foregoing solution, the sequence generating module is further configured to: acquiring data types required by various functions to be tested in the design to be tested; taking the data types required by the various functions to be tested as the demand characteristic parameters, and creating corresponding transaction packages based on the demand characteristic parameters; and generating a basic unit sequence corresponding to the design to be tested based on the transaction package.
In some embodiments of the present application, based on the foregoing solution, the design under test further includes a function under test added, and the sequence generating module is further configured to: determining the data type required by newly adding a function to be tested in the design to be tested; if the transaction package does not contain the data type required by the newly added function to be tested, adding the data type required by the newly added function to be tested into the transaction package to obtain an updated transaction package; and updating the basic unit sequence corresponding to the design to be tested based on the updated transaction package.
According to an aspect of the embodiments of the present application, there is provided a computer readable storage medium having stored thereon computer readable instructions, which when executed by a processor of a computer, cause the computer to perform an authentication method applied to a UVM authentication platform as described in the above embodiments.
According to an aspect of an embodiment of the present application, there is provided an electronic device including: one or more processors; and a storage device for storing one or more programs which, when executed by the one or more processors, cause the electronic device to implement the authentication method applied to the UVM authentication platform as described in the above embodiments.
In the technical scheme of the embodiment of the application, the basic unit sequence generated by the demand characteristic parameters in the design to be tested is benefited, so that the demand characteristic parameters in the basic unit sequence can be directly acquired by the initialization case and the test case created based on the basic unit sequence, the required parameters for creating the initialization case and the test case are reduced, the whole code quantity and the development complexity are further reduced, and the purposes of improving the development efficiency and shortening the development time are achieved. In addition, by distinguishing the initialization case from the test case, a developer can selectively develop the initialization case or the test case according to the self-capability, so that the technical requirements of the developer are reduced, and the possibility of errors in the updated verification program is reduced.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the application and together with the description, serve to explain the principles of the application. It is apparent that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained from these drawings without inventive effort for a person of ordinary skill in the art.
Fig. 1 is a flowchart illustrating an authentication method applied to a UVM authentication platform according to an exemplary embodiment of the present application.
Fig. 2 is a flowchart of step S120 in an example embodiment of the embodiment shown in fig. 1.
Fig. 3 is a flowchart of step S120 in another example embodiment of the embodiment shown in fig. 1.
Fig. 4 is a flow chart of an authentication method for use with the UVM authentication platform presented on the basis of the embodiment of fig. 2.
Fig. 5 is a flowchart of step S330 in an example embodiment in the embodiment shown in fig. 3.
Fig. 6 is a flowchart illustrating an authentication method applied to a UVM authentication platform according to another exemplary embodiment of the present application.
Fig. 7 is a block diagram illustrating an authentication apparatus applied to a UVM authentication platform according to an exemplary embodiment of the present application.
Fig. 8 is a schematic structural view of an electronic device shown in an exemplary embodiment of the present application.
Detailed Description
Example embodiments will now be described more fully with reference to the accompanying drawings. However, the exemplary embodiments may be embodied in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the example embodiments to those skilled in the art.
Furthermore, the described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided to give a thorough understanding of embodiments of the present application. One skilled in the relevant art will recognize, however, that the aspects of the application can be practiced without one or more of the specific details, or with other methods, components, devices, steps, etc. In other instances, well-known methods, devices, implementations, or operations are not shown or described in detail to avoid obscuring aspects of the application.
The block diagrams depicted in the figures are merely functional entities and do not necessarily correspond to physically separate entities. That is, the functional entities may be implemented in software, or in one or more hardware modules or integrated circuits, or in different networks and/or processor devices and/or microcontroller devices.
The flow diagrams depicted in the figures are exemplary only, and do not necessarily include all of the elements and operations/steps, nor must they be performed in the order described. For example, some operations/steps may be decomposed, and some operations/steps may be combined or partially combined, so that the order of actual execution may be changed according to actual situations.
It should be noted that: references herein to "a plurality" means two or more. "and/or" describes an association relationship of an association object, meaning that there may be three relationships, e.g., a and/or B may represent: a exists alone, A and B exist together, and B exists alone. The character "/" generally indicates that the context-dependent object is an "or" relationship.
It is first noted that UVM (Universal Verification Methodology ) verification platform is used to verify against hardware designs, which provides a complete framework and set of specifications. The UVM verification platform is built based on a UVM verification method.
In the related art, when the UVM verification platform verifies a design under test (DUT, design Under Test), it is generally required to develop and write a verification program corresponding to the design under test, so that the UVM verification platform verifies the design under test based on the verification program. If the to-be-tested design includes a plurality of to-be-tested functions, a developer needs to develop and write respective corresponding verification cases for the plurality of to-be-tested functions, and update the verification cases corresponding to the plurality of to-be-tested functions into a verification program for verifying the to-be-tested design by the UVM verification platform, wherein the UVM verification platform can only verify the plurality of to-be-tested functions in the to-be-tested design. However, the workload of developing and writing verification cases corresponding to a plurality of functions to be tested is large at present, so that the development efficiency of verification programs corresponding to the design to be tested is low, and the verification time consumption is prolonged.
Therefore, the technical solution of the embodiment of the present application proposes a verification method applied to a UVM verification platform, and specifically refers to fig. 1. The method can be applied to a UVM verification platform or other verification platforms constructed based on UVM. The method at least comprises the steps S110 to S130, and the detailed description is as follows:
in step S110, a corresponding basic cell sequence is generated according to the required feature parameters in the design under test.
It should be noted that the sequences are used to organize, describe and control the test behavior in the verification program of the UVM verification platform. Usually, the verification program corresponding to the design to be tested consists of a plurality of different sequences, that is, the design to be tested is decomposed into a plurality of smaller and manageable units based on the sequences, so that the development difficulty of the verification program is reduced, and meanwhile, the developer is convenient to remove faults. In addition, different sequences can be combined in an inheritance mode at will to realize multiplexing and expansion of test behaviors and meet test requirements of different functions to be tested in a design to be tested.
The method comprises the steps that a demand characteristic parameter represents basic parameters required by execution of various functions to be tested in a current design to be tested, a mode of generating a corresponding basic unit sequence according to the demand characteristic parameter in the design to be tested in the application can be flexibly set according to requirements, and in one example, data types required by the various functions to be tested in the design to be tested can be acquired first; the method comprises the steps that data types required by all functions to be tested are hard conditions for executing the functions to be tested, the data types required by the functions to be tested are used as demand characteristic parameters, and a transaction package is created based on the demand characteristic parameters; and generating a basic unit sequence corresponding to the design to be tested based on the transaction package, namely adding the transaction package into the generated basic unit sequence to serve as a parameter to be transferred, so that the sequence inherited to the basic unit sequence receives the transaction package serving as the parameter to be transferred.
For example, if the data types required by each function to be tested include a first data type, a second data type and a third data type, the first data type, the second data type and the third data type are used as demand characteristic parameters, then a plurality of fields to be added are generated according to the first data type, the second data type and the third data type in the demand characteristic parameters, the fields to be added are arranged according to an arrangement rule preset by a UVM detection platform, then a transaction package corresponding to the design to be tested is created based on the arranged fields to be added, and the arranged fields to be added are added into the created transaction package. And finally, adding the transaction packet into the generated basic unit sequence to be used as a parameter to be transmitted so as to obtain the basic unit sequence corresponding to the design to be tested.
In another example, constraint rules corresponding to data types required by each function to be tested can be obtained, the data types and constraint rules required by each function to be tested are used as demand characteristic parameters, and then transaction packages corresponding to the design to be tested are created based on the commonality parameters, so that after the transaction packages are added into a generated basic unit sequence to serve as parameters to be transferred, transfer contents of the basic unit sequence can be expanded on the premise of ensuring low generation difficulty of the basic unit sequence, and reusability of the basic unit sequence is improved.
In addition, considering that the design to be tested has the possibility of further adding the function to be tested in the development stage, the method and the device can determine the data type required by the function to be tested in the design to be tested when the design to be tested further comprises the function to be tested to be added to the new business package, if the data type required by the function to be tested to be added to be tested is not contained in the business package, the data type required by the function to be tested to be added to the current business package is represented, so that an updated business package is obtained, and finally the basic unit sequence corresponding to the design to be tested is updated based on the updated business package, so that the updated basic unit sequence can be reused in the function to be tested to be added to be tested. Meanwhile, the reusability of the base unit sequence can be further enlarged based on the updated base unit sequence.
In step S120, an initialization case and a test case corresponding to each function to be tested in the design to be tested are created based on the basic unit sequence.
It should be noted that the initialization case and the test case are both components of the verification case of the function to be tested. The initialization case is used for providing an initial implementation environment for implementing the function to be tested. The test case is used for simulating the function to be tested.
In the embodiment of the application, after the corresponding basic unit sequence is generated according to the design to be tested, the initialization cases and the test cases corresponding to each function to be tested in the design to be tested can be created based on the basic unit sequence, so that the initial implementation environment of the function to be tested is built later to complete the simulation of the function to be tested.
In one embodiment of the present application, referring to fig. 2, the process of creating the initialization case and the test case corresponding to each function to be tested in the design to be tested based on the basic unit sequence in step S120 may include steps S210 to S230.
Step S210, obtaining initialization parameters corresponding to the design to be tested.
The initialization parameters represent parameter information of an initial implementation environment corresponding to each function to be tested before the function to be tested is implemented in the design to be tested. For example, parameter information such as register configuration, wait state, etc.
Step S220, generating an initialization sequence corresponding to the design to be tested according to the initialization parameters, wherein the initialization sequence is a subclass of the basic unit sequence.
In the embodiment of the application, after the initialization parameters corresponding to the design to be tested are obtained, an initialization sequence corresponding to the design to be tested can be generated according to the initialization parameters, that is, the initialization parameters corresponding to the design to be tested are added into the created initialization sequence, and the initialization sequence corresponding to the design to be tested is obtained. Meanwhile, the initialization sequence is used as a subclass of the basic unit sequence, namely, the initialization sequence is inherited to the basic unit sequence, so that when the initialization sequence corresponding to the design to be tested is executed, the required characteristic parameters transmitted by the basic unit sequence can be directly received, the required parameters for creating the initialization sequence are reduced, the code quantity in the initialization sequence is reduced, the development difficulty is reduced, and the failure rate is reduced.
In one example, in generating the initialization sequence, the pre_body instruction may be used to add initialization parameters to the initialization sequence to increase the execution priority of the initialization parameters in the initialization sequence.
Step S230, an initialization case corresponding to the design to be tested is created based on the initialization sequence, and the initialization case corresponding to the design to be tested is used as the initialization case corresponding to each function to be tested.
In the embodiment of the application, after the initialization sequence corresponding to the design to be tested is generated, an initialization case corresponding to the design to be tested can be created based on the initialization sequence, namely, the initialization sequence is instantiated in the created initialization case, and the initialization sequence is started to be executed in a sequencer corresponding to the initialization case, so that the initialization case is obtained, the initialization case corresponding to the design to be tested is further used as the initialization case corresponding to each function to be tested, and therefore, when each function to be tested is executed, an initial implementation environment corresponding to the design to be tested can be built according to the initialization case.
According to the embodiment, in the process of creating the initialization cases corresponding to each function to be tested respectively based on the basic unit sequence, the initialization sequences corresponding to each function to be tested and used for creating the initialization cases are generated according to the acquired initialization parameters corresponding to the design to be tested, and are inherited to the basic unit sequence, so that the initialization sequences are used as subclasses of the basic unit sequence, the required characteristic parameters transmitted by the basic unit sequence are directly received, the required parameters for creating the initialization sequences are reduced, the overall code quantity and development difficulty are reduced, and the development time is shortened.
In an embodiment of the present application, referring to fig. 3, the process of creating an initialization case and a test case corresponding to each function to be tested in the design to be tested based on the basic unit sequence in step S120 may further include steps S310 to S330.
Step S310, obtaining execution parameters corresponding to different actions to be executed in the function to be tested.
The function to be tested consists of a plurality of actions to be executed. The execution parameters are parameter information executed by the action to be executed.
Step S320, a driving sequence is generated according to the execution parameters corresponding to each action to be executed, so as to obtain driving sequences corresponding to each action to be executed in the function to be tested, wherein the driving sequences are sub-types of basic unit sequences.
In the embodiment of the application, after the execution parameters corresponding to different actions to be executed in the function to be tested are obtained, a driving sequence can be generated according to the execution parameters corresponding to each action to be executed, that is, the driving sequence corresponding to each action to be tested is obtained by adding the corresponding execution parameters to the created driving sequence for each action to be tested, so that the driving sequence corresponding to each action to be executed in the function to be tested is obtained. Meanwhile, each driving sequence is used as a subclass of the basic unit sequence, namely, each driving sequence is inherited to the basic unit sequence, so that when the driving sequence corresponding to each to-be-tested action is executed, the required characteristic parameters transmitted by the basic unit sequence can be directly received, the required parameters for creating the driving sequence are reduced, the code quantity in the driving sequence is further reduced, the whole code quantity is further reduced, and the development difficulty and the fault rate are further reduced.
Step S330, a test case is created based on the driving sequences corresponding to the actions to be executed.
In the embodiment of the application, after the driving sequences corresponding to the actions to be executed in the functions to be tested are generated, the test cases can be created based on the driving sequences corresponding to the actions to be executed, namely, the plurality of driving sequences are instantiated in the created test cases, and each driving sequence is started to be executed in the sequencer corresponding to the test case, so that the test case corresponding to each function to be tested is obtained, and the simulation of the actions to be executed in each function to be tested is facilitated according to the test cases.
According to the embodiment, in the process of creating the test cases corresponding to each function to be tested respectively based on the basic unit sequence, the driving sequences corresponding to the different actions to be executed are generated according to the acquired execution parameters corresponding to the different actions to be executed in each function to be tested respectively, and then the test cases corresponding to the functions to be tested are created based on the driving sequences corresponding to the actions to be executed in each function to be tested respectively.
In step S130, the verification program in the UVM verification platform is updated according to the initialization case and the test case.
In the embodiment of the application, after the initialization cases and the test cases corresponding to each function to be tested in the design to be tested are created based on the basic unit sequence, the verification program in the UVM verification platform can be updated according to the initialization cases and the test cases, so that the UVM verification platform can complete verification of the design to be tested based on the updated verification program.
According to the method, the verification program can be flexibly set according to the needs by updating the initialization cases and the test cases, in one example, the test cases corresponding to each function to be tested can be inherited to the initialization cases corresponding to the function to be tested, so that the test cases corresponding to each function to be tested are used as subclasses of the corresponding initialization cases, the initialization cases corresponding to each function to be tested in the design to be tested are inherited to the verification program, the initialization cases corresponding to each function to be tested in the design to be tested are used as subclasses of the verification program, the verification program is updated, the UVM verification platform can sequentially execute the initialization cases and the test cases in the process of executing the verification program, namely, the initial implementation environment of the function to be tested in the design to be tested is built, and then each action to be executed in the function to be tested is simulated, so that verification of the design to be tested is completed.
In another example, a plurality of preset labels corresponding to test cases of each function to be tested can be obtained, each test case is inherited to an initialization case corresponding to each preset label according to the plurality of preset labels, each test case is made to be based on the plurality of preset labels as sub-classes of the initialization cases corresponding to each preset label, each initialization case corresponding to each function to be tested in the design to be tested is inherited to a verification program, each initialization case corresponding to each function to be tested in the design to be tested is made to be a sub-class of the verification program, so that the verification program is updated, a developer can verify the execution condition of a single test case in different initialization environments corresponding to different initialization cases in a UVM verification platform, meanwhile, when the initialization environments corresponding to different functions to be tested in the design to be tested are the same, the reusability of the initialization cases can be remarkably improved through the mode of assigning the initialization cases to the preset labels in the functions to be tested, and the whole code quantity can be further reduced.
According to the embodiment, in the process of verifying the to-be-tested design in the UVM verification platform, the corresponding basic unit sequence can be generated according to the required characteristic parameters in the to-be-tested design, then the initialization cases and the test cases corresponding to all to-be-tested functions in the to-be-tested design are created based on the basic unit sequence, finally the verification program in the UVM verification platform is updated according to the initialization cases and the test cases, so that the to-be-tested design is verified by running the updated verification program in the UVM verification platform later. In addition, by distinguishing the initialization case from the test case, a developer can selectively develop the initialization case or the test case according to the self-capability, so that the technical requirements of the developer are reduced, and the possibility of errors in the updated verification program is reduced.
Referring to fig. 4, fig. 4 is a flowchart of an authentication method applied to the UVM authentication platform according to the embodiment shown in fig. 2. As shown in fig. 4, the method may further include steps S410 to S420, which are described in detail below:
in step S410, an initialization adjustment parameter in the function to be tested is acquired, an initialization adjustment sequence is generated based on the initialization adjustment parameter, and the initialization adjustment sequence is a sub-class of the base unit sequence.
In the embodiment of the application, considering that the initial implementation environments corresponding to different functions to be tested in the design to be tested may have differences, in the process of creating the initialization cases corresponding to each function to be tested respectively, the initialization adjustment parameters in the functions to be tested may be further obtained, and then the initialization adjustment sequence is generated based on the initialization adjustment parameters, that is, the initialization adjustment parameters of the functions to be tested are added into the created initialization adjustment sequence, so as to obtain the initialization adjustment sequence corresponding to the functions to be tested. Meanwhile, the initialization adjusting sequence is used as a subclass of the basic unit sequence, namely, the initialization adjusting sequence is inherited to the basic unit sequence, so that the initialization adjusting sequence can directly receive the required characteristic parameters transmitted by the basic unit sequence, and the required parameters for creating the initialization adjusting sequence are reduced.
In step S420, the initialization case corresponding to the function to be tested is updated according to the initialization adjustment sequence.
In the embodiment of the application, after the initialization adjustment sequence is generated, the initialization case corresponding to the function to be tested can be updated according to the initialization adjustment sequence, so as to construct an initial implementation environment required by the function to be tested.
The method for updating the initialization case corresponding to the function to be tested according to the initialization adjustment sequence can be flexibly set according to the requirement, in one example, the initialization case of the design to be tested created based on the initialization sequence can comprise a plurality of initialization implementation environments, each initialization implementation environment is correspondingly provided with a response condition, so that the initialization implementation environment constructed by the initialization case is switched according to the response condition, the corresponding response condition can be determined according to the initialization adjustment sequence, and the initialization case corresponding to the function to be tested is updated based on the response condition, so that the initialization case corresponding to the function to be tested constructs the initialization implementation environment required by the current function to be tested.
In another example, the initialization adjustment sequence may be directly instantiated in an initialization case corresponding to the function to be tested, and the initialization adjustment sequence is started to be executed in a sequencer corresponding to the initialization case of the function to be tested, so as to achieve the purpose of updating the initialization case corresponding to the function to be tested.
Referring to fig. 5, fig. 5 is a flowchart of step S330 in an exemplary embodiment in the embodiment shown in fig. 3. As shown in fig. 5, the process of creating the test case based on the driving sequences corresponding to the respective actions to be performed may include steps S510 to S540, which are described in detail as follows:
in step S510, a priority parameter of each action to be executed in the function to be tested is obtained.
The priority parameter characterizes an execution rule of each action to be executed in the function to be tested, namely an execution sequence of each action to be executed.
In step S520, a test sequence corresponding to the function to be tested is generated according to the priority parameters corresponding to each action to be executed, and the test sequence is a sub-class of the basic unit sequence.
In the embodiment of the application, after the priority parameters of each action to be executed are obtained, the test sequence corresponding to the function to be tested can be generated according to the priority parameters corresponding to each action to be executed, so that the driving sequence corresponding to each action to be executed is sequentially called and executed according to the priority parameters corresponding to each action to be executed through the test sequence, and the development difficulty of the driving sequence corresponding to each action to be executed is reduced. Meanwhile, the test sequence is used as a subclass of the basic unit sequence, namely, the test sequence is inherited to the basic unit sequence, so that the test sequence can also directly receive the required characteristic parameters transmitted by the basic unit sequence when being executed, the required parameters for creating the test sequence are reduced, and the whole code quantity can be effectively reduced.
In step S530, the driving sequences corresponding to the actions to be executed in the function to be tested are encapsulated into the test sequences, and the call level corresponding to the driving sequences in the test sequences is adjusted to the call level of the test sequences.
In consideration of the possibility that a plurality of actions to be executed exist in a to-be-tested design and nest the same action to be executed, namely, on the premise of completely executing the current action to be executed, an execution result of another action to be executed needs to be used, therefore, in the implementation mode of the application, each driving sequence corresponding to each action to be executed in the to-be-tested function can be packaged into a test sequence, then the calling level corresponding to the driving sequence in the test sequence is adjusted to the calling level of the test sequence, so that other driving sequences packaged in the test sequence can be directly called in the executing process of the driving sequence corresponding to the to-be-tested function, the executing result of the driving sequence corresponding to the current action to be executed in the to-be-tested design can be directly obtained, the executing condition of the current action to be executed is met, and the driving sequence of another action to be executed does not need to be repeatedly nested in the driving sequence of each action to be executed, and therefore the development efficiency is further improved.
Specifically, the manner of adjusting the call level corresponding to the driving sequence in the test sequence to the call level of the test sequence may utilize a p_sequence conversion instruction, that is, the driving sequence in the test sequence is placed on the p_sequence corresponding to the test sequence to start execution.
In step S540, a test case is created based on the test sequence.
In the embodiment of the application, after the driving sequences corresponding to the actions to be executed are respectively packaged into the test sequences and the call level corresponding to the driving sequences in the test sequences is adjusted to the call level of the test sequences, the test cases can be created based on the test sequences, namely, the test sequences are instantiated in the created test cases, and the test sequences are started to execute on the sequencers corresponding to the test cases, so that the test cases corresponding to the functions to be tested in the design to be tested are obtained.
Fig. 6 is a flowchart of an authentication method applied to a UVM authentication platform according to an embodiment of the present application, and as shown in fig. 6, the authentication method at least includes steps S601 to S614, which are described in detail below:
step S601, obtaining data types required by various functions to be tested in the design to be tested.
The data types required by each function to be tested are hard conditions for executing each function to be tested.
Step S602, creating a transaction package corresponding to the design to be tested according to the data types required by each function to be tested.
The manner of creating the transaction package according to the data type is described in the above embodiments, and will not be described herein.
Step S603, generating a basic unit sequence corresponding to the design to be tested based on the transaction package.
The base unit sequence contains the transaction packet created by the data types required by each function to be tested, so that the sequence inherited by the base unit sequence can directly receive the data types required by each function to be tested as parameters to be transferred in the base unit sequence, thereby correspondingly reducing the required parameters of the sequence as a subclass of the base unit sequence during creation and further reducing the overall code quantity.
After executing step S603, the method may be executed according to the sequence from step S604 to step S606 to obtain initialization cases corresponding to each function to be tested in the design to be tested, and then executed according to the sequence from step S607 to step S611 to obtain test cases corresponding to each function to be tested in the design to be tested. Or, steps S604 to S606 of acquiring the initialization case and steps S607 to S611 of acquiring the test case are synchronously performed.
The specific contents corresponding to the steps S604 to S606 for obtaining the initialization cases corresponding to each function to be tested in the design to be tested are as follows:
step S604, obtaining initialization parameters corresponding to the design to be tested.
Step S605, generating an initialization sequence corresponding to the design to be tested according to the initialization parameters, wherein the initialization sequence is a subclass of the basic unit sequence.
Step S606, creating an initialization case corresponding to the design to be tested based on the initialization sequence, and taking the initialization case corresponding to the design to be tested as the initialization case corresponding to each function to be tested.
Specifically, the manner of creating the initialization case based on the initialization sequence is described in the above embodiment, and will not be described herein.
After step S603 is executed, specific contents corresponding to steps S607 to S611 for acquiring test cases corresponding to each function to be tested in the design to be tested are as follows:
step S607, obtain execution parameters corresponding to different actions to be executed in the function to be tested.
In step S608, a driving sequence is generated according to the execution parameters corresponding to each to-be-executed action, so as to obtain driving sequences corresponding to each to-be-executed action in the to-be-tested function, wherein the driving sequences are sub-types of the basic unit sequences.
It should be noted that, the driving sequence is used for simulating the action to be executed to obtain the execution result corresponding to the action to be executed. In the process of executing step S608 to generate the driving sequence, the driving sequence is made to be a subclass of the basic unit sequence, so that the driving sequence can inherit the required characteristic parameters transferred by the basic unit sequence, thereby reducing the required parameters for generating the driving sequence, and further achieving the purposes of reducing development difficulty and shortening development time.
Step S609, obtaining priority parameters of each action to be executed in the function to be tested, and generating a test sequence corresponding to the function to be tested based on the priority parameters, wherein the test sequence is a subclass of the basic unit sequence.
It should be noted that, the test sequence is used for setting the execution rule of the driving sequence corresponding to each action to be executed in the function to be tested. Accordingly, in the process of executing step S609 to generate the test sequence, the test sequence is made to be a subclass of the base unit sequence, which is also used to reduce the required parameters for generating the test sequence, further reduce the development difficulty and shorten the development time.
Step S610, packaging the driving sequences corresponding to the actions to be executed in the function to be tested into the test sequences, and adjusting the calling level corresponding to the driving sequences in the test sequences to the calling level of the test sequences.
By executing step S610, in the process of executing the driving sequences corresponding to the actions to be executed, other driving sequences encapsulated in the test sequence to be executed can be called, so as to meet the execution condition of the current actions to be executed, and related contents of the driving sequences of other actions to be executed do not need to be nested in the driving sequences of the current actions to be executed.
In step S611, a test case is created based on the test sequence.
Specifically, the manner of creating the test cases based on the test sequences is described in the above embodiments, and will not be described herein.
In addition, the steps S607 to S611 describe a process of generating test cases corresponding to one of the functions to be tested in the design to be tested, that is, the number of times of performing steps S607 to S611 in a circulating manner, so as to ensure that each function to be tested in the design to be tested creates a corresponding test case.
After the execution of the steps of obtaining the initialization case and obtaining the test case is finished, that is, after the execution of steps S604 to S611 is finished, step S612 is skipped to determine whether the design to be tested further includes a new function to be tested.
In step S612, if yes, the newly added function to be tested exists in the design to be tested is represented, step S613 is executed, whether the transaction packet existing in the basic unit sequence contains the data type required by the newly added function to be tested is judged, if yes, the current basic unit sequence is represented to be able to be reused in creating the initialization case and the test case corresponding to the newly added function to be tested, and step S607 to step S611 are skipped to create the initialization case and the test case corresponding to the newly added function to be tested.
In contrast, in the process of executing step S613, if the determination is no, the step S601 is skipped to be executed to acquire the data type required by the new function to be tested in the design to be tested again, and the transaction packet is updated in the subsequent step, so as to ensure that the base unit sequence can be reused in the new function to be tested. Meanwhile, the reusability of the base unit sequence can be further enlarged based on the updated base unit sequence.
And in the process of executing step S612, if the determination is no, it is indicated that there is no new function to be tested in the design to be tested, and step S614 may be directly executed, where the verification program in the UVM verification platform is updated according to the initialization case and the test case, so that the UVM verification platform completes verification of the design to be tested based on the updated verification program.
In addition, step S612 and step S613 may be performed after the step S602 is performed, that is, after creating a transaction package corresponding to the design under test according to the data types required by each function under test, to determine in advance whether there is a new function under test in the design under test, and update the transaction package.
The following describes an embodiment of an apparatus of the present application, which may be used to perform the authentication method applied to the UVM authentication platform in the above embodiment of the present application. For details not disclosed in the embodiments of the apparatus of the present application, please refer to the embodiments of the verification method applied to the UVM verification platform described in the present application.
Fig. 7 shows a block diagram of an authentication device 700 applied to a UVM authentication platform according to one embodiment of the present application.
Referring to fig. 7, according to an embodiment of the present application, there is provided an authentication apparatus applied to a UVM authentication platform, including: the sequence generating module 710 is configured to generate a corresponding basic unit sequence according to the requirement characteristic parameters in the design to be tested; the case creation module 720 is configured to create an initialization case and a test case corresponding to each function to be tested in the design to be tested based on the basic unit sequence; an update module 730 configured to update the verification program in the UVM verification platform based on the initialization case and the test case.
In some embodiments of the present application, based on the foregoing, the case creation module 720 is further configured to: acquiring initialization parameters corresponding to the design to be tested; generating an initialization sequence corresponding to the design to be tested according to the initialization parameters, wherein the initialization sequence is a subclass of the basic unit sequence; and creating an initialization case corresponding to the design to be tested based on the initialization sequence, and taking the initialization case corresponding to the design to be tested as the initialization case corresponding to each function to be tested.
In some embodiments of the present application, based on the foregoing, the case creation module 720 is further configured to: acquiring an initialization adjustment parameter in a function to be tested, and generating an initialization adjustment sequence based on the initialization adjustment parameter; initializing regulatory sequences as subclasses of base unit sequences; and updating an initialization case corresponding to the function to be tested according to the initialization adjusting sequence.
In some embodiments of the present application, based on the foregoing, the case creation module 720 is further configured to: acquiring execution parameters corresponding to different actions to be executed in the function to be tested respectively; generating a driving sequence according to the execution parameters corresponding to each action to be executed to obtain driving sequences corresponding to the actions to be executed in the function to be tested, wherein the driving sequences are sub-types of basic unit sequences; and creating a test case based on the driving sequences corresponding to the actions to be executed respectively.
In some embodiments of the present application, based on the foregoing, the case creation module 720 is further configured to: acquiring priority parameters of each action to be executed in the function to be tested; generating a test sequence corresponding to the function to be tested according to priority parameters corresponding to each action to be executed, wherein the test sequence is a subclass of the basic unit sequence; packaging driving sequences corresponding to all actions to be executed in the function to be tested into a test sequence, and adjusting the calling level corresponding to the driving sequences in the test sequence to the calling level of the test sequence; test cases are created based on the test sequences.
In some embodiments of the present application, based on the foregoing scheme, the sequence generation module 710 is further configured to: acquiring data types required by various functions to be tested in the design to be tested; taking the data types required by each function to be tested as demand characteristic parameters, and creating a corresponding transaction package based on the demand characteristic parameters; and generating a basic unit sequence corresponding to the design to be tested based on the transaction package.
In some embodiments of the present application, based on the foregoing solution, the design under test further includes a new function under test, and the sequence generating module 710 is further configured to: determining the data type required by the newly added function to be tested in the design to be tested; if the transaction package does not contain the data type required by the newly added function to be tested, adding the data type required by the newly added function to be tested into the transaction package to obtain an updated transaction package; and updating the basic unit sequence corresponding to the to-be-tested design based on the updated transaction packet.
It should be noted that, the verification apparatus 700 applied to the UVM verification platform provided in the foregoing embodiment and the verification method applied to the UVM verification platform provided in the foregoing embodiment belong to the same concept, and the specific manner in which each module and unit perform the operation has been described in detail in the method embodiment, which is not repeated herein.
The embodiment of the application also provides electronic equipment, which comprises a processor and a memory, wherein the memory is stored with computer readable instructions which are executed by the processor to realize the verification method applied to the UVM verification platform.
Fig. 8 shows a schematic diagram of a computer system suitable for use in implementing the electronic device of the embodiments of the present application.
It should be noted that, the computer system 800 of the electronic device shown in fig. 8 is only an example, and should not impose any limitation on the functions and the application scope of the embodiments of the present application.
As shown in fig. 8, the computer system 800 includes a central processing unit (Central Processing Unit, CPU) 801 that can perform various appropriate actions and processes, such as performing the methods described in the above embodiments, according to a program stored in a Read-Only Memory (ROM) 802 or a program loaded from a storage section 808 into a random access Memory (Random Access Memory, RAM) 803. In the RAM 803, various programs and data required for system operation are also stored. The CPU 801, ROM 802, and RAM 803 are connected to each other by a bus 804. An Input/Output (I/O) interface 805 is also connected to bus 804.
The following components are connected to the I/O interface 805: an input portion 806 including a keyboard, mouse, etc.; an output portion 807 including a Cathode Ray Tube (CRT), a liquid crystal display (Liquid Crystal Display, LCD), and the like, and a speaker, and the like; a storage section 808 including a hard disk or the like; and a communication section 809 including a network interface card such as a LAN (Local Area Network ) card, modem, or the like. The communication section 809 performs communication processing via a network such as the internet. The drive 810 is also connected to the I/O interface 805 as needed. A removable medium 811 such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, or the like is mounted on the drive 810 as needed so that a computer program read out therefrom is mounted into the storage section 808 as needed.
In particular, according to embodiments of the present application, the processes described above with reference to flowcharts may be implemented as computer software programs. For example, embodiments of the present application include a computer program product comprising a computer program embodied on a computer readable medium, the computer program comprising a computer program for performing the method shown in the flowchart. In such an embodiment, the computer program may be downloaded and installed from a network via the communication section 809, and/or installed from the removable media 811. When executed by a Central Processing Unit (CPU) 801, the computer program performs the various functions defined in the system of the present application.
It should be noted that, the computer readable medium shown in the embodiments of the present application may be a computer readable signal medium or a computer readable storage medium, or any combination of the two. The computer readable storage medium can be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or a combination of any of the foregoing. More specific examples of the computer-readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-Only Memory (ROM), an erasable programmable read-Only Memory (Erasable Programmable Read Only Memory, EPROM), flash Memory, an optical fiber, a portable compact disc read-Only Memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the context of this document, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. In the present application, however, a computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, with a computer-readable computer program embodied therein. Such a propagated data signal may take any of a variety of forms, including, but not limited to, electro-magnetic, optical, or any suitable combination of the foregoing. A computer readable signal medium may also be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device. A computer program embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to: wireless, wired, etc., or any suitable combination of the foregoing.
The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present application. Where each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams or flowchart illustration, and combinations of blocks in the block diagrams or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
The units involved in the embodiments of the present application may be implemented by means of software, or may be implemented by means of hardware, and the described units may also be provided in a processor. Wherein the names of the units do not constitute a limitation of the units themselves in some cases.
As another aspect, the present application also provides a computer-readable storage medium that may be included in the electronic device described in the above embodiments; or may exist alone without being incorporated into the electronic device. The computer-readable storage medium carries one or more programs which, when executed by the electronic device, cause the electronic device to implement the methods described in the above embodiments.
It should be noted that although in the above detailed description several modules or units of a device for action execution are mentioned, such a division is not mandatory. Indeed, the features and functions of two or more modules or units described above may be embodied in one module or unit, in accordance with embodiments of the present application. Conversely, the features and functions of one module or unit described above may be further divided into a plurality of modules or units to be embodied.
From the above description of embodiments, those skilled in the art will readily appreciate that the example embodiments described herein may be implemented in software, or may be implemented in software in combination with the necessary hardware. Thus, the technical solution according to the embodiments of the present application may be embodied in the form of a software product, which may be stored in a non-volatile storage medium (may be a CD-ROM, a usb disk, a mobile hard disk, etc.) or on a network, and includes several instructions to cause a computing device (may be a personal computer, a server, a touch terminal, or a network device, etc.) to perform the method according to the embodiments of the present application.
Other embodiments of the present application will be apparent to those skilled in the art from consideration of the specification and practice of the embodiments disclosed herein. This application is intended to cover any variations, uses, or adaptations of the application following, in general, the principles of the application and including such departures from the present disclosure as come within known or customary practice within the art to which the application pertains.
It is to be understood that the present application is not limited to the precise arrangements and instrumentalities shown in the drawings, which have been described above, and that various modifications and changes may be effected without departing from the scope thereof. The scope of the application is limited only by the appended claims.

Claims (9)

1. A verification method applied to a UVM verification platform, the method comprising:
acquiring data types required by various functions to be tested in the design to be tested;
taking the data types required by each function to be tested as demand characteristic parameters, and creating a corresponding transaction package based on the demand characteristic parameters;
generating a basic unit sequence corresponding to the design to be tested based on the transaction package;
creating an initialization case and a test case which correspond to each function to be tested in the design to be tested respectively based on the basic unit sequence; wherein, the initialization cases and the test cases corresponding to each function to be tested are inherited to the basic unit sequence;
And updating the verification program in the UVM verification platform according to the initialization case and the test case.
2. The verification method according to claim 1, wherein creating an initialization case and a test case respectively corresponding to each function to be tested in the design to be tested based on the base unit sequence includes:
acquiring initialization parameters corresponding to the design to be tested;
generating an initialization sequence corresponding to the design to be tested according to the initialization parameter, wherein the initialization sequence is a subclass of the basic unit sequence;
creating an initialization case corresponding to the design to be tested based on the initialization sequence, and taking the initialization case corresponding to the design to be tested as an initialization case corresponding to each function to be tested.
3. The authentication method of claim 2, wherein the authentication method further comprises:
acquiring an initialization adjustment parameter in the function to be tested, and generating an initialization adjustment sequence based on the initialization adjustment parameter; the initialization regulatory sequence is a subclass of the base unit sequence;
and updating the initialization case corresponding to the function to be tested according to the initialization adjusting sequence.
4. The verification method according to claim 1, wherein creating an initialization case and a test case respectively corresponding to each function to be tested in the design to be tested based on the base unit sequence includes:
acquiring execution parameters corresponding to different actions to be executed in the function to be tested;
generating a driving sequence according to the execution parameters corresponding to each action to be executed to obtain driving sequences corresponding to the actions to be executed in the function to be tested, wherein the driving sequences are subclasses of the basic unit sequences;
and creating the test case based on the driving sequences corresponding to the actions to be executed respectively.
5. The method of claim 4, wherein creating the test cases based on the respective drive sequences for the respective actions to be performed comprises:
acquiring priority parameters of each action to be executed in the function to be tested;
generating a test sequence corresponding to the function to be tested according to priority parameters corresponding to each action to be executed, wherein the test sequence is a subclass of the basic unit sequence;
packaging driving sequences corresponding to all actions to be executed in the function to be tested into the test sequence, and adjusting the calling grade corresponding to the driving sequences in the test sequence to the calling grade of the test sequence;
The test cases are created based on the test sequences.
6. The method of verification according to claim 1, wherein the design under test further comprises a newly added function under test, the method of verification further comprising:
determining the data type required by newly adding a function to be tested in the design to be tested;
if the transaction package does not contain the data type required by the newly added function to be tested, adding the data type required by the newly added function to be tested into the transaction package to obtain an updated transaction package;
and updating the basic unit sequence corresponding to the design to be tested based on the updated transaction package.
7. A verification device for use with a UVM verification platform, comprising:
the sequence generation module is configured to acquire data types required by various functions to be tested in the design to be tested;
taking the data types required by each function to be tested as demand characteristic parameters, and creating a corresponding transaction package based on the demand characteristic parameters;
generating a basic unit sequence corresponding to the design to be tested based on the transaction package;
the case creation module is configured to create an initialization case and a test case which respectively correspond to each function to be tested in the design to be tested based on the basic unit sequence; wherein, the initialization cases and the test cases corresponding to each function to be tested are inherited to the basic unit sequence;
And the updating module is configured to update the verification program in the UVM verification platform according to the initialization case and the test case.
8. A computer readable storage medium having stored thereon computer readable instructions which, when executed by a processor of a computer, cause the computer to perform the authentication method of any one of claims 1 to 6 applied to a UVM authentication platform.
9. An electronic device, comprising:
one or more processors;
storage means for storing one or more programs which when executed by the one or more processors cause the electronic device to implement the authentication method of any one of claims 1 to 6 applied to a UVM authentication platform.
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