CN117373524A - Monitoring method and system for aging test of memory chip - Google Patents
Monitoring method and system for aging test of memory chip Download PDFInfo
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Abstract
The method comprises the steps of acquiring attribute parameter information and electrical parameter information of a memory chip placed in a preset aging test environment in real time through a preset parameter detection device in a test time period, and analyzing whether the memory chip passes the aging test or not based on the attribute parameter information and the electrical parameter information. The method realizes comprehensive monitoring of the change of each parameter of the aging chip when the aging test is carried out on the memory chip, and improves the precision of the aging test of the memory chip.
Description
Technical Field
The present disclosure relates to the field of chip technologies, and in particular, to a method and system for monitoring burn-in testing of a memory chip.
Background
Memory chips, which are one of the core components of computer systems and electronic devices, assume important tasks for data storage and reading. With the wide application of memory chips in various fields, the demands for reliability and stability of the memory chips are also increasing. The memory chip is susceptible to various factors such as voltage noise, temperature variation and the like during the use process, so that the performance of the memory chip may be reduced, such as data loss, slow reading and writing speed, small storage capacity and the like. Therefore, to ensure that the memory chip is not damaged or erroneous during normal operation, it is important to evaluate the stability and reliability of the memory chip during long-term use using burn-in tests.
At present, the aging test of the memory chip is only carried out on the memory performance of the memory chip, and the aging test method has the problem of low test precision.
Disclosure of Invention
The application provides a monitoring method and a system for aging test of a memory chip, which are used for solving the problems in the background technology.
In a first aspect, the present application provides a method for monitoring a burn-in test of a memory chip, including:
acquiring parameter information of a memory chip placed in a preset aging test environment in real time through a preset parameter detection device in a test time period; the parameter information comprises attribute parameter information and electrical parameter information of the memory chip, wherein the attribute parameter information comprises test values of all attribute parameters of the memory chip in the test time period, and the electrical parameter information comprises test values of all electrical parameters of the memory chip in the test time period;
acquiring the interfered coefficient of each attribute parameter based on the attribute parameter information, and acquiring the interfered coefficient of each electrical parameter based on the electrical parameter information;
calculating the interfered weight of the attribute parameter information and the interfered weight of the electrical parameter information based on the interfered coefficient of each attribute parameter and the interfered coefficient of each electrical parameter;
acquiring an attribute parameter stability factor based on the attribute parameter information, and acquiring an electrical parameter stability factor based on the electrical parameter information;
and judging whether the memory chip passes the aging test or not based on the disturbed weight of the attribute parameter information, the disturbed weight of the electrical parameter information, the attribute parameter stability factor and the electrical parameter stability factor.
In a second aspect, the present application provides a monitoring system for burn-in testing of a memory chip, including:
the first acquisition module is used for acquiring the parameter information of the memory chip placed in the preset aging test environment in real time through the preset parameter detection device in the test time period; the parameter information comprises attribute parameter information and electrical parameter information of the memory chip, wherein the attribute parameter information comprises test values of all attribute parameters of the memory chip in the test time period, and the electrical parameter information comprises test values of all electrical parameters of the memory chip in the test time period;
the second acquisition module is used for acquiring the interfered coefficient of each attribute parameter based on the attribute parameter information and acquiring the interfered coefficient of each electrical parameter based on the electrical parameter information;
a calculation module, configured to calculate an interfered weight of the attribute parameter information and an interfered weight of the electrical parameter information based on the interfered coefficient of each of the attribute parameters and the interfered coefficient of each of the electrical parameters;
the third acquisition module is used for acquiring the attribute parameter stability factor based on the attribute parameter information and acquiring the electrical parameter stability factor based on the electrical parameter information;
and the judging module is used for judging whether the memory chip passes the aging test or not based on the interfered weight of the attribute parameter information, the interfered weight of the electrical parameter information, the attribute parameter stability factor and the electrical parameter stability factor.
The application provides a monitoring method and a system for a memory chip aging test, wherein the method comprises the following steps: acquiring parameter information of a memory chip placed in a preset aging test environment in real time through a preset parameter detection device in a test time period; the parameter information comprises attribute parameter information and electrical parameter information of the memory chip, wherein the attribute parameter information comprises test values of all attribute parameters of the memory chip in the test time period, and the electrical parameter information comprises test values of all electrical parameters of the memory chip in the test time period; acquiring the interfered coefficient of each attribute parameter based on the attribute parameter information, and acquiring the interfered coefficient of each electrical parameter based on the electrical parameter information;
calculating the interfered weight of the attribute parameter information and the interfered weight of the electrical parameter information based on the interfered coefficient of each attribute parameter and the interfered coefficient of each electrical parameter; acquiring an attribute parameter stability factor based on the attribute parameter information, and acquiring an electrical parameter stability factor based on the electrical parameter information; and judging whether the memory chip passes the aging test or not based on the disturbed weight of the attribute parameter information, the disturbed weight of the electrical parameter information, the attribute parameter stability factor and the electrical parameter stability factor. The method realizes comprehensive monitoring of the change of each parameter of the aging chip when the aging test is carried out on the memory chip, and improves the precision of the aging test of the memory chip.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings may be obtained based on these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a flow chart of a method for monitoring a memory chip burn-in test according to an embodiment of the present application;
fig. 2 is a schematic block diagram of a monitoring system for a memory chip burn-in test according to an embodiment of the present application.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are some, but not all embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The flow diagrams depicted in the figures are merely illustrative and not necessarily all of the elements and operations/steps are included or performed in the order described. For example, some operations/steps may also be split, combined, or partially combined, so that the order of actual execution may vary based on actual circumstances.
It is also to be understood that the terminology used in the description of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in this specification and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It should be further understood that the term "and/or" as used in this specification and the appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes such combinations.
Memory chips, which are one of the core components of computer systems and electronic devices, assume important tasks for data storage and reading. With the wide application of memory chips in various fields, the demands for reliability and stability of the memory chips are also increasing. The memory chip is susceptible to various factors such as voltage noise, temperature variation and the like during the use process, so that the performance of the memory chip may be reduced, such as data loss, slow reading and writing speed, small storage capacity and the like. Therefore, to ensure that the memory chip is not damaged or erroneous during normal operation, it is important to evaluate the stability and reliability of the memory chip during long-term use using burn-in tests.
At present, the aging test of the memory chip is only carried out on the memory performance of the memory chip, and the aging test method has the problem of low test precision. Therefore, the embodiment of the application provides a method and a system for monitoring the aging test of a memory chip, so as to solve the problems.
Some embodiments of the present application are described in detail below with reference to the accompanying drawings. The following embodiments and features of the embodiments may be combined with each other without conflict.
Referring to fig. 1, fig. 1 is a flowchart of a method for monitoring a burn-in test of a memory chip according to an embodiment of the present application, and as shown in fig. 1, the method for monitoring a burn-in test of a memory chip according to an embodiment of the present application includes steps S100 to S500.
Step S100, acquiring parameter information of a memory chip placed in a preset aging test environment in real time through a preset parameter detection device in a test time period; the parameter information comprises attribute parameter information and electrical parameter information of the memory chip, the attribute parameter information comprises test values of all the attribute parameters of the memory chip in the test time period, and the electrical parameter information comprises test values of all the electrical parameters of the memory chip in the test time period.
The aging test environment is set according to specific test requirements, for example, a high-pressure test environment, a high-temperature test environment, a high-humidity test environment, a strong corrosion test environment, a test environment combining strong corrosion and high temperature, and a test environment combining high temperature and high humidity.
Wherein the attribute parameters include, but are not limited to, the size, clock frequency, storage capacity, read-write speed, and data retention capability of the chip, and the electrical parameters include, but are not limited to, voltage, current, resistance, signal level, and power consumption of the chip when in operation.
And step 200, obtaining the interfered coefficient of each attribute parameter based on the attribute parameter information, and obtaining the interfered coefficient of each electrical parameter based on the electrical parameter information.
It should be noted that, the obtaining the interfered coefficient of each attribute parameter based on the attribute parameter information includes step S210 to step S290.
Step S210, drawing a discrete distribution diagram of the test value of the attribute parameter in the test time period based on the test value of the attribute parameter in the test time period aiming at each attribute parameter, and judging whether the discrete distribution diagram can be subjected to curve fitting; wherein the horizontal axis of the coordinate system in which the discrete profile is located represents time, and the vertical axis represents the test value of the attribute parameter.
And step 220, if the discrete distribution diagram can be subjected to curve fitting, performing curve fitting on the discrete distribution diagram to obtain a curve of the time-varying test value of the attribute parameter in the test time period.
The method for performing curve fitting on the discrete distribution map comprises, but is not limited to, a polynomial curve fitting method, a cubic spline interpolation curve fitting method and a non-parameter fitting curve fitting method.
Step S230, obtaining standard parameter values of the attribute parameters, and drawing a first target straight line on the curve; and the first target straight line is parallel to the transverse axis, and the value of the ordinate corresponding to each point on the first target straight line is the standard parameter value.
It can be understood that the standard parameter value of the attribute parameter refers to a parameter value corresponding to the attribute parameter when the memory chip works normally.
And step 240, drawing a second target straight line on the curve, wherein the second target straight line is perpendicular to the transverse axis, and the value of the abscissa corresponding to each point on the second target straight line is the maximum endpoint value of the test time period.
And step S250, judging whether a closed graph exists among the curve, the horizontal axis, the vertical axis, the first target straight line and the second target straight line.
It is to be understood that the closed figure may be a closed figure enclosed by the longitudinal axis, the first target straight line and the curved line, or may be a closed figure enclosed by the first target straight line, the second target straight line and the curved line, where the closed figure includes one or more closed figures.
Step S260, if a closed graph exists, calculating a first area and a second area, and taking the ratio between the first area and the second area as the interfered coefficient of the attribute parameter; the first area is the area of the closed graph, and the second area is the area of the closed graph surrounded by the transverse axis, the longitudinal axis, the first target straight line and the second target straight line.
Step S270, if no closed graph exists, calculating a third area, calculating a first absolute value of a difference value between the second area and the third area, and taking a ratio between the first absolute value and the second area as an interfered coefficient of the attribute parameter; the third area is an area of a closed graph enclosed by the transverse axis, the longitudinal axis, the curve and the second target straight line.
And step S280, if the discrete distribution diagram cannot be subjected to curve fitting, obtaining standard parameter values of the attribute parameters, and respectively calculating second absolute values of differences between each test value of the attribute parameters in the test time period and the standard parameter values.
Step S290, calculating a first average value of each second absolute value, calculating a third absolute value of the difference between the first average value and the standard parameter value, and taking the ratio between the third absolute value and the standard parameter value as the interfered coefficient of the attribute parameter.
It can be appreciated that, when the disturbed coefficients of the attribute parameters are obtained in the method of step S210 to step S290, the calculation mode of the disturbed coefficients matched with the attribute parameters is selected for the attribute parameters based on the distribution state of the test values of the attribute parameters in the test period, so that the accuracy of the disturbed coefficients is improved, and the accuracy of the aging test of the memory chip is improved.
It should be noted that, the method for acquiring the disturbed coefficient of each electrical parameter based on the electrical parameter information refers to the methods from step S210 to step S290, which are not described herein again.
And step S300, calculating the interfered weight of the attribute parameter information and the interfered weight of the electrical parameter information based on the interfered coefficient of each attribute parameter and the interfered coefficient of each electrical parameter.
The step S300 includes steps S310 to S320.
Step S310, calculating a second average value and a third average value; the second average value is an average value of the interfered coefficients of the attribute parameters, and the third average value is an average value of the interfered coefficients of the electrical parameters.
Step S320, adding the second average value and the third average value to obtain a target reference value, using a ratio between the second average value and the target reference value as the interfered weight of the attribute parameter information, and using a ratio between the third average value and the target reference value as the interfered weight of the electrical parameter information.
And step S400, acquiring an attribute parameter stability factor based on the attribute parameter information, and acquiring an electrical parameter stability factor based on the electrical parameter information.
It should be noted that, regarding the specific implementation manner of step S400, detailed description is provided below, and the detailed description is omitted here.
And S500, judging whether the memory chip passes the aging test or not based on the interfered weight of the attribute parameter information, the interfered weight of the electrical parameter information, the attribute parameter stability factor and the electrical parameter stability factor.
It should be noted that step S500 includes steps S510 to 560.
And S510, calculating the ratio between the attribute parameter stability factor and the electrical parameter stability factor to obtain a stability factor association coefficient.
Step S520, a stability factor association coefficient value range is obtained, and whether the stability factor association coefficient is located in the stability factor association coefficient value range is judged.
And step 530, if the stability factor association coefficient is not in the range of the stability factor association coefficient, determining that the memory chip fails the aging test.
It will be appreciated that in the aging test environment, the change of the electrical parameter may cause the change of the attribute parameter, and in the aging test environment, the change of the electrical parameter and the change of the attribute parameter tend to be synchronous, if the stability factor association coefficient is not in the stability factor association coefficient value range, which indicates that in the aging test environment, the change of the electrical parameter and the change of the attribute parameter cannot tend to be synchronous, which indicates that in the aging test environment, the performance of the memory chip is unstable, and therefore, when the stability factor association coefficient is not in the stability factor association coefficient value range, it is determined that the memory chip fails the aging test.
Step S540, if the stability factor association coefficient is within the stability factor association coefficient value range, multiplying the attribute parameter stability factor by the interfered weight of the attribute parameter information to obtain a first product, and multiplying the electrical parameter stability factor by the interfered weight of the electrical parameter information to obtain a second product.
Step S550, adding the first product and the second product to obtain a stability factor of the memory chip, and comparing the stability factor of the memory chip with a preset stability factor.
And step 560, if the stability factor is not greater than the preset stability factor, determining that the memory chip passes the burn-in test.
It can be appreciated that if the stability factor is greater than the predetermined stability factor, it is determined that the memory chip fails the burn-in test.
According to the method provided by the embodiment, firstly, attribute parameter information and electrical parameter information of the memory chip placed in a preset aging test environment are obtained in a test time period, the interfered coefficient of each attribute parameter is obtained based on the attribute parameter information, the interfered coefficient of each electrical parameter is obtained based on the electrical parameter information, then, the interfered weight of each attribute parameter and the interfered weight of each electrical parameter are calculated based on the interfered coefficient of each attribute parameter and the interfered weight of each electrical parameter, the attribute parameter stability factor is obtained based on the attribute parameter information, the electrical parameter stability factor is obtained based on the electrical parameter information, and finally, whether the memory chip passes the aging test is judged based on the interfered weight of the attribute parameter information, the interfered weight of the electrical parameter information, the attribute parameter stability factor and the electrical parameter stability factor. On one hand, the method and the device realize comprehensive monitoring on the change of each parameter of the aging chip when the aging test is carried out on the storage chip, improve the precision of the aging test of the storage chip, and on the other hand, the method and the device can further improve the precision of the aging test of the storage chip by calculating each interfered coefficient, each interfered weight, each attribute parameter stability factor and each electrical parameter stability factor.
In some embodiments, the acquiring the attribute parameter stability factor based on the attribute parameter information includes steps S410 to S450.
Step S410, for each attribute parameter, dividing the test value of the attribute parameter in the test time period into a preset number of data blocks based on the time sequence, and arranging each data block based on the time sequence to obtain a data block sequence.
The sizes of the data blocks are uniform.
Step S420, for each data block sequence, obtaining a feature vector of each data block in the data block sequence, and arranging the feature vectors based on time sequence, so as to obtain a feature vector sequence.
The method for obtaining the feature vector of the data block is to input the data block into a preset data distribution feature extraction model to obtain the feature vector of the data block, wherein the data distribution feature extraction model comprises an input layer, a feature extraction layer, a convolution layer and an output layer, the input layer is used for receiving the data block, the feature extraction layer is used for extracting the feature of the data block, the convolution layer is used for generating the feature vector of the data block based on the feature of the data block, and the output layer is used for outputting the feature vector.
Step S430, calculating fluctuation vectors of two adjacent feature vectors according to each feature vector sequence, calculating fluctuation entropy of the fluctuation vectors, and arranging each fluctuation entropy based on time sequence to obtain a fluctuation entropy sequence.
The fluctuation vector is a value-added vector between two adjacent feature vectors, and the calculation mode of the fluctuation vector is to subtract the previous vector from the next vector to obtain the fluctuation vector.
The calculating the fluctuation entropy of the fluctuation vector comprises the following steps:
obtaining a reference vector corresponding to the fluctuation vector;
subtracting the reference vector from the fluctuation vector to obtain a difference vector;
and calculating the sum of squares of the elements in the difference vector, and taking the sum of squares as the fluctuation entropy.
It can be understood that the reference vector corresponding to the fluctuation vector is a reference vector corresponding to the attribute parameter corresponding to the fluctuation vector, each attribute parameter corresponds to one reference vector, and the reference vector is a change allowed by two adjacent feature vectors when the memory chip works normally.
Step S440, generating a fluctuation entropy matrix of the attribute parameter information based on each fluctuation entropy sequence.
The specific implementation manner of step S440 may be to sequentially arrange the wave entropy sequences from top to bottom according to a preset arrangement rule (for example, according to a sequence of standard deviation of each wave entropy sequence), so as to obtain the wave entropy matrix.
And S450, calculating operator norms of the fluctuation entropy matrix, and taking the operator norms as the attribute parameter stability factors.
The attribute parameter stability factor obtained by the embodiment is beneficial to further improving the accuracy of the aging test of the memory chip.
It should be noted that, the method of step S410 to step S450 is not described herein again.
Referring to fig. 2, fig. 2 is a schematic block diagram of a monitoring system 100 for testing the burn-in of a memory chip according to an embodiment of the present application, and as shown in fig. 2, the monitoring system 100 for testing the burn-in of a memory chip includes:
the first obtaining module 110 is configured to obtain, in real time, parameter information of a memory chip placed in a preset burn-in environment through a preset parameter detection device in a test period; the parameter information comprises attribute parameter information and electrical parameter information of the memory chip, the attribute parameter information comprises test values of all the attribute parameters of the memory chip in the test time period, and the electrical parameter information comprises test values of all the electrical parameters of the memory chip in the test time period.
The second obtaining module 120 is configured to obtain the interfered coefficient of each of the attribute parameters based on the attribute parameter information, and obtain the interfered coefficient of each of the electrical parameters based on the electrical parameter information.
A calculating module 130, configured to calculate an interfered weight of the attribute parameter information and an interfered weight of the electrical parameter information based on the interfered coefficient of each of the attribute parameters and the interfered coefficient of each of the electrical parameters.
And a third obtaining module 140, configured to obtain an attribute parameter stability factor based on the attribute parameter information, and obtain an electrical parameter stability factor based on the electrical parameter information.
And the judging module 150 is configured to judge whether the memory chip passes the burn-in test based on the disturbed weight of the attribute parameter information, the disturbed weight of the electrical parameter information, the attribute parameter stability factor and the electrical parameter stability factor.
It should be noted that, for convenience and brevity of description, specific working processes of the above-described apparatus and each module may refer to corresponding processes in the foregoing embodiment of the monitoring method for the aging test of the memory chip, which are not described herein again.
While the invention has been described with reference to certain preferred embodiments, it will be understood by those skilled in the art that various changes and substitutions of equivalents may be made and equivalents will be apparent to those skilled in the art without departing from the scope of the invention. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (9)
1. The method for monitoring the aging test of the memory chip is characterized by comprising the following steps of:
acquiring parameter information of a memory chip placed in a preset aging test environment in real time through a preset parameter detection device in a test time period; the parameter information comprises attribute parameter information and electrical parameter information of the memory chip, wherein the attribute parameter information comprises test values of all attribute parameters of the memory chip in the test time period, and the electrical parameter information comprises test values of all electrical parameters of the memory chip in the test time period;
acquiring the interfered coefficient of each attribute parameter based on the attribute parameter information, and acquiring the interfered coefficient of each electrical parameter based on the electrical parameter information;
calculating the interfered weight of the attribute parameter information and the interfered weight of the electrical parameter information based on the interfered coefficient of each attribute parameter and the interfered coefficient of each electrical parameter;
acquiring an attribute parameter stability factor based on the attribute parameter information, and acquiring an electrical parameter stability factor based on the electrical parameter information;
and judging whether the memory chip passes the aging test or not based on the disturbed weight of the attribute parameter information, the disturbed weight of the electrical parameter information, the attribute parameter stability factor and the electrical parameter stability factor.
2. The method for monitoring the burn-in of a memory chip according to claim 1, wherein the acquiring the disturbed coefficients of the respective attribute parameters based on the attribute parameter information comprises:
drawing a discrete profile of the test value of the attribute parameter in the test time period based on the test value of the attribute parameter in the test time period for each attribute parameter, and judging whether the discrete profile can be subjected to curve fitting; wherein, the horizontal axis of the coordinate system of the discrete distribution map represents time, and the vertical axis represents the test value of the attribute parameter;
if the discrete distribution diagram can be subjected to curve fitting, performing curve fitting on the discrete distribution diagram to obtain a curve of the time variation of the test value of the attribute parameter in the test time period;
obtaining standard parameter values of the attribute parameters, and drawing a first target straight line on the curve; wherein the first target straight line is parallel to the transverse axis, and the value of the ordinate corresponding to each point on the first target straight line is the standard parameter value;
drawing a second target straight line on the curve, wherein the second target straight line is perpendicular to the transverse axis, and the value of the abscissa corresponding to each point on the second target straight line is the maximum endpoint value of the test time period;
judging whether a closed graph exists among the curve, the horizontal axis, the vertical axis, the first target straight line and the second target straight line;
if a closed graph exists, calculating a first area and a second area, and taking the ratio between the first area and the second area as the interfered coefficient of the attribute parameter; the first area is the area of the closed graph, and the second area is the area of the closed graph surrounded by the transverse axis, the longitudinal axis, the first target straight line and the second target straight line;
if the closed graph does not exist, calculating a third area, calculating a first absolute value of a difference value between the second area and the third area, and taking a ratio between the first absolute value and the second area as an interfered coefficient of the attribute parameter; the third area is an area of a closed graph enclosed by the transverse axis, the longitudinal axis, the curve and the second target straight line.
3. The method for monitoring the burn-in of a memory chip of claim 2, wherein after determining whether the discrete-type profile can be curve-fitted, the method further comprises:
if the discrete distribution diagram cannot be subjected to curve fitting, standard parameter values of the attribute parameters are obtained, and second absolute values of differences between each test value of the attribute parameters in the test time period and the standard parameter values are calculated respectively;
calculating a first average value of each second absolute value, calculating a third absolute value of a difference value between the first average value and the standard parameter value, and taking a ratio between the third absolute value and the standard parameter value as an interfered coefficient of the attribute parameter.
4. The method according to claim 1, wherein the calculating the disturbed weight of the attribute parameter information and the disturbed weight of the electrical parameter information based on the disturbed coefficient of each of the attribute parameters and the disturbed coefficient of each of the electrical parameters includes:
calculating a second average value and a third average value; the second average value is an average value of the interfered coefficients of the attribute parameters, and the third average value is an average value of the interfered coefficients of the electrical parameters;
and adding the second average value and the third average value to obtain a target reference value, taking the ratio between the second average value and the target reference value as the interfered weight of the attribute parameter information, and taking the ratio between the third average value and the target reference value as the interfered weight of the electrical parameter information.
5. The method for monitoring the burn-in of a memory chip according to claim 1, wherein the acquiring the attribute parameter stability factor based on the attribute parameter information comprises:
for each attribute parameter, dividing a test value of the attribute parameter in the test time period into a preset number of data blocks based on the time sequence, and arranging each data block based on the time sequence to obtain a data block sequence;
for each data block sequence, obtaining a characteristic vector of each data block in the data block sequence, and arranging the characteristic vectors based on time sequence to obtain a characteristic vector sequence;
calculating fluctuation vectors of two adjacent feature vectors according to each feature vector sequence, calculating fluctuation entropy of the fluctuation vectors, and arranging each fluctuation entropy based on time sequence to obtain a fluctuation entropy sequence;
generating a fluctuation entropy matrix of the attribute parameter information based on each fluctuation entropy sequence;
and calculating operator norms of the fluctuation entropy matrix, and taking the operator norms as the attribute parameter stability factors.
6. The method for monitoring the burn-in of memory chips of claim 5, wherein calculating the surge entropy of the surge vector comprises:
obtaining a reference vector corresponding to the fluctuation vector;
subtracting the reference vector from the fluctuation vector to obtain a difference vector;
and calculating the sum of squares of the elements in the difference vector, and taking the sum of squares as the fluctuation entropy.
7. The method for monitoring the burn-in of a memory chip according to claim 1, wherein the determining whether the memory chip passes the burn-in based on the disturbed weight of the attribute parameter information, the disturbed weight of the electrical parameter information, the attribute parameter stability factor, and the electrical parameter stability factor comprises:
calculating the ratio between the attribute parameter stability factor and the electrical parameter stability factor to obtain a stability factor association coefficient;
acquiring a stability factor association coefficient value range, and judging whether the stability factor association coefficient is positioned in the stability factor association coefficient value range;
if the stability factor association coefficient is in the value range of the stability factor association coefficient, multiplying the disturbed weight of the attribute parameter information by the attribute parameter stability factor to obtain a first product, and multiplying the disturbed weight of the electrical parameter information by the electrical parameter stability factor to obtain a second product;
adding the first product and the second product to obtain a stability factor of the memory chip, and comparing the stability factor of the memory chip with a preset stability factor;
and if the stability factor is not greater than the preset stability factor, judging that the memory chip passes the aging test.
8. The method for monitoring the aging test of the memory chip according to claim 7, wherein after said determining whether the stability factor correlation coefficient is within the stability factor correlation coefficient value range, the method further comprises:
and if the stability factor association coefficient is not in the range of the stability factor association coefficient, judging that the memory chip fails the aging test.
9. A monitoring system for burn-in testing of a memory chip, comprising:
the first acquisition module is used for acquiring the parameter information of the memory chip placed in the preset aging test environment in real time through the preset parameter detection device in the test time period; the parameter information comprises attribute parameter information and electrical parameter information of the memory chip, wherein the attribute parameter information comprises test values of all attribute parameters of the memory chip in the test time period, and the electrical parameter information comprises test values of all electrical parameters of the memory chip in the test time period;
the second acquisition module is used for acquiring the interfered coefficient of each attribute parameter based on the attribute parameter information and acquiring the interfered coefficient of each electrical parameter based on the electrical parameter information;
a calculation module, configured to calculate an interfered weight of the attribute parameter information and an interfered weight of the electrical parameter information based on the interfered coefficient of each of the attribute parameters and the interfered coefficient of each of the electrical parameters;
the third acquisition module is used for acquiring the attribute parameter stability factor based on the attribute parameter information and acquiring the electrical parameter stability factor based on the electrical parameter information;
and the judging module is used for judging whether the memory chip passes the aging test or not based on the interfered weight of the attribute parameter information, the interfered weight of the electrical parameter information, the attribute parameter stability factor and the electrical parameter stability factor.
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