CN117373508A - 多端口存储器、多端口存储器的读写方法及装置 - Google Patents
多端口存储器、多端口存储器的读写方法及装置 Download PDFInfo
- Publication number
- CN117373508A CN117373508A CN202210765522.5A CN202210765522A CN117373508A CN 117373508 A CN117373508 A CN 117373508A CN 202210765522 A CN202210765522 A CN 202210765522A CN 117373508 A CN117373508 A CN 117373508A
- Authority
- CN
- China
- Prior art keywords
- write
- read
- buffer
- command
- read command
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000015654 memory Effects 0.000 title claims abstract description 143
- 238000000034 method Methods 0.000 title claims abstract description 36
- 239000000872 buffer Substances 0.000 claims abstract description 276
- 230000000875 corresponding effect Effects 0.000 claims description 86
- 238000004590 computer program Methods 0.000 claims description 16
- 230000003139 buffering effect Effects 0.000 claims description 7
- 230000000903 blocking effect Effects 0.000 claims description 4
- 230000002596 correlated effect Effects 0.000 claims description 4
- 230000000977 initiatory effect Effects 0.000 claims description 4
- 230000000694 effects Effects 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 9
- 230000005540 biological transmission Effects 0.000 description 5
- 238000004891 communication Methods 0.000 description 5
- 230000006870 function Effects 0.000 description 5
- 238000012545 processing Methods 0.000 description 4
- 238000013461 design Methods 0.000 description 3
- 238000013473 artificial intelligence Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 238000003491 array Methods 0.000 description 1
- 230000001276 controlling effect Effects 0.000 description 1
- 235000019580 granularity Nutrition 0.000 description 1
- 239000003999 initiator Substances 0.000 description 1
- 238000010295 mobile communication Methods 0.000 description 1
- 238000004321 preservation Methods 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
- G11C7/1057—Data output buffers, e.g. comprising level conversion circuits, circuits for adapting load
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
- G11C7/1063—Control signal output circuits, e.g. status or busy flags, feedback command signals
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
- G11C7/1069—I/O lines read out arrangements
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
- G11C7/1084—Data input buffers, e.g. comprising level conversion circuits, circuits for adapting load
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
- G11C7/109—Control signal input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
- G11C7/1096—Write circuits, e.g. I/O line write drivers
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Static Random-Access Memory (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202210765522.5A CN117373508A (zh) | 2022-06-30 | 2022-06-30 | 多端口存储器、多端口存储器的读写方法及装置 |
PCT/CN2023/083179 WO2024001332A1 (fr) | 2022-06-30 | 2023-03-22 | Mémoire à ports multiples, et procédé et appareil de lecture et d'écriture pour mémoire à ports multiples |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202210765522.5A CN117373508A (zh) | 2022-06-30 | 2022-06-30 | 多端口存储器、多端口存储器的读写方法及装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
CN117373508A true CN117373508A (zh) | 2024-01-09 |
Family
ID=89382671
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202210765522.5A Pending CN117373508A (zh) | 2022-06-30 | 2022-06-30 | 多端口存储器、多端口存储器的读写方法及装置 |
Country Status (2)
Country | Link |
---|---|
CN (1) | CN117373508A (fr) |
WO (1) | WO2024001332A1 (fr) |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100546331B1 (ko) * | 2003-06-03 | 2006-01-26 | 삼성전자주식회사 | 스택 뱅크들 마다 독립적으로 동작하는 멀티 포트 메모리장치 |
US9128850B2 (en) * | 2012-08-16 | 2015-09-08 | Broadcom Corporation | Multi-ported memory with multiple access support |
US10089018B2 (en) * | 2015-05-07 | 2018-10-02 | Marvell Israel (M.I.S.L) Ltd. | Multi-bank memory with multiple read ports and multiple write ports per cycle |
US10360952B2 (en) * | 2016-12-20 | 2019-07-23 | Omnivision Technologies, Inc. | Multiport memory architecture for simultaneous transfer |
CN112052206B (zh) * | 2020-08-31 | 2023-03-28 | 浙江双成电气有限公司 | 基于仲裁的多端口数据存储系统 |
-
2022
- 2022-06-30 CN CN202210765522.5A patent/CN117373508A/zh active Pending
-
2023
- 2023-03-22 WO PCT/CN2023/083179 patent/WO2024001332A1/fr unknown
Also Published As
Publication number | Publication date |
---|---|
WO2024001332A1 (fr) | 2024-01-04 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN100592273C (zh) | 执行dma数据传输的设备和方法 | |
CN111742305A (zh) | 调度具有不统一等待时间的存储器请求 | |
US6715055B1 (en) | Apparatus and method for allocating buffer space | |
US11016829B2 (en) | Two-layered deterministic interprocess communication scheduler for input output determinism in solid state drives | |
CN111684430A (zh) | 支持同一信道上对不统一等待时间的存储器类型的响应 | |
US7447872B2 (en) | Inter-chip processor control plane communication | |
CN116547644A (zh) | 检测可编程原子事务中的无限循环 | |
CN116414767A (zh) | 一种对基于axi协议乱序响应的重排序方法及系统 | |
CN111538694B (zh) | 一种用于网络接口支持多链接和重传的数据缓存方法 | |
US20040215903A1 (en) | System and method of maintaining high bandwidth requirement of a data pipe from low bandwidth memories | |
CN106959929A (zh) | 一种多端口访问的存储器及其工作方法 | |
CN114827048A (zh) | 一种动态可配高性能队列调度方法、系统、处理器及协议 | |
US20170024146A1 (en) | Memory controller, information processing device, and control method | |
US9720826B1 (en) | Systems and methods to distributively process a plurality of data sets stored on a plurality of memory modules | |
US20050066135A1 (en) | Memory control apparatus and memory control method | |
KR102303424B1 (ko) | 랜덤 액세스 메모리를 포함하는 하나 이상의 처리 유닛을 위한 직접 메모리 액세스 제어 장치 | |
US12086638B2 (en) | Topology of accelerators | |
CN117373508A (zh) | 多端口存储器、多端口存储器的读写方法及装置 | |
US11652761B2 (en) | Switch for transmitting packet, network on chip having the same, and operating method thereof | |
KR980013132A (ko) | 고 처리 능력의 주변 구성 요소 상호 접속 버스를 가진 데이터 처리 및 통신 시스템 | |
US20140280716A1 (en) | Direct push operations and gather operations | |
US6654861B2 (en) | Method to manage multiple communication queues in an 8-bit microcontroller | |
CN106057226B (zh) | 双端口存储系统的存取控制方法 | |
US9781027B1 (en) | Systems and methods to communicate with external destinations via a memory network | |
US12045190B2 (en) | Packet control apparatus and packet control method |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
CB02 | Change of applicant information |
Country or region after: China Address after: 518055, 2nd Floor, ZTE Industrial Park, No. 2 Chuangyan Road, Xili Community, Xili Street, Nanshan District, Shenzhen City, Guangdong Province, China Applicant after: SANECHIPS TECHNOLOGY Co.,Ltd. Address before: 518055 Zhongxing Industrial Park, Liuxian Avenue, Xili street, Nanshan District, Shenzhen City, Guangdong Province Applicant before: SANECHIPS TECHNOLOGY Co.,Ltd. Country or region before: China |