CN117373508A - 多端口存储器、多端口存储器的读写方法及装置 - Google Patents

多端口存储器、多端口存储器的读写方法及装置 Download PDF

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Publication number
CN117373508A
CN117373508A CN202210765522.5A CN202210765522A CN117373508A CN 117373508 A CN117373508 A CN 117373508A CN 202210765522 A CN202210765522 A CN 202210765522A CN 117373508 A CN117373508 A CN 117373508A
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CN
China
Prior art keywords
write
read
buffer
command
read command
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202210765522.5A
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English (en)
Chinese (zh)
Inventor
王思宇
刘峰松
朱智华
刘衡祁
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanechips Technology Co Ltd
Original Assignee
Sanechips Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanechips Technology Co Ltd filed Critical Sanechips Technology Co Ltd
Priority to CN202210765522.5A priority Critical patent/CN117373508A/zh
Priority to PCT/CN2023/083179 priority patent/WO2024001332A1/fr
Publication of CN117373508A publication Critical patent/CN117373508A/zh
Pending legal-status Critical Current

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Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1057Data output buffers, e.g. comprising level conversion circuits, circuits for adapting load
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1063Control signal output circuits, e.g. status or busy flags, feedback command signals
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1069I/O lines read out arrangements
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1084Data input buffers, e.g. comprising level conversion circuits, circuits for adapting load
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/109Control signal input circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1096Write circuits, e.g. I/O line write drivers
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Static Random-Access Memory (AREA)
CN202210765522.5A 2022-06-30 2022-06-30 多端口存储器、多端口存储器的读写方法及装置 Pending CN117373508A (zh)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN202210765522.5A CN117373508A (zh) 2022-06-30 2022-06-30 多端口存储器、多端口存储器的读写方法及装置
PCT/CN2023/083179 WO2024001332A1 (fr) 2022-06-30 2023-03-22 Mémoire à ports multiples, et procédé et appareil de lecture et d'écriture pour mémoire à ports multiples

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202210765522.5A CN117373508A (zh) 2022-06-30 2022-06-30 多端口存储器、多端口存储器的读写方法及装置

Publications (1)

Publication Number Publication Date
CN117373508A true CN117373508A (zh) 2024-01-09

Family

ID=89382671

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202210765522.5A Pending CN117373508A (zh) 2022-06-30 2022-06-30 多端口存储器、多端口存储器的读写方法及装置

Country Status (2)

Country Link
CN (1) CN117373508A (fr)
WO (1) WO2024001332A1 (fr)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100546331B1 (ko) * 2003-06-03 2006-01-26 삼성전자주식회사 스택 뱅크들 마다 독립적으로 동작하는 멀티 포트 메모리장치
US9128850B2 (en) * 2012-08-16 2015-09-08 Broadcom Corporation Multi-ported memory with multiple access support
US10089018B2 (en) * 2015-05-07 2018-10-02 Marvell Israel (M.I.S.L) Ltd. Multi-bank memory with multiple read ports and multiple write ports per cycle
US10360952B2 (en) * 2016-12-20 2019-07-23 Omnivision Technologies, Inc. Multiport memory architecture for simultaneous transfer
CN112052206B (zh) * 2020-08-31 2023-03-28 浙江双成电气有限公司 基于仲裁的多端口数据存储系统

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Publication number Publication date
WO2024001332A1 (fr) 2024-01-04

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CB02 Change of applicant information

Country or region after: China

Address after: 518055, 2nd Floor, ZTE Industrial Park, No. 2 Chuangyan Road, Xili Community, Xili Street, Nanshan District, Shenzhen City, Guangdong Province, China

Applicant after: SANECHIPS TECHNOLOGY Co.,Ltd.

Address before: 518055 Zhongxing Industrial Park, Liuxian Avenue, Xili street, Nanshan District, Shenzhen City, Guangdong Province

Applicant before: SANECHIPS TECHNOLOGY Co.,Ltd.

Country or region before: China