CN117352625B

CN117352625B - Micro LED micro display chip and preparation method

Info

Publication number: CN117352625B
Application number: CN202311643755.9A
Authority: CN
Inventors: 庄永漳; 仉旭
Original assignee: Laiyu Optoelectronic Technology Suzhou Co ltd
Current assignee: Laiyu Optoelectronic Technology Suzhou Co ltd
Priority date: 2023-12-04
Filing date: 2023-12-04
Publication date: 2024-02-20
Anticipated expiration: 2043-12-04
Also published as: CN117352625A

Abstract

The application discloses a micro LED micro display chip and a preparation method thereof, comprising the following steps: a drive panel including a plurality of first contacts; the first light-emitting layer is arranged on the driving panel and comprises a plurality of first LED units; the second light-emitting layer is arranged above the first light-emitting layer and comprises a plurality of second LED units which are arranged in an array manner; the front projection of the first LED unit and the second LED unit on the driving panel are not overlapped; the first LED unit and at least one adjacent second LED unit are connected with the corresponding first contact; the first LED unit and the second LED unit can be individually driven by the driving panel by time sharing. The application realizes full-color display by emitting light of different colors through different LED units, and different LED units are located on different layers and can share the first contact, so that contact resistance is reduced, structural integration level is higher, power consumption is reduced, full-color luminous stability is improved, different LED units are not overlapped, and luminous brightness is improved.

Description

Micro LED micro display chip and preparation method

Technical Field

The application belongs to the technical field of micro display, and particularly relates to a micro LED micro display chip and a preparation method thereof.

Background

Micro-display micro LEDs are also called micro light emitting diodes, and refer to high-density integrated LED arrays, and are realized through LED miniaturization and matrixing, and compared with traditional LED display screens, the micro LEDs are different in processes such as crystal grains, packaging, integration processes, backboard, driving and the like. In micro LEDs, each LED pixel cell is self-luminous. As higher integration quantity can be obtained on the chip with the same area, the photoelectric conversion efficiency of the micro LED is greatly improved, and the display design with high resolution and high brightness can be realized.

The full-color micro-display has a wide and important application value, especially near-to-eye display including AR, VR, etc., however, the technology for realizing full-color micro-display still has a large improvement space. Particularly, when LED pixel units for emitting light of different colors in the current full-color micro LED display chip are stacked, the RGB three primary colors are overlapped in a large area, so that the luminous efficiency is low, the LED pixel units are required to be prepared according to a certain sequence, and the preparation difficulty is high.

Disclosure of Invention

The invention aims to: the invention aims to provide a miniature light-emitting diode, which is provided with a blocking layer for protecting a reflecting layer and reducing contact resistivity; another object of the present invention is to provide a method for manufacturing the micro light emitting diode.

The technical scheme is as follows: in order to achieve the above object, the present invention provides a micro led micro display chip, comprising:

a drive panel including a plurality of first contacts;

at least two light emitting layers including a first light emitting layer and a second light emitting layer;

the first light-emitting layer is arranged on the driving panel; the first light-emitting layer comprises a plurality of first LED units, the first LED units are arranged on the driving panel, and the first LED units are used for emitting first color light;

The second light-emitting layer is arranged above the first light-emitting layer, and comprises a plurality of second LED units which are arranged in an array manner and used for emitting second color light;

wherein the front projections of the first LED unit and the second LED unit on the driving panel are not coincident; the second doping type semiconductor layer of the first LED unit and the second doping type semiconductor layer of at least one adjacent second LED unit are electrically connected with the corresponding first contact; the first LED unit and the second LED unit can be individually driven by the driving panel by time sharing.

In some embodiments, further comprising:

the at least two light-emitting layers further comprise a third light-emitting layer, and the third light-emitting layer is arranged above the second light-emitting layer; the third light-emitting layer comprises a plurality of third LED units which are arranged in an array manner, and the third LED units are used for emitting third color light;

wherein the third LED unit is misaligned with the front projection of any one of the first LED unit and the second LED unit on the drive panel; the second doped semiconductor layer of the third LED unit, the second doped semiconductor layer of at least one adjacent first LED unit and the second doped semiconductor layer of at least one adjacent second LED unit are electrically connected with the corresponding first contact; the third LED units can be individually driven by the driving panel by time sharing.

In some embodiments, further comprising:

a first planarization layer located between the first light-emitting layer and the second light-emitting layer; the first planarization layer transmits the first color light;

a second planarization layer located between the second light-emitting layer and the third light-emitting layer; the second planarization layer transmits the first color light and the second color light; a plurality of third LED units are arranged on the second planarization layer;

a third planarization layer disposed on the third light-emitting layer; the third planarization layer transmits the first color light, the second color light, and the third color light.

In some embodiments, further comprising:

a first bonding layer between the driving panel and the first LED unit; the driving panel further comprises a first common contact, and the first doping type semiconductor layer of the first LED unit is connected with the corresponding first common contact;

a second bonding layer located between the first planarization layer and the second LED unit; the driving panel further comprises a second common contact, and the first doped semiconductor layer (201) of the second LED unit is connected with the corresponding second common contact;

A third bonding layer located between the second planarization layer and the third LED unit; the driving panel further includes a third common contact, and the first doping type semiconductor layer of the third LED unit is connected with the corresponding third common contact.

In some embodiments, the method is characterized in that,

the second bonding layer is provided with a first opening exposing the first LED unit at a position corresponding to the first LED unit, and part of the second light-emitting layer fills the first opening;

the third bonding layer is provided with a second opening exposing the first LED unit at a position corresponding to the first LED unit; the third bonding layer is provided with a third opening exposing the second LED unit at a position corresponding to the second LED unit; portions of the third light emitting layer fill the second and third openings.

In some embodiments of the present invention, in some embodiments,

the first planarization layer is provided with a plurality of first through holes, the plurality of first through holes are respectively arranged around the first LED units, and the first color light is emitted through the first through holes;

the second planarization layer is provided with a plurality of second through holes, the second through holes are respectively arranged around the second LED units, and the second color light is emitted through the second through holes;

The third planarization layer is provided with a plurality of third through holes, the third through holes are respectively arranged around the third LED units, and the third color light is emitted through the third through holes;

the second planarization layer is further provided with a plurality of fourth through holes, and the fourth through holes are arranged relative to the first through holes; the third planarization layer is further provided with a plurality of fifth through holes, and the fifth through holes are arranged relative to the fourth through holes; the first through hole, the fourth through hole and the fifth through hole are sequentially communicated, and a first concave area is formed between the first through hole, the fourth through hole and the fifth through hole and the first LED unit;

the third planarization layer further has a plurality of sixth through holes, the sixth through holes being disposed opposite to the second through holes; the sixth through hole is communicated with the second through hole, and a second concave area is formed between the sixth through hole and the second LED unit;

and a third concave region is formed between the third through hole and the third LED unit.

In some embodiments, the apertures of the first, fourth, and fifth vias are smaller than the apertures of at least one of the first and second openings; the apertures of the second through hole and the sixth through hole are smaller than the aperture of the third open hole.

In some embodiments, further comprising:

the filling layer comprises a first filling unit, a second filling unit and a third filling unit; the first filling unit fills the first concave region, the second filling unit fills the second concave region, and the third filling unit fills the third concave region.

In some embodiments, further comprising:

the reflecting layer is arranged on the side wall of any one of the first concave area, the second concave area and the third concave area; or alternatively

The reflecting layer is arranged on the side wall of at least one of the first through hole, the second through hole, the third through hole, the fourth through hole, the fifth through hole and the sixth through hole.

In some embodiments, further comprising:

the micro lens array comprises a plurality of micro lens units, and the micro lens units are arranged above at least one of the first LED units and the second LED units.

In some embodiments, further, the microlens unit is disposed on the third planarization layer and covers at least one of the first, second, and third recess regions.

In some embodiments, the first light emitting layer further comprises a first passivation layer and a first electrode layer; the first passivation layer covers the first LED unit, and has a first opening exposing the second doping type semiconductor layer of the first LED unit; the first electrode layer electrically connects the second doped semiconductor layer of the corresponding first LED unit with the corresponding first contact through the first opening;

the second light emitting layer further includes a second passivation layer covering the second LED unit, the second passivation layer having a second opening exposing the second doped semiconductor layer of the second LED unit; the second electrode layer electrically connects the second doped semiconductor layer of the corresponding second LED unit with the corresponding first contact through the second opening;

the third light emitting layer further includes a third passivation layer covering the third LED unit, the third passivation layer having a third opening exposing the second doped semiconductor layer of the third LED unit; the third electrode layer electrically connects the second doped semiconductor layer of the corresponding third LED unit with the corresponding first contact through the three openings.

In some embodiments, the first light emitting layer further includes a first protective layer covering the first passivation layer and the first electrode layer;

the second light emitting layer further includes a second protective layer covering the second passivation layer and the second electrode layer;

the third light emitting layer further includes a third protective layer covering the third passivation layer and the third electrode layer.

In some embodiments, further comprising:

the conductive columns are arranged on the corresponding first contacts and connected with the corresponding first contacts;

the conductive posts are connected with the corresponding first electrode layer, the corresponding second electrode layer and the corresponding third electrode layer.

In some embodiments, the conductive pillar sequentially penetrates the first passivation layer, the first protection layer, the first planarization layer, the second passivation layer, the second protection layer, the second planarization layer, the third passivation layer in a direction away from the driving panel to connect the first electrode layer, the second electrode layer, and the third electrode layer at the same time.

In some embodiments, at least one of the first LED units, at least one of the second LED units, and at least one of the third LED units form one full-color pixel unit of the micro LED micro display chip.

In some embodiments, the first LED unit, the second LED unit, and the third LED unit have dimensions of 0.1-10 microns; the distance between the adjacent first LED unit, second LED unit and third LED unit is 1-10 microns.

In some embodiments, the present application further provides a method for preparing a micro led micro display chip, including:

providing a drive panel comprising a plurality of first contacts;

forming a first light emitting layer on the driving panel, wherein the first light emitting layer comprises a plurality of first LED units, the first LED units are arranged on the driving panel and used for emitting first color light;

forming a second light emitting layer above the first light emitting layer, the second light emitting layer comprising a plurality of second LED units arranged in an array, the second LED units being for emitting a second color light;

wherein the front projections of the first LED unit and the second LED unit on the driving panel are not coincident; the second doped semiconductor layer of the first LED unit and the second doped semiconductor layer of at least one adjacent second LED unit are electrically connected with the driving panel through the first contact; the first LED unit and the second LED unit can be individually driven by the driving panel by time sharing.

In some embodiments, the method further comprises:

forming a third light emitting layer above the second light emitting layer, the third light emitting layer comprising a plurality of third LED units arranged in an array, the third LED units being for emitting a third color light;

In some embodiments of the present invention, in some embodiments,

forming a first planarization layer on the first light emitting layer before forming a second light emitting layer over the first light emitting layer, the first planarization layer transmitting the first color light;

forming a second planarization layer on the second light-emitting layer before forming a third light-emitting layer over the second light-emitting layer, the second planarization layer transmitting both the first color light and the second color light;

After forming a third light emitting layer over the second light emitting layer, a third planarization layer is formed over the third light emitting layer, the third planarization layer transmitting the first color light, the second color light, and the third color light.

In some embodiments, further comprising:

bonding the driving panel and the first LED unit through a first bonding layer; the driving panel further comprises a first common contact, and the first doping type semiconductor layer of the first LED unit is connected with the corresponding first common contact;

bonding the first planarization layer and the second LED unit through a second bonding layer; the driving panel further comprises a second common contact, and the first doping type semiconductor layer of the second LED unit is connected with the corresponding second common contact;

bonding the second planarization layer and the third LED unit through a third bonding layer; the driving panel further includes a third common contact, and the first doping type semiconductor layer of the third LED unit is connected with the corresponding third common contact.

In some embodiments, a plurality of first through holes through which the first color light exits are formed on the first planarization layer, the plurality of first through holes being disposed around the first LED units, respectively;

Forming a plurality of second through holes and a plurality of fourth through holes on the second planarization layer, wherein the second through holes are respectively arranged around the second LED units, the second color light is emitted through the second through holes, and the fourth through holes are arranged relative to the first through holes;

forming a plurality of third through holes through which the third color light exits, a plurality of fifth through holes disposed with respect to the fourth through holes, and a plurality of sixth through holes disposed with respect to the second through holes, on the third planarization layer, the plurality of third through holes being disposed around the third LED unit, respectively;

the first through hole, the fourth through hole and the fifth through hole are sequentially communicated, and a first concave area is formed between the first through hole, the fourth through hole and the fifth through hole and the first LED unit;

the sixth through hole is communicated with the second through hole, and a second concave area is formed between the sixth through hole and the second LED unit;

a third concave region is formed between the third through hole and the third LED unit;

the method further comprises the steps of: forming a filling layer; the filling layer comprises a first filling unit, a second filling unit and a third filling unit; the first filling unit fills the first concave region, the second filling unit fills the second concave region, and the third filling unit fills the third concave region.

In some embodiments, prior to forming the fill layer, the method further comprises:

forming a reflective layer on the side wall of any one of the first concave region, the second concave region and the third concave region; or alternatively

And forming a reflecting layer on the side wall of at least one of the first through hole, the second through hole, the third through hole, the fourth through hole, the fifth through hole and the sixth through hole.

In some embodiments, after forming the fill layer, the method further comprises:

and forming a micro lens array, wherein the micro lens array comprises a plurality of micro lens units, and the micro lens units are arranged above at least one of the first LED units, the second LED units and the third LED units.

In some embodiments of the present invention, in some embodiments,

the step of forming a first light emitting layer on the driving panel further includes: forming a plurality of first LED units, a first passivation layer and a first electrode layer, wherein the first passivation layer covers the first LED units and the first bonding layer, the first passivation layer is provided with a first opening exposing the second doped semiconductor layer of the first LED units, and the first electrode layer electrically connects the second doped semiconductor layer of the first LED units with the corresponding first contacts through the first opening;

The step of forming a second light emitting layer on the first planarization layer further includes: forming a plurality of second LED units, a first second passivation layer and a second electrode layer, wherein the second passivation layer covers the second LED units and the second bonding layer, the second passivation layer is provided with a second opening exposing a second doping type semiconductor layer of the second LED units, and the second electrode layer electrically connects the second doping type semiconductor layer of the second LED units with the corresponding first contacts through the second opening;

the step of forming a third light emitting layer on the second planarization layer further includes: and forming a plurality of third LED units, a third passivation layer and a third electrode layer, wherein the third passivation layer covers the third LED units and the third bonding layer, the third passivation layer is provided with a third opening exposing the second doped semiconductor layer of the third LED units, and the third electrode layer electrically connects the second doped semiconductor layer of the third LED units with the corresponding first contacts through the third opening.

In some embodiments, the step of forming a plurality of the first LED units comprises:

providing a first substrate, wherein a first LED epitaxial layer is arranged on the first substrate, and comprises a first doped semiconductor layer, an active layer and a second doped semiconductor layer which are stacked;

Bonding and connecting the driving panel and the first LED epitaxial layer through a first bonding layer;

removing the first substrate and exposing the second doping type semiconductor layer of the first LED epitaxial layer;

etching the first LED epitaxial layer according to the MESA graph designed by the graphical mask so as to form a plurality of first LED units;

a step of forming a plurality of the second LED units, comprising:

providing a second substrate, wherein a second LED epitaxial layer is arranged on the second substrate, and comprises a first doped semiconductor layer, an active layer and a second doped semiconductor layer which are stacked;

bonding and connecting the first planarization layer and the second LED epitaxial layer through the second bonding layer;

removing the second substrate and exposing the second doping type semiconductor layer of the second LED epitaxial layer;

etching the second LED epitaxial layer according to the MESA graph designed by the graphical mask so as to form a plurality of second LED units;

a step of forming a plurality of the third LED units, comprising:

providing a third substrate, wherein a third LED epitaxial layer is arranged on the third substrate, and comprises a first doped semiconductor layer, an active layer and a second doped semiconductor layer which are stacked;

Bonding and connecting the second planarization layer and the third LED epitaxial layer through the third bonding layer;

removing the third substrate and exposing the second doping type semiconductor layer of the third LED epitaxial layer;

and etching the third LED epitaxial layer according to the MESA graph designed by the graphical mask so as to form a plurality of third LED units.

In some embodiments, the first and second doped semiconductor layers may include one or more layers based on IIVI materials such as ZnSe or ZnO or IIIV nitride materials such as GaN, alN, inN, inGaN, gaP, alInGaP, alGaAs and alloys thereof.

In some embodiments, the first doped semiconductor layer is a p-type semiconductor layer and the second doped semiconductor layer is an n-type semiconductor layer.

In some embodiments, an active layer is further disposed between the first doped semiconductor layer and the second doped semiconductor layer, and the active layer may specifically be a multiple quantum well structure, for limiting electron and hole carriers to the quantum well region, where after the electron and hole are recombined, the carriers emit photons after undergoing radiative recombination, and electrical energy is converted into optical energy.

The beneficial effects are that: compared with the prior art, the micro LED micro display chip of this application includes: a drive panel including a plurality of first contacts; at least two light emitting layers including a first light emitting layer and a second light emitting layer; the first light-emitting layer is arranged on the driving panel; the first light-emitting layer comprises a plurality of first LED units, the first LED units are arranged on the driving panel and used for emitting first color light; the second light-emitting layer is arranged above the first light-emitting layer and comprises a plurality of second LED units which are arranged in an array manner, and the second LED units are used for emitting second color light; the front projection of the first LED unit and the front projection of the second LED unit on the driving panel are not overlapped; the second doped semiconductor layer of the first LED unit and the second doped semiconductor layer of at least one adjacent second LED unit are electrically connected with the corresponding first contact; the first LED unit and the second LED unit can be individually driven by the driving panel by time sharing. The micro LED micro display chip of the application sends out the light of different colours through different LED units, realize full-color display, different LED units are located different layers and can share first contact, contact resistance is reduced, the integrated level of structure is higher and the consumption has been reduced, the stability of full-color luminescence is improved, in addition, different LED units do not coincide, luminous brightness is improved, the through-hole on the planarization layer surrounds the arbitrary LED unit of corresponding different layers in addition, can prevent the lateral wall light leak of any LED unit, improve the luminous efficiency.

The preparation method of the micro LED micro display chip comprises the following steps: providing a drive panel comprising a plurality of first contacts; forming a first light emitting layer on the driving panel, the first light emitting layer comprising a plurality of first LED units arranged on the driving panel, the first LED units being for emitting light of a first color; forming a second light emitting layer above the first light emitting layer, the second light emitting layer including a plurality of second LED units arranged in an array, the second LED units being for emitting a second color light; the front projection of the first LED unit and the front projection of the second LED unit on the driving panel are not overlapped; the second doped semiconductor layer of the first LED unit and the second doped semiconductor layer of at least one adjacent second LED unit are electrically connected with the driving panel through the first contact; the first LED unit and the second LED unit can be individually driven by the driving panel by time sharing. The preparation method does not need to distinguish the manufacturing sequence when preparing a plurality of layers of LED units for emitting light with different colors, can freely sort, and simplifies the preparation difficulty; and each layer of LED units independently emit light, and the through holes on the planarization layer surround the LED units to form an independently through reflective structure on the planarization layer, so that the light emitting efficiency of different LED units is improved.

Drawings

The technical solution and other advantageous effects of the present invention will be made apparent by the following detailed description of the specific embodiments of the present invention with reference to the accompanying drawings.

FIG. 1 shows a top view of a micro LED micro display chip of the present application;

FIG. 2 shows a schematic cross-sectional view of D-D' of FIG. 1;

FIG. 3 shows a top view of a full color pixel cell of the present application;

FIG. 4 shows a schematic cross-sectional view of A-A' of FIG. 3;

FIG. 5 shows a schematic cross-sectional view of B-B' of FIG. 3;

FIG. 6 shows a schematic cross-sectional view of C-C' of FIG. 3;

fig. 7 shows a schematic structural diagram of forming a first LED epitaxial layer on a drive panel in the present application;

fig. 8 shows a schematic structural diagram of forming a first LED unit in the present application;

fig. 9 is a schematic structural view of forming a first passivation layer, a first electrode layer and a first protective layer in the present application;

fig. 10 is a schematic view showing a structure of forming a first planarization layer in the present application;

fig. 11 is a schematic structural view showing a structure of forming a reflective layer on a sidewall of a first via hole in the present application;

fig. 12 shows a schematic structural view of forming a first filling unit in the present application;

fig. 13 shows a schematic structural diagram of forming a second LED epitaxial layer in the present application;

Fig. 14 shows a schematic structural view of forming a second LED unit in the present application;

fig. 15 is a schematic structural view showing formation of a second passivation layer, a second electrode layer, and a second protective layer in the present application;

fig. 16 is a schematic view showing a structure of forming a second planarizing layer in the present application;

fig. 17 shows a schematic structural view of forming a second filling unit in the present application;

fig. 18 shows a schematic structural view of forming a third LED unit and a third planarization layer in the present application;

FIG. 19 shows a schematic cross-sectional view of a micro LED micro display chip of another configuration;

FIG. 20 is a schematic diagram showing a structure of forming a first LED epitaxial layer on a driving panel in a method for manufacturing a micro LED micro display chip of another structure;

FIG. 21 is a schematic diagram showing the formation of a first LED unit in a method of manufacturing a micro LED micro display chip of another configuration;

FIG. 22 is a schematic view showing a first light-emitting layer formed in a method for manufacturing a micro LED micro display chip of another structure;

FIG. 23 is a schematic view showing the formation of a first planarizing layer in a method of manufacturing a micro LED micro display chip of another construction;

FIG. 24 is a schematic view showing formation of a second light-emitting layer in a method of manufacturing a micro LED micro display chip of another structure;

FIG. 25 is a schematic diagram showing the formation of a second planarizing layer in a method of fabricating a micro LED micro display chip of another construction;

FIG. 26 is a schematic view showing formation of a third light-emitting layer in a method for manufacturing a micro LED micro display chip of another structure;

FIG. 27 is a schematic view showing the formation of a third planarizing layer in a method of manufacturing a micro LED micro display chip of another construction;

reference numerals: 1-first opening, 2-first light emitting layer, 3-second opening, 4-second light emitting layer, 5-third opening, 6-third light emitting layer, 10-driving panel, 11-first LED epitaxial layer, 12-second LED epitaxial layer, 13-third LED epitaxial layer, 20-first LED unit, 30-first planarization layer, 40-second LED unit, 50-second planarization layer, 60-third LED unit, 70-third planarization layer, 80-planarization layer, 90-reflective layer, 101-first contact, 21-first passivation layer, 22-first electrode layer, 23-first protective layer, 41-second passivation layer, 42-second electrode layer, 43-second protective layer, 61-third passivation layer, 62-third electrode layer, 63-third protective layer, 100-first bonding layer, 200-second bonding layer, 300-third bonding layer, 400-first recess region, 500-second recess region, 600-third recess region, 700-microlens array, 800-microlens unit, 900-conductive pillar, 201-first doped semiconductor layer, 202-second doped semiconductor layer, 203-active layer, 210-first opening, 301-first via, 410-second opening, 501-second via, 502-fourth via, 610-third opening, 701-third via, 702-fifth via, 703-sixth via, 801-first fill unit, 802-second fill unit, 803-third fill-in unit.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. It will be apparent that the described embodiments are only some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to fall within the scope of the invention.

The disclosure of the present invention provides many different embodiments or examples for implementing different structures of the invention. In order to simplify the present disclosure, components and arrangements of specific examples are described herein. They are, of course, merely examples and are not intended to limit the invention. Furthermore, the present invention may repeat reference numerals and/or letters in the various examples, which are for the purpose of brevity and clarity, and which do not themselves indicate the relationship between the various embodiments and/or arrangements discussed. In addition, the present invention provides examples of various specific processes and materials, but one of ordinary skill in the art will recognize the application of other processes and/or the use of other materials.

Generally, the terminology may be understood, at least in part, in light of the above usage of the invention. For example, the term "one or more" as used herein depends at least in part on the invention and may be used to describe any component, structure or feature in the singular or may be used to describe any combination of components, structures or features in the plural. Similarly, terms such as "a," "an," or "the" may also be construed to convey a singular usage or a plural usage depending, at least in part, on the invention above. In addition, the term "based on …" may be understood as not necessarily intended to convey an exclusive set of factors, but rather as may be dependent, at least in part, upon the above that the invention may instead allow for the presence of additional factors that are not necessarily explicitly described.

It should be readily understood that the meanings of "on …", "on …" and "on …" in the present invention should be interpreted in the broadest sense such that "on …" means not only "directly on something" but also "on something" including intermediate members or layers present therebetween, and "on something" or "on something" means not only "on something" or "on something" but also "on something" without intermediate members or layers therebetween.

Furthermore, spatially relative terms, such as "under …," "under …," "lower," "above …," "upper," and the like, may be used herein to describe one element or component's relationship to another element or component as illustrated in the figures for ease of description. In addition to the orientations depicted in the drawings, the spatially relative terms are intended to encompass different orientations of the device in use or operation. The device may be rotated 90 deg. in other orientations or in other orientations and the spatially relative descriptors used in the present invention may be interpreted accordingly as such.

The term "layer" as used in the present invention refers to a portion of material comprising regions having a certain thickness. The layers may extend over the entire underlying or overlying structure, or may have a degree less than the extent of the underlying or overlying structure. Furthermore, the layer may be a region of homogeneous or heterogeneous continuous structure having a thickness less than the thickness of the continuous structure. For example, the layer may be located between the top and bottom surfaces of the continuous structure or between any pair of horizontal planes therebetween. The layers may extend horizontally, vertically and/or along a tapered surface. The substrate may be a layer, may include one or more layers therein, and/or may have one or more layers thereon, and/or thereon. One layer may comprise multiple layers. For example, the semiconductor layer may include one or more doped or undoped semiconductor layers, and may have the same or different materials.

The micro LED display has the advantages of self-luminescence, high efficiency, low power consumption, high integration level, high stability and the like, has small volume and high flexibility, is easy to disassemble and combine, and can be applied to any display application occasion from small size to large size. Micro leds, also known as micro light emitting diodes, are typically several hundred microns in size. With the advent of Micro LED Micro display technology, miniaturization and high resolution of display devices such as an augmented reality (augmented reality, AR) display device, a Virtual Reality (VR) display device, a near-eye display (NED) device, a head-up display (HUD) device, and the like are enabled, and in these application scenarios, the size of Micro LEDs is generally 0.1 to 10 micrometers.

In some embodiments, the term drive panel 10 as used in this application refers to a material to which subsequent layers of material are added. The drive panel 10 itself may be patterned. The material added to the top of the drive panel 10 may be patterned or may remain unpatterned. The drive panel 10 may be, for example, but not limited to, a display substrate including a silicon-based CMOS drive board or a thin film transistor drive board, such as a CMOS (Complementary Metal Oxide Semiconductor ) back plate or a TFT glass substrate.

Embodiments of the present disclosure describe a full-color micro led micro display chip and a method for manufacturing the micro led micro display chip. To manufacture a full-color micro led micro display chip, a plurality of sub-pixels having different emission colors (e.g., red, green, blue) are integrally formed into one full-color pixel. The sub-pixel micro-LEDs are driven by one or more driving circuits individually to emit primary colors of corresponding color codes, and the full color gamut of a full-color pixel composed of a plurality of sub-pixels can be seen by human eyes.

In order to integrally form a plurality of sub-pixel LEDs or micro-LEDs emitting different colors (e.g., three primary colors) on the same driving panel, a stacked structure of light emitting diode units is disclosed, and the light emitting diode units include a substantially flat top surface to realize the stacked structure. Each layer of the micro LED micro display chip can independently emit different colors.

Referring to fig. 1 and 19, there is provided a micro led micro display chip including: a drive panel 10, the drive panel 10 comprising a plurality of first contacts 101; at least two light emitting layers including a first light emitting layer 2 and a second light emitting layer 4; the first light-emitting layer 2 is arranged on the driving panel 10; the first light emitting layer 2 includes a plurality of first LED units 20, the first LED units 20 are arranged on the driving panel 10, and the first LED units 20 are used for emitting a first color light; the second light-emitting layer 4 is arranged above the first light-emitting layer 2, and the second light-emitting layer 4 comprises a plurality of second LED units 40 arranged in an array, wherein the second LED units 40 are used for emitting light of a second color; wherein the front projections of the first LED unit 20 and the second LED unit 40 on the driving panel 10 do not coincide; the second doped semiconductor layer 202 of the first LED unit 20 and the second doped semiconductor layer 202 of the adjacent at least one second LED unit 40 are both electrically connected to the corresponding first contact 101; the first LED unit 20 and the second LED unit 40 can be individually driven by the driving panel 10 by time sharing.

In some embodiments, further referring to fig. 19, the at least two light emitting layers further comprise a third light emitting layer 6 disposed over the second light emitting layer 4; the third light emitting layer 6 includes a plurality of third LED units 60 arranged in an array, and the third LED units 60 are configured to emit light of a third color; wherein the third LED unit 60 is not coincident with the front projection of any one of the first LED unit 20 and the second LED unit 40 on the driving panel 10; the second doped semiconductor layer 202 of the third LED unit 60, the second doped semiconductor layer 202 of the adjacent at least one first LED unit 20, and the second doped semiconductor layer 202 of the adjacent at least one second LED unit 40 are all electrically connected to the corresponding first contact 101; the third LED units 60 can be individually driven by the driving panel 10 by time sharing.

It is understood that the first light emitting layer 2, the second light emitting layer 4, and the third light emitting layer 6 are stacked.

In some embodiments, with further reference to fig. 19, the micro led micro display chip further comprises: a first planarization layer 30 located between the first light emitting layer 2 and the second light emitting layer 4; the first planarization layer 30 transmits light of a first color; a second planarization layer 50 between the second light-emitting layer 4 and the third light-emitting layer 6; the second planarization layer 50 transmits the first color light and the second color light; a plurality of third LED units 60 are arranged on the second planarization layer 50; a third planarization layer 70 provided on the third light-emitting layer 6; the third planarization layer 70 transmits the first color light, the second color light, and the third color light.

In some embodiments, in the micro LED micro display chip provided in fig. 19, light with different colors is emitted by different LED units, so as to realize full-color display, the different LED units are located in different layer structures and can share the first contact 101, so that contact resistance of the LED units between the different layer structures is reduced, stability of full-color light emission is improved, and the planarization layer can directly transmit the light emitted by the LEDs, so that large-area light emission is realized.

In some embodiments, the first planarization layer 30, the second planarization layer 50, and the third planarization layer 70 may be made of transparent materials to realize the transmission of the first color light, the second color light, and the third color light.

In some embodiments, with further reference to fig. 1 and 2, there is provided yet another micro led micro display chip comprising: a driving panel 10, a plurality of first LED units 20, a first planarization layer 30, a plurality of second LED units 40, and a second planarization layer 50; the drive panel 10 includes a plurality of first contacts 101; a plurality of first LED units 20 are arranged on the driving panel 10, the first LED units 20 being for emitting light of a first color; the first planarization layer 30 has a plurality of first through holes 301, the plurality of first through holes 301 being disposed around the first LED units 20, respectively, and the first color light being emitted through the first through holes 301; a plurality of second LED units 40 arranged on the first planarization layer 30, the second LED units 40 for emitting light of a second color; the second planarization layer 50 has a plurality of second through holes 501, the plurality of second through holes 501 are respectively disposed around the second LED units 40, and the second color light exits through the second through holes 501; wherein the front projections of the first LED unit 20 and the second LED unit 40 on the driving panel 10 do not coincide; the second doped semiconductor layer 202 of the first LED unit 20 and the second doped semiconductor layer 202 of the adjacent at least one second LED unit 40 are both electrically connected to the corresponding first contact 101; the first LED unit 20 and the second LED unit 40 can be individually driven by the driving panel 10 by time sharing. It can be understood that, the micro LED micro display chip of this embodiment emits light with different colors through different LED units, so as to realize full-color display, and the different LED units are located in different layers and can share the first contact 101, so that contact resistance of the LED units in different layers is reduced, stability of full-color light emission is improved, the first through hole 301 and the second through hole 302 surround any LED unit in the corresponding different layers, light leakage from sidewalls of any LED unit can be prevented, and light extraction efficiency is improved.

In some embodiments, with further reference to fig. 1 and 2, the micro led micro display chip further comprises: a plurality of third LED units 60 and a third planarization layer 70; the third LED unit 60 is arranged on the second planarization layer 50, and the third LED unit 60 is configured to emit a third color light; the third planarization layer 70 has a plurality of third through holes 701, the plurality of third through holes 701 are respectively disposed around the third LED units 60, and the third color light exits through the third through holes 701; wherein the third LED unit 60 is not coincident with the front projection of any one of the first LED unit 20 and the second LED unit 40 on the driving panel 10; the third LED unit 60 is electrically connected to any one of the adjacent first LED unit 20 and second LED unit 40 via the first contact 101 and the driving panel 10; the third LED unit 60 can be individually driven by the driving panel 10.

In some embodiments, the color of the light emitted by the third LED unit 60, the color of the light emitted by the first LED unit 20, and the color of the light emitted by the second LED unit 40 are all different; the first LED unit 20, the second LED unit 40, and the third LED unit 60 realize full-color display, and the three share the first contact 101, and the light emitted by the three are not overlapped on the driving panel 10, so that the LED units are highly integrated, thereby realizing a display effect with high resolution and high brightness.

In some embodiments, the first, second, and third LED units 20, 40, and 60 may have a trapezoid structure. That is, the sidewalls of the first, second, and third LED units 20, 40, and 60 may be inclined planes, and the included angle between the sidewalls and the top surface may be an obtuse angle, so that the condensing effect of the LED units may be improved. It should be understood that the first LED unit 20, the second LED unit 40, and the third LED unit 60 may also have a columnar structure, where the included angle between the side wall and the top surface of the LED mesa is a right angle.

In some embodiments, the first, second, and third LED units 20, 40, and 60 are a stepped structure including a first doped semiconductor layer 201, a second doped semiconductor layer 202, and an active layer 203 therebetween. It can be appreciated that the stepped structure can prevent current interference between adjacent LED units, improving the independence and stability of the LED units.

In some embodiments, the first doped semiconductor layer 201 and the second doped semiconductor layer 202 may include one or more layers based on IIVI materials (such as ZnSe or ZnO) or IIIV nitride materials (such as GaN, alN, inN, inGaN, gaP, alInGaP, alGaAs and alloys thereof).

In some embodiments, the first doping type semiconductor layer 201 may be p-type GaN. In some embodiments, the first doped semiconductor layer 201 may be p-type InGaN. In some embodiments, the first doped semiconductor layer 201 may be p-type AlInGaP.

In some embodiments, the second doped semiconductor layer 202 may be n-type GaN. In some embodiments, the second doped semiconductor layer 202 may be n-type InGaN. In some embodiments, the second doped semiconductor layer 202 may be n-type AlInGaP.

In some embodiments, the active layer 203 is an active region of an LED unit. The active layer 203 is disposed between the first and second doping type semiconductor layers 201 and 202 and provides light. The active layer 203 is a layer that recombines holes and electrons supplied from the first doped semiconductor layer 201 and the second doped semiconductor layer 202, respectively, and outputs light of a specific wavelength, and may have a single quantum well structure or a Multiple Quantum Well (MQW) structure and well layers and barrier layers alternately stacked.

In some embodiments, with further reference to fig. 3, 4, 5, 6, and 19, a schematic diagram of a pixel cell consisting of one first LED unit 20, one second LED unit 40, one third LED unit 60 is shown in fig. 3; wherein, micro LED micro display chip still includes: a first bonding layer 100, a second bonding layer 200, and a third bonding layer 300; the first bonding layer 100 is located between the driving panel 10 and the first LED unit 20, the second bonding layer 200 is located between the first planarization layer 30 and the second LED unit 40, and the third bonding layer 300 is located between the second planarization layer 50 and the third LED unit 60. The first bonding layer 100, the second bonding layer 200, and the third bonding layer 300 may be non-conductive materials or conductive materials, as long as the LED units are bonded.

In some embodiments, the driving panel 10 further includes a first common contact to which the first doping type semiconductor layer 201 of the first LED unit 20 is connected; the driving panel 10 further includes a second common contact to which the first doping type semiconductor layer 201 of the second LED unit 40 is connected; the driving panel 10 further includes a third common contact to which the first doping type semiconductor layer 201 of the third LED unit 60 is connected. The first LED unit 20, the second LED unit 40, and the third LED unit 60 can be individually driven by the driving panel 10 by time sharing, and the time sharing driving can be understood as: connecting the first doped semiconductor layer 201 of the first LED unit 20 with the corresponding first common contact at a first moment, and simultaneously connecting the second doped semiconductor layer 202 of the first LED unit 20 with the first contact in a matching manner, so that the first LED unit 20 can be lighted at the first moment, and the first LED unit 20 can be independently driven by one or more driving circuits and emit light with corresponding colors; of course, the time-sharing driving of the second LED unit 40 and the third LED unit 60 is similar to the above principle, and at the second time and the third time, respectively, the second LED unit 40 and the third LED unit 60 are lighted and emit light of the corresponding colors under the cooperation of the corresponding common contact and the first contact.

In some embodiments, the first contact 101 may be a cathode metal contact, and the first, second, and third common contacts may be anode metal contacts. The first common contact, the second common contact, and the third common contact may be plural and distributed on the driving panel 10. The first contact 101 may be a contact shared by different LED units, the first common contact, the second common contact and the third common contact are common electrode contacts of the same layer of LED units with the same color, and the first common contact, the second common contact and the third common contact are respectively and independently connected with each LED unit, and apply an anode voltage to provide an independent driving signal, so as to achieve the purpose of independently controlling the light emission of each LED unit.

In some embodiments, the first bonding layer 100, the second bonding layer 200, and the third bonding layer 300 are layers of adhesive material, and are electrically conductive while also requiring electrical connection with the first doped semiconductor layer 201. In some embodiments, the first bonding layer 100, the second bonding layer 200, the third bonding layer 300 may be, for example, a metal or a metal alloy. In some embodiments, the first bonding layer 100, the second bonding layer 200, the third bonding layer 300 may include Au, ag, cu, al, etc., and are not limited thereto. It is understood that the description of the materials of the bonding layer is merely exemplary and not limiting, and that a person skilled in the art may make variations as required, all of which are within the scope of the invention.

In some embodiments, further referring to fig. 18 and 19, the second bonding layer 200 has a first opening 1 exposing the first LED unit 20 at a position corresponding to the first LED unit 20, and a portion of the second light emitting layer 4 fills the first opening 1; the third bonding layer 300 has a second opening 3 exposing the first LED unit 20 at a position corresponding to the first LED unit 20; the third bonding layer 300 has a third opening 5 exposing the second LED unit 40 at a position corresponding to the second LED unit 40; portions of the third light emitting layer 6 fill the second opening 3 and the third opening 5.

In some embodiments, with further reference to fig. 4, the second planarization layer 50 also has a plurality of fourth vias 502, the fourth vias 502 being disposed relative to the first vias 301; the third planarization layer 70 further has a plurality of fifth through holes 702, and the fifth through holes 702 are disposed opposite to the fourth through holes 502; the first through hole 301, the fourth through hole 502, and the fifth through hole 702 are sequentially communicated, and a first concave region 400 is formed between the first through hole 301, the fourth through hole 502, and the fifth through hole 702 and the first LED unit 20. It is understood that the first concave area 400 is an area formed by the first through hole 301, the fourth through hole 502 and the fifth through hole 702 facing each other, and may be columnar, bowl-shaped or horn-shaped, and in order to improve the uniformity of the light emission of the first LED unit 20, the first LED unit 20 may be disposed at the center of the first concave area 400, so that the first color light may uniformly pass through the first through hole 301, the fourth through hole 502 and the fifth through hole 702.

In some embodiments, with further reference to fig. 5, the third planarization layer 70 also has a plurality of sixth vias 703, the sixth vias 703 being disposed relative to the second vias 501; the sixth through hole 703 communicates with the second through hole 501 and forms a second recessed region 500 with the second LED unit 40. It can be understood that the second concave region 500 is a continuous through region formed by the communication of the sixth through hole 703 and the second through hole 501, and may be columnar, bowl-shaped or horn-shaped, so that in order to improve the uniformity of the light emission of the second LED unit 40, the second LED unit 40 may be disposed at the center of the second concave region 500, so that the second color light may uniformly pass through the second through hole 501 and the sixth through hole 703.

In some embodiments, with further reference to fig. 6, a third recessed region 600 is formed between the third via 701 and the third LED unit 60; it is understood that the third concave region 600 may be cylindrical, bowl-shaped or horn-shaped, and in order to improve the uniformity of the light emission of the third LED unit 60, the third LED unit 60 may be disposed at the center of the third concave region 600, so that the third color light may uniformly pass through the third through hole 701.

In some embodiments, referring to fig. 18, the apertures of the first through-hole 301, the fourth through-hole 502, and the fifth through-hole 702 are smaller than the apertures of at least one of the first aperture 1, the second aperture 3; the second through hole 501 and the sixth through hole 703 have a smaller pore diameter than the third opening 5. It will be appreciated that the size of the aperture is determined by the shape of the hole, and in general, the first through hole 301, the fourth through hole 502, the fifth through hole 702, the second through hole 501, the sixth through hole 703, and the first opening 1, the second opening 3, and the third opening 5 are circular in shape, that is, the aperture is the inner diameter of the circular hole; of course, the shape of the hole is not limited to the above shape, but may be any other regular polygon such as triangle, square, regular pentagon, regular hexagon, etc., and the size of the aperture may be determined according to a uniform standard under the respective shapes, for example, the aperture of the square may be the distance between the center and the side, where the center refers to the center of an inscribed circle or an circumscribed circle of the regular polygon. By setting the aperture size relationship, short circuit between the reflecting layer and the bonding layer caused by overlarge aperture of the through hole can be avoided.

In some embodiments, each of the above vias may be formed using dry etching, for example, the sidewalls of the via may be etched to be vertical planes, and the angle between the sidewalls of the via and the top surface of the planarization layer may be a right angle. The structure of the through hole can also be a bowl-shaped structure or a horn-shaped structure, so that the emitted light of the LED can be collimated. The material of the planarization layer having the plurality of through holes is not particularly limited in the embodiments of the present application, and the materials of the first planarization layer 30, the second planarization layer 50, and the third planarization layer 70 may include, for example, organic resins, organic black matrix photoresists, color filter photoresists, polyimide, and the like.

In some embodiments, referring to fig. 2, the micro led micro display chip further includes: a filling-up layer 80, the filling-up layer 80 including a first filling-up unit 801, a second filling-up unit 802, and a third filling-up unit 803; the first filling unit 801 fills the first concave region 400, the second filling unit 802 fills the second concave region 500, and the third filling unit 803 fills the third concave region 600. It will be appreciated that the fill-up layer 80 is made of a transparent material so that light emitted from the corresponding LED unit is not blocked. The first filling unit 801 may completely cover the first LED unit 20, the second filling unit 802 may completely cover the second LED unit 40, and the third filling unit 803 may completely cover the third LED unit 60; it should be noted that, the filling layer 80 may protect the first LED unit 20, the second LED unit 40, and the third LED unit 60, and may effectively utilize the light emitting surface and the side light emitting surface of the LED unit, thereby improving the light emitting efficiency.

In some embodiments, referring to fig. 2, the micro led micro display chip further includes: the reflective layer 90, the reflective layer 90 is disposed on a sidewall of any one of the first recess region 400, the second recess region 500, and the third recess region 600. Further, the reflective layer 90 is disposed on a sidewall of at least one of the first via 301, the second via 501, the third via 701, the fourth via 502, the fifth via 702, and the sixth via 703.

It can be understood that the reflective layer 90 not only can effectively block the light leakage from the side wall of the LED unit, but also can reflect the light emitted from the LED unit, and the grid holes provided with the reflective layer 90 can gather and collimate the reflected light of the reflective layer 90 and the light emitted from the LED unit, so that the light extraction efficiency can be further improved.

In some embodiments, the reflective layer 90 may be formed based on the first concave region 400, the second concave region 500, and the third concave region 600, so that processing in a micro gap between LED units of the micro LED micro display chip can be avoided, thereby greatly reducing processing difficulty, enlarging a process window, improving processing yield, and being applicable to products with high resolution and high pixel density.

In some embodiments, the reflective layer 90 may be made of an organic material, optionally including, but not limited to, a highly reflective organic coating. The reflective layer 90 may also be made of inorganic materials, including but not limited to metallic materials such as Al, cu, ag, etc. The reflective layer 90 may be deposited by atomic layer deposition (Atomic Layer Deposition, ALD), chemical vapor deposition (Chemical Vapor Deposition, CVD), evaporation, sputtering, etc. to the sidewalls of the corresponding regions.

In some embodiments, the first LED unit 20 may emit a first color light including, but not limited to: any one of red light, green light, blue light, yellow light or ultraviolet light; the second LED unit 40 may emit a second color light including, but not limited to: any one of red light, green light, blue light, yellow light or ultraviolet light; the third LED unit 60 may emit third color light including, but not limited to: red light, green light, blue light, yellow light or ultraviolet light.

In some embodiments, the first, second, and third color light are each selected from: red light, green light, and blue light. Wherein the first color light, the second color light and the third color light are all different.

In some embodiments, with further reference to fig. 4, 5, and 6, the micro led micro display chip further comprises; the first passivation layer 21, the first electrode layer 22, the first protective layer 23, the second passivation layer 41, the second electrode layer 42, the second protective layer 43, the third passivation layer 61, the third electrode layer 62, and the third protective layer 63; the first passivation layer 21 covers the first LED unit 20 and the first bonding layer 100, the first passivation layer 21 having a first opening 210 exposing the second doping type semiconductor layer 202 of the first LED unit 20; the first electrode layer 22 electrically connects the second doped semiconductor layer 202 of the first LED unit 20 with the corresponding first contact 101 through the first opening 210; the first protective layer 23 covers the first passivation layer 21 and the first electrode layer 22; the second passivation layer 41 covers the second LED unit 40 and the second bonding layer 200, the second passivation layer 41 having a second opening 410 exposing the second doping type semiconductor layer 202 of the second LED unit 40; the second electrode layer 42 electrically connects the second doped semiconductor layer 202 of the second LED unit 40 with the corresponding first contact 101 through the second opening 410; the second protective layer 43 covers the second passivation layer 41 and the second electrode layer 42; the third passivation layer 61 covers the third LED unit 60 and the third bonding layer 300, the third passivation layer 61 having a third opening 610 exposing the second doping type semiconductor layer 202 of the third LED unit 60; the third electrode layer 62 electrically connects the second doped semiconductor layer 202 of the third LED unit 60 with the corresponding first contact 101 through the third opening 610; the third protective layer 63 covers the third passivation layer 61 and the third electrode layer 62.

In some embodiments, the materials of the first passivation layer 21, the second passivation layer 41, and the third passivation layer 61 include inorganic materials including SiO, or organic materials to isolate and protect the LED units ₂ 、Al ₂ O ₃ 、ZrO ₂ 、TiO ₂ 、Si ₃ N ₄ 、HfO ₂ Any one or a combination of a plurality of the above; the organic material comprises any one or a combination of a plurality of black matrix photoresist, color filter photoresist, polyimide, retaining wall photoresist (BANK), overlay photoresist, near ultraviolet negative photoresist and styrene-acrylic.

In some embodiments, the first electrode layer 22, the second electrode layer 42, and the third electrode layer 62 are N-pole metal layers, and the material may be indium tin oxide, cr, ti, pt, au, al, cu, ge, ni, or the like.

In some embodiments, the first, second, and third protective layers 23, 43, and 63 may cover the plurality of LED units to prevent etching from damaging the light emitting surface of the LED or at least one of the first, second, and third electrode layers 22, 42, and 62. The first protective layer 23, the second protective layer 43, and the third protective layer 63 can transmit the light emitted by the LED units, so that the first protective layer 23, the second protective layer 43, and the third protective layer 63 should have sufficient transparency, and generally, materials such as silicon dioxide, silicon nitride, and aluminum oxide can be used. The first protective layer 23, the second protective layer 43, and the third protective layer 63 are each a continuous film structure, and are located at the lower portion of the grid layer and at the upper portion of the LED unit. The thicknesses of the first protective layer 23, the second protective layer 43, and the third protective layer 63 may be, for example, 300 to 800nm, and the thicknesses may be selected according to the specific case.

In some embodiments, the micro led micro display chip further comprises: the plurality of conductive posts 900, the conductive posts 900 are disposed on the corresponding first contacts 101 and connected with the corresponding first contacts 101; the conductive posts 900 sequentially penetrate through the first passivation layer 21, the first protection layer 23, the first planarization layer 30, the second passivation layer 41, the second protection layer 43, the second planarization layer 50, and the third passivation layer 61 in a direction away from the driving panel 10, and the conductive posts 900 are connected to the corresponding first electrode layer 22, the corresponding second electrode layer 42, and the corresponding third electrode layer 62. It will be appreciated that the conductive posts 900 connect the first electrode layer 22, the second electrode layer 42, and the third electrode layer 62 such that they can participate in the transmission and distribution of current in common, ensuring that current can flow through each electrode layer, thereby achieving normal light emission of the LED unit. Referring further to fig. 4-6, when the conductive pillar 900 penetrates the first passivation layer 21, the second passivation layer 41, and the third passivation layer 61, care should be taken to electrically isolate the conductive pillar 900 from the first bonding layer 100, the second bonding layer 200, and the third bonding layer 300, so as to avoid a short circuit that may occur with the conductive pillar 900 when the first bonding layer 100, the second bonding layer 200, and the third bonding layer 300 are made of a conductive material. Further, the conductive post 900 is made of a metal material.

In some embodiments, taking fig. 3 as an example, at least one first LED unit 20, at least one second LED unit 40, and at least one third LED unit 60 form one full-color pixel unit of a micro LED micro display chip.

In some embodiments, the top surfaces of the first fill unit 801, the second fill unit 802, and the third fill unit 803 are flush with the top surface of the third planarization layer 70; alternatively, the top surfaces of the first filling unit 801, the second filling unit 802, and the third filling unit 803 are lower than the top surface of the third planarization layer 70. It can be understood that the flush structure not only can effectively prevent optical crosstalk between adjacent LED units, but also can ensure the flatness and stability of the Micro LED Micro display chip structure, thereby being convenient for the subsequent production process.

In some embodiments, the first LED unit 20, the second LED unit 40, and the third LED unit 60 have a size of 0.1-5 microns; the spacing between the adjacent first LED unit 20, second LED unit 40 and third LED unit 60 is 1-10 microns.

In some embodiments, the drive panel 10 may include semiconductor materials such as silicon, silicon carbide, nitride, germanium, arsenide, indium phosphide. The driving panel 10 may have a driving circuit formed therein, and the driving panel 10 may be a CMOS back plate or a TFT glass substrate.

In some embodiments, referring to fig. 2, the micro led micro display chip further includes: the microlens array 700, the microlens array 700 includes a plurality of microlens units 800, and the microlens units 800 are disposed over at least one of the first LED unit 20, the second LED unit 40, and the third LED unit 60. Specifically, the microlens unit 800 is disposed on the third planarization layer 70 and covers at least one of the first concave region 400, the second concave region 500, and the third concave region 600. The Micro lens unit 800 may be used to collect and/or collimate the light emitted from the LED unit, so that the light emitting efficiency of the Micro LED Micro display chip may be improved. The light emitting curved surface of the microlens unit 800 may be an irregular curved surface shape or a regular curved surface shape, for example, the light emitting curved surface may be an arc-shaped curved surface or a hemispherical curved surface. The ratio of the radius of curvature of the light emitting curved surface of the microlens unit 800 to the size of the LED unit is set to 0.5-3.

In some embodiments, taking the micro led micro display chip of fig. 19 as an example, a method for manufacturing the micro led micro display chip is provided, including:

providing a drive panel 10, the drive panel 10 comprising a plurality of first contacts 101;

forming a first light emitting layer 2 on the driving panel 10, the first light emitting layer 2 including a plurality of first LED units 20, the first LED units 20 being arranged on the driving panel 10, the first LED units 20 for emitting a first color light;

Forming a second light emitting layer 4 over the first light emitting layer 2, the second light emitting layer 4 including a plurality of second LED units 40 arranged in an array, the second LED units 40 for emitting light of a second color;

wherein the front projections of the first LED unit 20 and the second LED unit 40 on the driving panel 10 do not coincide; the second doping type semiconductor layer 202 of the first LED unit 20 and the second doping type semiconductor layer 202 of the adjacent at least one second LED unit 40 are electrically connected to the driving panel 10 through the first contact 101; the first LED unit 20 and the second LED unit 40 can be individually driven by the driving panel 10 by time sharing.

With further reference to FIGS. 20-27, cross-sectional views of the micro LED micro display chip of FIG. 19 at various stages in its manufacture are illustrated.

Referring to fig. 20, a driving panel 10 is provided, and the driving panel 10 may include a circuit layer composed of Complementary Metal Oxide Semiconductor (CMOS) devices or TFT devices, etc., which may form a driving circuit in the driving panel 10, and the driving panel 10 may further include a plurality of contacts connected to the driving circuit, the plurality of contacts including a first contact 101 and first, second and third common contacts, the first contact 101 may be respectively electrically connected to the second doping type semiconductor layer 202 of each LED unit, and the first, second and third common contacts may be respectively electrically connected to the first doping type semiconductor layer 201 of the plurality of LED units to individually drive any one of the plurality of LED units to emit light; a first bonding layer 100 may then be formed on the drive panel 10; the substrate formed with the first LED epitaxial layer 11 is then bonded to the driving panel 10 through the first bonding layer 100 such that the first LED epitaxial layer 11 is formed on the driving panel 10.

Specifically, the first LED epitaxial layer 11 on the substrate may be flipped over, and the first bonding layer 100 may be formed by fusing the bonding layers. So that the first LED epitaxial layers 11 can be bonded to the drive panel 10, followed by peeling off the substrate, including but not limited to laser peeling, dry etching, wet etching, mechanical polishing, etc.; the flipped first LED epitaxial layer 11 may also be subjected to a thinning operation, which includes dry etching, wet etching, or mechanical polishing.

Referring to fig. 21, the MESA pattern may be designed according to a patterned mask, and the first LED epitaxial layer 11 may be etched to form a plurality of first LED units 20, the first LED units 20 being of a functionalized step structure, the first LED units 20 including a first doped semiconductor layer 201, an active layer 203, and a second doped semiconductor layer 202. It should be understood that etching includes dry or wet methods.

Referring to fig. 22, a first passivation layer 21 is deposited on the first LED unit 20 and the first bonding layer 100, then a first opening 210 is provided at a position of the first passivation layer 21 corresponding to the second doping type semiconductor layer 202 of the first LED unit 20, and then a first electrode layer 22 is provided at an upper portion of the driving panel, and the first electrode layer 22 electrically connects the second doping type semiconductor layer 202 of the first LED unit 20 with the corresponding first contact 101 through the first opening 210 at an outer portion of the passivation layer.

Referring to fig. 23, a first planarization layer 30 may be formed on upper portions of the plurality of first LED units 20, and a material of the first planarization layer 30 may include, for example, an organic resin, an organic black matrix photoresist, a color filter photoresist, polyimide, and the like.

Referring to fig. 24, the second LED unit 40 is first formed on the first planarization layer 30 in the same manner as the first LED unit 20; wherein it is necessary to form a first opening 1 exposing the first LED unit 20 at a position of the second bonding layer 200 corresponding to the first LED unit 20 such that the second passivation layer 41 of the second light emitting layer 4 partially fills the first opening 1.

Referring to fig. 25, a second planarization layer 50 may be formed on the upper portions of the plurality of second LED units 40, and materials of the second planarization layer 50 may include, for example, an organic resin, an organic black matrix photoresist, a color filter photoresist, polyimide, and the like.

Referring to fig. 26, a third LED unit 60 is first formed on the second planarization layer 50 in the same manner as the first LED unit 20 and the second LED unit 40; wherein, the second opening 3 exposing the first LED unit 20 needs to be formed at a position where the third bonding layer 300 should be the first LED unit 20; and forming a third opening 5 exposing the second LED unit 40 at a position of the third bonding layer 300 corresponding to the second LED unit 40; the third passivation layer 61 of the third light emitting layer 6 is partially filled in the second and third openings 3 and 5.

Referring to fig. 27 and 19, first, a third planarization layer 70 is formed on the upper portions of the plurality of third LED units 60, and the material of the third planarization layer 70 may include, for example, an organic resin, an organic black matrix photoresist, a color filter photoresist, polyimide, and the like; then, a microlens array 700 is disposed on the third planarization layer 70, the microlens array 700 including a plurality of microlens units 800, and the microlens units 800 covering at least one of the first LED unit 20, the second LED unit 40, and the third LED unit 60, resulting in a micro LED micro display chip.

In some embodiments, taking the preparation of the micro led micro display chip of fig. 2 as an example, the preparation method includes the following steps:

forming a first light emitting layer 2 on the driving panel 10, the first light emitting layer 2 including a plurality of first LED units 20, the first LED units 20 for emitting a first color light;

forming a first planarization layer 30, the first planarization layer 30 having a plurality of first through holes 301, the plurality of first through holes 301 being disposed around the first LED units 20, respectively, the first color light being emitted through the first through holes 301;

forming a second light emitting layer 4 on the first planarization layer 30, the second light emitting layer 4 including a plurality of second LED units 40 arranged in an array, the second LED units 40 for emitting light of a second color;

Forming a second planarization layer 50, the second planarization layer 50 having a plurality of second through holes 501, the plurality of second through holes 501 being disposed around the second LED units 40, respectively, and the second color light being emitted through the second through holes 501;

It can be understood that the preparation method does not need to distinguish the preparation sequence when preparing a plurality of layers of LED units for emitting light with different colors, can freely sort, and simplifies the preparation difficulty; and each layer of LED units independently emit light, and the grid layer is formed with an independently through reflective structure in a mode of surrounding the LED units through the grid holes, so that the light emitting efficiency of different LED units is improved.

In some embodiments, the method of making further comprises:

forming a third light emitting layer 6 on the second planarization layer 50, the third light emitting layer 6 including a plurality of third LED units 60 arranged in an array, the third LED units 60 for emitting light of a third color;

Forming a third planarization layer 70, the third planarization layer 70 having a plurality of third through holes 701, the plurality of third through holes 701 being disposed around the third LED units 60, respectively, and the third color light being emitted through the third through holes 701;

wherein the third LED unit 60 is not coincident with the front projection of any one of the first LED unit 20 and the second LED unit 40 on the driving panel 10; the second doped semiconductor layer 202 of the third LED unit 60, the second doped semiconductor layer 202 of the adjacent at least one first LED unit 20, and the second doped semiconductor layer 202 of the adjacent at least one second LED unit 40 are all electrically connected to the corresponding first contact 101; the third LED units 60 can be individually driven by the driving panel 10 by time sharing.

In some embodiments, before forming the plurality of first LED units 20 on the driving panel 10, the method further includes: forming a first bonding layer 100 on the driving panel 10, the first bonding layer 100 being located between the driving panel 10 and the first LED unit 20; the driving panel 10 further includes a first common contact to which the first doping type semiconductor layer 201 of the first LED unit 20 is connected;

before forming the plurality of second LED units 40 on the first planarization layer 30, the method further includes: forming a second bonding layer 200 on the first planarization layer 30, the second bonding layer 200 being located between the first planarization layer 30 and the second LED unit 40; the driving panel 10 further includes a second common contact to which the first doping type semiconductor layer 201 of the second LED unit 40 is connected;

Before forming the plurality of third LED units 60 on the second planarization layer 50, the method further includes: forming a third bonding layer 300 on the second planarization layer 50, the third bonding layer 300 being located between the second planarization layer 50 and the third LED unit 60; the driving panel 10 further includes a third common contact to which the first doping type semiconductor layer 201 of the third LED unit 60 is connected.

In some embodiments, the method of making further comprises: forming a fill level layer 80; the filling-up layer 80 includes a first filling-up unit 801, a second filling-up unit 802, and a third filling-up unit 803; the first filling unit 801 fills the first concave region 400, the second filling unit 802 fills the second concave region 500, and the third filling unit 803 fills the third concave region 600.

In some embodiments, prior to forming the fill layer 80, the method of making further comprises:

forming a reflective layer 90 on sidewalls of any one of the first, second, and third recess regions 400, 500, 600; or,

the reflective layer 90 is formed on a sidewall of at least one of the first via 301, the second via 501, the third via 701, the fourth via 502, the fifth via 702, and the sixth via 703.

In some embodiments, after forming the fill layer 80, the method of making further comprises:

A microlens array 700 is formed on the third planarization layer 70, the microlens array 700 including a plurality of microlens units 800, the microlens units 800 covering at least one of the first, second, and third recess regions 400, 500, 600.

In some embodiments, the step of forming the first light emitting layer 2 on the driving panel 10 further includes: forming a plurality of first LED units 20, a first passivation layer 21, a first electrode layer 22 and a first protection layer 23, the first passivation layer 21 covering the first LED units 20 and the first bonding layer 100, the first passivation layer 21 having a first opening 210 exposing the second doping type semiconductor layer 202 of the first LED units 20, the first electrode layer 22 electrically connecting the second doping type semiconductor layer 202 of the first LED units 20 with the corresponding first contacts 101 through the first opening 210, the first protection layer 23 covering the first passivation layer 21 and the first electrode layer 22;

the step of forming the second light emitting layer 4 further includes: forming a plurality of second LED units 40, a second passivation layer 41, a second electrode layer 42, and a second protective layer 43, the second passivation layer 41 covering the second LED units 40 and the second bonding layer 200, the second passivation layer 41 having a second opening 410 exposing the second doped semiconductor layer 202 of the second LED unit 40, the second electrode layer 42 electrically connecting the second doped semiconductor layer 202 of the second LED unit 40 with the corresponding first contact 101 through the second opening 410, the second protective layer 43 covering the second passivation layer 41 and the second electrode layer 42;

The step of forming the third light emitting layer 6 further includes: a plurality of third LED units 60, a third passivation layer 61, a third electrode layer 62, and a third protective layer 63 are formed, the third passivation layer 61 covering the third LED units 60 and the third bonding layer 300, the third passivation layer 61 having a third opening 610 exposing the second doped semiconductor layer 202 of the third LED unit 60, the third electrode layer 62 electrically connecting the second doped semiconductor layer 202 of the third LED unit 60 with the corresponding first contact 101 through the third opening 610, the third protective layer 63 covering the third passivation layer 61 and the third electrode layer 62.

In some embodiments, the step of forming the plurality of first LED units 20 includes:

providing a first substrate, wherein a first LED epitaxial layer 11 is arranged on the first substrate, and the first LED epitaxial layer 11 comprises a first doped semiconductor layer 201, an active layer 203 and a second doped semiconductor layer 202 which are stacked;

bonding and connecting the driving panel 10 and the first LED epitaxial layer 11 through the first bonding layer 100;

removing the first substrate and exposing the second doping type semiconductor layer 202 of the first LED epitaxial layer 11;

the first LED epitaxial layer 11 is etched according to the MESA pattern of the patterned mask design to form a plurality of first LED units 20.

In some embodiments, the step of forming the plurality of second LED units 40 includes:

providing a second substrate, wherein a second LED epitaxial layer 12 is arranged on the second substrate, and the second LED epitaxial layer 12 comprises a first doped semiconductor layer 201, an active layer 203 and a second doped semiconductor layer 202 which are stacked;

bonding the first planarization layer 30 to the second LED epitaxial layer 12 through the second bonding layer 200;

removing the second substrate and exposing the second doped semiconductor layer 202 of the second LED epitaxial layer 12;

the second LED epitaxial layer 12 is etched according to the MESA pattern of the patterned mask design to form a plurality of second LED units 40.

In some embodiments, the step of forming the plurality of third LED units 60 includes:

providing a third substrate, wherein a third LED epitaxial layer 13 is arranged on the third substrate, and the third LED epitaxial layer 13 comprises a first doped semiconductor layer 201, an active layer 203 and a second doped semiconductor layer 202 which are stacked;

bonding the second planarization layer 50 to the third LED epitaxial layer 13 through the third bonding layer 300;

removing the third substrate and exposing the second doping type semiconductor layer 202 of the third LED epitaxial layer 13;

the third LED epitaxial layer 13 is etched according to the MESA pattern of the patterned mask design to form a plurality of third LED units 60.

In some embodiments, the first LED epitaxial layer 11 is a red light emitting epitaxial layer, the second LED epitaxial layer 12 is a green light emitting epitaxial layer, and the third LED epitaxial layer 13 is a blue light emitting epitaxial layer.

In some embodiments, the first substrate, the second substrate, and the third substrate may be made of glass, sapphire, silicon carbide, or the like.

In some embodiments, prior to the step of forming the first electrode layer 22, the second electrode layer 42, and the third electrode layer 62, further comprising:

forming a conductive column 900, wherein the conductive column 900 is arranged on the first contact 101 and is connected with the corresponding first contact 101; the conductive post 900 sequentially penetrates the first passivation layer 21, the first protection layer 23, the first planarization layer 30, the second passivation layer 41, the second protection layer 43, the second planarization layer 50, and the third passivation layer 61 in a direction away from the driving panel 10 to simultaneously connect the first electrode layer 22, the second electrode layer 42, and the third electrode layer 62.

Fig. 7 to 18 show cross-sectional views of a micro led micro display chip at various stages in the manufacturing process.

Referring to fig. 7, a driving panel 10 is provided, the driving panel 10 may include a circuit layer composed of Complementary Metal Oxide Semiconductor (CMOS) devices or TFT devices, etc., which may form a driving circuit in the driving panel 10, the driving panel 10 may further include a plurality of contacts connected to the driving circuit, the plurality of contacts including a first contact 101 and first, second and third common contacts, the first contact 101 may be respectively electrically connected to the second doping type semiconductor layer 202 of each LED unit, and the first, second and third common contacts may be respectively electrically connected to the first doping type semiconductor layer 201 of the plurality of LED units to individually drive any one of the plurality of LED units to emit light; a first bonding layer 100 may then be formed on the drive panel 10; the substrate formed with the first LED epitaxial layer 11 is then bonded to the driving panel 10 through the first bonding layer 100 such that the first LED epitaxial layer 11 is formed on the driving panel 10.

Referring to fig. 8, the MESA pattern may be designed according to a patterned mask, and the first LED epitaxial layer 11 may be etched to form a plurality of first LED units 20, the first LED units 20 being of a functionalized step structure, the first LED units 20 including a first doped semiconductor layer 201, an active layer 203, and a second doped semiconductor layer 202. It should be understood that etching includes dry or wet methods.

Referring to fig. 9, a first passivation layer 21 is deposited on the first LED unit 20 and the first bonding layer 100, then a first opening 210 is provided at a position of the first passivation layer 21 corresponding to the second doping type semiconductor layer 202 of the first LED unit 20, and then a first electrode layer 22 is provided at an upper portion of the driving panel, and the first electrode layer 22 electrically connects the second doping type semiconductor layer 202 of the first LED unit 20 with the corresponding first contact 101 through the first opening 210 at an outer portion of the passivation layer; then, a first protective layer 23 is formed on the surfaces of the first passivation layer 21 and the first electrode layer 22, and the etch stopper 407 may include an etch stopper on the upper portion of the first passivation layer 21 and an etch stopper on the upper portion of the first electrode layer 22.

Referring to fig. 10, a first planarization layer 30 may be formed on upper portions of the plurality of first LED units 20, and a material of the first planarization layer 30 may include, for example, an organic resin, an organic black matrix photoresist, a color filter photoresist, polyimide, and the like; the first planarization layer 30 is subjected to photolithography or etching to form a plurality of first through holes 301. The plurality of first through holes 301 may be disposed around the plurality of first LED units 20, respectively, with a recessed region formed between the first LED units 20 and the corresponding grid holes. It should be understood that the plurality of first through holes are disposed in one-to-one correspondence with the plurality of first LED units so that the emitted light can exit through the grid holes. The first via 301 may be formed using dry etching, and the first via 301 exposes the first protective layer 23. Since the first protective layer 23 covers the upper portion of the LED and the upper portion of the first electrode layer 22, damage to the first LED unit can be prevented during etching of the grid holes.

Referring to fig. 11, in order to enhance the reflection effect of the light emitted from the first LED unit 20, a reflective layer 90 may be formed on the sidewall of the first via 301, and the reflective layer 90 may be deposited on the sidewall of the first via 301 by atomic layer deposition ALD, chemical vapor deposition CVD, evaporation, sputtering, or the like.

Referring to fig. 12, a filling layer 80 is formed on the first planarization layer, and it may be understood that the filling of the portion of the first filling unit 801 in the first through hole 301 is achieved, for example, by shielding the remaining area by a mask layer. The mask layer is removed and then the fill layer 80 is developed with a developer. Since only the area of the first filling unit 801 is light-cured, the remaining portion is removed by the developer, so that a plurality of first filling units 801 can be formed. The first filling unit 801 fills at least part or all of the first through holes 301.

Referring to fig. 13-17, the second LED unit 40 is continuously fabricated on the first planarization layer 30, and the specific fabrication method is not described herein again with reference to the first LED unit 20, but it should be noted that after the second planarization layer 50 is formed, a fourth via 502 needs to be formed at a position corresponding to the first via 301, and the fourth via 502 isolates the second bonding layer 200, the second passivation layer 41 and the second protection layer 43 from the first via 301, so that a short circuit caused by contact between the reflective layer 90 and the second bonding layer 200 is avoided; and a second through hole 501 is formed at a position corresponding to the second LED unit 40, and the fourth through hole 502 is filled with the first filling unit 801, and the second through hole 501 is filled with the second filling unit 802, so that the front projection of any one of the first LED unit 20 and the second LED unit 40 on the driving panel 10 is not overlapped.

Referring to fig. 18, the preparation of the third LED unit 60 on the second planarization layer 50 is continued, and the specific preparation method is not described herein again with reference to the first LED unit 20, but it should be noted that after the third planarization layer 70 is formed, a fifth through hole 702 needs to be formed at a position corresponding to the fourth through hole 502, a sixth through hole 703 needs to be formed at a position corresponding to the second through hole 501, and a third through hole 701 is formed at a position corresponding to the third LED unit 60, and the fifth through hole 702, the sixth through hole 703 needs to partition the third bonding layer 300, the third passivation layer 61 and the third protection layer 63 so as to avoid a short circuit of the reflective layer 90; and the fifth through hole 702 is filled with the first filling unit 801, the sixth through hole 703 is filled with the second filling unit 802, and the third through hole 701 is filled with the third filling unit 803, so that the orthographic projections of any one of the first LED unit 20, the second LED unit 40, and the third LED unit 60 on the drive panel 10 do not overlap.

Referring to fig. 2, finally, a microlens array 700 is disposed on the third planarization layer 70, the microlens array 700 includes a plurality of microlens units 800, and the microlens units 800 cover at least one of the first concave region 400, the second concave region 500, and the third concave region 600, resulting in a micro led micro display chip.

It should be noted that, in the embodiments of the present application, the sequence of steps of the method for manufacturing the micro led micro display chip is not specifically limited.

In the embodiments of the manufacturing method, only the manufacturing flow or steps are described, and the structure, shape, materials, etc. of the device that are not described can be referred to the embodiments of the micro led micro display chip described above, and are not described herein again.

The resulting micro led micro display chip may be used to prepare a display device, which may be, for example, a component or device comprising a micro led micro display chip, such as a micro led micro display chip device comprising an encapsulation layer. The resulting micro led micro display chip may be further used in electronic devices including, but not limited to: display devices such as augmented reality AR display devices, virtual reality VR display devices, near-to-eye display NED, head up display HUD devices, and the like.

In the foregoing embodiments, the descriptions of the embodiments are emphasized, and for parts of one embodiment that are not described in detail, reference may be made to related descriptions of other embodiments.

The foregoing has described the invention in some detail, wherein specific examples are employed to illustrate the principles and embodiments of the invention, and the above examples are provided to facilitate understanding of the technical solution and core idea of the invention; those of ordinary skill in the art will appreciate that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the invention.

Claims

Micro LED micro display chip, its characterized in that includes:

a drive panel including a plurality of first contacts;

at least two light emitting layers including a first light emitting layer and a second light emitting layer;

the first light-emitting layer is arranged on the driving panel; the first light-emitting layer comprises a plurality of first LED units, the first LED units are arranged on the driving panel, and the first LED units are used for emitting first color light;

the second light-emitting layer is arranged above the first light-emitting layer, and comprises a plurality of second LED units which are arranged in an array manner and used for emitting second color light;

the at least two light-emitting layers further comprise a third light-emitting layer arranged above the second light-emitting layer; the third light-emitting layer comprises a plurality of third LED units which are arranged in an array manner, and the third LED units are used for emitting third color light;

wherein the front projection of the third LED unit in one full-color pixel unit and any one of the first LED unit and the second LED unit on the driving panel is not overlapped; the second doped semiconductor layer of the third LED unit, the second doped semiconductor layer of at least one adjacent first LED unit and the second doped semiconductor layer of at least one adjacent second LED unit in one full-color pixel unit all share one first contact and are electrically connected with the first contact; the first LED unit, the second LED unit, and the third LED unit can be individually driven by the driving panel by time sharing, respectively.
2. The micro LED micro display chip of claim 1, wherein at least one of the first LED unit, at least one of the second LED unit, and at least one of the third LED unit form one full color pixel unit of the micro LED micro display chip.
3. The micro led micro display chip of claim 2, further comprising:

a first planarization layer located between the first light-emitting layer and the second light-emitting layer; the first planarization layer transmits the first color light;

a second planarization layer located between the second light-emitting layer and the third light-emitting layer; the second planarization layer transmits the first color light and the second color light; a plurality of third LED units are arranged on the second planarization layer;

a third planarization layer disposed on the third light-emitting layer; the third planarization layer transmits the first color light, the second color light, and the third color light.
4. The micro led micro display chip as set forth in claim 3, further comprising:

a first bonding layer between the driving panel and the first LED unit; the driving panel further comprises a first common contact, and the first doping type semiconductor layer of the first LED unit is connected with the corresponding first common contact;

A second bonding layer located between the first planarization layer and the second LED unit; the driving panel further comprises a second common contact, and the first doping type semiconductor layer of the second LED unit is connected with the corresponding second common contact;

a third bonding layer located between the second planarization layer and the third LED unit; the driving panel further includes a third common contact, and the first doping type semiconductor layer of the third LED unit is connected with the corresponding third common contact.
5. The micro led micro-display chip of claim 4, wherein,

the second bonding layer is provided with a first opening at a position corresponding to the first LED unit;

the third bonding layer is provided with a second open hole at a position corresponding to the first LED unit; the third bonding layer is provided with a third opening at a position corresponding to the second LED unit.
6. The micro led micro-display chip of claim 5, wherein,

the first planarization layer is provided with a plurality of first through holes, the plurality of first through holes are respectively arranged around the first LED units, and the first color light is emitted through the first through holes;

the second planarization layer is provided with a plurality of second through holes, the second through holes are respectively arranged around the second LED units, and the second color light is emitted through the second through holes;

The third planarization layer is provided with a plurality of third through holes, the third through holes are respectively arranged around the third LED units, and the third color light is emitted through the third through holes;

the second planarization layer is further provided with a plurality of fourth through holes, and the fourth through holes are arranged relative to the first through holes; the third planarization layer is further provided with a plurality of fifth through holes, and the fifth through holes are arranged relative to the fourth through holes; the first through hole, the fourth through hole and the fifth through hole are sequentially communicated, and a first concave area is formed between the first through hole, the fourth through hole and the fifth through hole and the first LED unit;

the third planarization layer further has a plurality of sixth through holes, the sixth through holes being disposed opposite to the second through holes; the sixth through hole is communicated with the second through hole, and a second concave area is formed between the sixth through hole and the second LED unit;

and a third concave region is formed between the third through hole and the third LED unit.
7. The micro led micro-display chip of claim 6, further comprising:

the filling layer comprises a first filling unit, a second filling unit and a third filling unit; the first filling unit fills the first concave region, the second filling unit fills the second concave region, and the third filling unit fills the third concave region.
8. The micro led micro-display chip of claim 6, further comprising:

the reflecting layer is arranged on the side wall of any one of the first concave area, the second concave area and the third concave area; or alternatively

The reflecting layer is arranged on the side wall of at least one of the first through hole, the second through hole, the third through hole, the fourth through hole, the fifth through hole and the sixth through hole.
9. The micro led micro display chip of claim 1, further comprising:

the micro lens array comprises a plurality of micro lens units, and the micro lens units are arranged above at least one of the first LED units and the second LED units.
10. The micro led micro display chip as set forth in claim 3, wherein the first light emitting layer further includes a first passivation layer and a first electrode layer; the first passivation layer covers the first LED unit, and has a first opening exposing the second doping type semiconductor layer of the first LED unit; the first electrode layer electrically connects the second doped semiconductor layer of the corresponding first LED unit with the corresponding first contact through the first opening;

The second light emitting layer further includes a second passivation layer covering the second LED unit, the second passivation layer having a second opening exposing the second doped semiconductor layer of the second LED unit; the second electrode layer electrically connects the second doped semiconductor layer of the corresponding second LED unit with the corresponding first contact through the second opening;

the third light emitting layer further includes a third passivation layer covering the third LED unit, the third passivation layer having a third opening exposing the second doped semiconductor layer of the third LED unit; the third electrode layer electrically connects the second doped semiconductor layer of the third LED unit with the corresponding first contact through the three openings.
11. The micro led micro display chip as set forth in claim 10, wherein the first light emitting layer further includes a first protective layer covering the first passivation layer and the first electrode layer;

the second light emitting layer further includes a second protective layer covering the second passivation layer and the second electrode layer;

The third light emitting layer further includes a third protective layer covering the third passivation layer and the third electrode layer.
12. The micro led micro-display chip of claim 10, further comprising:

the conductive columns are arranged on the corresponding first contacts and connected with the corresponding first contacts;

the conductive posts are connected with the corresponding first electrode layer, the corresponding second electrode layer and the corresponding third electrode layer.
13. The preparation method of the micro LED micro display chip is characterized by comprising the following steps:

providing a drive panel comprising a plurality of first contacts;

forming a first light emitting layer on the driving panel, wherein the first light emitting layer comprises a plurality of first LED units, the first LED units are arranged on the driving panel and used for emitting first color light;

forming a second light emitting layer above the first light emitting layer, the second light emitting layer comprising a plurality of second LED units arranged in an array, the second LED units being for emitting a second color light;

forming a third light emitting layer above the second light emitting layer, the third light emitting layer comprising a plurality of third LED units arranged in an array, the third LED units being for emitting a third color light;

Wherein the front projection of the third LED unit in one full-color pixel unit and any one of the first LED unit and the second LED unit on the driving panel is not overlapped; the second doped semiconductor layer of the third LED unit, the second doped semiconductor layer of at least one adjacent first LED unit and the second doped semiconductor layer of at least one adjacent second LED unit in one full-color pixel unit all share one first contact and are electrically connected with the first contact; the first LED unit, the second LED unit, and the third LED unit can be individually driven by the driving panel by time sharing, respectively.
14. The method for manufacturing a micro LED micro display chip according to claim 13, wherein,

forming a first planarization layer on the first light emitting layer before forming a second light emitting layer over the first light emitting layer, the first planarization layer transmitting the first color light;

forming a second planarization layer on the second light-emitting layer before forming a third light-emitting layer over the second light-emitting layer, the second planarization layer transmitting both the first color light and the second color light;

After forming a third light emitting layer over the second light emitting layer, a third planarization layer is formed over the third light emitting layer, the third planarization layer transmitting the first color light, the second color light, and the third color light.
15. The method for manufacturing a micro led micro display chip according to claim 14, further comprising:

bonding the driving panel and the first LED unit through a first bonding layer; the driving panel further comprises a first common contact, and the first doping type semiconductor layer of the first LED unit is connected with the corresponding first common contact;

bonding the first planarization layer and the second LED unit through a second bonding layer; the driving panel further comprises a second common contact, and the first doping type semiconductor layer of the second LED unit is connected with the corresponding second common contact;

bonding the second planarization layer and the third LED unit through a third bonding layer; the driving panel further includes a third common contact, and the first doping type semiconductor layer of the third LED unit is connected with the corresponding third common contact.
16. The method for manufacturing a micro led micro display chip according to claim 15, further comprising: forming a first opening exposing the first LED unit at a position of the second bonding layer corresponding to the first LED unit;

And forming a second opening exposing the first LED unit at a position of the third bonding layer corresponding to the first LED unit and forming a third opening exposing the second LED unit at a position of the third bonding layer corresponding to the second LED unit.
17. The method for manufacturing a micro LED micro display chip according to claim 16, wherein,

forming a plurality of first through holes on the first planarization layer, wherein the plurality of first through holes are respectively arranged around the first LED units, and the first color light exits through the first through holes;

forming a plurality of second through holes and a plurality of fourth through holes on the second planarization layer, wherein the second through holes are respectively arranged around the second LED units, the second color light is emitted through the second through holes, and the fourth through holes are arranged relative to the first through holes;

forming a plurality of third through holes through which the third color light exits, a plurality of fifth through holes disposed with respect to the fourth through holes, and a plurality of sixth through holes disposed with respect to the second through holes, on the third planarization layer, the plurality of third through holes being disposed around the third LED unit, respectively;

The first through hole, the fourth through hole and the fifth through hole are sequentially communicated, and a first concave area is formed between the first through hole, the fourth through hole and the fifth through hole and the first LED unit;

the sixth through hole is communicated with the second through hole, and a second concave area is formed between the sixth through hole and the second LED unit;

a third concave region is formed between the third through hole and the third LED unit;

the method further comprises the steps of: forming a filling layer; the filling layer comprises a first filling unit, a second filling unit and a third filling unit; the first filling unit fills the first concave region, the second filling unit fills the second concave region, and the third filling unit fills the third concave region.
18. The method of claim 17, further comprising, prior to forming the fill layer:

forming a reflective layer on the side wall of any one of the first concave region, the second concave region and the third concave region; or alternatively

And forming a reflecting layer on the side wall of at least one of the first through hole, the second through hole, the third through hole, the fourth through hole, the fifth through hole and the sixth through hole.
19. The method of claim 17, further comprising, after forming the fill layer:

and forming a micro lens array, wherein the micro lens array comprises a plurality of micro lens units, and the micro lens units are arranged above at least one of the first LED units, the second LED units and the third LED units.
20. The method for manufacturing a micro LED micro display chip according to claim 16, wherein,

the step of forming a first light emitting layer on the driving panel further includes: forming a plurality of first LED units, a first passivation layer and a first electrode layer, wherein the first passivation layer covers the first LED units and the first bonding layer, the first passivation layer is provided with a first opening exposing the second doped semiconductor layer of the first LED units, and the first electrode layer electrically connects the second doped semiconductor layer of the first LED units with the corresponding first contacts through the first opening;

the step of forming a second light emitting layer on the first planarization layer further includes: forming a plurality of second LED units, a second passivation layer and a second electrode layer, wherein the second passivation layer covers the second LED units and the second bonding layer, the second passivation layer is provided with a second opening exposing a second doping type semiconductor layer of the second LED units, and the second electrode layer electrically connects the second doping type semiconductor layer of the second LED units with the corresponding first contacts through the second opening;

The step of forming a third light emitting layer on the second planarization layer further includes: and forming a plurality of third LED units, a third passivation layer and a third electrode layer, wherein the third passivation layer covers the third LED units and the third bonding layer, the third passivation layer is provided with a third opening exposing the second doped semiconductor layer of the third LED units, and the third electrode layer electrically connects the second doped semiconductor layer of the third LED units with the corresponding first contact through the third opening.
21. The method of claim 20, wherein the step of forming a plurality of the first LED units comprises:

providing a first substrate, wherein a first LED epitaxial layer is arranged on the first substrate, and comprises a first doped semiconductor layer, an active layer and a second doped semiconductor layer which are stacked;

bonding and connecting the driving panel and the first LED epitaxial layer through a first bonding layer;

removing the first substrate and exposing the second doping type semiconductor layer of the first LED epitaxial layer;

etching the first LED epitaxial layer to form a plurality of first LED units;

A step of forming a plurality of the second LED units, comprising:

providing a second substrate, wherein a second LED epitaxial layer is arranged on the second substrate, and comprises a first doped semiconductor layer, an active layer and a second doped semiconductor layer which are stacked;

bonding and connecting the first planarization layer and the second LED epitaxial layer through the second bonding layer;

removing the second substrate and exposing the second doping type semiconductor layer of the second LED epitaxial layer;

etching the second LED epitaxial layer to form a plurality of second LED units;

a step of forming a plurality of the third LED units, comprising:

providing a third substrate, wherein a third LED epitaxial layer is arranged on the third substrate, and comprises a first doped semiconductor layer, an active layer and a second doped semiconductor layer which are stacked;

bonding and connecting the second planarization layer and the third LED epitaxial layer through the third bonding layer;

removing the third substrate and exposing the second doping type semiconductor layer of the third LED epitaxial layer;

and etching the third LED epitaxial layer to form a plurality of third LED units.