CN117347702B - Zero-crossing detection circuit, starting circuit and zero-crossing detection method for Boost circuit - Google Patents
Zero-crossing detection circuit, starting circuit and zero-crossing detection method for Boost circuit Download PDFInfo
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Abstract
The invention relates to the technical field of electronic circuits, and provides a zero-crossing detection circuit, a starting circuit and a zero-crossing detection method for a Boost circuit, wherein the zero-crossing detection circuit comprises: the first zero-crossing detection module is used for sampling whether the current flowing through the first switching tube drops to a first preset value or not and outputting a first zero-crossing detection signal, and when the current flowing through the first switching tube drops to the first preset value, the first zero-crossing detection signal is used for switching the voltage on the control end of the first switching tube of the Boost circuit from a first driving voltage to a second driving voltage; and a second zero-crossing detection module for comparing the voltage of the common node with an input voltage signal of the Boost circuit and outputting a second zero-crossing detection signal indicating zero crossing of the current flowing through the first switching tube when the voltage of the common node drops to the value of the input voltage signal. The zero-crossing detection circuit can improve the accuracy of zero-crossing detection.
Description
Technical Field
The invention relates to the technical field of electronic circuits, in particular to a zero-crossing detection circuit, a starting circuit and a zero-crossing detection method for a Boost circuit.
Background
With the continuous development and progress of wireless sensor networks, smart home, biomedical and other emerging technologies, the collection and utilization of micro-power waste energy have attracted a great deal of attention and importance. Low voltage output collectors for providing the operating voltage of switching converters are typically only capable of providing output voltages of tens of millivolts. The switching converter acts as a bridge between the energy source and the consumer and needs to be kept in normal operation at this very low input voltage.
However, during the start-up phase of the integrated circuit, the actual and theoretical values obtained by the system detection tend to deviate significantly due to the input voltage being too low. For example, in a zero-crossing detection circuit of a system, the obtained zero-crossing detection result often has a larger difference from the actual situation. If the zero-crossing detection is inaccurate, the system efficiency is affected, and the current is out of control, so that the control of the whole system is inaccurate.
Disclosure of Invention
The invention discloses a zero-crossing detection circuit, a starting circuit and a zero-crossing detection method for a Boost circuit, so as to improve the accuracy of zero-crossing detection.
To achieve the above object, according to a first aspect of an embodiment of the present invention, there is provided a zero-crossing detection circuit for a Boost circuit including an inductance element, a first switching tube coupled between the inductance element and an output terminal of the Boost circuit, and a second switching tube coupled between the inductance element and a reference ground, the zero-crossing detection circuit comprising:
the first zero-crossing detection module is used for sampling the current flowing through the first switching tube, judging whether the current flowing through the first switching tube drops to a first preset value or not, outputting a first zero-crossing detection signal, and switching the voltage on the control end of the first switching tube from a first driving voltage to a second driving voltage when the current flowing through the first switching tube drops to the first preset value;
the second zero-crossing detection module is provided with a first input end, a second input end and an output end, wherein the first input end of the second zero-crossing detection module is coupled with the input end of the Boost circuit to receive an input voltage signal, the second input end of the second zero-crossing detection module is coupled with a common node between the first switching tube and the second switching tube, the second zero-crossing detection module is used for comparing the voltage of the common node with the input voltage signal and outputting a second zero-crossing detection signal, and when the voltage of the common node is reduced to the value of the input voltage signal, the second zero-crossing detection signal indicates zero crossing of the current flowing through the first switching tube.
According to a second aspect of an embodiment of the present invention, there is provided a start-up circuit for a Boost circuit, comprising:
a zero crossing detection circuit as claimed in any one of the preceding first aspects for generating a first zero crossing detection signal and a second zero crossing detection signal;
the control circuit comprises an initial module, wherein the initial module generates a starting signal after being enabled, and the control circuit generates a first driving signal and a second driving signal according to the starting signal, a first zero-crossing detection signal and a second zero-crossing detection signal; the first driving signal is used for driving the first switching tube to be turned on and turned off, the second driving signal is used for driving the second switching tube to be turned on and turned off, and the starting signal is used for controlling the second switching tube to be turned off after being turned on for a fixed period of time in a power-on starting stage of the Boost circuit, and the first switching tube is turned on when the second switching tube is turned off.
According to a third aspect of an embodiment of the present invention, there is provided a zero-crossing detection method of a Boost circuit, the Boost circuit including an inductance element, a first switching tube coupled between the inductance element and an output terminal of the Boost circuit, and a second switching tube coupled between the inductance element and a reference ground, the zero-crossing detection method including:
sampling the current flowing through the first switching tube and judging whether the current flowing through the first switching tube drops to a first preset value or not;
when the current flowing through the first switching tube drops to a first preset value, switching the voltage on the control end of the first switching tube from a first driving voltage to a second driving voltage;
comparing the voltage on the common node of the first switching tube and the second switching tube with the input voltage signal of the Boost circuit, and determining the zero crossing of the current flowing through the first switching tube when the voltage of the common node drops to the value of the input voltage signal.
According to the technical scheme, the current flowing through the first switching tube is sampled, whether the current flowing through the first switching tube drops to the first preset value is judged, and when the current flowing through the first switching tube is determined to drop to the first preset value, the voltage on the control end of the first switching tube can be switched from the first driving voltage to the second driving voltage through the first zero-crossing detection signal. Therefore, the working state of the first switching tube can be changed through the second driving voltage, and the change time of the working state is controlled through the first preset value, so that the working state of the first switching tube can be changed on the basis that the current flowing through the inductor is not reduced to zero, and the current backflow at the output end of the Boost circuit is avoided. On the basis, the zero-crossing detection of the inductance current is continued through the second zero-crossing detection module, so that a zero-crossing detection result with higher accuracy is obtained.
Additional features and advantages of the invention will be set forth in the detailed description which follows.
Drawings
The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification, illustrate the invention and together with the description serve to explain, without limitation, the invention. In the drawings:
fig. 1 is a schematic diagram illustrating a zero crossing detection circuit for a Boost circuit, according to an example embodiment.
Fig. 2 is a schematic diagram showing inductor current variations and voltage variations at a common node in a Boost circuit, according to an example embodiment.
FIG. 3 is a schematic diagram illustrating a startup circuit for a Boost circuit, according to an example embodiment.
Fig. 4 is a schematic diagram of a first logic driving circuit, according to an example embodiment.
Fig. 5 is a flow chart illustrating a zero crossing detection method for a Boost circuit, according to an exemplary embodiment.
Detailed Description
The following describes specific embodiments of the present invention in detail with reference to the drawings. It should be understood that the detailed description and specific examples, while indicating and illustrating the invention, are not intended to limit the invention.
For control of related systems such as a Boost system, the related art provides a zero-crossing detection circuit applied to a Boost circuit. The Boost circuit at least comprises an inductance element, a first switching tube and a second switching tube. In the topology of the Boost circuit, a first switching tube is coupled between the inductive element and the output of the Boost circuit, and a second switching tube is coupled between the inductive element and the reference ground.
In a specific implementation, the first switching tube is turned off, the second switching tube is turned on, so that the inductance element stores energy, and after the inductance element stores certain energy, the inductance element is gradually discharged by turning on the first switching tube and turning off the second switching tube, so that the output voltage is increased. After the inductive element discharge is completed, the current of the inductive element crosses zero. Therefore, the turn-off of the first switching tube and the turn-on of the second switching tube can be controlled according to the zero-crossing detection result of the current of the inductance element, so that the inductance element stores energy for subsequent voltage rising.
During boost, zero crossing detection of the current to the inductive element affects system efficiency and boost control.
In the existing zero-crossing detection mode, a sampling tube connected in parallel with the first switching tube is often used to sample the current of the inductance element, and the value of the sampled current is compared with the value of an internal reference current source, wherein the value of the internal reference current source is taken as a zero-crossing reference value, the value of the internal reference current source is slightly larger than zero, and when the value of the sampled current drops to the value of the internal reference current source, the current flowing through the inductance element can be considered to be zero-crossing. In this way, the accuracy of detection of whether the current flowing through the first switching tube crosses zero is correlated with the accuracy of the reference current source inside the circuit.
When the power supply voltage of the Boost circuit is too low, namely, the low voltage is input, particularly in the starting stage of the ultra-low voltage Boost circuit, the reference current source in the circuit is generated by the input voltage, so that the value of the reference current source is greatly influenced by the ultra-low input voltage, and the zero crossing detection result in the mode is inaccurate. Due to inaccurate zero-crossing detection results, current at the output end of the Boost circuit may flow back to the inductive element, and the inductance current increases the risk of losing control.
In view of the above, the embodiment of the invention provides a zero-crossing detection circuit, a starting circuit and a zero-crossing detection method for a Boost circuit. By sampling the current flowing through the first switching tube (i.e., inductor current) in the Boost circuit, it is determined whether the current flowing through the first switching tube drops to a first preset value. When the current flowing through the first switching tube is determined to be reduced to a first preset value, the voltage on the control end of the first switching tube is switched from the first driving voltage to the second driving voltage, so that the working state of the first switching tube is changed. The first preset value is larger than a zero-crossing reference value in the prior art, so that the working state of the first switching tube can be changed before the current flowing through the inductor is reduced to zero even if an internal reference current source generating the first preset value is inaccurate, and the current backflow at the output end of the Boost circuit is avoided. On the basis, the zero-crossing detection of the inductance current is continuously carried out through the second comparators coupled at the two ends of the inductance element, so that a zero-crossing detection result with higher accuracy is obtained.
Fig. 1 is a schematic diagram illustrating a zero crossing detection circuit for a Boost circuit, according to an example embodiment. As shown in fig. 1, the Boost circuit may include an inductive element 102, a first switching tube 104, and a second switching tube 106, the first switching tube 104 being coupled between the inductive element 102 and an output of the Boost circuit, the second switching tube 106 being coupled between the inductive element 102 and a reference ground. The Boost circuit may further include a capacitor as shown in fig. 1, and the manner and function of the capacitor may refer to the related art, which is not specifically limited in the present invention.
The zero-crossing detection circuit provided by the embodiment of the invention may include a first zero-crossing detection module 110 and a second zero-crossing detection module 120.
The first zero-crossing detection module 110 is configured to sample the current flowing through the first switching tube 104, and is configured to determine whether the current flowing through the first switching tube 104 drops to a first preset value, and output a first zero-crossing detection signal ZCD1, where the first zero-crossing detection signal ZCD1 is configured to switch the voltage on the control terminal of the first switching tube 104 from the first driving voltage Vlow to the second driving voltage Vmax when the current flowing through the first switching tube 104 drops to the first preset value.
In the embodiment shown in fig. 1, a first end of the first switching tube 104 is coupled to the inductance element 102, and a second end of the first switching tube 104 is coupled to an output end of the Boost circuit. On this basis, the first zero-crossing detection module 110 is illustrated as comprising: sampling tube 112, first comparator 114, resistor 116, and current source 118.
Wherein a first end of the sampling tube 112 is coupled to a first end of the first switching tube 104. Resistor 116 is coupled between the second end of first switching tube 104 and the second end of sampling tube 112. A first input terminal of the first comparator 114 is coupled between the second terminal of the first switching tube 104 and the output terminal of the Boost circuit, a second input terminal of the first comparator is coupled to the second terminal of the sampling tube 112, and an output terminal of the first comparator outputs the first zero crossing detection signal ZCD1. A first terminal of current source 118 is coupled to a second terminal of sampling tube 112 and a second terminal of the current source is coupled to ground.
In the embodiment shown in fig. 1, the on-resistance of the sampling tube 112 is K times that of the first switching tube 104, and when the first switching tube 104 is turned on, the current flowing through the first switching tube 104 is equal to the inductor current IL. From the circuit shown in fig. 1, it is possible to infer: when the inductance current IL > k·i1, the inverting input terminal voltage of the first comparator 114 is greater than the non-inverting input terminal voltage; when IL < k·i1, the non-inverting input voltage of the first comparator 114 is greater than the inverting input voltage. Where I1 is the value of current source 118. That is, when the current flowing through the first switching tube 104 drops to k·i1, the logic state of the first zero-crossing detection signal ZCD1 changes, indicating that the current flowing through the first switching tube 104 drops to a first preset value. At this time, k·i1 is the first preset value. On this basis, the value K or I1 can be selected to be set to a higher first preset value, so that the operating state of the first switching tube 104 can be changed before the current through the inductor 102 decreases to zero, even in the event of inaccuracy of the internal reference current source 118.
The second zero-crossing detection module 120 has a first input terminal, a second input terminal and an output terminal, the first input terminal of the second zero-crossing detection module 120 is coupled to the input terminal of the Boost circuit to receive the input voltage signal Vin, the second input terminal of the second zero-crossing detection module 120 is coupled to the common node SW between the first switch tube 104 and the second switch tube 106, the second zero-crossing detection module 120 is configured to compare the voltage of the common node SW with the input voltage signal Vin and output a second zero-crossing detection signal ZCD2, and when the voltage of the common node drops to the value of the input voltage signal Vin, the logic state of the second zero-crossing detection signal ZCD2 changes to indicate zero crossing of the current flowing through the first switch tube 104.
In the embodiment shown in fig. 1, the second zero crossing detection module 120 is illustrated as including a second comparator 122, the non-inverting input of the second comparator 122 being the first input of the second zero crossing detection module 120, and the inverting input of the second comparator 122 being the second input of the second zero crossing detection module 120. After the adaptation of the embodiment of the present invention, the inverting input terminal of the second comparator 122 may also be the first input terminal of the second zero-crossing detection module 120, and the non-inverting input terminal of the second comparator 122 may also be the second input terminal of the second zero-crossing detection module 120. Similarly, the non-inverting and inverting inputs of the comparators in the figures shown in the various embodiments of the invention are not fixedly arranged but may be adapted according to the specific implementation.
In the embodiment shown in fig. 1, the first switching tube 104 and the sampling tube 112 are illustrated as P-type Metal-Oxide-semiconductor field effect transistors (MOSFETs) and the second switching tube 106 is illustrated as an N-type MOSFET. It is to be understood that the illustrations herein are merely illustrative and that the first switching tube 104, the sampling tube 112, and the second switching tube 106 may not be limited to MOSFETs, but may include any other suitable semiconductor switching devices.
In one embodiment, the first zero crossing detection signal ZCD1 and the second zero crossing detection signal ZCD2 may include high and low logic level signals, whereby whether the current flowing through the first switching tube 104 reaches a first preset value may be indicated according to a change of the first zero crossing detection signal ZCD1 and the current flowing through the first switching tube 104 may be zero-crossed according to a change of the second zero crossing detection signal ZCD2. Wherein the change in signal may include a change from a high level signal to a low level signal and a change from a low level signal to a high level signal. The first driving voltage Vlow and the second driving voltage Vmax may be applied to the gate of the first switching tube 104 as the gate voltage of the first switching tube 104.
It is further understood that the first logic driving module illustrated in fig. 1 may be configured to generate the first driving signal HS-drv for turning on and off the first switching transistor 104 according to a change in the logic state of the first zero crossing detection signal ZCD1. The second logic driving module may be configured to generate a second driving signal LS-drv for turning on and off the second switching transistor 106 according to a change in a logic state of the second zero crossing detection signal ZCD2.
The first driving signal HS-drv, the second driving signal LS-drv and the third driving signal HS-drv' shown in fig. 1 are respectively used for driving on and off of the corresponding switching tube. Each driving signal may include two driving voltages, and when the driving voltages change, the operating state of the switching tube changes. For example, the first driving signal HS-drv driving the first switching transistor 104 has a first driving voltage Vlow and a second driving voltage Vmax. In one embodiment, the first zero crossing detection signal ZCD1 is used to switch the voltage on the control terminal of the first switching tube 104 (i.e. the value of the first driving signal HS-drv) from the first driving voltage Vlow to the second driving voltage Vmax. The first driving signal HS-drv may be used to drive the first switching transistor 104 on and off according to the variation of the first zero crossing detection signal ZCD1. The second driving signal LS-drv may be used to drive the second switching transistor 106 on and off according to the change of the second zero crossing detection signal ZCD2. The third driving signal HS-drv' drives the on and off of the sampling tube 112. In one possible implementation, the third drive signal HS-drv' may be set to the same signal as the variation of the first drive signal HS-drv, such that the sampling tube 112 is on when the first switching tube 104 is on and off when the first switching tube 104 is off. In other embodiments, the third driving signal HS-drv' may also be set as a delayed signal of the first driving signal HS-drv.
For example, referring to the boosting process shown in the above related art, the first driving signal HS-drv for turning off the first switching tube 104 may be generated when the first zero crossing detection signal ZCD1 characterizes that the current flowing through the first switching tube 104 falls to the first preset value, and the second driving signal LS-drv for turning on the second switching tube 106 may be generated when the second zero crossing detection signal ZCD2 characterizes that the current flowing through the first switching tube 104 crosses zero, whereby more precise current zero crossing control may be achieved.
In the embodiment disclosed in the present invention, when the current of the first switching tube 104 drops to the first preset value, the first zero-crossing detection signal ZCD1 switches the voltage on the control terminal of the first switching tube 104 from the first driving voltage Vlow to the second driving voltage Vmax, and in the case that the first switching tube 104 includes a PMOS tube, the first driving voltage Vlow is smaller than the second driving voltage Vmax. Thus, the first driving voltage Vlow is used to turn on the first switching tube 104, and the second driving voltage Vmax is used to turn off the first switching tube 104.
It should be noted that when the voltage on the control terminal of the first switching tube 104 is switched from the first driving voltage Vlow to the second driving voltage Vmax, the first switching tube 104 is not turned off, but is switched from the linear region to the saturation region for operation because the inductor current IL does not drop to zero. In this case, the gate-source voltage VGS of the first switching transistor 104 decreases as the current of the inductance element 102 decreases. After that, when the gate-source voltage VGS of the first switching tube 104 drops to its own turn-on threshold voltage VTH, the first switching tube 104 enters the turn-off region to turn off. Wherein the gate-source voltage refers to the voltage between the gate and the source of the switching tube, and the on threshold voltage refers to the threshold voltage of the on switching tube.
It will be appreciated that in this embodiment of the present invention, the first switching tube 104 is turned on when the voltage on the control terminal thereof is the first driving voltage Vlow, and turned off when the voltage on the control terminal thereof is the second driving voltage Vmax and the current flowing through the first switching tube 104 is zero.
Fig. 2 is a schematic diagram showing a change in inductor current IL and voltage Vsw of common node SW in a Boost circuit according to an exemplary embodiment. As shown in fig. 2, in each operation cycle of the Boost circuit, the inductor current IL and the voltage Vsw of the common node SW thereof may vary as follows.
Stage I (t 0-t 1): during the duration of the period i, the first switching tube 104 is turned off and the second switching tube 106 is turned on, so that the inductance element 102 stores energy, the inductance current IL gradually increases, and the voltage is basically unchanged. The preset time period is an energy storage time period of the inductance element 102, and may be set according to practical situations, which is not particularly limited in the present invention. In one embodiment, the predetermined duration is a fixed duration during which the startup circuit controls the second switching tube 106 to conduct during the system power-on startup phase, independent of the feedback signal.
Stage II (t 1-t 2): the first switching tube 104 is turned on, and the second switching tube 106 is turned off, so that the energy storage of the inductance element 102 is completed. In this case, the inductance element 102 gradually discharges to achieve a rise in the output voltage. During the discharging of the inductive element 102, the inductive current IL gradually decreases and the Vsw voltage is substantially equal to the output voltage of the Boost circuit, i.e. Vout as shown in fig. 2. When the inductor current IL decreases to a first preset value, the logic state of the first zero-crossing detection signal ZCD1 output by the first comparator 114 changes, so as to switch the voltage at the control terminal of the first switching tube 104 from the first driving voltage Vlow to the second driving voltage Vmax. Since the current IL flowing through the inductance element 102 does not cross zero at this time, when the voltage at the control terminal of the first switching tube 104 is switched to the second driving voltage Vmax, the first switching tube 104 does not immediately enter the cut-off region to be turned off, but enters the saturation region from the linear region to be operated. On this basis, the voltage Vsw is pulled up by the first switching tube 104 as the sum of the gate voltage Vmax and the gate-source voltage VGS of the first switching tube 104, i.e., vmax+vgs shown in fig. 2.
Stage III (t 2-t 3): the first switching tube 104 operates in the saturation region, and the second switching tube 106 is turned off, so that the inductive element 102 continues to discharge. In this case, as the current of the inductance element 102 continues to decrease, the voltage Vsw also continues to decrease after pulling up through the first switching tube 104. When the voltage Vsw drops to the gate voltage Vmax of the first switching transistor 104 and its own on threshold voltage VTH (time t 3), that is, vmax+vth shown in fig. 2, the first switching transistor 104 enters the off region to turn off. At this time, the inductor current IL is zero, and the voltage Vsw is reduced from vmax+vth to the input voltage Vin of the Boost circuit. Accordingly, the logic state of the second zero crossing detection signal ZCD2 output by the second comparator 122 changes, and thus can be used to indicate zero crossing of the inductor current IL, i.e. to indicate zero crossing of the current flowing through the first switching tube 104. Therefore, in the embodiment of the invention, the zero current point of the inductor can be accurately obtained by detecting the voltage of the SW point for the second time after the first current detection.
Furthermore, when the inductor current IL crosses zero, the voltage Vsw drops from vmax+vth to Vin, the voltage Vsw having a sudden drop range [ Vin, vmax+vth ]. On this basis, in consideration of subthreshold current, offset voltage offset of the comparator and other error factors affecting the zero-crossing detection result in the implementation process, the embodiment of the invention further proposes that a comparison offset value can be set for the second comparator 122, so that the current zero-crossing reference voltage of the second comparator 122 changes from the input voltage Vin to the sum of the input voltage Vin and the comparison offset value. The sum of the input voltage Vin and the comparison offset value is set to be the intermediate value of the dip range [ Vin, vmax+vth ], so that even if the error value exists in the comparison of the second zero-crossing detection module 120, the reference voltage (the sum of the input voltage Vin and the comparison offset value) of the second comparator 122 can still be located in the dip range [ Vin, vmax+vth ] after the error value is added or subtracted, and the accuracy of the judgment result is ensured.
In a specific implementation, the comparison offset value may be set according to experience of an implementer, for example, to 200mV, or according to respective errors actually measured, which is not particularly limited by the present invention.
Stage IV (t 3-t 4): the first switching tube 104 is turned off into the dead zone and the second switching tube 106 is also turned off, and the system enters dead time. At this time, the inductor current IL is zero and the voltage Vsw remains equal to the input voltage Vin.
In an embodiment, the second driving voltage Vmax may be configured as the output voltage Vout of the Boost circuit. In this way, when the inductor current IL is determined to drop to the first preset value and the gate of the first switching tube 104 receives the second driving voltage Vmax, the voltage value of the voltage Vsw at the point of the common node SW pulled up by the first switching tube 104 is at least greater than the output voltage Vout of the Boost circuit, so as to avoid that the current at the output end of the Boost circuit flows back through the first switching tube 104 to affect the detection result.
In another embodiment, since there may be a case where the input voltage signal is greater than the output voltage signal during the power-on start-up phase of the Boost circuit, the second driving voltage Vmax may also be configured to be a larger value between the input voltage signal Vin of the Boost circuit and the output voltage signal Vout of the Boost circuit. In one embodiment, the magnitude between the input voltage signal Vin and the output voltage signal Vout may be determined by a voltage selection circuit, and then a larger value may be selected.
FIG. 3 is a schematic diagram illustrating a startup circuit for a Boost circuit, according to an example embodiment. On the basis of the above embodiment, the embodiment of the present invention further provides a start-up circuit for a Boost circuit, as shown in fig. 3, where the start-up circuit may include:
the zero-crossing detection circuit for Boost circuit described in any of the above embodiments is configured to generate the first zero-crossing detection signal ZCD1 and the second zero-crossing detection signal ZCD2.
A control circuit 310, the control circuit 310 comprising an initial module 312, the initial module 312 generating a start signal ST-on after being enabled, the control circuit 310 generating a first driving signal HS-drv and a second driving signal LS-drv according to the start signal ST-on, the first zero-crossing detection signal ZCD1 and the second zero-crossing detection signal ZCD 2; the first driving signal HS-drv is used to drive the first switching tube 104 to turn on and off, the second driving signal LS-drv is used to drive the second switching tube 106 to turn on and off, and the start signal ST-on is used to control the second switching tube 106 to turn on for a fixed period of time (for example, the period t0-t1 in the waveform diagram shown in fig. 2) in the power-on start stage of the Boost circuit, and turn off the first switching tube 104 when the second switching tube 106 is turned off.
It should be noted that the operation of the Boost circuit may include a power-on start-up phase, and one working cycle of the power-on start-up phase may include phases i to iv shown in fig. 2. For a fixed duration of time that the second switching tube 106 is on in phase i, the timing may be achieved by setting a timing circuit or otherwise in the initial block 312.
With continued reference to the example of fig. 3, the control circuit 310 may further include:
the first logic driving circuit 314 receives the first zero-crossing detection signal ZCD1 and the start signal ST-on, and generates a first driving signal HS-drv according to the first zero-crossing detection signal ZCD1 and the start signal ST-on;
the second logic driving circuit 316 receives the second zero-crossing detection signal ZCD2 and the start signal ST-on and generates the second driving signal LS-drv according to the second zero-crossing detection signal ZCD2 and the start signal ST-on.
The first logic driving circuit 314 may be used as the first logic driving module illustrated in fig. 1, and the second logic driving circuit 316 may be used as the second logic driving module illustrated in fig. 1, for the zero crossing detection according to the embodiment of the present invention. Note that in this embodiment, the first driving voltage Vlow and the second driving voltage Vmax are also included in the first logic driving circuit 314, but not shown. The voltage value of the first driving signal HS-drv is switched between the first driving voltage Vlow and the second driving voltage Vmax according to the change of the logic states of the first zero-crossing detection signal ZCD1 and the start signal ST-on.
In connection with the example of fig. 2, in one working cycle, the start signal ST-on controls the second driving signal LS-drv to turn on the second switching tube 106 for a fixed period of time and then turn off, and controls the first driving signal HS-drv to turn on the first switching tube 104 while the second switching tube 106 is turned off. After that, when the inductor current IL drops to a first preset value, the first zero-crossing detection signal ZCD1 controls the first driving signal HS-drv, i.e. switches the voltage at the control terminal of the first switching tube 104 from the first driving voltage Vlow to the second driving voltage Vmax. Since the current IL flowing through the inductance element 102 does not cross zero at this time, the voltage at the SW point continues to decrease as the inductance current IL decreases. When the voltage drop at the SW point is equal to the input voltage Vin, the second zero-crossing detection signal ZCD2 controls the second driving signal LS-drv to turn on the second switching transistor 106 again.
It will thus be appreciated that the control circuit 310 generates the respective first drive signal HS-drv in dependence on the start signal ST-on and the first zero crossing detection signal ZCD1 and the respective second drive signal LS-drv in dependence on the start signal ST-on and the second zero crossing detection signal ZCD2 at different stages.
In one possible implementation, the first logic driving circuit 314 may include a voltage selection circuit, which may be used to implement voltage selection logic for the input voltage signal Vin and the output voltage signal Vout to produce a larger value therebetween as the second driving voltage Vmax. Fig. 4 is a schematic diagram of a first logic driving circuit 314, according to an example embodiment.
As shown in fig. 4, the first logic driving circuit 314 may further include a voltage selection circuit 320, a logic circuit 322, and a driving module 324.
The voltage selection circuit 320 receives the input voltage signal Vin and the output voltage signal Vout of the Boost circuit, and selects the larger one of the input voltage signal Vin and the output voltage signal Vout to be output as the second driving voltage Vmax.
The logic circuit 322 receives the first zero-crossing detection signal ZCD1 and the start signal ST-on, and performs a logic operation on the first zero-crossing detection signal ZCD1 and the start signal ST-on to output a first logic signal.
The driving module 324 receives the first driving voltage Vlow, the second driving voltage Vmax and the first logic signal, and generates a first driving signal HS-drv, wherein the value of the first driving signal HS-drv is switched between the first driving voltage Vlow and the second driving voltage Vmax according to the change of the logic state of the first logic signal.
The voltage selection circuit 320 may be configured with a first input terminal, a second input terminal, and an output terminal. The first input terminal of the voltage selection circuit 320 is coupled to the input terminal of the Boost circuit to receive the input voltage signal Vin, the second input terminal of the voltage selection circuit 320 is coupled to the output terminal of the Boost circuit to receive the output voltage signal Vout, and the output terminal of the voltage selection circuit 320 is coupled to the input terminal of the driving module 324.
Continuing with the example of fig. 4, the voltage selection circuit 320 may include a third comparator 3201, a first inverter 3202, a second inverter 3203, a third switching tube 3204, and a fourth switching tube 3205.
The first end of the third switching tube 3204 may be used as the first input end of the voltage selection circuit 320, the first end of the fourth switching tube 3205 may be used as the second input end of the voltage selection circuit 320, the second end of the third switching tube 3204 is coupled to the second end of the fourth switching tube 3205, and the output end of the voltage selection circuit 320 is between the second end of the third switching tube 3204 and the second end of the fourth switching tube 3205.
The third switching tube 3204 and the fourth switching tube 3205 may include NMOS tubes illustrated in fig. 4, and after the adaptation of the embodiments disclosed herein, the third switching tube 3204 may also include PMOS tubes. The driving module 324 is configured to output the first driving voltage Vlow or the second driving voltage Vmax according to a change of the logic state of the received first logic signal. In one embodiment, the drive module 324 may comprise a single pole double throw switch.
In a specific implementation, the third comparator 3201 may compare the magnitudes of the input voltage signal and the output voltage signal of the Boost circuit, and in combination with the first inverter 3202, the second inverter 3203, the third switching tube 3204, and the fourth switching tube 3205, output one of the input voltage signal Vin and the output voltage signal Vout of the Boost circuit with a larger voltage value as the second driving voltage Vmax to the driving module 324. On this basis, switching between the first driving voltage Vlow and the second driving voltage Vmax according to a change of the logic state of the first logic signal can be achieved by the driving module 324.
Through the above technical solution, the current flowing through the first switching tube 104 in the Boost circuit is sampled, and it is determined whether the current flowing through the first switching tube 104 drops to the first preset value. When it is determined that the current flowing through the first switching tube 104 decreases to a first preset value, the voltage at the control terminal of the first switching tube 104 is switched from the first driving voltage Vlow to the second driving voltage Vmax, thereby changing the operation state of the first switching tube 104. The first preset value is larger than the zero-crossing reference value in the prior art, so as to ensure that the working state of the first switching tube 104 can be changed before the current flowing through the inductor is reduced to zero even if the internal reference current source generating the first preset value is inaccurate, so as to avoid the current backflow at the output end of the Boost circuit. On this basis, the zero-crossing detection of the inductor current is further performed by the second comparator 122 coupled to the two ends of the inductor element 102, so as to obtain a zero-crossing detection result with higher accuracy.
It is worth to describe that, on the basis of starting the zero-crossing detection circuit for the Boost circuit by the starting circuit in the above technical scheme, the zero-crossing judgment can be performed by the third zero-crossing detection module constructed in advance, and the feedback control loop is introduced to perform the Boost control in the non-starting stage. Wherein the third zero crossing detection module may be similar to the first zero crossing detection module 110 and have different zero crossing thresholds.
Based on the same conception, the embodiment of the invention also provides a zero crossing detection method for the Boost circuit. The Boost circuit may refer to the description of the foregoing embodiments, and will not be described herein.
Fig. 5 is a flow chart illustrating a zero crossing detection method for a Boost circuit, according to an exemplary embodiment. As shown in fig. 5, the zero-crossing detection method may include:
s501, sampling the current flowing through the first switching tube and judging whether the current flowing through the first switching tube drops to a first preset value or not;
s502, when the current flowing through the first switching tube drops to a first preset value, switching the voltage on the control end of the first switching tube from a first driving voltage to a second driving voltage;
s503, comparing the voltage on the common node of the first switching tube and the second switching tube with the input voltage signal of the Boost circuit, and determining that the current flowing through the first switching tube crosses zero when the voltage of the common node is reduced to the value of the input voltage signal.
In an embodiment, the first switching tube includes a PMOS tube, and the first driving voltage is smaller than the second driving voltage.
In an embodiment, the second driving voltage is the output voltage signal of the Boost circuit, or is a larger value between the input voltage signal and the output voltage signal of the Boost circuit.
In an embodiment, when the voltage at the control end of the first switching tube is the first driving voltage, the first switching tube is turned on; when the voltage on the control end of the first switching tube is the second driving voltage and the current flowing through the first switching tube is zero, the first switching tube is turned off.
In one embodiment, comparing a voltage on a common node of the first and second switching transistors with an input voltage signal of a Boost circuit, determining a zero crossing of a current flowing through the first switching transistor when the voltage on the common node drops to a value of the input voltage signal, comprises:
the sum of the input voltage signal of the Boost circuit and the comparison offset value is compared with the voltage of the common node, and when the voltage of the common node is reduced to the sum of the input voltage signal of the Boost circuit and the comparison offset value, the zero crossing of the current flowing through the first switching tube is determined.
With respect to the zero-crossing detection method for the Boost circuit in the above-described embodiments, the respective steps have been described in detail in the embodiments regarding the zero-crossing detection circuit for the Boost circuit, and will not be described in detail herein.
The preferred embodiments of the present invention have been described in detail above with reference to the accompanying drawings, but the present invention is not limited to the specific details of the above embodiments, and various simple modifications can be made to the technical solutions disclosed in the present invention within the scope of the technical concept disclosed in the present invention, and all the simple modifications belong to the protection scope of the present invention.
In addition, the specific features described in the above embodiments may be combined in any suitable manner without contradiction. The various possible combinations of the invention are not described in detail in order to avoid unnecessary repetition.
Moreover, any combination of the various embodiments of the invention can be made without departing from the spirit of the invention, which should also be considered as disclosed herein.
Claims (10)
1. A zero crossing detection circuit for a Boost circuit, the Boost circuit comprising an inductive element, a first switching tube coupled between the inductive element and an output of the Boost circuit, and a second switching tube coupled between the inductive element and a reference ground, the zero crossing detection circuit comprising:
the first zero-crossing detection module is provided with a first input end, a second input end and an output end, the first input end and the second input end of the first zero-crossing detection module are respectively coupled to two ends of the first switching tube, the first zero-crossing detection module is used for sampling current flowing through the first switching tube, judging whether the current flowing through the first switching tube drops to a first preset value or not, outputting a first zero-crossing detection signal, and switching the voltage on the control end of the first switching tube from a first driving voltage to a second driving voltage when the current flowing through the first switching tube drops to the first preset value;
the second zero-crossing detection module is provided with a first input end, a second input end and an output end, wherein the first input end of the second zero-crossing detection module is coupled with the input end of the Boost circuit to receive an input voltage signal, the second input end of the second zero-crossing detection module is coupled with a common node between the first switching tube and the second switching tube, the second zero-crossing detection module is used for comparing the voltage of the common node with the input voltage signal and outputting a second zero-crossing detection signal, and when the voltage of the common node is reduced to the value of the input voltage signal, the second zero-crossing detection signal indicates zero crossing of the current flowing through the first switching tube.
2. The zero crossing detection circuit for a Boost circuit of claim 1, wherein the first switching tube comprises a PMOS tube, and the first drive voltage is less than the second drive voltage.
3. The zero crossing detection circuit for a Boost circuit of claim 2, wherein the second drive voltage is an output voltage signal of the Boost circuit or a larger value between the input voltage signal and the output voltage signal of the Boost circuit.
4. The zero crossing detection circuit for a Boost circuit of claim 2, wherein the first switching tube is turned on when the voltage on the first switching tube control terminal is a first drive voltage; when the voltage on the control end of the first switching tube is the second driving voltage and the current flowing through the first switching tube is zero, the first switching tube is turned off.
5. The zero crossing detection circuit for a Boost circuit of claim 1, wherein a first end of the first switching tube is coupled to the inductive element and a second end of the first switching tube is coupled to an output of the Boost circuit, wherein the first zero crossing detection module comprises a sampling tube, a first comparator, a resistor, and a current source;
the first end of the sampling tube is used as a first input end of the first zero-crossing detection module and is coupled with the first end of the first switching tube;
the resistor is coupled between the second end of the first switching tube and the second end of the sampling tube;
a first input end of the first comparator is used as a second input end of the first zero-crossing detection module and is coupled between a second end of the first switching tube and an output end of the Boost circuit, the second input end of the first comparator is coupled with a second end of the sampling tube, and an output end of the first comparator outputs the first zero-crossing detection signal;
the first end of the current source is coupled to the second end of the sampling tube, and the second end of the current source is coupled to the reference ground.
6. The zero crossing detection circuit for Boost circuit of claim 1, wherein the second zero crossing detection module comprises a second comparator provided with a comparison offset value;
the second comparator is used for comparing the sum of the input voltage signal and the comparison offset value with the voltage of the common node and outputting a second zero crossing detection signal.
7. A start-up circuit for a Boost circuit, comprising:
the zero crossing detection circuit of any one of claims 1-6 for generating a first zero crossing detection signal and a second zero crossing detection signal;
the control circuit comprises an initial module, wherein the initial module generates a starting signal after being enabled, and the control circuit generates a first driving signal and a second driving signal according to the starting signal, a first zero-crossing detection signal and a second zero-crossing detection signal; the first driving signal is used for driving the first switching tube to be turned on and turned off, the second driving signal is used for driving the second switching tube to be turned on and turned off, and the starting signal is used for controlling the second switching tube to be turned off after being turned on for a fixed period of time in a power-on starting stage of the Boost circuit, and the first switching tube is turned on when the second switching tube is turned off.
8. The startup circuit for a Boost circuit of claim 7, wherein the control circuit further comprises:
a first logic driving circuit which receives the first zero-crossing detection signal and the start signal and generates a first driving signal according to the first zero-crossing detection signal and the start signal; and
and the second logic driving circuit receives the second zero-crossing detection signal and the starting signal and generates a second driving signal according to the second zero-crossing detection signal and the starting signal.
9. The startup circuit for a Boost circuit of claim 8, wherein the first logic drive circuit further comprises:
a voltage selection circuit that receives an input voltage signal and an output voltage signal of the Boost circuit and selects the larger of the input voltage signal and the output voltage signal as a second drive voltage output;
the logic circuit receives the first zero-crossing detection signal and the starting signal, performs logic operation on the first zero-crossing detection signal and the starting signal, and outputs a first logic signal;
the driving module receives the first driving voltage, the second driving voltage and the first logic signal and generates the first driving signal, wherein the value of the first driving signal is switched between the first driving voltage and the second driving voltage according to the change of the logic state of the first logic signal.
10. A zero-crossing detection method for a Boost circuit, the Boost circuit comprising an inductive element, a first switching tube and a second switching tube, the first switching tube being coupled between the inductive element and an output of the Boost circuit, the second switching tube being coupled between the inductive element and a reference ground, the zero-crossing detection method comprising:
sampling the current flowing through the first switching tube and judging whether the current flowing through the first switching tube drops to a first preset value or not;
when the current flowing through the first switching tube drops to a first preset value, switching the voltage on the control end of the first switching tube from a first driving voltage to a second driving voltage;
comparing the voltage on the common node of the first switching tube and the second switching tube with the input voltage signal of the Boost circuit, and determining the zero crossing of the current flowing through the first switching tube when the voltage of the common node drops to the value of the input voltage signal.
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Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103675426A (en) * | 2013-12-24 | 2014-03-26 | 矽力杰半导体技术(杭州)有限公司 | Inductive current zero-crossing detection method, circuit and switch power supply with circuit |
| CN106301072A (en) * | 2016-08-17 | 2017-01-04 | 南京邮电大学 | A kind of piezoelectric energy collection system and control method thereof |
| CN107809830A (en) * | 2017-12-06 | 2018-03-16 | 无锡恒芯微科技有限公司 | A kind of Buck boost LED drive circuits |
| CN108768363A (en) * | 2018-08-24 | 2018-11-06 | 上海艾为电子技术股份有限公司 | A kind of tri-state Zero-cross comparator circuit and power management chip |
| CN112737335A (en) * | 2020-12-29 | 2021-04-30 | 广州大学 | Zero-crossing detection device of boost conversion circuit |
| CN113394965A (en) * | 2021-07-23 | 2021-09-14 | 杭州电子科技大学 | Digital control totem pole PFC voltage zero crossing point distortion control device and method |
| CN114499116A (en) * | 2022-01-24 | 2022-05-13 | 上海翰迈电子科技有限公司 | Zero-crossing state detection device for converter and converter device |
| CN114531016A (en) * | 2020-11-23 | 2022-05-24 | 圣邦微电子（北京）股份有限公司 | Switching converter, zero-crossing detection circuit and zero-crossing detection method thereof |
| CN117040242A (en) * | 2023-07-26 | 2023-11-10 | 深圳英集芯科技股份有限公司 | Low-power-consumption boost circuit for weak energy collection |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105471263B (en) * | 2015-12-23 | 2018-05-29 | 成都芯源系统有限公司 | Buck-boost converter and controller and control method thereof |
-
2023
- 2023-12-04 CN CN202311642414.XA patent/CN117347702B/en active Active
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103675426A (en) * | 2013-12-24 | 2014-03-26 | 矽力杰半导体技术(杭州)有限公司 | Inductive current zero-crossing detection method, circuit and switch power supply with circuit |
| CN106301072A (en) * | 2016-08-17 | 2017-01-04 | 南京邮电大学 | A kind of piezoelectric energy collection system and control method thereof |
| CN107809830A (en) * | 2017-12-06 | 2018-03-16 | 无锡恒芯微科技有限公司 | A kind of Buck boost LED drive circuits |
| CN108768363A (en) * | 2018-08-24 | 2018-11-06 | 上海艾为电子技术股份有限公司 | A kind of tri-state Zero-cross comparator circuit and power management chip |
| CN114531016A (en) * | 2020-11-23 | 2022-05-24 | 圣邦微电子（北京）股份有限公司 | Switching converter, zero-crossing detection circuit and zero-crossing detection method thereof |
| CN112737335A (en) * | 2020-12-29 | 2021-04-30 | 广州大学 | Zero-crossing detection device of boost conversion circuit |
| CN113394965A (en) * | 2021-07-23 | 2021-09-14 | 杭州电子科技大学 | Digital control totem pole PFC voltage zero crossing point distortion control device and method |
| CN114499116A (en) * | 2022-01-24 | 2022-05-13 | 上海翰迈电子科技有限公司 | Zero-crossing state detection device for converter and converter device |
| CN117040242A (en) * | 2023-07-26 | 2023-11-10 | 深圳英集芯科技股份有限公司 | Low-power-consumption boost circuit for weak energy collection |
Non-Patent Citations (1)
| Title |
|---|
| 一种新型补偿策略下PFC Boost电路的环路稳定性研究;王晓凡 等;《现代电子技术》;第42卷(第12期);76-80+85 * |
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