CN117331880A - Dual-core communication device, method and electronic equipment - Google Patents
Dual-core communication device, method and electronic equipment Download PDFInfo
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Abstract
The invention provides a dual-core communication device, a dual-core communication method and electronic equipment, and relates to the technical field of information processing, wherein the dual-core communication device comprises: the system comprises a first read-write control module, a second read-write control module, a transmission control module and a shared storage module; the transmission control module is used for determining flow control parameter information and framing parameter information according to the residual space capacity of the shared storage module and the data stream information of the written data stream; the first read-write control module is used for reading or writing the data stream of the first processor into the shared storage module according to the flow control parameter information and the framing strategy information sent by the transmission control module; the second read-write control module is used for reading or writing the data flow of the second processor into the shared storage module according to the flow control parameter information and the framing strategy information sent by the transmission control module. When data writing and data reading are performed, the situation of data overflow during data writing by double cores can be effectively avoided, the utilization rate of storage space is improved, and the transmission bandwidth is increased.
Description
Technical Field
The present invention relates to the field of information processing technologies, and in particular, to a dual-core communication device, a dual-core communication method, and an electronic device.
Background
In an embedded system, an embedded processor is a core of the whole system, most of the embedded processors are multi-core processors, and data transmission efficiency among a plurality of cores directly influences the performance of the whole system.
At present, a multi-core embedded processor mostly adopts a shared memory mode to realize data communication among multiple cores, namely, a memory space is opened up in a physical space, the memory space can be accessed by a plurality of cores, one core writes data into the space, the other core reads data, and the data communication among the cores can be completed in the mode, but in the related technology, the utilization rate of the shared memory space by the multi-core processor is not high, and the transmission efficiency is low.
Disclosure of Invention
The invention provides a dual-core communication device, a dual-core communication method and electronic equipment, which are used for solving the defects that a multi-core processor in the prior art is low in utilization rate of a shared memory space and low in transmission efficiency.
The invention provides a dual-core communication device, which is applied to a dual-core processor, wherein the dual-core processor comprises: a first processor and a second processor; the device comprises: the system comprises a first read-write control module, a second read-write control module, a transmission control module and a shared storage module; the first read-write control module is respectively in communication connection with the first processor and the shared memory module, the second read-write control module is respectively in communication connection with the second processor and the shared memory module, and the transmission control module is respectively in communication connection with the first read-write control module and the second read-write control module;
the transmission control module is used for determining flow control parameter information and framing parameter information according to the residual space capacity of the shared storage module and the data stream information of the written data stream;
the first read-write control module is used for reading or writing the data stream of the first processor into the shared storage module according to the flow control parameter information and the framing strategy information sent by the transmission control module;
the second read-write control module is used for reading or writing the data flow of the second processor into the shared storage module according to the flow control parameter information and the framing strategy information sent by the transmission control module.
According to the dual-core communication device provided by the invention, the first read-write control module comprises: the first frame encoder is respectively in communication connection with the first stream control module and the first write controller;
the first flow control module is used for controlling the transmission bandwidth of the data flow according to the flow control parameters sent by the transmission control module;
the first frame encoder is used for carrying out frame encoding processing on the data stream written by the first flow control module according to frame encoding parameter information and the frame encoding strategy to obtain a data frame;
wherein, the framing parameter information includes: the residual space capacity and the maximum frame length of the data frame;
the first write controller is used for adding frame group information for each data frame, integrating N data frames into a frame group, and writing the frame group into the shared storage module;
wherein the frame group information includes at least one of: frame group number, frame number, current frame store first address, next frame store first address, whether current frame is the last frame of frame group.
According to the dual-core communication device provided by the invention, the first read-write control module further comprises: a first frame decoder and a first read controller, the first frame decoder being communicatively coupled to the first read controller and the first streaming control module, respectively;
the first reading controller is used for reading the frame group from the shared storage module and deleting the read frame group in the shared storage module;
the first frame decoder is configured to perform frame decoding processing on the frame group read by the first read controller according to the frame group information, obtain the data stream, and transmit the data stream to a first processor through the flow control module.
According to the dual-core communication device provided by the invention, the second read-write control module comprises: the second frame encoder is respectively in communication connection with the second streaming control module and the second write controller;
the second flow control module is used for controlling the transmission bandwidth of the data flow according to the flow control parameters sent by the transmission control module;
the second frame encoder carries out frame encoding processing on the data stream written by the second flow control module according to the frame encoding parameter information and the frame encoding strategy to obtain a data frame;
wherein, the framing parameter information includes: the residual space capacity and the maximum frame length of the data frame;
the second write controller adds frame group information for each data frame, integrates N data frames into one frame group, and writes the frame group into the shared storage module;
wherein the frame group information includes at least one of: frame group number, frame number, current frame store first address, next frame store first address, whether current frame is the last frame of frame group.
According to the dual-core communication device provided by the invention, the second read-write control module further comprises: a second frame decoder and a second read controller, the second frame decoder being communicatively coupled to the second read controller and the second streaming module, respectively;
the second reading controller is used for reading a frame group from the shared storage module and deleting the read frame group in the shared storage module;
the second frame decoder is configured to perform frame decoding processing on the frame set read by the second read controller according to the frame set information, obtain the data stream, and transmit the data stream to a second processor through the flow control module.
According to the dual-core communication device provided by the invention, the transmission control module is specifically used for:
and transmitting the same group of flow control parameter information and framing strategy information to the first read-write control module and the second read-write control module respectively.
The invention also provides a dual-core communication method based on the dual-core communication device, which comprises the following steps:
the first read-write control module writes the data stream of the first processor into the shared storage module according to the flow control parameter information and the framing strategy information sent by the transmission control module;
and the second read-write control module reads the data stream from the shared storage module according to the framing strategy information and then transmits the data stream to a second processor.
According to the dual-core communication method provided by the invention, the first read-write control module writes the data stream of the first processor into the shared storage module according to the flow control parameter information and framing strategy information sent by the transmission control module, and the method comprises the following steps:
the first read-write control module is used for controlling the data stream to be written according to the flow control parameter information, and carrying out frame coding processing on the written data stream according to the framing strategy information to obtain a data frame;
and integrating N data frames into a frame group, and writing the frame group into the shared storage module.
According to the dual-core communication method provided by the invention, the second read-write control module reads the data stream from the shared storage module according to the framing strategy information and then transmits the data stream to a second processor, and the method comprises the following steps:
after the second read-write control module reads the frame group data from the shared storage module, frame decoding processing is carried out on the frame group data according to the framing strategy information, and the data stream is obtained;
and transmitting the data stream to the second processor.
The invention also provides an electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing a dual-core communication method as described in any of the above when executing the program.
The present invention also provides a non-transitory computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements a dual-core communication method as described in any of the above.
The invention also provides a computer program product comprising a computer program which when executed by a processor implements a dual core communication method as described in any of the above.
According to the dual-core communication device, the dual-core communication method and the electronic equipment, the first read-write control module and the second read-write control module are used for controlling the flow according to the same transmission control module, so that when data writing and data reading are carried out, the situation of data overflow when the dual-core device simultaneously carries out data writing can be effectively avoided, the utilization rate of a storage space is improved, and the transmission bandwidth is increased. Meanwhile, the first read-write control module and the second read-write control module both carry out frame coding processing according to the same transmission control module, so that the other module can effectively sense the information during frame coding to decode when decoding, and the kernel performance is improved without subsequent maintenance of data transmission.
Drawings
In order to more clearly illustrate the invention or the technical solutions of the prior art, the following description will briefly explain the drawings used in the embodiments or the description of the prior art, and it is obvious that the drawings in the following description are some embodiments of the invention, and other drawings can be obtained according to the drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic structural diagram of a dual-core communication device according to an embodiment of the present application;
FIG. 2 is a second schematic diagram of a dual-core communication device according to an embodiment of the present disclosure;
fig. 3 is a schematic flow chart of a dual-core communication method according to an embodiment of the present application;
fig. 4 is a schematic structural diagram of an electronic device provided by the present invention.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the present invention more apparent, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings, and it is apparent that the described embodiments are some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Fig. 1 is a schematic structural diagram of a dual-core communication device according to an embodiment of the present application, as shown in fig. 1, including: a first read-write control module 11, a second read-write control module 12, a transmission control module 13, and a shared memory module 14; the first read-write control module 11 is respectively in communication connection with the first processor 15 and the shared memory module 14, the second read-write control module 12 is respectively in communication connection with the second processor 16 and the shared memory module 14, and the transmission control module 13 is respectively in communication connection with the first read-write control module 11 and the second read-write control module 12;
the transmission control module 13 is configured to determine flow control parameter information and framing parameter information according to the remaining space capacity of the shared storage module 14 and data stream information of the write data stream;
the first read-write control module 11 is configured to read or write the data stream of the first processor 15 into the shared storage module 14 according to the flow control parameter information and framing policy information sent by the transmission control module 13;
the second read/write control module 12 is configured to read or write the data stream of the second processor 16 into the shared storage module 14 according to the flow control parameter information and framing policy information sent by the transmission control module 13.
In the embodiment of the application, the transmission control module can specifically realize dynamic scheduling, flow control management, frame encoding and decoding control, read-write control and interrupt control for the shared storage space according to the preconfigured adoption number.
The transmission control module in the embodiment of the present application may share information such as framing policies of the first read-write control module and the second read-write control module, so that when another module performs frame decoding processing, the information such as framing policies shared by the transmission control module may be efficiently decoded.
On the other hand, the transmission control module in the embodiment of the application can also share the residual space capacity of the storage module, effectively and simultaneously control the flow writing speed of the first reading and writing control module and the second reading and writing control module, improve the utilization rate of the storage space and increase the transmission bandwidth.
The transmission control module directly controls the framing strategy to enable the frame encoding module to frame the data stream according to parameters such as continuous condition of the data stream, maximum frame length limit, minimum frame length limit, shared storage available space and the like.
The transmission control module can also dynamically manage the shared storage space, and dynamically allocate the storage space for each written data frame through the write control module, so as to maximize the resource utilization rate; the kernel can check the information such as the transmission rate, whether the data is read by the opposite kernel, the working state of each module, the use condition of the storage space and the like in real time through the transmission control module.
The shared memory module in the embodiment of the application specifically includes a memory and a cross-reference bar module, where the cross-reference bar module is specifically configured to complete a read-write operation on the shared memory. The module stores the first address according to the current frame in the data frame, and writes the data frame into the appointed storage address; and reading out the corresponding data frame from the shared storage according to the read request sent by the read control module.
The memory may be DDR memory, flash memory, SRAM, single or dual port RAM, or any other type of memory.
In this embodiment of the present application, the first read-write control module and the second read-write control module both control the transmission speed of the data stream according to the flow control parameter information, and at the same time, after the data stream is subjected to frame encoding processing by the first read-write control module, the encoded frame data may be synchronized to the second read-write control module by the transmission control module, so that the second read-write control module can effectively perform encoding and decoding processing when reading the data, thereby reading the data stream.
In the embodiment of the application, the first read-write control module and the second read-write control module are used for controlling the flow according to the same transmission control module, so that when data writing and data reading are performed, the situation of data overflow during data writing by double cores can be effectively avoided, the utilization rate of a storage space is improved, and the transmission bandwidth is increased. Meanwhile, the first read-write control module and the second read-write control module both carry out frame coding processing according to the same transmission control module, so that the other module can effectively sense the information during frame coding to decode when decoding, and the kernel performance is improved without subsequent maintenance of data transmission.
Optionally, the first read-write control module includes: the first frame encoder is respectively in communication connection with the first stream control module and the first write controller;
the first flow control module is used for controlling the transmission bandwidth of the data flow according to the flow control parameters sent by the transmission control module;
the first frame encoder is used for carrying out frame encoding processing on the data stream written by the first flow control module according to frame encoding parameter information and the frame encoding strategy to obtain a data frame;
wherein, the framing parameter information includes: the residual space capacity and the maximum frame length of the data frame;
the first write controller is used for adding frame group information for each data frame, integrating N data frames into a frame group, and writing the frame group into the shared storage module;
wherein the frame group information includes at least one of: frame group number, frame number, current frame store first address, next frame store first address, whether current frame is the last frame of frame group.
The second read-write control module includes: the second frame encoder is respectively in communication connection with the second streaming control module and the second write controller;
the second flow control module is used for controlling the transmission bandwidth of the data flow according to the flow control parameters sent by the transmission control module;
the second frame encoder carries out frame encoding processing on the data stream written by the second flow control module according to the frame encoding parameter information and the frame encoding strategy to obtain a data frame;
wherein, the framing parameter information includes: the residual space capacity and the maximum frame length of the data frame;
the second write controller adds frame group information for each data frame, integrates N data frames into one frame group, and writes the frame group into the shared storage module;
wherein the frame group information includes at least one of: frame group number, frame number, current frame store first address, next frame store first address, whether current frame is the last frame of frame group.
In the embodiment of the application, the first flow control module and the second flow control module control the transmission bandwidth of the data flow according to the flow control parameters, so that the writing-in and writing-out speeds of the data flow are effectively controlled, and further when two processors access the shared storage space simultaneously, the utilization rate of the storage space is improved, and the transmission bandwidth is increased.
The framing policy described in the embodiments of the present application may specifically be a policy of writing in the transmission control module in advance.
The framing parameter information in the embodiment of the present application may include a remaining space capacity and a maximum frame length of a data frame.
In the embodiment of the application, the first frame encoder and the second frame encoder can frame the data stream according to parameters such as continuous condition, shared storage available space condition, maximum frame length, framing strategy and the like of the data stream. The added frame information includes, but is not limited to, frame header, frame trailer, frame length, framing policy, CRC check information, etc.
In this embodiment of the present application, the first write controller and the second write controller may integrate a plurality of data frames together according to parameters such as a continuous condition of the data frames, a maximum frame number that can be accommodated by the frame group, and the like, to form a frame group, and add frame group information for each data frame. The frame group information includes, but is not limited to, frame group number, frame number, current frame storage header address, next frame storage header address, whether the current frame is the last frame of the frame group, and the like.
In the embodiment of the application, the data flow control of the first processor and the second processor can be realized through the first flow control module and the second flow control module, the data frame processing of the data flow can be effectively realized through the first frame encoder and the second frame encoder, so that the data storage is convenient, the frame encoded data can be synchronized to other modules through the transmission control module, the frame decoding is convenient when the data is read, the data reading efficiency is improved, and meanwhile, the first write controller and the second write controller can write the data frame into the shared storage module efficiently.
Optionally, the first read-write control module further includes: a first frame decoder and a first read controller, the first frame decoder being communicatively coupled to the first read controller and the first streaming control module, respectively;
the first reading controller is used for reading the frame group from the shared storage module and deleting the read frame group in the shared storage module;
the first frame decoder is configured to perform frame decoding processing on the frame group read by the first read controller according to the frame group information, obtain the data stream, and transmit the data stream to a first processor through the flow control module.
Optionally, the second read/write control module further includes: a second frame decoder and a second read controller, the second frame decoder being communicatively coupled to the second read controller and the second streaming module, respectively;
the second reading controller is used for reading a frame group from the shared storage module and deleting the read frame group in the shared storage module;
the second frame decoder is configured to perform frame decoding processing on the frame set read by the second read controller according to the frame set information, obtain the data stream, and transmit the data stream to a second processor through the flow control module.
Specifically, in the embodiment of the present application, the first read controller and the second read controller may read the frame group from the shared memory module, delete the frame group information, and output the data frame to the frame decoder.
In this embodiment of the present application, the first frame decoder and the second frame decoder may perform frame decoding processing on a data frame according to frame group information shared by the transmission control module, to obtain the data stream, and transmit the data stream to the second processor through the flow control module.
In this embodiment of the present application, the first read controller and the second read controller may effectively acquire the frame group from the shared memory module and convert the frame group into the data frame, and the first read controller and the second read controller may effectively convert the data frame into the data stream.
In an alternative embodiment, fig. 2 is a schematic structural diagram of a dual-CORE communication device provided in the embodiment of the present application, where the first processor and the second processor are core_0 and core_1, respectively, and take core_0 is transmitted to core_1 as an example, if the shared memory module has free space, a data stream sent by core_0 will enter the frame coding_0 module through the flow control module. The frame coding_0 module codes the data stream into a plurality of data frames according to the continuous condition, the maximum frame length, the shared storage available space and other information of the data stream, adds the frame header, the frame length, the CRC check, the frame tail and other information, and outputs the data frames to the write control_0 module.
The write control_0 module composes a plurality of data frames into a frame group according to parameters such as continuous condition of the data frames and maximum frame number which can be accommodated by the frame group, adds information such as frame group number, frame number, current frame storage head address, next frame storage head address, whether the current frame is the last frame of the frame group or not and the like to each data frame, and sends the frame group to the cross bar module. The current frame storage head address and the next frame storage head address are allocated by the transmission control module.
The cross bar module will store the first address according to the current frame in each frame in the frame group, and write the data frame into the corresponding address space in the shared memory.
When the shared memory has a complete frame group written in core_0 but not read by core_1, the transmission control module sends the address of the first frame of the frame group to the read control_1 module, and triggers the read control_1 module to read the frame group. The read control_1 module reads the first frame of the frame group according to the address, stores the first address according to the next frame in the first frame, and reads the second frame until the whole frame group is read. The read control_1 module deletes the frame group information and transmits the data frame to the frame decoding_1 module.
The frame decoding_1 module is the inverse operation of the frame encoding_0 module, recovers the data stream from the data frame, and transmits the data stream to the core_1 through the flow control module.
Fig. 3 is a schematic flow chart of a dual-core communication method provided in an embodiment of the present application, as shown in fig. 3, including:
step 310, the first read-write control module writes the data stream of the first processor into the shared storage module according to the flow control parameter information and framing strategy information sent by the transmission control module;
step 320, the second read-write control module reads the data stream from the shared storage module according to the framing policy information, and then transmits the data stream to a second processor.
The first read-write control module writes the data stream of the first processor into the shared storage module according to the flow control parameter information and the framing strategy information sent by the transmission control module, and the method comprises the following steps:
the first read-write control module is used for controlling the data stream to be written according to the flow control parameter information, and carrying out frame coding processing on the written data stream according to the framing strategy information to obtain a data frame;
and integrating N data frames into a frame group, and writing the frame group into the shared storage module.
The second read-write control module reads the data stream from the shared storage module according to the framing policy information and then transmits the data stream to a second processor, and the method comprises the following steps:
after the second read-write control module reads the frame group data from the shared storage module, frame decoding processing is carried out on the frame group data according to the framing strategy information, and the data stream is obtained;
and transmitting the data stream to the second processor.
In the embodiment of the application, the first read-write control module and the second read-write control module are used for controlling the flow according to the same transmission control module, so that when data writing and data reading are performed, the situation of data overflow during data writing by double cores can be effectively avoided, the utilization rate of a storage space is improved, and the transmission bandwidth is increased. Meanwhile, the first read-write control module and the second read-write control module both carry out frame coding processing according to the same transmission control module, so that the other module can effectively sense the information during frame coding to decode when decoding, and the kernel performance is improved without subsequent maintenance of data transmission.
In the above, the dual-core communication method described in the present invention and the embodiment of the dual-core communication device described in the above may be referred to correspondingly, which is not described herein again.
Fig. 4 is a schematic structural diagram of an electronic device according to the present invention, as shown in fig. 4, the electronic device may include: processor 410, communication interface (Communications Interface) 420, memory 430 and communication bus 440, wherein processor 410, communication interface 420 and memory 430 communicate with each other via communication bus 440. Processor 410 may invoke logic instructions in memory 430 to perform a dual-core communication method comprising: the first read-write control module writes the data stream of the first processor into the shared storage module according to the flow control parameter information and the framing strategy information sent by the transmission control module;
and the second read-write control module reads the data stream from the shared storage module according to the framing strategy information and then transmits the data stream to a second processor.
Further, the logic instructions in the memory 430 described above may be implemented in the form of software functional units and may be stored in a computer-readable storage medium when sold or used as a stand-alone product. Based on this understanding, the technical solution of the present invention may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, in the form of a software product stored in a storage medium, comprising several instructions for causing a computer device (which may be a personal computer, a server, a network device, etc.) to perform all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
In another aspect, the present invention also provides a computer program product comprising a computer program, the computer program being storable on a non-transitory computer readable storage medium, the computer program, when executed by a processor, being capable of performing the dual-core communication method provided by the methods described above, the method comprising: the first read-write control module writes the data stream of the first processor into the shared storage module according to the flow control parameter information and the framing strategy information sent by the transmission control module;
and the second read-write control module reads the data stream from the shared storage module according to the framing strategy information and then transmits the data stream to a second processor.
In yet another aspect, the present invention also provides a non-transitory computer readable storage medium having stored thereon a computer program which, when executed by a processor, is implemented to perform the dual-core communication method provided by the above methods, the method comprising: the first read-write control module writes the data stream of the first processor into the shared storage module according to the flow control parameter information and the framing strategy information sent by the transmission control module;
and the second read-write control module reads the data stream from the shared storage module according to the framing strategy information and then transmits the data stream to a second processor.
The apparatus embodiments described above are merely illustrative, wherein the elements illustrated as separate elements may or may not be physically separate, and the elements shown as elements may or may not be physical elements, may be located in one place, or may be distributed over a plurality of network elements. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment. Those of ordinary skill in the art will understand and implement the present invention without undue burden.
From the above description of the embodiments, it will be apparent to those skilled in the art that the embodiments may be implemented by means of software plus necessary general hardware platforms, or of course may be implemented by means of hardware. Based on this understanding, the foregoing technical solution may be embodied essentially or in a part contributing to the prior art in the form of a software product, which may be stored in a computer readable storage medium, such as ROM/RAM, a magnetic disk, an optical disk, etc., including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the method described in the respective embodiments or some parts of the embodiments.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and are not limiting; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims (10)
1. A dual-core communication device for use in a dual-core processor, the dual-core processor comprising: a first processor and a second processor; characterized in that the device comprises: the system comprises a first read-write control module, a second read-write control module, a transmission control module and a shared storage module; the first read-write control module is respectively in communication connection with the first processor and the shared memory module, the second read-write control module is respectively in communication connection with the second processor and the shared memory module, and the transmission control module is respectively in communication connection with the first read-write control module and the second read-write control module;
the transmission control module is used for determining flow control parameter information and framing parameter information according to the residual space capacity of the shared storage module and the data stream information of the written data stream;
the first read-write control module is used for reading or writing the data stream of the first processor into the shared storage module according to the flow control parameter information and the framing strategy information sent by the transmission control module;
the second read-write control module is used for reading or writing the data flow of the second processor into the shared storage module according to the flow control parameter information and the framing strategy information sent by the transmission control module.
2. The dual-core communication device of claim 1, wherein the first read-write control module comprises: the first frame encoder is respectively in communication connection with the first stream control module and the first write controller;
the first flow control module is used for controlling the transmission bandwidth of the data flow according to the flow control parameters sent by the transmission control module;
the first frame encoder is used for carrying out frame encoding processing on the data stream written by the first flow control module according to frame encoding parameter information and the frame encoding strategy to obtain a data frame;
wherein, the framing parameter information includes: the residual space capacity and the maximum frame length of the data frame;
the first write controller is used for adding frame group information for each data frame, integrating N data frames into a frame group, and writing the frame group into the shared storage module;
wherein the frame group information includes at least one of: frame group number, frame number, current frame store first address, next frame store first address, whether current frame is the last frame of frame group.
3. The dual-core communication device of claim 2, wherein the first read-write control module further comprises: a first frame decoder and a first read controller, the first frame decoder being communicatively coupled to the first read controller and the first streaming control module, respectively;
the first reading controller is used for reading the frame group from the shared storage module and deleting the read frame group in the shared storage module;
the first frame decoder is configured to perform frame decoding processing on the frame group read by the first read controller according to the frame group information, obtain the data stream, and transmit the data stream to a first processor through the flow control module.
4. The dual-core communication device of claim 1, wherein the second read-write control module comprises: the second frame encoder is respectively in communication connection with the second streaming control module and the second write controller;
the second flow control module is used for controlling the transmission bandwidth of the data flow according to the flow control parameters sent by the transmission control module;
the second frame encoder carries out frame encoding processing on the data stream written by the second flow control module according to the frame encoding parameter information and the frame encoding strategy to obtain a data frame;
wherein, the framing parameter information includes: the residual space capacity and the maximum frame length of the data frame;
the second write controller adds frame group information for each data frame, integrates N data frames into one frame group, and writes the frame group into the shared storage module;
wherein the frame group information includes at least one of: frame group number, frame number, current frame store first address, next frame store first address, whether current frame is the last frame of frame group.
5. The dual-core communication device of claim 4, wherein the second read-write control module further comprises: a second frame decoder and a second read controller, the second frame decoder being communicatively coupled to the second read controller and the second streaming module, respectively;
the second reading controller is used for reading a frame group from the shared storage module and deleting the read frame group in the shared storage module;
the second frame decoder is configured to perform frame decoding processing on the frame set read by the second read controller according to the frame set information, obtain the data stream, and transmit the data stream to a second processor through the flow control module.
6. The dual-core communication device according to claim 1, wherein the transmission control module is specifically configured to:
and transmitting the same group of flow control parameter information and framing strategy information to the first read-write control module and the second read-write control module respectively.
7. The dual-core communication method of the dual-core communication device according to any one of the preceding claims 1 to 6, comprising:
the first read-write control module writes the data stream of the first processor into the shared storage module according to the flow control parameter information and the framing strategy information sent by the transmission control module;
and the second read-write control module reads the data stream from the shared storage module according to the framing strategy information and then transmits the data stream to a second processor.
8. The dual-core communication method of claim 7, wherein the first read-write control module writes the data stream of the first processor into the shared memory module according to the flow control parameter information and framing policy information sent by the transmission control module, comprising:
the first read-write control module is used for controlling the data stream to be written according to the flow control parameter information, and carrying out frame coding processing on the written data stream according to the framing strategy information to obtain a data frame;
and integrating N data frames into a frame group, and writing the frame group into the shared storage module.
9. The dual-core communication method of claim 7, wherein the second read-write control module, after reading the data stream from the shared memory module according to the framing policy information, transfers the data stream to a second processor, comprising:
after the second read-write control module reads frame group data from the shared storage module, frame decoding processing is carried out on the frame group data according to the framing strategy information, and the data stream is obtained;
and transmitting the data stream to the second processor.
10. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor implements the dual core communication method of any of claims 7 to 9 when the program is executed by the processor.
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Citations (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101593097A (en) * | 2009-05-22 | 2009-12-02 | 西安交通大学 | The method for designing of embedded isomorphism symmetry double-core risc microcontroller |
| US20100269103A1 (en) * | 2009-04-21 | 2010-10-21 | National Tsing Hua University | Method and device for multi-core instruction-set simulation |
| CN102207916A (en) * | 2011-05-30 | 2011-10-05 | 西安电子科技大学 | Instruction prefetch-based multi-core shared memory control equipment |
| CN102855153A (en) * | 2012-07-27 | 2013-01-02 | 华中科技大学 | Flow compilation optimization method oriented to chip multi-core processor |
| CN106648896A (en) * | 2016-12-26 | 2017-05-10 | 北京四方继保自动化股份有限公司 | Method for outputting peripheral through dual core sharing of Zynq chip in asymmetric multi-processing mode |
| WO2017219896A1 (en) * | 2016-06-21 | 2017-12-28 | 中兴通讯股份有限公司 | Method and device for transmitting video stream |
| CN111796948A (en) * | 2020-07-02 | 2020-10-20 | 长视科技股份有限公司 | Shared memory access method and device, computer equipment and storage medium |
| CN112199173A (en) * | 2020-09-28 | 2021-01-08 | 西南电子技术研究所（中国电子科技集团公司第十研究所） | Data processing method for dual-core CPU real-time operating system |
| CN112328533A (en) * | 2020-11-09 | 2021-02-05 | 哲库科技(上海)有限公司 | Multi-core processing system, inter-core communication method thereof, and storage medium |
| CN112597095A (en) * | 2020-12-14 | 2021-04-02 | 珠海格力电器股份有限公司 | Communication control method and device, electronic equipment and computer readable storage medium |
| CN113507424A (en) * | 2021-05-08 | 2021-10-15 | 中国电子科技集团公司第十四研究所 | FC engine frame receiving buffer management mechanism |
| CN113760559A (en) * | 2020-06-04 | 2021-12-07 | 普天信息技术有限公司 | Dual-core communication method and electronic equipment |
-
2023
- 2023-08-15 CN CN202311030038.9A patent/CN117331880A/en active Pending
Patent Citations (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20100269103A1 (en) * | 2009-04-21 | 2010-10-21 | National Tsing Hua University | Method and device for multi-core instruction-set simulation |
| CN101593097A (en) * | 2009-05-22 | 2009-12-02 | 西安交通大学 | The method for designing of embedded isomorphism symmetry double-core risc microcontroller |
| CN102207916A (en) * | 2011-05-30 | 2011-10-05 | 西安电子科技大学 | Instruction prefetch-based multi-core shared memory control equipment |
| CN102855153A (en) * | 2012-07-27 | 2013-01-02 | 华中科技大学 | Flow compilation optimization method oriented to chip multi-core processor |
| WO2017219896A1 (en) * | 2016-06-21 | 2017-12-28 | 中兴通讯股份有限公司 | Method and device for transmitting video stream |
| CN106648896A (en) * | 2016-12-26 | 2017-05-10 | 北京四方继保自动化股份有限公司 | Method for outputting peripheral through dual core sharing of Zynq chip in asymmetric multi-processing mode |
| CN113760559A (en) * | 2020-06-04 | 2021-12-07 | 普天信息技术有限公司 | Dual-core communication method and electronic equipment |
| CN111796948A (en) * | 2020-07-02 | 2020-10-20 | 长视科技股份有限公司 | Shared memory access method and device, computer equipment and storage medium |
| CN112199173A (en) * | 2020-09-28 | 2021-01-08 | 西南电子技术研究所（中国电子科技集团公司第十研究所） | Data processing method for dual-core CPU real-time operating system |
| CN112328533A (en) * | 2020-11-09 | 2021-02-05 | 哲库科技(上海)有限公司 | Multi-core processing system, inter-core communication method thereof, and storage medium |
| CN112597095A (en) * | 2020-12-14 | 2021-04-02 | 珠海格力电器股份有限公司 | Communication control method and device, electronic equipment and computer readable storage medium |
| CN113507424A (en) * | 2021-05-08 | 2021-10-15 | 中国电子科技集团公司第十四研究所 | FC engine frame receiving buffer management mechanism |
Non-Patent Citations (3)
| Title |
|---|
| GERRITSEN MG等: "Parallel implementations of streamline simulators", 《COMPUTATIONAL GEOSCIENCES》, vol. 13, no. 1, 3 March 2009 (2009-03-03) * |
| 侯志伟;安丽霞;包理群;王海涌;: "片上双核数据并行采集及核间通信研究", 计算机工程, no. 05, 15 May 2015 (2015-05-15) * |
| 武颖奇;李康;马佩军;关娜;史江义;: "基于网络处理的多核共享SDRAM控制器", 计算机工程, no. 14, 20 July 2010 (2010-07-20) * |
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