CN117318901A - Computer redundant communication system and safety computer - Google Patents
Computer redundant communication system and safety computer Download PDFInfo
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- CN117318901A CN117318901A CN202311412251.6A CN202311412251A CN117318901A CN 117318901 A CN117318901 A CN 117318901A CN 202311412251 A CN202311412251 A CN 202311412251A CN 117318901 A CN117318901 A CN 117318901A
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- 238000004891 communication Methods 0.000 title claims abstract description 87
- 238000012545 processing Methods 0.000 claims abstract description 73
- 230000001360 synchronised effect Effects 0.000 claims abstract description 25
- 238000012544 monitoring process Methods 0.000 claims description 9
- 238000000034 method Methods 0.000 claims description 8
- 239000000470 constituent Substances 0.000 claims description 5
- 230000005540 biological transmission Effects 0.000 claims description 4
- 231100000279 safety data Toxicity 0.000 claims description 4
- 238000013461 design Methods 0.000 abstract description 4
- 238000005516 engineering process Methods 0.000 description 3
- 238000011161 development Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 1
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- 230000009977 dual effect Effects 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/22—Arrangements for detecting or preventing errors in the information received using redundant apparatus to increase reliability
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/24—Resetting means
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
- G06F11/0721—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU]
- G06F11/0724—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU] in a multiprocessor or a multi-core unit
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
- G06F11/0748—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in a remote unit communicating with a single-box computer node experiencing an error/fault
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0793—Remedial or corrective actions
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
- G06F11/3024—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a central processing unit [CPU]
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- G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
- G06F11/3048—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the topology of the computing system or computing system component explicitly influences the monitoring activity, e.g. serial, hierarchical systems
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3051—Monitoring arrangements for monitoring the configuration of the computing system or of the computing system component, e.g. monitoring the presence of processing resources, peripherals, I/O links, software programs
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3058—Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
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- G—PHYSICS
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
- G06F15/17306—Intercommunication techniques
- G06F15/17325—Synchronisation; Hardware support therefor
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
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- G—PHYSICS
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- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/82—Protecting input, output or interconnection devices
- G06F21/85—Protecting input, output or interconnection devices interconnection devices, e.g. bus-connected or in-line devices
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L67/00—Network arrangements or protocols for supporting network services or applications
- H04L67/01—Protocols
- H04L67/10—Protocols in which an application is distributed across nodes in the network
- H04L67/1095—Replication or mirroring of data, e.g. scheduling or transport for data synchronisation between network nodes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L67/00—Network arrangements or protocols for supporting network services or applications
- H04L67/01—Protocols
- H04L67/12—Protocols specially adapted for proprietary or special-purpose networking environments, e.g. medical networks, sensor networks, networks in vehicles or remote metering networks
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
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- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- Quality & Reliability (AREA)
- Mathematical Physics (AREA)
- Software Systems (AREA)
- Signal Processing (AREA)
- Computer Networks & Wireless Communication (AREA)
- Computer Security & Cryptography (AREA)
- Medical Informatics (AREA)
- General Health & Medical Sciences (AREA)
- Health & Medical Sciences (AREA)
- Hardware Redundancy (AREA)
Abstract
The invention relates to the field of information security, in particular to a computer redundant communication system and a secure computer, wherein the redundant communication system comprises a first CPU processing unit and a second CPU processing unit, a two-to-two secure redundant structure is formed between the first CPU processing unit and the second CPU processing unit, output communication ports of the first CPU processing unit and the second CPU processing unit are the same, a redundant design is formed, each CPU comprises two paths of Ethernet exchanger units and one path of independent Ethernet, the Ethernet comprises a closed network and an open network, the two CPU processing units are in data synchronous communication through one path of independent high-speed Ethernet or in data synchronous communication through the high-speed closed Ethernet generated by the exchanger, and the two paths of synchronous communication further improve the safety and reliability of data exchange of two CPU channels. The safety computer based on the redundant communication system provided by the invention has a plurality of communication output ports, has universality and is applicable to but not limited to an interlocking system.
Description
Technical Field
The invention relates to the field of information security, in particular to a computer redundant communication system and a secure computer.
Background
The safety computer based on the two-out-of-two safety redundant structure is a key device widely applied in the field of rail transit. The architecture comprises two processing units that work in parallel and produce the same output. If one of the processing units fails, the other can take over the work, thereby ensuring continuous operation of the system. For the track traffic field, any service interruption caused by computer faults can cause serious safety accidents and economic losses, and the reliability and safety of the track traffic system are greatly improved based on a two-in-two safety redundancy design mode.
In the existing two-out-of-two safety redundancy structure implementation mode, the Controller Area Network (CAN) bus and the full duplex serial bus technology play an important role. Two processing units in these systems synchronize and communicate data over a CAN bus or full duplex serial bus. The CAN bus is a network communication technology with high reliability and strong real-time performance, and is widely applied to embedded systems. In the process of realizing the two-out-of-two safety redundancy structure, each processing unit sends the processing result to the CAN bus, and then the other processing unit reads and processes the data, so that even if one processing unit fails, the other processing unit CAN work as the processing unit, and the reliability of the system is ensured. The full duplex serial bus is a communication technology allowing data to be transmitted in two directions simultaneously, and through the full duplex serial bus, two processing units can exchange and synchronize data.
However, the prior art has some significant drawbacks. Firstly, the bandwidth of the CAN bus or the full duplex serial bus is relatively small, when a plurality of information is transmitted at the same time, the network blocking phenomenon is easy to occur, the efficiency of data synchronous communication is reduced, and the overall working efficiency is influenced. Second, these techniques have difficulty in accurately estimating their latency characteristics, which can affect the accuracy of the data synchronization, thereby reducing the security performance of the system. Finally, due to the limitation of the number of communication interfaces, the existing security computer generally cannot achieve universality, and needs to be redesigned according to specific application scenes, which clearly increases development cost.
Disclosure of Invention
In order to solve the above problems, the present invention provides a computer redundant communication system and a secure computer.
The computer redundant communication system includes:
each CPU processing unit comprises a CPU, an Ethernet first switching module, an Ethernet second switching module, an independent Ethernet port and a plurality of output communication ports;
the Ethernet first switching module is used for constructing a closed network and is used as a communication channel of the two CPU processing units;
the Ethernet second switching module is used for constructing an open network to carry out data communication;
the independent Ethernet port is used for constructing an Ethernet data transmission network and is used as a communication channel of the two CPU processing units;
and the two CPU units adopt double channels to carry out data synchronous communication, and the output communication ports are the same.
Further, the two CPU units use two channels to perform data synchronization communication, specifically:
each CPU processing unit is configured with a plurality of Ethernet interfaces, wherein one path of independent Ethernet interface is converted into Ethernet through USB2.0 and is used as a synchronous communication channel 1; a plurality of Ethernet interfaces are connected with the Ethernet first switching module through the PHY chip; the Ethernet interfaces are expanded and connected with the Ethernet second switching module through the PCIe bus interface;
the PHY chip is connected with an Ethernet formed by an Ethernet first switching module to form a closed network, so that safety data communication is carried out and the closed network is used as a synchronous communication channel 2; the ethernet which is connected to the ethernet second switching module by way of the PCIe bus interface extension is called an open network, and performs data communication with the outside world.
Further, the ethernet interfaces of the first CPU processing unit and the second CPU processing unit include: the method is realized by using a PHY chip, a switch chip, a USB-to-Ethernet chip and a PCIe interface extension mode.
Further, the ethernet interfaces of the first CPU processing unit and the second CPU processing unit are electrically isolated from each other.
Further, the output communication ports of the first CPU processing unit and the second CPU processing unit are the same, and the output communication ports include: RS485, RS422, RS232, CAN, CANFD, USB2.0, ethernet;
the RS485, RS422, CAN, CANFD and Ethernet communication ports are electrically isolated from the first CPU processing unit or the second CPU processing unit communication channels.
Furthermore, the CPUs of the two CPU units adopt the same processor and are any one of single-core or dual-core ARM cores.
The invention also provides a safety computer, which comprises the computer redundant communication system, and further comprises other constituent units, wherein the other constituent units comprise: the device comprises a power supply unit, a storage unit, a debugging unit, a safety circuit unit, a voltage monitoring unit, a resetting unit, a watchdog unit, a temperature monitoring unit, a display unit, an address identification unit, an indicator lamp unit and a switching unit.
Further, the first CPU processing unit monitors the voltage of the second CPU processing unit, and the second CPU processing unit monitors the voltage of the first CPU processing unit.
The system and the method correspond to each other, and the specific preferable scheme of the method is also applicable to the system.
One or more technical solutions provided in the embodiments of the present application at least have the following technical effects or advantages:
the invention realizes high-speed data synchronous communication between two CPU processing units, effectively improves the efficiency of data synchronous communication and solves the problem of network blockage. Meanwhile, the characteristics of the Ethernet enable the delay characteristics of the Ethernet to be predictable, so that the accuracy of data synchronization is improved, and the safety performance of the system is improved. In addition, the invention has more output communication ports, better universality and adaptability to various application scenes without redesigning, thereby greatly reducing the development cost.
Drawings
FIG. 1 is a block diagram of a computer redundant communication system provided by an embodiment of the present invention;
fig. 2 is an interface diagram of a computer redundant communication system according to an embodiment of the present invention.
Detailed Description
The present invention will be described in detail below with reference to the drawings and detailed embodiments, and before the technical solutions of the embodiments of the present invention are described in detail, the terms and terms involved will be explained, and in the present specification, the components with the same names or the same reference numerals represent similar or identical structures, and are only limited for illustrative purposes.
The invention is explained below in connection with a specific embodiment.
As shown in fig. 1, the computer redundant communication system provided in this embodiment includes two CPU processing units, which are a first CPU processing unit and a second CPU processing unit, respectively, and form a two-to-two secure redundancy structure therebetween. Each CPU processing unit comprises a CPU, an Ethernet first switching module, an Ethernet second switching module, an independent Ethernet port and an output communication port. And the two CPU processing units are integrated on a single board, and data synchronous communication is carried out between the two CPU processing units through the Ethernet with double network redundancy.
The Ethernet is used as an important data transmission channel among CPU processing units, a dual-network redundancy structure is adopted, each CPU processing unit is provided with a plurality of Ethernet interfaces, one path of independent Ethernet interfaces is converted into the Ethernet through USB2.0, and the Ethernet supports 100Mbps speed and is used as a synchronous communication channel 1; a plurality of Ethernet interfaces are connected with the Ethernet first switching module through the PHY chip; and the Ethernet interfaces are expanded and connected with the Ethernet second switching module through the PCIe bus interface. The Ethernet formed by connecting the PHY chip with the Ethernet first switching module is called a closed network, and mainly carries out the communication of safety data as a synchronous communication channel 2; the ethernet extended to the ethernet second switching module via the PCIe bus interface is called an open network, and mainly performs data communication with the outside world. The dual-network redundancy structure avoids the occurrence of the condition that the whole system cannot operate due to single network faults, and improves the reliability of the safety computer.
The first ethernet switching module and the second ethernet switching module each include at least 5 output ports, network resources in this embodiment are rich, each CPU processing unit includes at least eight gigabit ethernet interfaces and one hundred mega ethernet interface, and the gigabit ethernet can also be equipped with a plurality of communication modules for communication with the communication device.
For data synchronization between two CPU processing units, a dual channel may be used for data synchronization. As shown in fig. 2, the data synchronization of the first CPU processing unit and the second CPU processing unit can be performed through the synchronous communication channel 1 or the synchronous communication channel 2, so that the problem that a single switch has common cause failure is solved through the dual-channel data sharing method between the two CPU processing units, if one of the synchronous channels fails, the normal operation of the whole system is not affected, and if one of the ethernet switching modules fails, the synchronization between the data is not affected.
The network formed by the first CPU processing unit is A network, and the network formed by the second CPU processing unit is B network. For the first CPU processing unit and the second CPU processing unit, when the A network has data and the B network has no data, the A network shares the same data with the first CPU processing unit after being synchronized by the synchronous communication channel 1 or the synchronous communication channel 2, and similarly, when the B network has data and the A network has no data, the B network shares the same data with the second CPU processing unit after being synchronized by the synchronous communication channel 1 or the synchronous communication channel 2, and redundancy and two-out are not affected.
The output ports of the Ethernet first exchange module or the Ethernet second exchange module are mutually and electrically isolated, the first CPU processing unit and the second CPU processing unit are also electrically isolated from the data synchronization channel, and the arrangement of a plurality of Ethernet is the most outstanding advantage of the invention, and the transmission speed is far higher than that of the common interface.
The peripheral output communication ports of the first CPU processing unit and the second CPU processing unit are the same in type, and form a redundant structure in a bus mode, including but not limited to RS485, RS422, RS232, CAN, CANFD and Ethernet. The interfaces RS485, RS422, RS232 and CAN CAN be expanded through serial ports, CANFD is expanded through buses, and each communication interface is isolated from the CPU through an isolation device. The communication rates of the RS485, RS422 and RS232 communication interfaces meet 115.2kbps, the CAN communication interface supports 1Mbps communication rate, and the CANFD communication interface supports 2.5Mbps communication rate.
Based on the computer redundant communication system provided by the application, the application also provides a safety computer, and the safety computer comprises other constituent units, wherein the other constituent units comprise a power supply unit, a storage unit, a system debugging unit, a safety circuit unit, a voltage monitoring unit, a resetting unit, a watchdog unit, a temperature monitoring unit, a display unit, an address identification unit, an indicator light unit and a switching unit.
The CPU adopts a Cortex-A9 ARM kernel processor, the processor controls the running state of the whole system, a storage unit is configured with DDR3 and eMMC storage of 1G of at least 512MB and is used for running software resources and storing safety and non-safety data, a power supply unit comprises all power supplies used in a single board and supports a hot plug mode, a debugging unit mainly carries out software debugging on the CPU, a debugging interface comprises but not limited to a TF card, a serial port and a MiniUSB interface, a safety circuit unit controls the on-off state of each power supply, a voltage monitoring unit carries out cross monitoring through the CPU, a resetting unit resets the CPU, a watchdog unit is a hardware watchdog, a temperature unit carries out temperature detection on the CPU, a display unit conveniently interacts with an upper computer, an address identification unit determines which CPU is in operation as a main system, an indication of fault and running state is carried out on the main system, and a switching unit switches the main system and the standby system.
The safety computer provided by the invention has the advantages that the output communication interface resources are rich, the redundant structural design is adopted, the safety and the reliability of the system are ensured, the application range is wide, the safety computer is applicable to but not limited to the field of rail transit, and the safety computer can be used as a general safety computer.
The above embodiments are merely illustrative of the preferred embodiments of the present invention and are not intended to limit the scope of the present invention, and various modifications and improvements made by those skilled in the art to the technical solution of the present invention should fall within the protection scope defined by the claims of the present invention without departing from the design spirit of the present invention.
Claims (8)
1. A computer redundant communications system, comprising:
each CPU processing unit comprises a CPU, an Ethernet first switching module, an Ethernet second switching module, an independent Ethernet port and a plurality of output communication ports;
the Ethernet first switching module is used for constructing a closed network and is used as a communication channel of the two CPU processing units;
the Ethernet second switching module is used for constructing an open network to carry out data communication;
the independent Ethernet port is used for constructing an Ethernet data transmission network and is used as a communication channel of the two CPU processing units;
and the two CPU units adopt double channels to carry out data synchronous communication, and the output communication ports are the same.
2. The computer redundant communication system according to claim 1, wherein the two CPU units use two channels for data synchronous communication, specifically:
each CPU processing unit is configured with a plurality of Ethernet interfaces, wherein one path of independent Ethernet interface is converted into Ethernet through USB2.0 and is used as a synchronous communication channel 1; a plurality of Ethernet interfaces are connected with the Ethernet first switching module through the PHY chip; the Ethernet interfaces are expanded and connected with the Ethernet second switching module through the PCIe bus interface;
the PHY chip is connected with an Ethernet formed by an Ethernet first switching module to form a closed network, so that safety data communication is carried out and the closed network is used as a synchronous communication channel 2; the ethernet which is connected to the ethernet second switching module by way of the PCIe bus interface extension is called an open network, and performs data communication with the outside world.
3. The computer redundant communication system of claim 2 wherein the ethernet interfaces of the first CPU processing unit and the second CPU processing unit comprise: the method is realized by using a PHY chip, a switch chip, a USB-to-Ethernet chip and a PCIe interface extension mode.
4. A computer redundant communication system according to claim 3 wherein the ethernet interfaces of the first CPU processing unit and the second CPU processing unit are electrically isolated from each other.
5. The computer redundant communication system of claim 1 wherein the output communication ports of the first CPU processing unit and the second CPU processing unit are identical, the output communication ports comprising: RS485, RS422, RS232, CAN, CANFD, USB2.0, ethernet;
the RS485, RS422, CAN, CANFD and Ethernet communication ports are electrically isolated from the first CPU processing unit or the second CPU processing unit communication channels.
6. The computer redundant communication system of claim 1 wherein the CPUs of both CPU units employ the same processor, either a single-core or dual-core ARM core processor.
7. A security computer comprising a computer redundant communication system as recited in claims 1-6, wherein the security computer further comprises other constituent elements including: the device comprises a power supply unit, a storage unit, a debugging unit, a safety circuit unit, a voltage monitoring unit, a resetting unit, a watchdog unit, a temperature monitoring unit, a display unit, an address identification unit, an indicator lamp unit and a switching unit.
8. The redundant communications security computer of claim 7 wherein the first CPU processing unit monitors the voltage of the second CPU processing unit, the second CPU processing unit monitoring the voltage of the first CPU processing unit.
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