CN117316894B

CN117316894B - Single package body integrating multiple chip packages

Info

Publication number: CN117316894B
Application number: CN202311282888.8A
Authority: CN
Inventors: 古德宗; 廖浚男; 范光宇
Original assignee: Zhejiang Ruizhaoxin Semiconductor Technology Co ltd
Current assignee: Zhejiang Ruizhaoxin Semiconductor Technology Co ltd
Priority date: 2023-09-28
Filing date: 2023-09-28
Publication date: 2024-03-22
Anticipated expiration: 2043-09-28
Also published as: CN117316894A

Abstract

The invention discloses a single package body integrating multiple chip packages, which relates to the field of integrated circuits and comprises a package module, a heat dissipation optimization module, an electromagnetic interference isolation module, a simulation verification module, a maintenance upgrading module, a fault maintenance module, a power management module, a debugging optimization module, an electrostatic impedance protection module and a control interface module; according to the invention, the heat radiation effect of the whole packaging body is improved through the heat radiation optimization module, and the heat radiation problem of the traditional packaging body is solved; signal interference among different modules is isolated through an electromagnetic interference isolation module; designing and verifying a system level through a simulation verification module; different chip modules are independently designed through a modularized design method; the maintenance and upgrading module is provided with the chip slot which is easy to disassemble and install, so that the maintenance and upgrading cost and difficulty are reduced; the invention solves the defects of heat dissipation problem, mutual interference, high design difficulty and difficult maintenance and upgrading of the traditional packaging body.

Description

Single package body integrating multiple chip packages

Technical Field

The present invention relates to the field of integrated circuits, and more particularly to a single package incorporating multiple chip packages.

Background

In the current technology day-to-day age, the packaging mode of the chip is also evolving continuously. A fully innovative packaging concept has been developed to integrate multiple chips into a single package. The novel packaging body is pursued to have higher performance, smaller size and lower power consumption, and simultaneously provides greater flexibility and integration level for application in different fields.

Under the promotion of the rapid development of the fields of big data, cloud computing, the Internet of things and the like, a single package body integrating multiple chip packages becomes a new trend of electronic product design. The system not only meets the requirements of different fields, but also can improve the performance and the integration level of the system, and simultaneously reduces the cost.

With the rapid development of information technology, people have increasingly higher requirements on the performance and the function of electronic products, but the traditional chip packaging mode has some limitations, and cannot meet the increasing requirements.

Firstly, different chips generate heat during operation, if the chips are integrated in a package, poor heat dissipation can be caused, and the temperature of the chips is increased, so that the performance and the service life are affected;

second, electromagnetic interference between different chips may increase; when a plurality of chips share the same package, electromagnetic interference between the chips may cause signal quality to be reduced, noise is introduced, and performance and stability are affected;

Third, in the design and manufacturing process, a single package incorporating multiple chip packages requires more complex layout and wiring connections, increasing the task and challenges of the design engineer; furthermore, since the physical and electrical requirements may vary from chip to chip, more iterations and verifications may be required;

finally, when a chip in a package fails or needs to be upgraded, maintenance and upgrade may become complicated; because the different chips are integrated together, an overall replacement or rewiring may be required, increasing the cost and difficulty of maintenance and upgrades;

therefore, the defects of heat dissipation, mutual interference, high design difficulty and difficult maintenance and upgrading of the traditional packaging body are overcome; the invention discloses a single package body integrating multiple chip packages.

Disclosure of Invention

Aiming at the defects of the prior art, the invention discloses a single package body integrating multiple chip packages, and the heat dissipation effect of the whole package body is improved through a heat dissipation optimization module so as to ensure that each chip can keep a proper temperature range during working; the buried layer method is adopted by the electromagnetic interference isolation module, so that signal interference among different modules is effectively isolated, and the signal quality and the system stability are ensured; through the simulation verification module, in the design process, system-level design and verification are carried out, wherein the comprehensive consideration of physical and electrical requirements among different chips is carried out; through system simulation, emulation and test verification, iteration times are reduced, and the reliability and performance of the whole packaging body are ensured to meet design requirements; different chip modules are independently designed through a modularized design method; in this way, when a certain chip fails or needs to be upgraded, the module can be replaced or upgraded more easily without changing the whole package; the chip slot easy to detach and install is set up through the maintenance upgrading module, and a programmable and configurable hardware architecture is adopted, so that a single chip can be flexibly maintained and upgraded when needed, and the maintenance and upgrading cost and difficulty are reduced.

In order to achieve the technical effects, the invention adopts the following technical scheme:

a single package incorporating multiple chip packages, comprising:

the packaging module is used for carrying out ball grid array packaging through a PCB tool of a circuit board and carrying out wiring connection through a high-density interconnection process so as to realize the minimization of the size;

the heat radiation optimization module adopts a double-layer PCB design, wherein the bottom layer comprises a processor and a memory chip, and the top layer comprises a sensor so as to realize the temperature control of the chip in a safe range during operation;

the electromagnetic interference isolation module is used for reducing electromagnetic interference by adding a ground layer into the circuit board and isolating by utilizing a metal shielding cover;

the simulation verification module is used for carrying out system-level simulation and verification on the whole package body through a virtual prototype method;

the maintenance and upgrading module realizes the detachable connection of the chip and the packaging body through a modularized design method so as to facilitate maintenance and upgrading;

the fault maintenance module is used for realizing fault elimination and upgrading maintenance by adding a debugging interface, a fault indicator lamp and a programmable controller, and the programmable controller cuts off a fault circuit through a circuit breaker so as to prevent fault expansion;

The power management module monitors and adjusts the voltage and current supply among different chip modules through the power management chip and the power management integrated circuit so as to ensure the stability of the system;

the debugging optimization module ensures the reliability of the packaging body and the fault tolerance capability of the system through a redundancy design strategy, and the redundancy design strategy improves the reliability of the packaging body through a backup power supply, a fault tolerance mode and a fault detection mechanism;

the electrostatic impedance protection module is used for protecting the chip from being damaged by electrostatic discharge by adding an electrostatic impedance protection circuit;

the control interface module is used for realizing connection and interaction between the packaging body and chips of different types through a universal interface protocol I2C so as to ensure the compatibility and expandability of data exchange;

the output end of the heat radiation optimization module is connected with the input end of the electromagnetic interference isolation module; the output end of the electromagnetic interference isolation module is connected with the input end of the simulation verification module; the output end of the simulation verification module is connected with the input end of the maintenance upgrading module; the output end of the maintenance upgrading module is connected with the input end of the fault maintenance module; the output end of the fault maintenance module is connected with the input end of the power management module; the output end of the power management module is connected with the input end of the debugging optimization module; the output end of the debugging optimization module is connected with the input end of the electrostatic impedance protection module; the output end of the electrostatic impedance protection module is connected with the input end of the control interface module; the output end of the control interface module is connected with the input end of the packaging module.

As a further technical scheme of the invention, the specific implementation working steps of the high-density interconnection process are as follows:

step 1, cleaning and removing impurities and oxides on the surface of a substrate through sodium hydroxide, and increasing the hydrophilicity of the surface of the substrate so as to ensure that a metallized layer is tightly combined with the surface of the substrate;

step 2, printing a circuit pattern on a substrate through the photosensitive cover layer, and developing the photosensitive cover layer through a developer to form a required circuit pattern;

step 3, a metallization layer is covered on the printed circuit pattern through a gold plating process so as to provide conductivity and corrosion resistance;

step 4, etching the metallization layer and the substrate through etching liquid to deepen the display circuit pattern;

step 5, after chemical etching is completed, a gold plating process is performed again to enhance the conductivity and corrosion resistance of the circuit pattern and the metallization layer;

step 6, forming a covering layer on the surface of the substrate and the metallization layer by a vapor deposition method so as to protect a circuit and provide anti-corrosion protection;

step 7, punching and inserting mounting are carried out on the substrate, wherein the punching and inserting can be used for connecting various chips and external equipment so as to realize multi-chip packaging and high-density interconnection.

As a further technical scheme of the invention, the heat radiation optimizing module comprises a radiating fin unit, a radiating pipe unit, a radiator unit and a heat conduction gasket unit; the radiating fin unit adds an aluminum sheet above the processor and the memory chip at the bottom layer to increase the radiating surface area and improve the radiating efficiency; the radiating pipe units are used for transferring heat by filling heat conducting medium between the bottom chip and the top radiating fin; the radiator unit increases air flow through a fan to accelerate heat transfer and dissipation near the radiating fins, the fan is driven to rotate through a direct current motor to generate forced convection to take away heat, and intelligent regulation of wind speed is realized through temperature feedback control; the heat conductive gasket unit fills the gaps between uneven surfaces and improves heat conduction efficiency by placing a silicone grease material between the heat sink and the chip.

As a further technical scheme of the invention, the simulation verification module comprises a circuit simulation unit, a system modeling unit, a signal integrity analysis unit, a thermal analysis unit and a power consumption analysis unit; the circuit simulation unit verifies the functions and performances of the circuit through a circuit simulation tool, and the circuit simulation tool realizes the simulation and analysis of the chip circuit through a circuit analysis method so as to ensure the correctness of the design; the system modeling unit realizes simulation and analysis of the whole packaging body by establishing a system-level model; the signal integrity analysis unit performs matching impedance control, signal interval planning and time sequence constraint assurance of a signal transmission line through a high-speed signal integrity simulation tool and a wiring rule so as to ensure the accuracy and stability of signal transmission; the high-speed signal integrity simulation tool simulates and analyzes the signal integrity in the package body through an electromagnetic field solving method, the electromagnetic field solving method builds a model through a magnetic flux equation, and the formula expression of the magnetic flux equation is as follows:

In the formula (1), E represents an electric field intensity vector, H represents a magnetic field intensity vector, B represents a magnetic induction intensity, D represents an electric displacement vector,representing current density, w representing charge density, s representing time;

the thermal analysis unit simulates and analyzes the thermal distribution in the package body through a thermal conduction equation to predict the temperature distribution of the chip, wherein the thermal conduction equation has the formula expression:

in the formula (2), y represents a temperature field of an object at a certain moment, t represents a time parameter, N is a Laplacian operator, the spatial distribution of the temperature field is described, and z represents a thermal diffusion coefficient of a substance;

the power consumption analysis unit simulates and analyzes the power consumption of each chip in the package body through a power consumption analysis method so as to determine that the power consumption of the system meets the requirement.

As a further technical scheme of the invention, the modularized design method realizes the insertion and extraction of the chip module through the module connector, and is connected and communicated with a bus system inside the packaging body through a standard interface; the module connector comprises a connector assembly, a spring connector, a magnetic connector and a hardware connector; the packaging body is connected with the chip through a connector, and the connector provides electric connection through a metal pin and transmits data and signals; the spring connector realizes the insertion and extraction of the chip module through the elastic metal sheet; the magnetic connector realizes the electrical connection between the chip and the packaging body through magnetic attraction; the hardware plug-in unit fixes the chip through a screw buckle.

As a further technical scheme of the invention, the circuit breaker comprises a detection unit, a breaking unit, a control unit and a protection loop; the detection unit detects abnormal conditions in the circuit through the trigger and triggers the switching action of the disconnection unit; the trigger monitors based on current, voltage and temperature parameters and sends a signal to trigger the disconnection unit when abnormality is detected; the disconnecting unit is connected with the disconnecting circuit through an electromagnetic relay; the control unit receives the trigger signal through the microprocessor and controls the cutting-off action of the cutting-off unit; the protection loop monitors the state of the circuit breaker through a current sensor and a temperature sensor, and triggers the circuit breaker to avoid fault expansion when the current of the circuit breaker is abnormal, the temperature is too high or the circuit breaker is short-circuited; the output end of the detection unit is connected with the input end of the control unit; the output end of the control unit is connected with the input end of the disconnection unit.

As a further technical scheme of the invention, the power management chip comprises a converter, a linear voltage stabilizer, a battery management module, a power selection switch and a clock generator; the power management chip performs voltage boosting, voltage reducing or reverse conversion through the converter so as to meet the voltage requirements of different chip modules; the power management chip provides stable voltage output through the linear voltage stabilizer; the linear voltage stabilizer realizes voltage regulation by generating an adjustable voltage difference and converts redundant voltage into heat; the battery management module ensures the safety of the battery through charge management, discharge protection and battery state monitoring methods; the power supply selection switch controls different power supply inputs through the semiconductor switching device so as to adapt to different working scenes; the power management chip provides clock signals through a clock generator to synchronize the operation of each chip module in the package.

As a further technical scheme of the invention, the electrostatic impedance protection circuit protects the chip from electrostatic discharge through the anti-electrostatic element and the transient voltage suppressor; the electrostatic impedance protection circuit comprises a protection diode, a selector and a protection array; the electrostatic impedance protection circuit absorbs and releases electrostatic energy through a protection diode; the protection diode is electrically connected with a signal line of the input/output interface, and when an electrostatic discharge event occurs, the protection diode provides a low-impedance path through internal voltage adjustment, and electrostatic discharge energy is transferred to the ground or a shielding pin so as to protect the chip; the electrostatic impedance protection circuit limits excessive voltage rise through a selector and suppresses voltage peaks caused by electrostatic discharge; the selector is realized by a reverse junction diode; the protection array provides multiple protection paths to handle electrostatic discharge events of different voltage classes by integrating protection diodes and selectors.

As a further technical scheme of the invention, the control interface module comprises a time sequence generating unit, a data buffer unit, a data interface unit, a control signal converting unit and a state latching unit; the time sequence generation unit manages and coordinates the time sequence of the whole control interface module through the time sequence controller, so that the transmission rate and time of signals among chips are kept consistent, and data loss or errors are prevented; the data caching unit temporarily stores data through the caching chip to solve the problem of data transmission rate mismatch among different chips, and temporarily stores the data in the caching chip and transmits the data to the target chip at a proper time when the data transmission rates are inconsistent; the data interface unit is connected with the control interface module and chips of different types through the communication interface chip and exchanges data, and the communication interface chip ensures compatibility and reliable data transmission through data format conversion, level conversion and signal processing; the control signal conversion unit converts the level standard and the coding format of the input signal into the standard and the format required by the target chip through the logic gate circuit, so that data can be correctly exchanged between the chips; the state latch unit temporarily stores data through a latch and ensures that data is transferred and held in a stable clock period.

Has the positive beneficial effects that:

according to the invention, the heat radiation effect of the whole packaging body is improved through the heat radiation optimization module, so that each chip can keep a proper temperature range during working; the buried layer method is adopted by the electromagnetic interference isolation module, so that signal interference among different modules is effectively isolated, and the signal quality and the system stability are ensured; through the simulation verification module, in the design process, system-level design and verification are carried out, wherein the comprehensive consideration of physical and electrical requirements among different chips is carried out; through system simulation, emulation and test verification, iteration times are reduced, and the reliability and performance of the whole packaging body are ensured to meet design requirements; different chip modules are independently designed through a modularized design method; in this way, when a certain chip fails or needs to be upgraded, the module can be replaced or upgraded more easily without changing the whole package; the chip slot easy to detach and install is set up through the maintenance upgrading module, and a programmable and configurable hardware architecture is adopted, so that a single chip can be flexibly maintained and upgraded when needed, and the maintenance and upgrading cost and difficulty are reduced.

Drawings

FIG. 1 is a flow diagram of a single package integrated module incorporating multiple chip packages according to the present invention;

FIG. 2 is a diagram of the steps in a high density interconnect process in a single package incorporating multiple chip packages according to the present invention;

FIG. 3 is a schematic diagram illustrating the operation of a model verification module in a single package incorporating multiple chip packages according to the present invention;

FIG. 4 is a schematic diagram illustrating the operation of an electrostatic impedance protection circuit in a single package incorporating multiple chip packages according to the present invention;

FIG. 5 is a block diagram of a control interface module in a single package incorporating multiple chip packages according to the present invention;

Detailed Description

The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.

As shown in fig. 1-5, a single package body incorporating a plurality of chip packages, includes:

In the above embodiment, the specific implementation working steps of the high-density interconnection process are as follows:

In a specific embodiment, in a single package body in which a plurality of chip packages are integrated, a high-density interconnection process is implemented by designing circuit connection lines (interconnections) between a plurality of chips in the same package layer and adopting fine line width, line spacing, multilayer wiring and other means to achieve size minimization. First, the high density interconnect process uses multiple metal line layers to increase the number of connection channels available, increasing the wiring density by way of vertical stacking.

And secondly, the high-density interconnection process adopts smaller line width and line distance, so that more wires can be accommodated in a limited space, and the wiring density is improved.

In addition, the high-density interconnection process adopts special wiring technology, such as differential signal wires, impedance matching and the like, so as to optimize power consumption management and ensure stable transmission of signals.

In particular implementations, by high density interconnect processes, more functionality can be integrated into a small package, thereby minimizing package volume, making the device more compact and lightweight. In addition, the high-density interconnection process can shorten the signal transmission path and reduce signal delay and loss, so that the response speed and performance of the circuit are improved. Through reasonable wiring design, can reduce the consumption loss, improve energy efficiency, extension battery life is particularly useful for mobile device and embedded system. The high-density interconnection technology adopts the technologies of differential signal wires, impedance matching and the like, so that the anti-interference capability of signals can be improved, signal distortion is reduced, and stable transmission of the signals is ensured. The high-density interconnection process can flexibly connect different types of chips, can be customized and combined according to requirements, and provides more selection and expansion capability.

In practice, high density interconnect processes play an important role in a single package that fuses multiple chip packages. The method provides higher flexibility and reliability for the design and manufacture of electronic equipment by minimizing the size, optimizing the performance, reducing the power consumption, improving the anti-interference performance, improving the signal integrity and the like, wherein the evaluation table of the performance of the multi-chip package fused by the high-density interconnection process is shown in the table 1:

TABLE 1 high density interconnect process fusion multi-chip package performance evaluation chart

In the above embodiment, the heat radiation optimizing module includes a fin unit, a radiating pipe unit, a radiator unit, and a heat conduction gasket unit; the radiating fin unit adds an aluminum sheet above the processor and the memory chip at the bottom layer to increase the radiating surface area and improve the radiating efficiency; the radiating pipe units are used for transferring heat by filling heat conducting medium between the bottom chip and the top radiating fin; the radiator unit increases air flow through a fan to accelerate heat transfer and dissipation near the radiating fins, the fan is driven to rotate through a direct current motor to generate forced convection to take away heat, and intelligent regulation of wind speed is realized through temperature feedback control; the heat conductive gasket unit fills the gaps between uneven surfaces and improves heat conduction efficiency by placing a silicone grease material between the heat sink and the chip.

In a specific embodiment, a heat sink unit is located on top of the chip or module, which acts to increase the surface area and promote heat dissipation. It can transfer heat by diffusion and convection and disperse the heat to a larger air contact surface.

The radiating pipe unit is a heat conductive member made of copper or aluminum. The heat radiating pipe transfers heat through an internal heat conducting medium, transferring the heat from the heat source part to the heat sink part. It can effectively eliminate hot spot and raise heat transfer efficiency.

The radiator unit is composed of a fan and has a large-area radiating fin structure. The heat dissipation of the heat is accelerated through a large-area heat dissipation surface and forced convection, and the heat transferred by the heat dissipation pipe is released into the surrounding air.

The heat conductive spacer unit is located between the chip and the heat sink for filling the uneven surface between the two, improving heat conduction efficiency and ensuring good contact.

In specific implementation, the heat radiation optimization module can effectively increase the heat radiation surface area and improve the heat transfer efficiency, so that the heat radiation performance of the chip or the module is optimized. Meanwhile, through the use of the radiating fin units and the radiating pipe units, the heat can be uniformly distributed in the chip or the module, hot spots are avoided, and stable operation of all parts of the system is ensured. The adoption of the radiator unit can quickly radiate heat to the surrounding environment through forced convection, the temperature is reduced, the working temperature of the assembly is kept within a reasonable range, and long-term stability and reliability are improved. In addition, the heat-conducting spacer unit can fill the tiny gap between the chip and the heat sink, and by providing a suitable contact pressure, ensures that heat can be effectively conducted to the heat sink.

In the above embodiment, the analog verification module includes a circuit simulation unit, a system modeling unit, a signal integrity analysis unit, a thermal analysis unit, and a power consumption analysis unit; the circuit simulation unit verifies the functions and performances of the circuit through a circuit simulation tool, and the circuit simulation tool realizes the simulation and analysis of the chip circuit through a circuit analysis method so as to ensure the correctness of the design; the system modeling unit realizes simulation and analysis of the whole packaging body by establishing a system-level model; the signal integrity analysis unit performs matching impedance control, signal interval planning and time sequence constraint assurance of a signal transmission line through a high-speed signal integrity simulation tool and a wiring rule so as to ensure the accuracy and stability of signal transmission; the high-speed signal integrity simulation tool simulates and analyzes the signal integrity in the package body through an electromagnetic field solving method, the electromagnetic field solving method builds a model through a magnetic flux equation, and the formula expression of the magnetic flux equation is as follows:

in the formula (1), E represents an electric field intensity vector, H represents a magnetic field intensity vector, B represents a magnetic induction intensity, D represents an electric displacement vector, Representing current density, w representing charge density, s representing time;

In a specific embodiment, in the simulation verification module, the circuit simulation unit performs simulation analysis on a circuit of the chip or the module through a mathematical model and circuit simulation software. The circuit can simulate the behavior, performance and response of the circuit, and can perform electrical characteristic verification in a software environment, including function verification, time sequence verification and the like. The system modeling unit is used for establishing a system-level model of the chip or the module so as to simulate the behavior and the performance of the whole system. The function, interaction and time sequence relation of the system can be described by establishing a high-level abstract model, so that the whole system is verified and analyzed. The signal integrity analysis unit is used for analyzing the influence of factors such as transmission, delay, noise and the like of signals in the chip or the module on the system performance. The signal integrity can be evaluated and optimized through the transmission path, interface characteristics, signal coupling and the like of the analog signals, and the accurate transmission and correct interpretation of the signals are ensured. The thermal analysis unit is used for simulating and analyzing the thermal characteristics of the chip or the module. The heat distribution, heat conduction and heat dissipation conditions of the chip or the module in the working process can be simulated, and the heat dissipation design and the heat management strategy are optimized by evaluating temperature distribution, hot spot positions, heat dissipation and the like. The power consumption analysis unit is used for simulating and analyzing the power consumption of the chip or the module. The power consumption condition of the chip or the module under different work loads, frequencies and voltages can be simulated, the power consumption performance can be estimated and optimized, and an effective power consumption management scheme is provided.

In implementations, problems in circuits or systems can be discovered and resolved at an early design stage through circuit simulation and system modeling, thereby improving design and improving reliability and stability of the product.

By means of signal integrity analysis, the quality of signal transmission can be predicted and optimized, risks of signal jitter, crosstalk and other problems are reduced, and performance and reliability of the system are improved.

The thermal analysis unit can help designers evaluate the thermal characteristics of chips or modules, optimize heat dissipation design, improve heat dissipation efficiency, reduce temperature and ensure stable operation of the system in a normal working temperature range.

The power consumption analysis unit can help designers evaluate and optimize the power consumption performance of the chip or the module, find strategies and schemes for reducing power consumption, improve the service life of the battery and save energy.

In a specific implementation, the data tables analyzed by the circuit simulation, system modeling, signal integrity analysis, thermal analysis, and power consumption analysis means of the analog verification module are shown in table 2:

when analog verification of a single package of multiple chip packages is involved, you can create a table called the "package analog verification digital data table" for recording the relevant digital data. The following is an example table:

Table 2 package analog verification digital data table

Through the data table 2, the electrical characteristics, system performance, signal integrity, thermal characteristics and power consumption of the chip or module can be evaluated and optimized, and the reliability, performance and efficiency of the design are improved.

In the above embodiment, the modular design method realizes the insertion and extraction of the chip module through the module connector, and connects and communicates with the bus system inside the package through the standard interface; the module connector comprises a connector assembly, a spring connector, a magnetic connector and a hardware connector; the packaging body is connected with the chip through a connector, and the connector provides electric connection through a metal pin and transmits data and signals; the spring connector realizes the insertion and extraction of the chip module through the elastic metal sheet; the magnetic connector realizes the electrical connection between the chip and the packaging body through magnetic attraction; the hardware plug-in unit fixes the chip through a screw buckle.

In a specific embodiment, in a single package body incorporating multiple chip packages, the working principle of the modular design is as follows:

and (S1) dividing the whole system into a plurality of independent modules according to the system requirements and the functional characteristics. Each module is responsible for performing a particular function or assuming a particular task.

(S2) interface definition, definition of clear interface specifications including input and output signals, communication protocols, electrical characteristics and the like are defined for each module. So that data exchange and communication can be performed between the different modules through the interfaces.

(S3) module design, specific design is carried out for each module, including circuit design, layout design, packaging selection and the like. Each module may be composed of different types of chip packages, such as ASIC, FPGA, MCU, etc.

And (S4) integrating and testing the modules, integrating the designed modules, and performing overall testing. The interfacing between the modules and the verification of the communication protocol are both done in this process.

And S5, performing function verification and debugging, namely ensuring that the cooperative work and the mutual coordination between the modules are normal by performing function verification and debugging on the whole system. If problems are found, further optimization and tuning of the module design is required.

And S1, optimizing the efficiency, and increasing, decreasing or replacing the modules according to actual requirements through modularized design so as to further optimize the system performance. The replaceability and upgradeability of the modules may improve the flexibility and scalability of the system.

In the specific implementation, as each module is independently designed and tested, the complexity of the overall development of the system is reduced, and the product marketing speed is accelerated. In addition, the modularized design enables all modules of the system to be isolated from each other, interference and influence among the modules are reduced, and stability and reliability of the system are improved. Meanwhile, through the modularized design, the modules can be flexibly combined and adjusted according to different application requirements, a customized solution is provided, and the requirements of different users are met. Secondly, when a certain module in the single packaging body has a problem, the module can be replaced and updated more conveniently by the modularized design, and the maintainability and upgradeability of the product are improved. Finally, the modular design can realize the multiplexing of the modules, and the development cost is reduced. Meanwhile, the independent design of the module reduces the difficulty of troubleshooting and maintenance and reduces the maintenance cost.

In summary, the modular design in a single package body integrating multiple chip packages improves the efficiency, stability and flexibility of system development through the steps of dividing, defining interfaces, designing, integrating, testing and the like, and has the positive and beneficial effects of reducing the cost and accelerating the iterative updating of products. .

In the above embodiment, the circuit breaker includes a detection unit, a breaking unit, a control unit, and a protection circuit; the detection unit detects abnormal conditions in the circuit through the trigger and triggers the switching action of the disconnection unit; the trigger monitors based on current, voltage and temperature parameters and sends a signal to trigger the disconnection unit when abnormality is detected; the disconnecting unit is connected with the disconnecting circuit through an electromagnetic relay; the control unit receives the trigger signal through the microprocessor and controls the cutting-off action of the cutting-off unit; the protection loop monitors the state of the circuit breaker through a current sensor and a temperature sensor, and triggers the circuit breaker to avoid fault expansion when the current of the circuit breaker is abnormal, the temperature is too high or the circuit breaker is short-circuited; the output end of the detection unit is connected with the input end of the control unit; the output end of the control unit is connected with the input end of the disconnection unit.

In a specific embodiment, the circuit breaker monitors parameters such as current and voltage in the circuit through the detection unit. It may use sensors or integrated circuits to obtain circuit state information in real time, such as over-current, short-circuit current, or under-voltage conditions. And judging whether the circuit needs to be cut off or not by the disconnection unit according to the information from the detection unit and a preset protection rule. When an abnormality of the circuit is detected or a safety range is exceeded, the disconnection unit triggers an operation of shutting down the circuit. The operation of the disconnection unit is controlled and regulated by a control unit. It may be a microcontroller or a dedicated chip, which determines the appropriate timing of the circuit breaker operation based on information from the detection unit and sends corresponding control signals. The protection circuit is designed to ensure the safety of the circuit breaker and its peripheral circuits. It generally includes overcurrent protection, short-circuit protection, overtemperature protection, etc., and by monitoring and handling abnormal conditions, the entire system is protected from damage.

In a specific implementation, the circuit breaker can timely detect abnormal conditions of the circuit, such as overload, short circuit and the like, and then cut off the circuit to prevent further damage or safety accidents and protect the safety of personnel and equipment. By opening an abnormal circuit, the circuit breaker can effectively reduce power consumption. The circuit can be prevented from continuously consuming electric energy under abnormal conditions, energy is saved, and the efficiency of the system is improved. In addition, because the circuit breaker adopts an intelligent detection and control unit, the circuit state can be rapidly and accurately judged and the cutting operation can be carried out, so that the abnormal condition of the circuit can be rapidly responded, and the duration of the fault can be reduced. Second, the multiple protection loops of the circuit breaker may provide more reliable circuit protection. It is able to prevent and cope with circuit faults and to ensure that other parts in the system are not damaged. Meanwhile, the circuit breaker integrated with various chip packages can realize modularized design, and is convenient to replace and upgrade. When a certain component fails or needs to be updated, only the corresponding module needs to be replaced, so that maintenance cost and time are reduced.

The circuit breaker integrated with various chip packages realizes real-time monitoring and cutting operation of the circuit through mechanisms such as detection, disconnection, control, protection loop and the like, thereby guaranteeing the safety and stability of the circuit, and in specific implementation, the performance test data of the circuit breaker are shown in table 3:

table 3 breaker performance test data sheet

In the above embodiment, the power management chip includes a converter, a linear voltage regulator, a battery management module, a power selection switch, and a clock generator; the power management chip performs voltage boosting, voltage reducing or reverse conversion through the converter so as to meet the voltage requirements of different chip modules; the power management chip provides stable voltage output through the linear voltage stabilizer; the linear voltage stabilizer realizes voltage regulation by generating an adjustable voltage difference and converts redundant voltage into heat; the battery management module ensures the safety of the battery through charge management, discharge protection and battery state monitoring methods; the power supply selection switch controls different power supply inputs through the semiconductor switching device so as to adapt to different working scenes; the power management chip provides clock signals through a clock generator to synchronize the operation of each chip module in the package.

In a specific embodiment, the power management chip converts the voltage of the input power source into a required output voltage through a converter. The high-efficiency electric energy conversion is realized by adjusting the switching state and the duty ratio of the switching tube. Converters generally include direct current-to-direct current (DC-DC) converters and direct current-to-alternating current (DC-AC) converters that can provide outputs at different voltages and power levels.

The linear voltage stabilizer provides stable output voltage and responds to input voltage and load variation quickly. The voltage regulation is realized by converting redundant voltage into heat, and the device has the characteristics of low noise and low ripple. The linear voltage stabilizer is suitable for scenes with high requirements on power stability.

The connected battery is managed and protected by a battery management module. The method monitors parameters such as voltage, current and temperature of the battery, and performs functions such as charging control, overcharge protection, overdischarge protection, temperature protection and the like, so as to ensure safe use and prolonged service life of the battery.

Different power supply paths are switched through a power supply selection switch so as to meet different working modes or optimize power consumption. The power supply can switch the main power supply, the standby power supply or the external power supply according to the requirements, and ensures smooth transition and reliable power supply switching.

Clock signals are generated inside the chip by a clock generator to synchronize the operation of the various components. It provides a stable and accurate clock signal to ensure proper operation of the chip and accuracy of data transfer.

In the specific implementation, the converter adopts a high-efficiency electric energy conversion technology to efficiently convert the energy of an input power supply into the required output voltage, so that the energy loss and the heat generation are reduced, and the energy efficiency of the system is improved. Meanwhile, the linear voltage stabilizer and the battery management module can provide stable output voltage, respond to input voltage and load change quickly, and keep stability and reliability of the power supply. This helps to prevent the influence of power supply fluctuations on the system, providing good power supply quality. In addition, the battery management module monitors and controls various parameters of the battery so as to avoid the conditions of overcharge, overdischarge, overheat and the like, prolong the service life of the battery and ensure the safety and reliability of the battery. And secondly, the power supply selection switch provides a switching function of different power supply paths, and the most suitable power supply can be selected according to actual requirements so as to optimize power consumption and working efficiency. Meanwhile, the clock generator ensures the synchronization of clock signals in each chip, improves the coordination and accuracy of the system, and is beneficial to the accuracy of data transmission and the overall performance of the system.

Therefore, the power management chip integrated with various chip packages can provide positive and beneficial effects of high-efficiency conversion, stable power supply, battery protection and management, flexible power selection, synchronous clock signals and the like in a working principle mode.

In the above embodiment, the electrostatic impedance protection circuit protects the chip from electrostatic discharge by the anti-electrostatic element and the transient voltage suppressor; the electrostatic impedance protection circuit comprises a protection diode, a selector and a protection array; the electrostatic impedance protection circuit absorbs and releases electrostatic energy through a protection diode; the protection diode is electrically connected with a signal line of the input/output interface, and when an electrostatic discharge event occurs, the protection diode provides a low-impedance path through internal voltage adjustment, and electrostatic discharge energy is transferred to the ground or a shielding pin so as to protect the chip; the electrostatic impedance protection circuit limits excessive voltage rise through a selector and suppresses voltage peaks caused by electrostatic discharge; the selector is realized by a reverse junction diode; the protection array provides multiple protection paths to handle electrostatic discharge events of different voltage classes by integrating protection diodes and selectors.

In a specific embodiment, the working principle of the electrostatic impedance protection circuit is as follows:

1. when the external electrostatic field approaches or contacts the package, the existence of the electrostatic field is sensed by the electrostatic impedance protection circuit.

2. The electrostatic discharge is directed to pass over a particular path or element, depending on the path designed.

3. The current load of electrostatic discharge is shared by the resistor and the capacitor so as to effectively disperse and absorb electrostatic energy.

4. After the electrostatic discharge passes through the electrostatic impedance protection circuit, the voltage is effectively reduced, so that the protection chip is not damaged by the excessively high electrostatic voltage.

5. Is connected with the ground wire of the equipment to help safely discharge electrostatic energy onto the ground wire, further reducing the risk of electrostatic breakdown and damage.

In particular, the electrostatic impedance protection circuit can effectively prevent the damage of the internal chip package caused by electrostatic discharge. It protects the protective chip from electrostatic breakdown and damage by guiding, dispersing and reducing electrostatic energy. Meanwhile, the reliability and stability of the device are improved through the use of the electrostatic impedance protection circuit. It can reduce the failure caused by static electricity, prolong the service life of equipment and reduce maintenance and replacement costs. In addition, the electrostatic impedance protection circuit reduces the electrostatic pressure in the circuit and improves the safety and stability of the circuit by effectively sharing and absorbing electrostatic energy. Secondly, the application of the electrostatic impedance protection circuit can reduce adverse effects caused by electrostatic damage, and is beneficial to improving the quality and reliability of products.

In summary, the electrostatic impedance protection circuit protects the protection chip from electrostatic discharge by inducing, guiding, dispersing and reducing electrostatic energy. The electrostatic protection device has the positive beneficial effects of electrostatic protection, equipment reliability, circuit safety, product quality improvement and the like.

In the above embodiment, the control interface module includes a timing generation unit, a data buffer unit, a data interface unit, a control signal conversion unit, and a state latch unit; the time sequence generation unit manages and coordinates the time sequence of the whole control interface module through the time sequence controller, so that the transmission rate and time of signals among chips are kept consistent, and data loss or errors are prevented; the data caching unit temporarily stores data through the caching chip to solve the problem of data transmission rate mismatch among different chips, and temporarily stores the data in the caching chip and transmits the data to the target chip at a proper time when the data transmission rates are inconsistent; the data interface unit is connected with the control interface module and chips of different types through the communication interface chip and exchanges data, and the communication interface chip ensures compatibility and reliable data transmission through data format conversion, level conversion and signal processing; the control signal conversion unit converts the level standard and the coding format of the input signal into the standard and the format required by the target chip through the logic gate circuit, so that data can be correctly exchanged between the chips; the state latch unit temporarily stores data through a latch and ensures that data is transferred and held in a stable clock period.

In a specific embodiment, the control interface module generates various clock signals, timing signals, and timing sequences through the timing generation unit. It generates accurate timing signals according to system requirements to properly control data transmission and operation.

The data is temporarily stored by the data buffer unit for transmission to the corresponding chip at the correct time. It can buffer different data from different chips and exchange and manage the data according to specific strategies.

And connecting data among different chips through the data interface unit, and processing data formats, protocol conversion and the like. It converts and matches the data from the different chips appropriately to ensure proper transmission and compatibility of the data.

The control signals from the controller or other control modules are converted into control signals required by the specific chip by the control signal conversion unit. According to the interface requirement of the chip, the corresponding control signal is transmitted to the target chip, so that the control and configuration of the target chip are realized.

The state information of each chip is recorded and stored through the state latch unit so that the control interface module can acquire and respond in time. The state change of the chip can be monitored in real time, and related information is stored in the latch for inquiry and use by other modules.

In a specific implementation, the control interface module ensures the reliability of data transmission between different chips. Through coordination of modules such as time sequence generation, data caching and data interface units, data is ensured to be transmitted to a target chip in correct time and format, and stability and reliability of a system are improved. Meanwhile, the data interface unit of the control interface module is responsible for converting data formats and protocols, so that the interface compatibility among different packaging chips is ensured. This helps to simplify the system design and integration process, improving the flexibility and extensibility of the system. In addition, the control signal conversion unit converts the control signal of the main controller into the signal required by the specific chip, so that the system can control different chips more flexibly. Through control signal conversion and configuration, personalized control and optimization of different chips are realized, and specific application requirements are met. And secondly, the state latch unit monitors the state information of each chip in real time and provides accurate state feedback for the system. This is very beneficial to system debugging, fault diagnosis, performance optimization, etc., and helps to improve maintainability and manageability of the system.

While specific embodiments of the present invention have been described above, it will be understood by those skilled in the art that these specific embodiments are by way of example only, and that various omissions, substitutions, and changes in the form and details of the methods and systems described above may be made by those skilled in the art without departing from the spirit and scope of the invention. For example, it is within the scope of the present invention to combine the above-described method steps to perform substantially the same function in substantially the same way to achieve substantially the same result. Accordingly, the scope of the invention is limited only by the following claims.

Claims

1. A single package incorporating multiple chip packages, comprising:

2. The single package incorporating multiple chip packages of claim 1, wherein: the specific implementation working steps of the high-density interconnection process are as follows:

3. The single package incorporating multiple chip packages of claim 1, wherein: the heat radiation optimization module comprises a radiating fin unit, a radiating pipe unit, a radiator unit and a heat conduction gasket unit; the radiating fin unit adds an aluminum sheet above the processor and the memory chip at the bottom layer to increase the radiating surface area and improve the radiating efficiency; the radiating pipe units are used for transferring heat by filling heat conducting medium between the bottom chip and the top radiating fin; the radiator unit increases air flow through a fan to accelerate heat transfer and dissipation near the radiating fins, the fan is driven to rotate through a direct current motor to generate forced convection to take away heat, and intelligent regulation of wind speed is realized through temperature feedback control; the heat conductive gasket unit fills the gaps between uneven surfaces and improves heat conduction efficiency by placing a silicone grease material between the heat sink and the chip.

4. The single package incorporating multiple chip packages of claim 1, wherein: the simulation verification module comprises a circuit simulation unit, a system modeling unit, a signal integrity analysis unit, a thermal analysis unit and a power consumption analysis unit; the circuit simulation unit verifies the functions and performances of the circuit through a circuit simulation tool, and the circuit simulation tool realizes the simulation and analysis of the chip circuit through a circuit analysis method so as to ensure the correctness of the design; the system modeling unit realizes simulation and analysis of the whole packaging body by establishing a system-level model; the signal integrity analysis unit performs matching impedance control, signal interval planning and time sequence constraint assurance of a signal transmission line through a high-speed signal integrity simulation tool and a wiring rule so as to ensure the accuracy and stability of signal transmission; the high-speed signal integrity simulation tool simulates and analyzes the signal integrity in the package body through an electromagnetic field solving method, the electromagnetic field solving method builds a model through a magnetic flux equation, and the formula expression of the magnetic flux equation is as follows:

5. The single package incorporating multiple chip packages of claim 1, wherein: the modularized design method realizes the insertion and extraction of the chip module through the module connector, and connects and communicates with a bus system inside the package through a standard interface; the module connector comprises a connector assembly, a spring connector, a magnetic connector and a hardware connector; the packaging body is connected with the chip through a connector, and the connector provides electric connection through a metal pin and transmits data and signals; the spring connector realizes the insertion and extraction of the chip module through the elastic metal sheet; the magnetic connector realizes the electrical connection between the chip and the packaging body through magnetic attraction; the hardware plug-in unit fixes the chip through a screw buckle.

6. The single package incorporating multiple chip packages of claim 1, wherein: the circuit breaker comprises a detection unit, a disconnection unit, a control unit and a protection loop; the detection unit detects abnormal conditions in the circuit through the trigger and triggers the switching action of the disconnection unit; the trigger monitors based on current, voltage and temperature parameters and sends a signal to trigger the disconnection unit when abnormality is detected; the disconnecting unit is connected with the disconnecting circuit through an electromagnetic relay; the control unit receives the trigger signal through the microprocessor and controls the cutting-off action of the cutting-off unit; the protection loop monitors the state of the circuit breaker through a current sensor and a temperature sensor, and triggers the circuit breaker to avoid fault expansion when the current of the circuit breaker is abnormal, the temperature is too high or the circuit breaker is short-circuited; the output end of the detection unit is connected with the input end of the control unit; the output end of the control unit is connected with the input end of the disconnection unit.

7. The single package incorporating multiple chip packages of claim 1, wherein: the power management chip comprises a converter, a linear voltage stabilizer, a battery management module, a power selection switch and a clock generator; the power management chip performs voltage boosting, voltage reducing or reverse conversion through the converter so as to meet the voltage requirements of different chip modules; the power management chip provides stable voltage output through the linear voltage stabilizer; the linear voltage stabilizer realizes voltage regulation by generating an adjustable voltage difference and converts redundant voltage into heat; the battery management module ensures the safety of the battery through charge management, discharge protection and battery state monitoring methods; the power supply selection switch controls different power supply inputs through the semiconductor switching device so as to adapt to different working scenes; the power management chip provides clock signals through a clock generator to synchronize the operation of each chip module in the package.

8. The single package incorporating multiple chip packages of claim 1, wherein: the electrostatic impedance protection circuit protects the chip from being damaged by electrostatic discharge through an anti-electrostatic element and a transient voltage suppressor; the electrostatic impedance protection circuit comprises a protection diode, a selector and a protection array; the electrostatic impedance protection circuit absorbs and releases electrostatic energy through a protection diode; the protection diode is electrically connected with a signal line of the input/output interface, and when an electrostatic discharge event occurs, the protection diode provides a low-impedance path through internal voltage adjustment, and electrostatic discharge energy is transferred to the ground or a shielding pin so as to protect the chip; the electrostatic impedance protection circuit limits excessive voltage rise through a selector and suppresses voltage peaks caused by electrostatic discharge; the selector is realized by a reverse junction diode; the protection array provides multiple protection paths to handle electrostatic discharge events of different voltage classes by integrating protection diodes and selectors.

9. The single package incorporating multiple chip packages of claim 1, wherein: the control interface module comprises a time sequence generating unit, a data caching unit, a data interface unit, a control signal conversion unit and a state latching unit; the time sequence generation unit manages and coordinates the time sequence of the whole control interface module through the time sequence controller, so that the transmission rate and time of signals among chips are kept consistent, and data loss or errors are prevented; the data caching unit temporarily stores data through the caching chip to solve the problem of data transmission rate mismatch among different chips, and temporarily stores the data in the caching chip and transmits the data to the target chip at a proper time when the data transmission rates are inconsistent; the data interface unit is connected with the control interface module and chips of different types through the communication interface chip and exchanges data, and the communication interface chip ensures compatibility and reliable data transmission through data format conversion, level conversion and signal processing; the control signal conversion unit converts the level standard and the coding format of the input signal into the standard and the format required by the target chip through the logic gate circuit, so that data can be correctly exchanged between the chips; the state latch unit temporarily stores data through a latch and ensures that data is transferred and held in a stable clock period.