CN117288987A - Socket assembly for chip test and chip test system - Google Patents

Abstract

Embodiments of the present disclosure provide socket assemblies for chip testing and chip testing systems. The socket assembly includes: a first body; a plurality of first probes passing through the first body, the plurality of first probes being adapted to be pressed by the chip to be tested at a first surface of the first body and to press the testing device at a second surface of the first body to electrically connect the chip to be tested and the testing device; and a pressure sensing device arranged to sense a pressure experienced by at least a portion of the first probes of the plurality of first probes. The scheme of the disclosure can monitor the pressure born by the chip in real time in the chip test process so as to avoid quality accidents in the test process, and can also realize the life monitoring of the test hardware.

Description

Socket assembly for chip test and chip test system

Technical Field

The present disclosure relates generally to the field of chip testing technology, and more particularly, to a socket assembly for chip testing and a chip testing system including the same.

Background

Chip testing is testing of chips during or after their manufacture to verify the functionality and performance of the chips, thereby ensuring the yield of the chips. Special equipment or devices are required to complete the chip test during the chip test. For example, a chip test handler (handler), a test jig or socket (socket), a tester (tester), or the like may be provided. During testing, the chip may be pressed onto a test fixture or socket (socket) for receiving the chip such that solder balls or pins of the chip are connected to a tester via the socket, thereby testing various functions and properties of the chip with the tester.

These specialized devices or apparatuses may typically test one or more batches of chips. If abnormal operation occurs during the test or the performance of the devices or apparatuses is problematic, the test results of a large number of chips may be affected, and even damage to a large number of chips may be caused. However, there is currently a lack of effective and real-time monitoring means for operational anomalies in the test process or anomalies in the equipment or devices used for the test.

Disclosure of Invention

In order to solve the above-described problems, embodiments of the present disclosure provide an improved socket assembly for chip testing and a chip testing system including the same.

In a first aspect of the present disclosure, there is provided a socket assembly for chip testing, the socket assembly comprising: a first body; a plurality of first probes passing through the first body, the plurality of first probes being adapted to be pressed by the chip to be tested at a first surface of the first body and to press the testing device at a second surface of the first body to electrically connect the chip to be tested and the testing device; and a pressure sensing device arranged to sense a pressure experienced by at least a portion of the first probes of the plurality of first probes.

In the scheme of the disclosure, the pressure sensing device is arranged in the socket assembly, so that the pressure born by the chip to be tested can be monitored in real time during the chip test, and the quality accident caused by the pressure abnormality is avoided. Furthermore, by means of the pressure sensing means, the passive hardware device for chip testing can also be encoded and identified, and the number of uses of the passive hardware device can be counted precisely to evaluate the wear condition.

In certain embodiments of the present disclosure, the pressure sensing device comprises a plurality of first pressure sensing elements, each first pressure sensing element being arranged at a corresponding first probe. In this embodiment, by sensing the pressure or deformation of the first probe, the pressure distribution condition of the chip to be tested can be accurately obtained in real time.

In certain embodiments of the present disclosure, each first pressure sensing element is disposed at a location of the corresponding first probe adjacent to the test device. With this embodiment, the deformation of the first probe can be sensed more sensitively, thereby accurately sensing the pressure.

In certain embodiments of the present disclosure, the number of the plurality of first pressure sensing elements is equal to or less than the number of the plurality of first probes. With this embodiment, the monitoring cost can be reduced as much as possible while ensuring the monitoring effect.

In certain embodiments of the present disclosure, the plurality of first pressure sensing elements are arranged in a uniformly distributed manner at the plurality of first probes. In this embodiment, a relatively small number of first pressure sensing elements may be used to obtain the pressure profile of the chip.

In certain embodiments of the present disclosure, at least a portion of the plurality of first pressure sensing elements are arranged at first probes corresponding to high speed pins of the chip to be tested. By the embodiment, the pressure condition of the high-speed pin with higher requirements on the contact resistance can be monitored more accurately, so that signal transmission in the test process is prevented from being influenced.

In certain embodiments of the present disclosure, the receptacle assembly further comprises: the second body is suitable for being arranged on one side of the chip to be tested, which is far away from the first body; a plurality of second probes penetrating the second body, the plurality of second probes being adapted to be pressed by the pressing device at the first surface of the second body and to press the chip to be tested at the second surface of the second body to electrically connect the pressing device and the chip to be tested; the frame body surrounds and is fixedly connected to the first body; and at least one third probe passing through the frame, the at least one third probe being adapted to be pressed by the pressing device at the first surface of the frame and to press the testing device at the second surface of the frame to electrically connect the pressing device and the testing device. With this embodiment, the functionality associated with the chip top surface pins or solder balls can be tested and the number of uses of the passive hardware device over the chip top surface can be counted and the passive hardware device identified.

In certain embodiments of the present disclosure, the pressure sensing device further comprises a plurality of second pressure sensing elements arranged in the first body and adapted to be pressed by the lower base ring of the chip to be tested. In this embodiment, by arranging the second pressure sensing element, the pressure-bearing condition of the chip to be tested can be sensed more comprehensively.

In a second aspect of the present disclosure, there is provided a chip test system including: a receptacle assembly according to the first aspect; a testing device; and a pressing device configured to press the chip and the socket assembly to be tested toward the testing device.

In certain embodiments of the present disclosure, the test device is configured to issue an alarm based on a signal from the pressure sensing means indicating that the pressure exceeds a first threshold, or to issue an instruction to the pressure applying device to stop the pressing operation. Through the embodiment, prompt or test stopping can be timely sent out when the chip test is abnormal, so that the hardware equipment can be maintained or replaced, and the test quality accident causing a large number of chip damages is avoided.

In certain embodiments of the present disclosure, the test apparatus is configured to identify the first body and the plurality of first probes based on signals from the pressure sensing device. With this embodiment, management of the chip assembly is facilitated.

In certain embodiments of the present disclosure, the test apparatus is configured to increment the number of times the first body and the plurality of first probes have been used by one based on the signal from the pressure sensing device indicating that the pressure exceeds the second threshold. With this embodiment, the number of times of use of the components in the chip assembly can be accurately counted, thereby accurately evaluating the wear condition of the components.

In certain embodiments of the present disclosure, the test apparatus is configured to identify the second body and the plurality of second probes based on the communication signal of the at least one third probe. With this embodiment, the components of the socket assembly above the top surface of the chip can be identified, thereby facilitating management of the chip assembly.

In certain embodiments of the present disclosure, the test apparatus is configured to increment the number of times the second body and the plurality of second probes have been used by one based on receiving the communication signal of the at least one third probe. With this embodiment, the number of uses of the components of the socket assembly above the top surface of the chip can be precisely counted, thereby precisely evaluating the wear condition of the components.

In certain embodiments of the present disclosure, the test apparatus includes a test machine and a first circuit board attached to the test machine, and the first circuit board includes wiring electrically connecting the pressure sensing device to the test machine. With this embodiment, it is facilitated to transmit a signal of the pressure sensing means indicative of the pressure to the test device.

In certain embodiments of the present disclosure, the pressing apparatus includes a pushing head, and the pushing head is adapted to press against the die of the chip to be tested. With this embodiment, testing of the exposed die is facilitated.

In certain embodiments of the present disclosure, wherein the pressing apparatus further comprises a second circuit board attached to the pushing ram. By this embodiment, it is facilitated to transfer test signals during testing of functions associated with the chip top surface pins or solder balls.

It should be understood that what is described in this summary is not intended to limit the critical or essential features of the embodiments of the disclosure nor to limit the scope of the disclosure. Other features of the present disclosure will become apparent from the following description.

Drawings

The above and other features, advantages and aspects of embodiments of the present disclosure will become more apparent by reference to the following detailed description when taken in conjunction with the accompanying drawings. In the drawings, wherein like or similar reference numerals designate like or similar elements, and wherein:

fig. 1 shows a schematic diagram of a chip test system and a chip to be tested according to an embodiment of the present disclosure.

Fig. 2 shows a detailed schematic diagram of a chip to be tested according to an embodiment of the present disclosure.

Fig. 3 shows a detailed schematic diagram of a receptacle assembly according to an embodiment of the present disclosure.

Fig. 4 shows a detailed schematic diagram of a test apparatus according to an embodiment of the present disclosure.

Fig. 5 shows a detailed schematic diagram of a pressing apparatus according to an embodiment of the present disclosure.

Fig. 6 shows a schematic diagram of a chip testing system and a chip to be tested according to another embodiment of the present disclosure.

Fig. 7 shows a detailed schematic diagram of a chip to be tested according to another embodiment of the present disclosure.

Fig. 8 illustrates a detailed schematic view of a receptacle assembly according to another embodiment of the present disclosure.

Fig. 9 shows a detailed schematic diagram of a pressing apparatus according to another embodiment of the present disclosure.

Detailed Description

Embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While certain embodiments of the present disclosure have been shown in the accompanying drawings, it is to be understood that the present disclosure may be embodied in various forms and should not be construed as limited to the embodiments set forth herein, but are provided to provide a more thorough and complete understanding of the present disclosure. It should be understood that the drawings and embodiments of the present disclosure are for illustration purposes only and are not intended to limit the scope of the present disclosure.

In describing embodiments of the present disclosure, the term "comprising" and its like should be taken to be open-ended, i.e., including, but not limited to. The term "based on" should be understood as "based at least in part on". The term "one embodiment" or "the embodiment" should be understood as "at least one embodiment". The terms "first," "second," and the like, may refer to different or the same object. Other explicit and implicit definitions are also possible below.

Embodiments of the present disclosure provide an improved socket assembly for chip testing and a chip testing system including the same. By providing a pressure sensing device in the socket assembly, the pressure to which the chip to be tested is subjected can be monitored in real time during pressing of the chip to be tested to the socket assembly and the test equipment. Therefore, the method can timely find out excessive local pressure or abnormal pressure caused by incorrect operation and equipment faults, eliminates and relieves the possibility of damage to the chip to be tested caused by the abnormality in the test process, and avoids quality accidents in the test process.

Fig. 1 shows a schematic structural diagram of a chip test system 1000 and a chip to be tested 2000 according to an embodiment of the present disclosure, and fig. 2 shows a detailed schematic diagram of the chip to be tested 2000 in fig. 1. As shown in fig. 1 and 2, a chip test system 1000 may be used to test a chip 2000 to be tested to verify the function and performance of the chip 2000 to be tested. The chip 2000 to be tested may include a die 2100, a substrate 2200, and an upper substrate ring 2300. By way of example, the chip 2000 to be tested employs a package with the die 2100 exposed to the outside, which generally helps to solve the heat dissipation problem of the chip. Furthermore, the chip 2000 to be tested may be a chip of a larger size, such as a chip for use in a server or storage area, and may have a large number of pins or solder balls, where the number of pins or solder balls may reach thousands, or even more than ten thousands. It is to be understood that the description herein of the chip 2000 to be tested is merely exemplary and not limiting. Thus, the chip 2000 to be tested may be a chip of another type or structure, for example, the chip 2000 to be tested may be provided with a cover to enclose the die 2100, or may be a chip of a medium or small size.

According to an embodiment of the present disclosure, the chip test system 1000 includes a socket assembly 100, a test apparatus 200, and a pressing apparatus 300, the pressing apparatus 300 being configured to press the chip 2000 to be tested and the socket assembly 100 toward the test apparatus 200. As an example, the pressing apparatus 300 may press the die 2100 of the chip 2000 to be tested and the upper base ring 2300, thereby pressing the chip 2000 to be tested against the socket assembly 100 and further pressing the socket assembly 100 against the testing apparatus 200. By the pressing operation, the chip 2000 to be tested is electrically connected to the testing apparatus 200 via the socket assembly 100, and thus the chip 2000 to be tested can be tested using the testing apparatus 200.

Fig. 3 shows a detailed schematic diagram of the receptacle assembly 100 of fig. 1. As shown in fig. 3, the socket assembly 100 may include a first body 110 and a plurality of first probes 120, the plurality of first probes 120 penetrating the first body 110, the plurality of first probes 120 being adapted to be pressed by a chip 2000 to be tested at a first surface of the first body 110 and to press a testing device 200 at a second surface of the first body 110 to electrically connect the chip 2000 to be tested and the testing device 200.

As an example, the first body 110 may be formed with a plurality of through holes each penetrating from the first surface of the first body 110 to the second surface of the first body 110, and a plurality of first probes 120 may be respectively disposed in the corresponding through holes. Each first probe has a suitable elasticity as a whole so that it can be deformed to some extent under pressure. In addition, a plurality of pins or solder balls (e.g., solder balls) may be provided on the bottom surface of the chip 2000 to be tested, and these pins or solder balls may be distributed in an appropriate manner. For example, the solder balls of the bottom surface of test chip 2000 may be distributed in a regular array, such as an array with rows and columns perpendicular to each other or suitably slanted. In addition, suitable variations may be made to the solder ball array, for example, in some cases, the solder balls in the central region may be removed. In testing the chip 2000 to be tested, the chip 2000 to be tested may be arranged above the first surface of the first body 110 of the chip assembly 100, and pins or solder balls on the bottom surface of the chip 2000 to be tested may be aligned and contacted with the plurality of first probes 120 of the socket assembly 100 at the first surface of the first body 110, respectively, for example, the top of each first probe 120 may be formed with a concave structure to receive the pins or solder balls. As the pressing apparatus 300 presses the chip 2000 to be tested, each pin or solder ball of the chip 2000 to be tested will closely contact the corresponding first probe, thereby ensuring that each first probe can electrically communicate with the pin or solder ball of the chip 2000 to be tested with a small contact resistance. The plurality of first probes 120 that are pressed will also closely contact corresponding pins of the test apparatus 200 at the second surface of the first body 110. In this way, the chip 2000 to be tested can be completely electrically connected or communicated to the test apparatus 200, so that various functions and performances of the chip 2000 to be tested can be tested by operating the test apparatus 200.

In some embodiments of the present disclosure, the receptacle assembly 100 includes a frame 160, the frame 160 surrounding and fixedly coupled to the first body 110. As an example, the frame 160 may have a greater height than the first body 110 and surround the first body 110, thereby forming a recess above the first surface of the first body 110 that may receive a chip to be tested. In this way, it is advantageous to stably place and position the chip 2000 to be tested on the first body 110 of the socket assembly 110. It is understood that the frame 160 and the first body 110 may be connected together after being separately manufactured, or may be integrally formed.

According to an embodiment of the present disclosure, the socket assembly 100 further comprises a pressure sensing device 130, the pressure sensing device 130 being arranged to sense the pressure to which at least a part of the plurality of first probes 120 is subjected. Specifically, during the pressing apparatus 300 presses the chip 2000 to be tested and the socket assembly 100 toward the testing apparatus 200, the pressure born by the chip 2000 to be tested is transferred to the plurality of first probes 120 of the socket assembly 100 via the pins or solder balls thereof, and causes deformation of the plurality of first probes 120. Thus, by sensing the pressure or the deformation that is applied to at least a portion of the plurality of first probes 120, it is possible to know the pressure applied to the chip 2000 to be tested and determine whether the chip 2000 to be tested is subjected to an abnormal pressure.

Studies have shown that in order to ensure that pins or solder balls of the chip 2000 to be tested can contact corresponding first probes 120 with a small contact resistance during the test, a pressure of several grams needs to be applied for each pin or solder ball. Where the chip 2000 to be tested has up to thousands or tens of thousands of pins or solder balls, the chip 2000 to be tested may need to withstand pressures in excess of eighty kilograms, even in excess of one hundred kilograms. If the position where the chip 2000 to be tested is arranged is shifted or tilted, or the pressing apparatus 300 is abnormally operated, the chip 2000 to be tested may be subjected to excessive pressure in whole or in part, thereby causing damage to the chip 2000 to be tested. In particular, for the package mode in which the bare die of the chip is exposed, in order to facilitate conduction and heat dissipation of the accumulated heat of the die and to facilitate the pressing operation, the pressing apparatus 300 directly contacts and presses the bare die 2100, and the excessive overall pressure or partial pressure is very liable to cause breakage of the die. Furthermore, if contaminants or particulates are present between the pressing apparatus 300 and the die 2100, radiation cracks may also be generated on the die 2100. These cracks and fissures are not readily found immediately, or may not have a substantial impact on the functionality and performance of the chip for a while, and therefore often will not be problematic or found until a large number of chips of one or more batches have been tested, which will result in a large number of chips being scrapped and lost.

In the embodiment of the disclosure, by arranging the pressure sensing device, the pressure born by at least one part of the first probes in the plurality of first probes can be monitored in real time, and thus, the real-time monitoring of the abnormal pressure born by the chip to be tested is realized. Compared with the method that whether the test quality problem occurs is investigated later after a large number of chips are produced and tested, the scheme can monitor the test process in real time with lower cost, so that abnormality can be found in time and corresponding maintenance or replacement can be carried out, and a large number of chips are prevented from being damaged in the test process.

In some embodiments of the present disclosure, the pressure sensing device 130 includes a plurality of first pressure sensing elements 131, each first pressure sensing element 131 being disposed at a corresponding first probe 120. As an example, a plurality of first pressure sensing elements 131 may be provided. The first pressure sensing element 131 may be, for example, a pressure sensitive resistor, which may exhibit different resistance magnitudes when subjected to different pressures, whereby the pressure magnitudes are obtained by detection of changes in the resistance or the voltage thereon. However, it is understood that the first pressure sensing element 131 may be other suitable types of piezoelectric elements or pressure sensing devices. Further, each first pressure sensing element 131 may be arranged at a corresponding first probe of the plurality of first probes 120, for example, inside the first probe or attached to a surface of the first probe, to directly sense deformation or a pressure to which the corresponding first probe is subjected. Since the plurality of first probes 120 are in a corresponding relationship with each of the pins or solder balls in the pin or solder ball array of the chip 2000 to be tested, the pressure condition of the corresponding pin or solder ball can be directly known by sensing the pressure or deformation of the first probes, and thus the pressure condition at or near the directly pressed position of the chip 2000 to be tested corresponding to the position of the pin or solder ball can be precisely sensed. Thus, not only can it be accurately sensed in real time whether the chip 2000 to be tested is subjected to the pressure of the whole or local abnormality, but also the position where the local pressure is too large can be rapidly located under the condition that the local pressure is too large.

In some embodiments of the present disclosure, each first pressure sensing element 131 is disposed at a location of the corresponding first probe 120 adjacent to the testing device 200. Specifically, the first pressure sensing elements 131 may be disposed at the corresponding first probes 120 and located near the second surface of the first body 110 to be adjacent to the test device 200. The position of the first probe adjacent to the testing device 200 may be further away from the pressing position and may be more deformed during the pressing than other positions (e.g., at the first surface of the first body 110), so that the deformation of the first probe 120 may be more sensitively sensed, thereby accurately sensing the pressure.

The arrangement position of the first pressure sensing element 131 is not limited thereto, and may be arranged at other positions of the corresponding first probe 120 as long as deformation of the first probe can be sensed. Furthermore, in some cases, if some positions other than the first probe 120 are also capable of sensing deformation or stress of the first probe 120, the first pressure sensing element 131 may also be disposed at those positions other than the first probe 120 without disposing the first pressure sensing element 131 at the first probe 120, for example, the first pressure sensing element 131 may be disposed at a position of the first body 110 adjacent to the first probe in some cases, which may also achieve the object of the present disclosure.

In some embodiments of the present disclosure, the number of the plurality of first pressure sensing elements 131 is less than or equal to the number of the plurality of first probes 120. Specifically, the number of the first pressure sensing elements 131 may be the same as the number of the first probes 120, so that the pressure condition of each first probe may be sensed entirely. However, in the case where the number of the plurality of first probes 120 is large, it may not be necessary to arrange one first pressure sensing element 131 for each first probe, but the first pressure sensing elements 131 may be arranged for a part of the first probes 120. Thus, the monitoring cost can be reduced as much as possible while ensuring the monitoring effect.

In some embodiments of the present disclosure, the plurality of first pressure sensing elements 131 are arranged at the plurality of first probes 120 in a uniformly distributed manner. As an example, in the case where the plurality of first probes 120 are arranged in the first body 110 in the form of an array, the plurality of first pressure sensing elements 131 may be substantially uniformly arranged at a certain longitudinal and lateral interval so that a relatively small number of first pressure sensing elements 131 may cover as large an area as possible, thereby relatively comprehensively acquiring the distribution of the pressure to which the chip 2000 to be tested is subjected.

In some embodiments of the present disclosure, at least a portion of the plurality of first pressure sensing elements 131 are arranged at first probes corresponding to the high speed pins of the chip 2000 to be tested. Specifically, the chip 2000 to be tested may have various types of pins or solder balls, such as pins for transmitting high-speed signals, pins for transmitting low-speed signals, and pins for transmitting power. If the pressure applied over the pins for transmitting high-speed signals is insufficient, contact resistance may be large due to poor contact between the pins for transmitting high-speed signals and the corresponding first probes 120, which may affect signal transmission. The transmission of low-speed signals and power signals is less sensitive to contact resistance than the transmission of high-speed signals. Accordingly, at least a portion of the first pressure sensing element 131 may be disposed at the first probe corresponding to the high-speed pin of the chip 2000 to be tested, so that the pressure condition at the high-speed pin may be more precisely observed, so that a problem of poor contact between the high-speed pin and the first probe may be found in time. It will be appreciated that in addition to the high speed pins, the first pressure sensing element may be arranged at other functional pins that are sensitive to the contact resistance to monitor the contact condition of the functional pins with the socket probes.

Fig. 4 shows a detailed schematic diagram of the test apparatus 200 in fig. 1. In some embodiments of the present disclosure, the test apparatus 200 includes a tester 210 and a first circuit board 220 attached to the tester 210, and the first circuit board 220 includes wiring 221 electrically connecting the pressure sensing device 130 to the tester 210. As an example, the first circuit board 220 may electrically connect the plurality of first pressure sensing elements 131 of the pressure sensing device 130 to the tester 210. Thus, the tester 210 can obtain sensing signals of the plurality of first pressure sensing elements 131, which are indicative of the pressure magnitude at the corresponding locations.

In some embodiments of the present disclosure, the test apparatus 200 is configured to issue an alarm based on a signal from the pressure sensing device 130 indicating that the pressure exceeds a first threshold, or to issue an instruction to the pressing apparatus 300 to stop the pressing operation. As an example, the first threshold value may be a larger pressure value that causes damage or imminent damage to the chip to be tested, which may be some value greater than the normal pressure value or several times the normal pressure value. The magnitude of the first threshold may be set according to the actual situation. The tester 210 of the test apparatus 200 receives the sensing signals from the plurality of first pressure sensing elements 131. When the signals from the one or more first pressure sensing elements 131 indicate that the pressure exceeds a first threshold, test apparatus 200 or test machine 210 may determine that a pressure anomaly exists during the test that may cause damage to chip 2000 to be tested. Thus, the test equipment 200 or the test machine 210 may issue an alarm signal, such as an acoustic signal, an optical signal, an electrical signal, or the like, to a peripheral or an operator to indicate that an abnormality exists in the current chip test. Alternatively, the test apparatus 200 or the test machine 210 may also directly issue a stop instruction to the pressing apparatus 300, so that the pressing apparatus 300 reduces and stops continuing to apply the pressure to the chip 2000 to be tested. By the method, prompt or test stopping can be timely sent out when chip test is abnormal, so that hardware equipment can be maintained or replaced, and test quality accidents causing a large number of chip damages are avoided.

In some embodiments of the present disclosure, the test apparatus 200 is configured to identify the first body 110 and the plurality of first probes 120 based on signals from the pressure sensing device 130. As an example, a different number of first pressure sensing elements 131 may be provided for different socket assemblies 100, and/or a plurality of first pressure sensing elements 131 may be arranged at different locations. Thus, the test apparatus 200 or the test machine 210 may encode and identify the first body 110 and the plurality of first probes 120 of the socket assembly 100 according to the number and/or the positions of the plurality of first pressure sensing elements 131. That is, the test apparatus 200 or the tester 210 may identify the socket assembly 100 or a combination of the first body 110 and the plurality of first probes 120 according to the received and/or stored signals of the plurality of first pressure sensing elements 131. In this way, an operator is facilitated to manage the receptacle assembly and its components, and even other hardware devices that may be used with the receptacle assembly. In addition, the method is beneficial to conveniently backtracking and searching abnormal hardware equipment in the later quality accident investigation.

In some embodiments of the present disclosure, the test apparatus 200 is configured to increment the number of times the first body 110 and the plurality of first probes 120 have been used by one based on the signal from the pressure sensing device 130 indicating that the pressure exceeds the second threshold. As an example, during testing, the socket assembly 100, the testing apparatus 200, and the application apparatus 300 may test a plurality of chips, and when one chip is tested and pressed onto the socket assembly 100, the pressure sensing device 130 in the socket assembly 100 may sense one increase change in pressure. Thus, the test apparatus 200 or the tester 210 may count the number of uses of the first body 110 and the plurality of first probes 120 of the socket assembly 100 according to the sensed pressure change. The second threshold may be a value slightly below the normal pressure of the test procedure and may be set according to the actual situation. When the sensing signal from the pressure sensing device 130 indicates that the pressure exceeds the second threshold, the test apparatus 200 or the tester 210 may determine that one chip test is performed, and thus may increase the number of times the first body 110 and the plurality of first probes 120 are combined or the socket assembly 100 is used once.

In general, the socket assembly 100 is a component of a hardware device for chip testing that is prone to wear and requires frequent maintenance and replacement. The top of the first probes 120 of the socket assembly 100 may wear after repeated contact, rubbing, and pressing with the chip pins or solder balls. In the case where the first probe 120 is severely worn, even if the pressing apparatus 300 applies a sufficient pressure, it may not be possible to make good electrical contact between the top of the first probe 120 and the chip pins or solder balls, which may affect the test effect. Accordingly, maintenance or replacement is required after the socket assembly 100, particularly the combination of the first body 110 and the plurality of first probes 120, is used a certain number of times. In conventional approaches, for the use of passive tools such as sockets, the number of uses may be counted indirectly by the number of chips being formally tested. However, there are often more informal batches of chip tests or engineering positioning experiments, and the number of sockets used in these cases is often not recorded, which results in greater mistakes in the number of sockets used counted by conventional schemes. Compared with the conventional scheme, the socket assembly for chip testing and the use times of hardware equipment matched with the socket assembly can be accurately counted by means of the pressure sensing device, so that the abrasion condition of the component can be accurately evaluated to avoid affecting testing.

Fig. 5 shows a detailed schematic diagram of the pressing apparatus 300 in fig. 1. In some embodiments of the present disclosure, the pressing apparatus 300 includes a pressing head 310, and the pressing head 310 is adapted to press the die 2100 of the chip 2000 to be tested. As an example, the pushing head 310 may be driven by a servo motor and a transmission mechanism (e.g., a screw), and may directly press the die 2100 in the center of the chip 2000 to be tested. The pushing head 310 may also conduct heat of the die 2100 to the outside while pushing the die 2100, thereby achieving heat dissipation for the chip 2000 to be tested and the die 2100 thereof. Alternatively, the pressing apparatus 300 may further include a buffer layer 320 and a slider 330. The buffer layer 320 may be made of, for example, a flexible material that conducts heat well, whereby contact stress between the pushing head 310 and the die 2100 may be eliminated to even out the stress of the die 2100, and also heat transfer from the die 2100 to the pushing head 310 may be improved. The slider 330 is used to press the upper base ring 2300 of the chip 2000 to be tested, and the upper base ring 2300 is generally located in an area near the edge of the chip 2000 to be tested. By the buffer layer 320 and the slider 330, the pressing of the chip 2000 by the application device 300 can be adjusted and improved, so that the stress direction and distribution of the chip 2000 are more stable and balanced.

Fig. 6 shows a schematic diagram of a chip test system 1000 and a chip 2000 to be tested according to another embodiment of the present disclosure, and fig. 7 shows a detailed schematic diagram of the chip 2000 to be tested in fig. 6. In comparison with fig. 1 and 2, the chip 2000 to be tested in fig. 6 and 7 has the lower base ring 2400 disposed on the bottom surface, and the upper base ring 2300 is not disposed any more, so that pins or solder balls can be disposed on the top surface of the chip 2000 to be tested in addition to the bottom surface of the chip, which is advantageous in increasing the number of pins or solder balls without increasing the chip size. The remaining configuration of the chip 2000 to be tested in fig. 6 and 7 is similar to that of fig. 1 and 2, and thus a detailed description thereof will be omitted.

Fig. 8 shows a detailed schematic diagram of the receptacle assembly 100 of fig. 6. In some embodiments of the present disclosure, the socket assembly 100 may further include a second body 140 and a plurality of second probes 150 in addition to the first body 110, the plurality of first probes 120, the pressure sensing device 130, and the frame 160, wherein the second body 140 is adapted to be disposed at a side of the chip 2000 to be tested facing away from the first body 110, and the plurality of second probes 150 pass through the second body 140, and the plurality of second probes 150 are adapted to be pressed by the pressing apparatus 300 at a first surface of the second body 140 and to press the chip 2000 to be tested at a second surface of the second body 140 to electrically connect the pressing apparatus 300 and the chip 2000 to be tested. As an example, the second body 140 and the plurality of second probes 150 may be used to electrically connect pins or solder balls at the top surface of the chip 2000 to be tested, whereby a combination of the second body 140 and the plurality of second probes 150 is arranged between the pressing apparatus 300 and the top surface of the chip 2000 to be tested. The implementation of the combination of the second body 140 and the plurality of second probes 150 may be similar to the combination of the first body 110 and the plurality of second probes 120, and may be adapted only in size and shape.

The socket assembly 100 may further include at least one third probe 170 passing through the frame 160, the at least one third probe 170 being adapted to be pressed by the pressing device 300 at a first surface of the frame 160 and to press the testing device 200 at a second surface of the frame 160 to electrically connect the pressing device 300 and the testing device 200. Specifically, by providing the third probe 170, a communication path from the top surface pins of the chip 2000 to be tested, along the second probe 150, the pressing apparatus 300, and the third probe 170, to the testing apparatus 200 may be formed. Thus, test equipment 200 or tester 210 may implement a test associated with the top surface pins of chip 2000 to be tested.

In some embodiments of the present disclosure, the pressure sensing device 130 further includes a plurality of second pressure sensing elements 132, the plurality of second pressure sensing elements 132 being arranged in the first body 110 and adapted to be pressed by the lower substrate ring 2400 of the chip 2000 to be tested. As an example, the second body 140 and the plurality of second probes 150 may press the chip 2000 to be tested downward on the top surface of the chip 2000 to be tested, and the lower base ring 2400 of the chip 2000 to be tested may provide support at the pressed positions of the second body 140 and the plurality of second probes 150 to prevent warpage of the chip 2000 to be tested. Further, when the plurality of second probes 150 press pins or solder balls of the top surface of the chip 2000 to be tested, pressure is transferred to the lower substrate ring 2400. Thus, by disposing the second pressure sensing element 132 at a position where the lower base ring 2400 is inserted into the first body 110, it is possible to sense the pressure or deformation applied to the first body 110 by the lower base ring 2400, thereby obtaining the pressure condition of the top surface pins or solder balls of the chip 2000 to be tested, which is advantageous in finding out the pressure abnormality in time.

Fig. 9 shows a detailed schematic diagram of the pressing apparatus 300 in fig. 6. In some embodiments of the present disclosure, the pressing apparatus 300 further includes a second circuit board 340 attached to the pressing head 310 in addition to the pressing head 310. Specifically, unlike the pressing apparatus 300 in fig. 1 and 5, the pressing apparatus 300 in fig. 6 and 9 is provided with a second circuit board 340. The second circuit board 340 may receive and transmit electrical signals to establish communication between the second probes 150 and the third probes 170, and further to establish communication between the top surface pins of the chip 2000 to be tested and the test apparatus 200 or the first circuit board 220.

In some embodiments of the present disclosure, the test apparatus 200 is further configured to identify the second body 140 and the plurality of second probes 150 based on the communication signal of the at least one third probe 170. As an example, similar to the combination of the first body 110 and the plurality of second probes 120, the combination of the second body 140 and the plurality of second probes 150 may also be encoded and identified. Considering that the second body 140 and the plurality of second probes 150 are located above the top surface of the chip 2000 to be tested, the second body 140 and the plurality of second probes 150 cannot be encoded and identified with the arrangement of the first pressure sensing element 131. However, at least one third probe 170 needs to communicate with the plurality of second probes 150 and has a corresponding relationship. Thus, the combination of the second body 140 and the plurality of second probes 150 may be encoded and identified based on the difference in the number and/or location of the at least one third probe 170. That is, different numbers and/or positions of the third probes 170 may be provided for different combinations of the second body 140 and the plurality of second probes 150, whereby when the testing apparatus 200 receives the communication signal of the third probes 170, the testing apparatus 200 may determine the numbers and/or positions of the third probes 170, thereby identifying the combinations of the second body 140 and the plurality of second probes 150 according to the determined numbers and/or positions. In this way, the operator is facilitated to manage the components of the receptacle assembly that are located above the top surface of the chip.

In some embodiments of the present disclosure, the test apparatus 200 is configured to increment the number of times the second body 140 and the plurality of second probes 150 have been used by one based on receiving the communication signal of the at least one third probe 170. As an example, similar to the first body 110 and the plurality of first probes 120, the second body 140 and the plurality of second probes 150 are also components that are easily worn and often require maintenance and replacement. Considering that the second body 140 and the plurality of second probes 150 are located above the top surface of the chip 2000 to be tested, the number of uses of the second body 140 and the plurality of second probes 150 cannot be determined using the first pressure sensing element 131. However, the third probe 170 needs to be communicated every time the second body 140 and the plurality of second probes 150 are used. Accordingly, the number of uses of the second body 140 and the plurality of second probes 150 may be counted based on the communication signal of the third probe 170. That is, each time the testing apparatus 200 receives the communication signal of the third probe 170, the testing apparatus 200 increases the number of uses of the second body 140 and the plurality of second probes 150 being used once. This allows for accurate counting of the number of uses of the components of the socket assembly above the top surface of the chip, thereby allowing for accurate assessment of the wear of the components, which eliminates the adverse effects of inaccurate assessment on testing.

By the scheme, the pressure born by the chip to be tested can be monitored in real time during the chip test, so that quality accidents caused by abnormal pressure are avoided. In addition, passive hardware devices for chip testing may also be encoded and identified, and the number of uses of the passive hardware devices may be precisely counted to assess wear conditions.

Many modifications and other embodiments of the disclosure set forth herein will come to mind to one skilled in the art to which this disclosure pertains having the benefit of the teachings presented in the foregoing descriptions and the associated drawings. Therefore, it is to be understood that the embodiments of the disclosure are not to be limited to the specific embodiments disclosed and that modifications and other embodiments are intended to be included within the scope of the disclosure. Furthermore, while the foregoing description and related drawings describe example embodiments in the context of certain example combinations of components and/or functions, it should be appreciated that different combinations of components and/or functions may be provided by alternative embodiments without departing from the scope of the present disclosure. In this regard, for example, other combinations of different components and/or functions than those explicitly described above are also contemplated as being within the scope of the present disclosure. Although specific terms are employed herein, they are used in a generic and descriptive sense only and not for purposes of limitation.

Claims (17)

1. A socket assembly (100) for chip testing, comprising:

a first body (110);

-a plurality of first probes (120) passing through the first body (110), the plurality of first probes (120) being adapted to be pressed by a chip (2000) to be tested at a first surface of the first body (110) and to press a testing device (200) at a second surface of the first body (110) to electrically connect the chip (2000) to be tested and the testing device (200); and

a pressure sensing device (130) arranged to sense a pressure experienced by at least a portion of the first probes (120) of the plurality.

2. The socket assembly (100) of claim 1, wherein the pressure sensing device (130) comprises a plurality of first pressure sensing elements (131), each first pressure sensing element (131) being arranged at a corresponding first probe (120).

3. The socket assembly (100) of claim 2, wherein each first pressure sensing element (131) is arranged at a location of the corresponding first probe (120) adjacent to the test device (200).

4. A socket assembly (100) according to claim 2 or 3, wherein the number of the plurality of first pressure sensing elements (131) is less than or equal to the number of the plurality of first probes (120).

5. The socket assembly (100) of claim 4, wherein the plurality of first pressure sensing elements (131) are arranged in a uniformly distributed manner at the plurality of first probes (120).

6. The socket assembly (100) of claim 4, wherein at least a portion of the first pressure sensing elements (131) of the plurality of first pressure sensing elements are arranged at first probes corresponding to high speed pins of the chip (2000) to be tested.

7. The receptacle assembly (100) of claim 1, further comprising:

-a second body (140) adapted to be arranged at a side of the chip (2000) to be tested facing away from the first body (110);

a plurality of second probes (150) passing through the second body (140), the plurality of second probes (150) being adapted to be pressed by a pressing device (300) at a first surface of the second body (140) and to press the chip (2000) to be tested at a second surface of the second body (140) to electrically connect the pressing device (300) and the chip (2000) to be tested;

a frame (160) surrounding and fixedly connected to the first body (110); and

at least one third probe (170) passing through the frame (160), the at least one third probe (170) being adapted to be pressed by the pressing device (300) at a first surface of the frame (160) and to press the testing device (200) at a second surface of the frame (160) to electrically connect the pressing device (300) and the testing device (200).

8. The socket assembly (100) of claim 7, wherein the pressure sensing device (130) further comprises a plurality of second pressure sensing elements (132), the plurality of second pressure sensing elements (132) being arranged in the first body (110) and adapted to be pressed by a lower base ring (2400) of the chip (2000) to be tested.

9. A chip testing system (1000), comprising:

the receptacle assembly (100) of any one of claims 1 to 8;

a test device (200); and

a pressing device (300) configured to press the chip (2000) to be tested and the socket assembly (100) toward the testing device (200).

10. The chip testing system (1000) according to claim 9, wherein the testing device (200) is configured to issue an alarm based on a signal from the pressure sensing arrangement (130) indicating that the pressure exceeds a first threshold, or to issue an instruction to the pressing device (300) to stop a pressing operation.

11. The chip testing system (1000) according to claim 9, wherein the testing apparatus (200) is configured to identify the first body (110) and the plurality of first probes (120) based on signals from the pressure sensing device (130).

12. The chip testing system (1000) according to claim 9, wherein the testing apparatus (200) is configured to increment the number of uses of the first body (110) and the plurality of first probes (120) by one based on a signal from the pressure sensing device (130) indicating that a pressure exceeds a second threshold.

13. The chip testing system (1000) according to claim 9, wherein the socket assembly (100) is the socket assembly (100) according to claim 7 or 8, and wherein the testing device (200) is configured to identify the second body (140) and the plurality of second probes (150) based on the communication signal of the at least one third probe (170).

14. The chip testing system (1000) according to claim 9, wherein the socket assembly (100) is the socket assembly (100) according to claim 7 or 8, and wherein the testing device (200) is configured to increment the number of uses of the second body (140) and the plurality of second probes (150) by one based on receiving the communication signal of the at least one third probe (170).

15. The chip testing system (1000) according to claim 9, wherein the testing apparatus (200) comprises a tester (210) and a first circuit board (220) attached to the tester (210), and the first circuit board (220) comprises wiring (221) electrically connecting the pressure sensing device (130) to the tester (210).

16. The chip test system (1000) according to claim 9, wherein the pressing device (300) comprises a pressing head (310), and the pressing head (310) is adapted to press a die (2100) of the chip (2000) to be tested.

17. The chip testing system (1000) according to claim 16, wherein the socket assembly (100) is the socket assembly (100) according to claim 7 or 8, and wherein the pressing apparatus (300) further comprises a second circuit board (340) attached to the pushing head (310).