CN117278027A - Self-defined frequency point high-speed broadband frequency hopping signal generator and signal generation method - Google Patents
Self-defined frequency point high-speed broadband frequency hopping signal generator and signal generation method Download PDFInfo
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
Abstract
The invention relates to a self-defined frequency point high-speed broadband frequency hopping signal generator, which comprises: the device comprises a control module, a frequency source module, a storage module and an anti-interference module; the frequency source module comprises a phase-locked loop unit and a frequency synthesis unit, wherein a second input end of the phase-locked loop unit is connected with an output end of the control module, an output end of the phase-locked loop unit is connected with a first input end of the frequency synthesis unit, a second input end of the frequency synthesis unit is connected with an output end of the control module, and an output end of the frequency synthesis unit is connected with the anti-interference module; the phase-locked loop unit is used for generating an internal reference clock based on the frequency source control signal and the reference clock signal, and the frequency synthesis unit is used for obtaining a frequency signal based on the frequency source control signal and the frequency control word and outputting the frequency signal. The obtained frequency control word has higher frequency precision, and filters high-frequency mirror image components and low-frequency noise signals in the frequency signals, so that the frequency control word has good frequency spectrum purity, and the frequency hopping signal quality is effectively improved.
Description
Technical Field
The application relates to the technical field of signal generators, in particular to a self-defined frequency point high-speed broadband frequency hopping signal generator and a signal generation method.
Background
Frequency Hopping (FH) technology, which switches communication carrier frequencies by Frequency Hopping sequences, has long been widely used in radar and satellite systems, radio Frequency (RF) communication systems, and emerging dynamic communication systems (i.e., 5G/6G). The frequency hopping system applying the frequency hopping technology has the advantages of reducing the interference between signals, external interference and the like, and remarkably improves the communication capacity of the emerging RF wireless system, so that the frequency hopping system becomes an important electronic communication system meeting the requirements of high RF frequency spectrum resources in business and national defense. In addition, the frequency hopping technology can quickly change the carrier frequency without changing the signal amplitude, so that the transmission information is difficult to intercept, and the safety of the wireless communication service is greatly improved. In addition, signal interference caused by multipath effects common in communication systems is also greatly reduced due to the rapid change in frequency carrier. Therefore, the frequency hopping system has been widely used in the fields of bluetooth, advanced Extremely High Frequency (AEHF) communication satellites, and military strategic and tactical relay (MILSTAR) communication satellites.
In the related art, in a frequency hopping system, a portion for synthesizing a carrier signal required for the frequency hopping system is called a frequency hopping signal generator, and the frequency hopping signal generator can be divided into two main portions: a frequency source and a control module. Wherein the frequency source is used for synthesizing a carrier signal required by the frequency hopping system, and the carrier signal is a high-frequency signal with a frequency far higher than that of the information signal; the control module is used for realizing the control function of the frequency hopping signal generator, such as the functions of receiving an external control signal, controlling the frequency source to output a frequency signal and the like. In a frequency hopping system, the frequency source output frequency quality of a frequency hopping signal generator greatly affects the frequency hopping performance of the whole frequency hopping system. There are two main types of traditional frequency signal synthesizing methods in the electronics field: direct digital frequency synthesis (DDS) and Phase Locked Loop (PLL), DDS has advantages of fast switching speed, high resolution, low noise, etc., but its output frequency range is limited by the sampling rate. PLL has advantages of wide output frequency range, low cost, low power consumption, etc., but its switching speed is slow and resolution is low. In addition, the control module of the frequency hopping signal generator also affects the function implementation, and the control core of the control module is generally a microprocessor or a microcontroller. The control core commonly used by the frequency hopping signal generator generally does not support the read-write function of the frequency hopping point table, and the frequency point frequency of the frequency hopping point table cannot be updated at any time to realize the self-defined frequency point function, so that the flexibility of generating frequency points is poor. The quality of the frequency hopping signal generator is generally measured by the frequency precision and the frequency spectrum purity of the frequency hopping signal generator, however, the DDS chip of the existing frequency hopping signal generator influences the quality of the frequency hopping signal due to the existence of the mirror frequency component, so that the stability of the frequency hopping system is poor.
Disclosure of Invention
In view of the foregoing, it is desirable to provide a custom frequency point high-speed broadband frequency hopping signal generator and a signal generation method.
A custom frequency point high speed broadband frequency hopping signal generator comprising: the device comprises a control module, a frequency source module, a storage module and an anti-interference module;
the frequency source module comprises a phase-locked loop unit and a frequency synthesis unit, wherein a first input end of the phase-locked loop unit is used for accessing a reference clock signal, a second input end of the phase-locked loop unit is connected with an output end of the control module, an output end of the phase-locked loop unit is connected with a first input end of the frequency synthesis unit, a second input end of the frequency synthesis unit is connected with an output end of the control module, a third input end of the frequency synthesis unit is used for accessing a trigger signal, an output end of the frequency synthesis unit is connected with an input end of the anti-interference module, and an output end of the anti-interference module is used for being connected with a frequency hopping signal output end;
the control module is used for acquiring the frequency hopping point table information, analyzing the frequency hopping point table information into corresponding frequency control words, selecting the corresponding frequency control words based on the frequency hopping control signals, outputting the selected frequency control words and frequency source control signals, the phase-locked loop unit is used for generating an internal reference clock based on the frequency source control signals and reference clock signals, and the frequency synthesis unit is used for obtaining frequency signals based on the frequency source control signals and the frequency control words and outputting the frequency signals to the anti-interference module.
In one embodiment, the control module includes a processing unit and a programmable array unit, where a first input end of the processing unit is used for inputting frequency hopping point table information, a second input end of the processing unit is connected with the storage module, an output end of the processing unit is connected with a first input end of the programmable array unit, a second input end of the programmable array unit is used for inputting a frequency hopping control signal, a first output end of the programmable array unit is connected with a second input end of the phase-locked loop unit, and a second output end of the programmable array unit is connected with a second input end of the frequency synthesis unit; the processing unit is used for acquiring the frequency hopping point table information and analyzing the frequency hopping point table information, and the programmable array unit is used for selecting the corresponding frequency control word from the frequency hopping point table information based on the frequency hopping control signal and outputting the selected frequency control word and the frequency source control signal.
In one embodiment, the device further comprises a frequency hopping point table reader, wherein the input end of the frequency hopping point table reader is used for inputting frequency hopping point table information, and the output end of the frequency hopping point table reader is connected with the first input end of the processing unit.
In one embodiment, the programmable array unit further comprises an IO reader, wherein the input end of the IO reader is used for inputting the frequency hopping control signal, and the output end of the IO reader is connected with the second input end of the programmable array unit.
In one embodiment, the memory module comprises a memory, which is connected to the second input of the processing unit.
In one embodiment, the anti-interference module includes a filter unit, an input end of the filter unit is connected to an output end of the frequency synthesis unit, and an output end of the filter unit is used for being connected to the frequency hopping signal output end.
A signal generation method, comprising:
acquiring frequency hopping point table information, wherein the frequency hopping point table information comprises a plurality of frequency points;
analyzing the frequency hopping point table information to obtain a frequency control word corresponding to a frequency point in the frequency hopping point table information;
acquiring a frequency hopping control signal, selecting a corresponding frequency control word according to the frequency hopping control signal, generating a frequency source control signal, and inputting the selected frequency control word and the frequency source control signal into the frequency source module;
and reading the trigger signal through the frequency source module, generating a frequency signal through the frequency source module based on the frequency control word and the frequency source control signal, and outputting the frequency signal into a frequency hopping signal through the anti-interference module.
In one embodiment, the frequency control word is related to the output frequency and the internal reference clock by:
wherein FTW is a frequency control word, f OUT To output frequency f SYSCLK For the frequency of the internal reference clock, round (x) is the value of argument x rounded to the nearest integer.
In one embodiment, after the parsing out the frequency control word corresponding to the frequency point in the frequency hopping point table information, the method further includes:
generating a frequency hopping frequency control word list according to a preset rule by the frequency control word;
and storing the frequency hopping frequency control word table in the memory according to a preset format.
In one embodiment, the obtaining the information of the frequency hopping point table, after the information of the frequency hopping point table includes a plurality of frequency points, further includes:
and setting parameter data of the phase-locked loop unit, and enabling a frequency source module to generate the frequency signal based on the reference clock signal and the frequency control word after the phase-locked loop unit receives the reference clock signal.
According to the self-defined frequency point high-speed broadband frequency hopping signal generator and the signal generation method, the control module outputs the frequency source control signal to enable the phase-locked loop unit to output the internal reference clock to the frequency synthesis unit, and the control module transmits the frequency control word and the frequency source control signal to the frequency synthesis unit, wherein the frequency control word is up to 32 bits, and the corresponding frequency precision is higher. And the anti-interference module filters the high-frequency image component and the low-frequency noise signal in the frequency signal output by the frequency synthesis unit, so that the output frequency hopping signal has good frequency spectrum purity, and the quality of the frequency hopping signal is effectively improved.
Drawings
FIG. 1 is a block diagram of a custom frequency point high-speed broadband frequency hopping signal generator according to an embodiment;
FIG. 2 is a graph of a frequency hopping signal generator synthesizing a 1GHz signal;
FIG. 3 is a graph of a frequency spectrum of a frequency hopping signal generator when frequency hopping is continuous;
FIG. 4 is a schematic diagram of the trigger time of a frequency hopping signal generator;
FIG. 5 is a flow chart of a signal generating method according to an embodiment;
fig. 6 is a specific flowchart of a signal generating method according to an embodiment.
Detailed Description
In order to facilitate understanding of the present application, the following detailed description of the specific embodiments of the present application will be described in connection with the accompanying drawings, so that the foregoing objects, features, and advantages of the present application will be more readily understood. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present application, the preferred embodiments of which are shown in the accompanying drawings. This application may, however, be embodied in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete. This application is intended to be limited to the details of the particular embodiments disclosed herein since it is to be understood that modifications may be made by those skilled in the art without departing from the spirit of the present application.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In the description of the present application, the meaning of "plurality" is at least two, such as two, three, etc., unless explicitly defined otherwise. In the description of the present application, the meaning of "several" means at least one, such as one, two, etc., unless explicitly defined otherwise.
It will be understood that when an element is referred to as being "fixed to" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "left," "right," and the like are used herein for illustrative purposes only and are not meant to be the only embodiment.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
Example 1
In this embodiment, as shown in fig. 1, a self-defined frequency point high-speed broadband frequency hopping signal generator is provided, which includes a control module, a frequency source module, a storage module and an anti-interference module, wherein a first end of the control module is connected with the frequency source module, a second end of the control module is connected with the storage module, an output end of the frequency source module is connected with an input end of the anti-interference module, and an output end of the anti-interference module is connected with an output end of the frequency hopping signal to output the frequency hopping signal.
The control module includes a processing unit and a programmable array unit, where a first input end of the processing unit is used to obtain information of a frequency hopping point table and parse the information of the frequency hopping point table into corresponding frequency control words, in this embodiment, the information of the frequency hopping point table is transmitted to the processing unit through a UART (Universal Asynchronous Receiver/Transmitter) bus protocol, the UART bus protocol is a relatively simple serial communication protocol, and interfaces of the UART bus protocol are almost supported in all computers and embedded systems, so that a mode of writing the information of the frequency hopping point table into the frequency hopping signal generator can be very flexibly and preferably selected, the information of the frequency hopping point table is transmitted to the processing unit through an RS485 serial port protocol, and the information of the frequency hopping point table and the processing unit are transmitted in two directions, and the processing unit can read or write the information of the frequency hopping point table. RS485 is a differential signal communication standard, meaning that it uses two opposite electrical signal lines to transmit data, one of which is a forward signal and the other of which is a reverse signal, which helps to improve the anti-interference capability and transmission distance of the communication and helps to improve the anti-interference capability and usability of the frequency hopping signal generator. The second input end of the processing unit is connected with the storage module, and the output end of the processing unit is connected with the first input end of the programmable array unit so as to be used for acquiring the information of the frequency hopping point table. The second input end of the programmable array unit is used for inputting a frequency hopping control signal, the output end of the programmable array unit is connected with the frequency source module and used for receiving the frequency hopping control signal, selecting a corresponding frequency control word based on the frequency hopping control signal and outputting the selected frequency control word and the frequency source control signal to the frequency source module.
Specifically, the processing unit is an ARM processor, and the ARM processor is a 32-bit microprocessor architecture, has the characteristics of low power consumption and high performance, and can rapidly analyze and calculate the information of the frequency hopping point table. The programmable array unit is a field programmable gate array, and the field programmable gate array is a programmable logic device used for constructing a digital circuit system to operate, has strong parallel computing capability, has rich and flexible interfaces, can accept multiple paths of parallel control signals, and has a large number of frequency point control selections. In practical application, the processing unit receives the frequency hopping point table information, and performs data processing (reading or writing) on the frequency hopping point table information to process the frequency hopping point table information into a frequency hopping frequency control word table, and stores the frequency hopping frequency control word table into the storage module. And then, the processing unit reads the frequency hopping frequency control word table from the storage module, correspondingly generates a frequency hopping point table signal, outputs the frequency hopping frequency control word table signal to the programmable array unit, receives the frequency hopping control signal through the programmable array unit, and searches the frequency control word corresponding to the frequency hopping frequency control word table and outputs the frequency control word to the frequency source module after receiving the frequency hopping control signal and the frequency hopping point table signal. It should be noted that the information of the frequency hopping point table includes a plurality of frequency points, and the frequency control word corresponding to the frequency point in the frequency hopping frequency control word table is selected by the programmable array unit. In addition, based on the logic circuit flexibly generated by the programmable array unit, the frequency point number of the frequency hopping signal generator can be greatly enlarged in the field of the interface number, for example, when 32 frequency points are needed, the programmable array unit generates a data selector circuit with 32 selected 1, when 256 frequency points are needed, the programmable array unit generates a 256 selected 1 circuit, the programmable array unit can also be compatible with an encryption control mode, and the decryption calculation circuit generated by the programmable array unit can be quickly converted into an internal control signal on a hardware level.
Further, the frequency source module includes a phase-locked loop unit and a frequency synthesis unit, where a first input end of the phase-locked loop unit is used for accessing a reference clock signal and making the phase-locked loop unit generate an internal reference clock, and the internal reference clock is a high-frequency reference clock. The second input end of the phase-locked loop unit is connected with the output end of the programmable array unit so as to receive the frequency source control signal output by the programmable array unit. The output end of the phase-locked loop unit is connected with the first input end of the frequency synthesis unit, so that the internal reference clock generated by the phase-locked loop unit is used as the system clock of the frequency synthesis unit, and the programmable array unit can quickly control the phase-locked loop unit to generate the internal reference clock to the frequency synthesis unit, thereby accelerating the frequency hopping switching speed of the phase-locked loop unit. The second input end of the frequency synthesis unit is connected with the output end of the programmable array unit so as to receive the frequency source control signal and the frequency control word output by the programmable array unit. The third input end of the frequency synthesis unit is used for accessing the trigger signal, and the output end of the frequency synthesis unit is connected with the input end of the anti-interference module so as to output the frequency signal. The trigger signal is directly connected with the frequency synthesis unit, so that the time consumed in the frequency switching process can be reduced, and the frequency hopping frequency switching speed can be improved. The output end of the anti-interference module is used for being connected with the frequency hopping signal output end so as to process the frequency signal output by the frequency synthesis unit and output the frequency hopping signal. It should be noted that, the frequency precision of the frequency hopping signal generator generally depends on the frequency resolution of the frequency synthesis unit, when the system clock frequency of the frequency synthesis unit is low and the number of bits of the frequency control word is small, the frequency resolution of the frequency synthesis unit is low, in this embodiment, the frequency synthesis unit has the characteristic of high performance, the frequency control word transmitted by the programmable array unit to the frequency synthesis unit is up to 32 bits, the corresponding frequency precision is 190pHz, the frequency precision of the frequency hopping signal generator is improved compared with the existing generator, and the internal reference clock is a high-frequency reference clock, so that the quality of the output frequency hopping signal is improved. Since the frequency accuracy is as high as 190pHz in this embodiment, a large bandwidth frequency hopping signal from 10MHz-1GHz can be generated, so the number of frequency hopping points available in the frequency domain is also very large. As shown in fig. 2 to fig. 4, the phase-locked loop unit and the frequency synthesis unit cooperate to output the frequency source as the frequency hopping signal generator, and the processing unit and the programmable array unit are used for fusing and controlling the control module as the frequency hopping signal generator, so as to construct the self-defined frequency point frequency hopping signal generator with the frequency hopping bandwidth as high as 1GHz, the single frequency hopping as low as a few microseconds, the frequency hopping triggering time as low as tens of nanoseconds, and 256 frequency points can be modified under the operation condition.
Specifically, the phase-locked loop unit comprises a phase-detecting frequency discriminator, a low-pass filter, a voltage-controlled oscillator and a feedback loop, wherein the phase-detecting frequency discriminator is connected with the low-pass filter, the low-pass filter is connected with the voltage-controlled oscillator, and the voltage-controlled oscillator is connected with the feedback loop. In actual operation, the phase discriminator detects the phase difference between the frequency source control signal and the feedback signal, converts the phase difference into a voltage signal, and sends the converted voltage signal to the low-pass filter, and the high-frequency component output by the phase discriminator is filtered by the low-pass filter to obtain a smooth error signal, wherein the error signal represents the phase difference between the frequency source control signal and the feedback signal.
The error signal output by the low pass filter is fed into the voltage controlled oscillator. The frequency of the voltage-controlled oscillator is adjusted according to the input voltage signal. When the error signal is large, the frequency of the voltage controlled oscillator is adjusted in a direction to reduce the error. The output signal of the voltage controlled oscillator is fed into a feedback loop, which is compared with the frequency source control signal to generate a phase difference. The phase difference is detected by a phase detector and converted into a voltage signal, which is then fed into a low-pass filter. If the frequency of the voltage-controlled oscillator is different from the frequency of the frequency source control signal, the feedback loop drives the voltage-controlled oscillator to adjust in a direction of reducing the difference, and finally the frequency of the voltage-controlled oscillator is the same as the frequency of the frequency source control signal, so that phase locking is realized. In summary, a negative feedback system is formed inside the pll unit: when there is a difference in the phase of the frequency source control signal and the feedback signal, the system will attempt to adjust the frequency of the voltage controlled oscillator to reduce this difference until the phases are identical. When the phases of the input signal and the feedback signal are consistent, the negative feedback system reaches a stable state, and the output signal of the voltage-controlled oscillator is the internal reference clock generated by the phase-locked loop unit.
Specifically, the frequency synthesis unit comprises a register, a phase accumulator, a waveform data table ROM and a D/A converter, wherein the register is connected with the phase accumulator, the phase accumulator is connected with the waveform data table ROM, and the waveform data table ROM is connected with the D/A converter. In practical applications, the pll unit inputs the internal reference clock to the frequency synthesis unit, and the frequency synthesis unit uses the internal reference clock as the system clock. Meanwhile, the frequency control word selected by the programmable array unit is input into a register, accumulated by a phase accumulator under a system clock, finally, table lookup is performed under a waveform data table ROM according to the accumulated result, the table lookup result is input into a high-speed D/A converter, and finally, a frequency signal is output.
Further, the memory module comprises a memory, which is connected to the second input of the processing unit. In this embodiment, the memory is an EEPROM, the EEPROM is an erasable programmable read-only memory, and bidirectional transmission is provided between the EEPROM and the processing unit, i.e. the processing unit can store the data point table information in the EEPROM or the processing unit can read the data point table information from the EEPROM. EEPROM is a non-volatile memory that is used to retain data after a power failure. The EEPROM allows multiple programming and erasing operations, has relatively high reading speed, can rapidly extract the needed information of the frequency hopping point table, and is beneficial to improving the frequency hopping speed. After the data point table information is acquired, the data point table information is processed by the processing unit, and the data point table information is stored in the memory according to a certain format. After the frequency hopping point table information in the memory is read, the frequency control word corresponding to the frequency point in the frequency hopping point table information is calculated, the frequency hopping frequency control word table is generated according to a preset rule, and then the frequency hopping frequency control word table is stored in the memory according to a preset format so as to store the frequency control word.
Further, the anti-interference module comprises a filter unit, the input end of the filter unit is connected with the output end of the frequency synthesis unit, and the output end of the filter unit is used for being connected with the frequency hopping signal output end. The filter unit comprises a high-pass filter and a low-pass filter, the low-pass filter and the high-pass filter are connected in series, the cut-off frequency of the high-pass filter is 10MHz, and the cut-off frequency of the low-pass filter is 1.4GHz. After the frequency synthesis unit outputs the frequency signal, the high-frequency mirror image component and the low-frequency noise signal can be filtered through the low-pass filter and the high-pass filter, and then the frequency hopping signal is output, and the frequency hopping signal output at the moment has good frequency spectrum purity.
Example two
As shown in fig. 1, the custom frequency point high-speed broadband frequency hopping signal generator in this embodiment is different from that in the first embodiment in that: the user-defined frequency point high-speed broadband frequency hopping signal generator in the embodiment further comprises a frequency hopping point table reader-writer and an IO reader-writer, wherein the input end of the frequency hopping point table reader-writer is used for inputting frequency hopping point table information, the output end of the frequency hopping point table reader-writer is connected with the first input end of the processing unit, and the frequency hopping point table reader-writer reads or modifies the frequency hopping point table information based on a UART communication protocol. The input end of the IO reader-writer is used for inputting a frequency hopping control signal, and the output end of the IO reader-writer is connected with the second input end of the programmable array unit so as to read and write the frequency hopping control signal and input the frequency hopping control signal into the programmable array unit. In this embodiment, an IO (Input, output) reader is a device or software capable of reading and writing binary data or accessing a physical address.
Example III
In this embodiment, as shown in fig. 5 and fig. 6, a signal generating method is provided, which is implemented based on the custom frequency point high-speed broadband frequency hopping signal generator in the first embodiment or the second embodiment. The signal generation method comprises the following steps:
step 100, obtaining frequency hopping point table information, wherein the frequency hopping point table information comprises a plurality of frequency points.
The frequency hopping point table is read and written by the frequency hopping point table reader-writer to obtain frequency hopping point table information, meanwhile, the frequency hopping point table information is read and displayed on the connected upper computer, the frequency hopping point table information is written and stored in the memory according to a preset format by the processing unit, and then the frequency hopping point table information stored in the memory is read by the processing unit. The frequency hopping point table information comprises related information required by frequency hopping control such as sequence numbers, frequencies, phases, power and the like, and the frequency hopping point table information comprises a plurality of frequency points. When the frequency hopping point table is read and written by the frequency hopping point table reader, the upper computer is connected with the frequency hopping point table reader to read and write the frequency hopping point table by using a UART bus protocol, and the specific steps are as follows:
-start: the function of starting reading and writing the frequency hopping point table is shown.
-reading: a data frame is sent containing the position of the frequency bin to be read in the frequency bin table (range 0-255), or no data frame is sent indicating that the entire frequency bin table is to be read. A data frame is received containing the value of the read frequency bin (range 10000000-1400000000).
-writing: a data frame is transmitted containing the position of the frequency point to be written in the frequency hopping point table (range 0-255) and the frequency value to be written (range 10000000-1400000000). A data frame is received indicating whether the write operation was successful.
-end: and the function of finishing reading and writing the frequency hopping point table is shown. This function also automatically ends if there is no operation within 3 minutes.
After UART bus transmission is finished, the frequency hopping point table information is stored in a memory according to a certain format, and after the frequency hopping point table information is stored in the memory, the frequency hopping point table reader-writer continuously reads and writes the frequency hopping point table.
And 200, analyzing the frequency hopping point table information to obtain a frequency control word corresponding to the frequency point in the frequency hopping point table information.
After the frequency hopping point table information in the memory is read by the frequency hopping point table reader-writer, the processing unit processes (reads or writes) the frequency hopping point table information, and outputs the frequency hopping point table information after the data processing to the programmable array unit, so that the programmable array unit can obtain the corresponding frequency control word from the frequency hopping point table information after the data processing. Here, the frequency control word is a control signal content for controlling the frequency source module to generate a corresponding frequency hopping tone signal, which is related to the output frequency and the internal reference clock frequency, and the relationship of the frequency control word, the output frequency and the internal reference clock frequency can be represented by the following expression:
wherein FTW is a frequency control word, f OUT To output frequency f SYSCLK For the frequency of the internal reference clock, round (x) is the value of argument x rounded to the nearest integer. Wherein the frequency control word range includes dc to Nyquist frequencies (1/2 f SYSCLK ) The function round (x) rounds the value of the argument x to the nearest integer for transmission to the frequency synthesis unit.
Step 300, obtaining a frequency hopping control signal, selecting a corresponding frequency control word according to the frequency hopping control signal, generating a frequency source control signal, and inputting the selected frequency control word and the frequency source control signal into a frequency source module.
After analyzing the frequency hopping point table information to obtain a frequency control word, waiting for a frequency hopping control signal, reading the frequency hopping control signal by an IO reader-writer when the frequency hopping control signal arrives, and inputting the frequency hopping control signal into the programmable array unit according to a preset format. When the frequency hopping control signal arrives, the programmable array unit reads the data in the IO reader-writer after receiving the interrupt signal, and analyzes the frequency hopping control signal. And the programmable array unit selects the corresponding frequency point according to the frequency hopping control signal, selects the frequency control word corresponding to the required frequency point based on the frequency hopping control signal, and inputs the selected frequency control word into the frequency synthesis unit. Meanwhile, the programmable array unit generates a frequency source control signal and outputs the frequency source control signal to the phase-locked loop unit and the frequency synthesis unit.
Step 400, the trigger signal is read through the frequency source module, the frequency source module generates a frequency signal based on the frequency control word and the frequency source control signal, and the anti-interference module outputs the frequency signal as a frequency hopping signal.
After the frequency source control signal is output to the phase-locked loop unit and the frequency synthesis unit, the phase-locked loop unit is connected with a reference clock signal, and the programmable array unit controls the phase-locked loop unit to generate an internal reference clock. The frequency synthesis unit inputs the frequency control word into a register after receiving the frequency control word, reads a frequency source control signal and performs frequency hopping preparation. Waiting for a trigger signal, transmitting the trigger signal to a frequency synthesizing unit when the trigger signal is read, synthesizing a corresponding frequency signal with a frequency control word in a frequency control word utilization register based on an internal reference clock by the frequency synthesizing unit, outputting the frequency signal to a filter unit, and then returning to waiting for a next frequency hopping control signal. And finally, filtering the high-frequency image component and the low-frequency noise signal through a filter unit, and outputting a frequency hopping signal.
In this embodiment, after resolving the frequency control word corresponding to the frequency point in the frequency hopping point table information, the method further includes:
generating a frequency hopping frequency control word list according to a preset rule by using the frequency control word;
and storing the frequency hopping frequency control word table in a memory according to a preset format.
After receiving the frequency hopping point table information, the processing unit generates a frequency hopping frequency control word table by processing the frequency hopping point table information according to a preset rule and stores the frequency hopping frequency control word table into the memory. And then, the processing unit reads the frequency hopping frequency control word table from the memory, correspondingly generates a frequency hopping point table signal and outputs the frequency hopping point table signal to the programmable array unit. After receiving the frequency hopping control signal and the frequency hopping point table signal, the programmable array unit determines the corresponding frequency point according to the frequency hopping control signal, selects the frequency control word of the corresponding frequency point from the frequency hopping frequency control word table according to the frequency hopping control signal, and outputs the frequency control word to the frequency synthesis unit.
In this embodiment, after obtaining the frequency hopping point table information, the frequency hopping point table information includes a plurality of frequency points, the method further includes:
setting parameter data of a phase-locked loop unit, and enabling the frequency source module to generate a frequency signal based on the reference clock signal and the frequency control word after the phase-locked loop unit receives the reference clock signal.
After the phase-locked loop unit receives the reference clock signal, the programmable array unit controls the phase-locked loop unit to enter a working mode to generate an internal reference clock to serve as a system clock of the frequency synthesis unit. The frequency synthesis unit synthesizes corresponding frequency signals by utilizing the frequency control words in the register based on the internal reference clock, outputs the frequency signals to the filter unit, and then filters high-frequency image components and low-frequency noise signals in the frequency signals through the filter unit and outputs frequency hopping signals.
The technical features of the above-described embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above-described embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description. It should be noted that, in "an embodiment," "for example," "another instance," and the like of the present application are intended to illustrate the present application, not to limit the present application.
The above examples only represent a few embodiments of the present application, which are described in more detail and are not to be construed as limiting the scope of the claims. It should be noted that it would be apparent to those skilled in the art that various modifications and improvements could be made without departing from the spirit of the present application, which would be within the scope of the present application. Accordingly, the scope of protection of the present application is to be determined by the claims appended hereto.
Claims (10)
1. A self-defined frequency point high-speed broadband frequency hopping signal generator is characterized by comprising: the device comprises a control module, a frequency source module, a storage module and an anti-interference module;
the frequency source module comprises a phase-locked loop unit and a frequency synthesis unit, wherein a first input end of the phase-locked loop unit is used for accessing a reference clock signal, a second input end of the phase-locked loop unit is connected with an output end of the control module, an output end of the phase-locked loop unit is connected with a first input end of the frequency synthesis unit, a second input end of the frequency synthesis unit is connected with an output end of the control module, a third input end of the frequency synthesis unit is used for accessing a trigger signal, an output end of the frequency synthesis unit is connected with an input end of the anti-interference module, and an output end of the anti-interference module is used for being connected with a frequency hopping signal output end;
the control module is used for acquiring frequency hopping point table information, analyzing the frequency hopping point table information into corresponding frequency control words, selecting the corresponding frequency control words based on frequency hopping control signals, outputting the selected frequency control words and frequency source control signals, the phase-locked loop unit is used for generating an internal reference clock based on the frequency source control signals and reference clock signals, and the frequency synthesis unit is used for obtaining frequency signals based on the frequency source control signals and the frequency control words and outputting the frequency signals to the anti-interference module.
2. The self-defined frequency point high-speed broadband frequency hopping signal generator according to claim 1, wherein the control module comprises a processing unit and a programmable array unit, a first input end of the processing unit is used for inputting frequency hopping point table information, a second input end of the processing unit is connected with the storage module, an output end of the processing unit is connected with a first input end of the programmable array unit, a second input end of the programmable array unit is used for inputting frequency hopping control signals, a first output end of the programmable array unit is connected with a second input end of the phase-locked loop unit, and a second output end of the programmable array unit is connected with a second input end of the frequency synthesis unit; the processing unit is used for acquiring the frequency hopping point table information and analyzing the frequency hopping point table information, and the programmable array unit is used for selecting the corresponding frequency control word from the frequency hopping point table information based on the frequency hopping control signal and outputting the selected frequency control word and the frequency source control signal.
3. The custom frequency point high-speed broadband frequency hopping signal generator according to claim 2, further comprising a frequency hopping point table reader, wherein an input end of the frequency hopping point table reader is used for inputting frequency hopping point table information, and an output end of the frequency hopping point table reader is connected with a first input end of the processing unit.
4. The custom frequency point high-speed broadband frequency hopping signal generator according to claim 2, further comprising an IO reader, wherein an input end of the IO reader is used for inputting the frequency hopping control signal, and an output end of the IO reader is connected with a second input end of the programmable array unit.
5. The custom frequency point high-speed broadband frequency hopping signal generator according to claim 2, wherein the memory module comprises a memory, the memory being connected to the second input of the processing unit.
6. The custom frequency point high-speed broadband frequency hopping signal generator according to claim 1, wherein the anti-interference module comprises a filter unit, an input end of the filter unit is connected with an output end of the frequency synthesizing unit, and an output end of the filter unit is used for being connected with the frequency hopping signal output end.
7. A signal generation method based on the customized frequency point high-speed broadband frequency hopping signal generator as claimed in any one of claims 1 to 6, comprising:
acquiring frequency hopping point table information, wherein the frequency hopping point table information comprises a plurality of frequency points;
analyzing the frequency hopping point table information to obtain a frequency control word corresponding to a frequency point in the frequency hopping point table information;
acquiring a frequency hopping control signal, selecting a corresponding frequency control word according to the frequency hopping control signal, generating a frequency source control signal, and inputting the selected frequency control word and the frequency source control signal into the frequency source module;
and reading the trigger signal through the frequency source module, generating a frequency signal through the frequency source module based on the frequency control word and the frequency source control signal, and outputting the frequency signal into a frequency hopping signal through the anti-interference module.
8. The signal generating method according to claim 7, wherein the relation between the frequency control word and the output frequency and the internal reference clock is:
wherein FTW is a frequency control word, f OUT To output frequency f SYSCLK For the frequency of the internal reference clock, round (x) is the argumentThe value of x is rounded to the nearest integer.
9. The signal generating method according to claim 7, wherein after the parsing out of the frequency control word corresponding to the frequency in the frequency hopping table information, further comprises:
generating a frequency hopping frequency control word list according to a preset rule by the frequency control word;
and storing the frequency hopping frequency control word table in a memory according to a preset format.
10. The method of generating a signal according to claim 7, wherein the obtaining frequency hopping point table information, after the frequency hopping point table information includes a plurality of frequency points, further includes:
and setting parameter data of a phase-locked loop unit, wherein after the phase-locked loop unit receives a reference clock signal, a frequency source module generates the frequency signal based on the reference clock signal and the frequency control word.
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