CN117273153A

CN117273153A - Qubit frequency drive signal generator and quantum computer system

Info

Publication number: CN117273153A
Application number: CN202210671952.0A
Authority: CN
Inventors: 范良晨; 李雪白
Original assignee: Benyuan Quantum Computing Technology Hefei Co ltd
Current assignee: Benyuan Quantum Computing Technology Hefei Co ltd
Priority date: 2022-06-14
Filing date: 2022-06-14
Publication date: 2023-12-22

Abstract

The application discloses a qubit frequency drive signal generator, include: a first clock module configured to distribute a plurality of mutually synchronized operating clock signals in dependence on the received clock source signal and the pulse-per-second signal; the second pulse signal is used for aligning a plurality of working clock signals; a control module configured to receive task data and a trigger signal and to forward the task data and the trigger signal in accordance with the working clock signal; and each signal output module is configured to respond to the trigger signal and output a pulse signal which is multiplexed and used for driving the quantum bit frequency parameter according to the received task data and the received working clock signal. The synchronous precision of the pulse signals for driving the qubit frequency is improved.

Description

Qubit frequency drive signal generator and quantum computer system

Technical Field

The application belongs to the field of quanta, in particular to a qubit frequency driving signal generator and a quantum computer system.

Background

The quantum processor is a core component for executing quantum computation, a multi-bit quantum bit is integrated on the quantum processor, and in order to ensure the normal work of the quantum bit, various driving signals, such as a frequency driving signal for driving the working frequency of the quantum bit or an adjustable coupler between adjacent quantum bits, are needed to be provided for the quantum bit, wherein the frequency driving signal not only comprises a direct current signal for driving the quantum bit or the adjustable coupler to execute single-bit gate operation, but also comprises a pulse signal for driving the quantum bit or the adjustable coupler to execute two-bit gate operation or multi-bit gate operation; the direct current signal and the pulse signal are low-frequency signals and are provided by corresponding signal source modules, so that a special quantum measurement and control system needs to be built. A plurality of signal source modules are arranged in the quantum measurement and control system to provide various control signals for each quantum bit, for example, a signal generator is used for providing pulse signals to regulate and control the working frequency of the quantum bit or an adjustable coupler between adjacent quantum bits.

Along with development of quantum technology, the number of bits of a quantum processor is increased, quantum computing tasks running on the quantum processor are also increased and complicated, and the number of signal source modules to be integrated in a corresponding quantum measurement and control system is increased, so that clocks of a plurality of signal source modules are difficult to synchronize, the synchronism of frequency driving signals applied to the quantum processor is very low, and the computing precision of the quantum processor is reduced.

Therefore, how to improve clock synchronization of multiple signal source modules in a quantum measurement and control system is a technical problem to be solved in the art.

It should be noted that the information disclosed in the background section of the present application is only for enhancement of understanding of the general background of the present application and should not be taken as an admission or any form of suggestion that this information forms the prior art already known to a person skilled in the art.

Disclosure of Invention

An object of the present application is to provide a qubit frequency driving signal generator, and a quantum computer system, which improves the synchronization accuracy of a pulse signal for driving a qubit frequency.

The technical scheme of the application is as follows:

an aspect of the present application provides a qubit frequency drive signal generator comprising:

a first clock module configured to distribute a plurality of mutually synchronized operating clock signals in dependence on the received clock source signal and the pulse-per-second signal; the second pulse signal is used for aligning a plurality of working clock signals;

a control module configured to receive task data and a trigger signal and to forward the task data and the trigger signal in accordance with the working clock signal;

and each signal output module is configured to respond to the trigger signal and output a pulse signal which is multiplexed and used for driving the quantum bit frequency parameter according to the received task data and the received working clock signal.

The qubit frequency driving signal generator preferably further comprises a board main body, wherein the first clock module, the control module and the plurality of signal output modules are integrated on the board main body.

The qubit frequency drive signal generator as described above, preferably, further comprises a memory communicatively coupled to the control module for storing the task data.

The qubit frequency drive signal generator as described above, preferably, further comprises a second clock module configured to output a clock signal for operation of the memory.

The qubit frequency drive signal generator as described above, preferably, further comprises a third clock module configured to output a clock signal for configuring the control module.

The qubit frequency drive signal generator as described above, preferably further comprises a number of signal connectors, each of which is configured to receive the clock source signal and/or the pulse-per-second signal and/or to output the pulse signal.

The qubit frequency drive signal generator as described above preferably further comprises a power supply module configured to provide a power supply signal for operation of the first clock module, the control module, and the signal output module.

The qubit frequency driving signal generator as described above, preferably, the control module includes an FPGA or an MCU or an MPU or a DSP.

The qubit frequency drives the signal generator as described above, preferably the signal output module comprises a DAC.

In yet another aspect, the present application provides a quantum driving device, including a back plate, and a plurality of the qubit frequency driving signal generators of any one of the above, wherein a plurality of the qubit frequency driving signal generators are integrated on the back plate.

In yet another aspect, the present application provides a quantum control system, including a central control system, and a plurality of quantum driving devices described above, where the central control system is configured to control a plurality of the quantum driving devices to output pulse signals for driving a qubit frequency parameter.

A further aspect of the present application provides a quantum computer system comprising the quantum control system described above and a quantum processor that performs quantum computing based on a pulse signal output by the quantum control system.

Compared with the prior art, the application has the following beneficial effects:

the application provides a qubit frequency driving signal generator, which comprises a first clock module, a control module and a plurality of control modules; wherein the first clock module is configured to distribute a plurality of mutually synchronized working clock signals according to the received clock source signal and a second pulse signal, the second pulse signal being used for aligning the plurality of working clock signals; the control module is configured to receive task data and forward the task data and a trigger signal according to the working clock signal; each signal output module is configured to respond to the trigger signal and output a pulse signal for driving a qubit frequency parameter in a multipath manner according to the received task data and the working clock signal. According to the method, the clock source signal is received through the first clock module and divided into the plurality of working clock signals, so that the plurality of working clock signals are guaranteed to be homologous, the plurality of working clock signals are aligned by adopting the second pulse signals, and the synchronization precision among the plurality of working clock signals distributed to the control module and the signal output module is guaranteed to be very high; and the triggering signals forwarded by the control module ensure that the triggering of the plurality of signal output modules is synchronous, so that the synchronous precision of the plurality of signal output modules according to the pulse signals which are output by the task data and used for driving the quantum bit frequency parameters received by the control module is very high, and the calculation precision of the quantum processor is improved.

The quantum driving device, the quantum control system and the quantum computer system provided by the application belong to the same application conception with the qubit frequency driving signal generator, so that the quantum driving device and the quantum control system have the same beneficial effects and are not described in detail herein.

Drawings

Fig. 1 is a schematic diagram of a quantum measurement and control system constructed according to the prior art provided in an embodiment of the present application;

FIG. 2 is a schematic diagram of a qubit frequency driving signal generator according to an embodiment of the present application;

FIG. 3 is a schematic diagram II of a qubit frequency driving signal generator according to an embodiment of the present application;

fig. 4 is a schematic diagram of a quantum driving device according to an embodiment of the present application.

Reference numerals illustrate:

the system comprises a first clock module, a 2-control module, a 3-signal output module, a 4-memory, a 5-second clock module and a 6-third clock module.

Detailed Description

The following detailed description is merely illustrative and is not intended to limit the embodiments and/or the application or uses of the embodiments. Furthermore, there is no intention to be bound by any expressed or implied information presented in the preceding background or brief summary or the detailed description section.

For purposes of clarity, technical solutions, and advantages of embodiments of the present application, one or more embodiments will now be described with reference to the drawings, wherein like reference numerals are used to refer to like components throughout. In the following description, for purposes of explanation, numerous specific details are set forth in order to provide a more thorough understanding of one or more embodiments. It may be evident, however, that one or more embodiments may be practiced without these specific details, and that such embodiments may be incorporated by reference herein without departing from the scope of the claims.

It should be noted that the terms "first," "second," and the like in the description and claims of the present application and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that embodiments of the present application described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

In general, a quantum processor is provided with a plurality of qubits and a data transmission line, each qubit comprises a detector and a qubit device which are coupled and connected with each other, wherein the qubit device can be an artificial superconducting qubit formed by utilizing a superconducting josephson junction and a capacitance to ground, and the detector can be a resonant cavity. The quantum bit device is provided with a first control signal line and a second control signal line, and a detector coupled with the quantum bit device is provided with a third control signal line, wherein the first control signal line is used for transmitting a quantum state regulation signal for regulating and controlling quantum state information of the quantum bit device, the second control signal line is used for transmitting a frequency regulation signal for regulating and controlling frequency parameters of the quantum bit device, and the third control signal line is used for transmitting a measurement signal for measuring and reading the detector and outputting a read return signal returned by the detector so as to realize indirect reading and measurement of the state of the quantum bit device. Therefore, a quantum control system for qubit regulation and measurement in a quantum processor needs to generate and output three control signals to be provided to the first to third control signal lines, respectively, to realize the regulation and measurement of the qubit in the quantum processor.

The prior art quantum measurement and control system as shown in fig. 1 is built using commercial instruments. It is well known that quantum processors have multiple qubits thereon, and quantum computing tasks may be performed by a single qubit or may be performed cooperatively by multiple qubits. In order to ensure proper operation of each qubit, it is necessary to provide a plurality of driving signals for the qubit, for example, a frequency driving signal that drives a single qubit or a plurality of qubits to perform a gate operation. Specifically, the single-bit gate frequency driving signal for driving a single qubit to perform a gate operation is provided by a direct current signal source, and the multi-bit gate frequency driving signal is provided by a pulse signal source. In addition, when the qubit performs quantum computation, the qubit needs to be regulated to a target quantum state, specifically, a quantum state driving signal is output through a microwave signal source to be regulated. When the quantum processor finishes quantum computation, the operation result of the quantum processor is measured and processed by the signal acquisition equipment and the signal processing equipment to obtain a computation result.

The multiple signal sources are usually commercial signal sources independent of each other, and when the number of qubits integrated on the quantum processor is very large, and when multiple driving signals of the same type are required to be provided for performing quantum computation, one signal source cannot meet the number requirement of the driving signals, and multiple signal sources of the same type are required to be cooperatively provided. It is conceivable that when a plurality of independent commercial signal sources cooperate to provide a frequency driving signal for a quantum processor to perform quantum computation, an error exists in a clock between the signal sources, so that the synchronicity of the output frequency driving signal is difficult to be ensured, the driving effect on the quantum processor is directly affected, and the accuracy of the quantum processor to perform quantum computation is further affected.

As shown in fig. 2, the present application provides a qubit frequency drive signal generator comprising a first clock module 1 configured to distribute a plurality of mutually synchronized working clock signals in dependence on a received clock source signal and a pulse-per-second signal; a control module 2 configured to receive task data and to forward the task data and trigger signals in dependence on the working clock signal; and a plurality of signal output modules 3, wherein each signal output module 3 is configured to respond to the trigger signal and output a pulse signal for driving the qubit frequency parameter in a multiplexing way according to the received task data and the working clock signal.

The clock source receives the clock source signal and distributes a plurality of working clock signals, and the working clock signals are aligned through the second pulse signals, so that the working clock signals distributed to the control module 2 and the signal output module 3 are synchronous with each other. The control module 2 receives the task data and the trigger signals and forwards the task data and the trigger signals to the signal output module 3, and the trigger signals ensure that the triggering among the plurality of signal output modules 3 is synchronous, so that the synchronous precision of a plurality of pulse signals output by the plurality of signal output modules 3 according to the task parameters is very high.

In addition, the pulse signal for driving the frequency parameter of the qubit is usually a square wave signal, the frequency of the qubit reaches a preset value by adjusting the amplitude of the square wave signal, and the frequency of the qubit reaches a preset value within a preset time by adjusting the pulse width of the square wave signal, so as to perform multi-bit gate operation. When the multi-bit gate operation is completed, the pulse signal output by the signal output module 3 can be stopped.

The clock source signals are received by the first clock module 1 and are divided into the working clock signals, so that the working clock signals are guaranteed to be homologous, the working clock signals are aligned by adopting the second pulse signals, and the synchronization precision among the working clock signals distributed to the control module 2 and the signal output module 3 is guaranteed to be very high; and the triggering signals forwarded by the control module 2 ensure that the triggering of the plurality of signal output modules 3 is synchronous, so that the synchronous precision of the plurality of signal output modules 3 according to the pulse signals which are output by the task data and used for driving the quantum bit frequency parameters received from the control module 2 is very high, and the calculation precision of the quantum processor is improved.

As an implementation manner of the embodiment of the present application, the qubit frequency driving signal generator further includes a board main body, where the first clock module 1, the control module 2, and the plurality of signal output modules 3 are integrated on the board main body. Specifically, the first clock module 1, the control module 2 and the plurality of signal output modules 3 are all integrated circuits, and all functional modules are integrated on one board by adopting the board main body, so that the integrated circuit is small in size, high in integration level and convenient to expand.

As shown in fig. 3, as an implementation of the embodiment of the present application, the qubit frequency driving signal generator further includes a memory 4, where the memory 4 is communicatively connected to the control module 2, and is configured to store the task data. The task data specifically includes signal waveform parameters, signal waveform time sequence, etc. of the pulse signal, where the signal waveform parameters specifically are waveform parameters, such as pulse amplitude, pulse width, ringing amplitude, etc., of the pulse signal output by the signal output module 3; the signal waveform time sequence is the application time of the pulse signal, and when the quantum processor executes the quantum computing task, a plurality of driving signals applied to the quantum bit are time-ordered, and the driving signals need to be applied strictly according to the preset time order, so that the driving effect and the accuracy of the quantum bit are ensured. For quantum computing tasks, the memory occupied by the corresponding task data is usually relatively large, the task data is stored in the memory 4 after being received by the control module 2, and the task data is read from the memory 4 when forwarding is needed, so that the memory consumption of the control module 2 is saved. In this embodiment, the memory 4 is preferably DDR, the number of DDR may be plural, and other devices having similar data storage functions may be used in other embodiments, which is not limited herein.

As one implementation of the embodiments of the present application, the qubit frequency drive signal generator further comprises a second clock module 5 configured to output a clock signal for operation of the memory 4. In particular, the second clock module 5 may include a crystal oscillator, and is connected to the memory 4 through a phase-locked loop circuit, so as to provide a stable high-frequency clock signal for the memory 4.

As one implementation of the present embodiment, the qubit frequency drive signal generator further comprises a third clock module 6 configured to output a clock signal for configuring the control module 2. Before the control module 2 works, the built-in parameters of the control module 2 also need to be configured, for example, clock signals, and the built-in clock parameters of the control module 2 are configured through the third clock module 6, so that the normal work of the control module 2 is ensured.

It should be added that, the working clock signal distributed to the control module 2 by the first clock module 1 is a clock signal that the control module 2 controls the plurality of signal output modules 3 to cooperatively output pulse waveforms, and the control module 2 is actively configured to configure the working clock signal of the signal output modules 3; when the third clock module 6 is used to configure the built-in clock of the control module 2, the control module 2 is configured passively. The first clock module 1 and the third clock module 6 are used for configuring the built-in clock parameters and the working clock parameters of the control module 2, so that the clock performance of the control module 2 is ensured to be stable when quantum computing tasks are executed. In addition, the second clock module 5 and the third clock module 6 can both adopt crystal oscillators, so that integration is facilitated.

As one implementation of the embodiments of the present application, the qubit frequency drive signal generator further includes a number of signal connectors, each configured to receive the clock source signal and/or the pulse-per-second signal, and/or to output the pulse signal. The clock source signal and the second pulse signal are both signals sent from the outside, and the pulse signal generated by the signal output module 3 is required to be output to the quantum processor, and the signal connector is used for receiving and/or outputting the signal, so that the cable connection and the disassembly are convenient. In this embodiment, the signal connector is preferably an SSMA radio frequency connector, which is fixed on the board main body, and has small volume, stable structure and stable performance, and other devices with similar functions may be selected in other embodiments, which is not limited herein.

As one implementation of the embodiments of the present application, the qubit frequency drive signal generator further includes a power supply module configured to provide a power supply signal for the operation of the first clock module 1, the control module 2, and the signal output module 3. The first clock module 1, the first control module 2 and the plurality of signal output modules 3 are all active devices, and provide working power signals for other functional modules by arranging a power module.

As an implementation manner of the embodiment of the present application, the control module 2 includes an FPGA or an MCU or an MPU or a DSP. The control module 2 is a device with data forwarding and processing functions, and generally FPGA (Field Programmable Gate Array), MCU (Microcontroller Unit), MPU (Microprocessor Unit) or DSP (Digital Signal Processor) can be selected. In this embodiment, the control module 2 is preferably an FPGA, and in other embodiments, other devices with similar data processing functions may be used, which is not limited herein.

As an implementation of the embodiment of the present application, the signal output module 3 includes a DAC. The signal output module 3 is a device for outputting pulse signals according to task data, and DAC (Digital to analog converter) can be generally selected. In this embodiment, the pulse signal is used to drive the qubit to perform the square wave signal of the multi-bit gate operation, and the pulse amplitude and the pulse width of the square wave signal are adjusted, so that the pulse amplitude can be about ±2v, and the pulse width is tens of nanoseconds; therefore, in this embodiment, the sampling rate of the corresponding DAC is preferably selected to be about 1GHz, so that the pulse signal parameter adjustment accuracy can be satisfied.

As described above, in this embodiment, the control module 2 is preferably an FPGA, the signal output module 3 is preferably a DAC, and the control module 2 and a plurality of the signal output modules 3 communicate with each other through the JESD204B interface, so that the task data transmission efficiency is high, the board layout space of the board main body is reduced, the pins and the package size of the device are reduced, and the integration is facilitated.

As shown in fig. 4, based on the same application concept, the embodiment of the present application further provides a quantum driving device, which includes a back plate, and a plurality of the above-mentioned qubit frequency driving signal generators, where a plurality of the qubit frequency driving signal generators are integrated on the back plate. Each module of the qubit frequency driving signal generator can be integrated on the board main body by adopting an integrated device; and a plurality of board card main bodies are integrated on one backboard, so that a plurality of qubit frequency driving signal generators are integrated on one backboard, the expansion is convenient, and frequency driving signals are provided for quantum processors with more bits.

Based on the same application conception, the embodiment of the application also provides a quantum control system, which comprises a central control system and a plurality of quantum driving devices, wherein the central control system is configured to control the plurality of quantum driving devices to output pulse signals for driving the frequency parameters of the quantum bit. With the development of quantum technology, the number of integrated qubits on a quantum processor is increased, more quantum driving devices are needed to serve as signal sources to provide frequency driving signals for the qubits, when the number of the quantum driving devices is increased, a central control system is adopted to control the plurality of quantum driving devices, the control of a plurality of quantum bit frequency driving signal generators on the quantum driving devices is realized through a back plate, the clock and triggering synchronization stability of the whole control system is ensured, and then the synchronization of the frequency driving signals output to the quantum processor is ensured.

Based on the same application conception, the embodiment of the application also provides a quantum computer system, which comprises the quantum control system and a quantum processor, wherein the quantum processor performs quantum computation based on a pulse signal output by the quantum control system.

The foregoing detailed description of the construction, features and advantages of the present application will be presented in terms of embodiments illustrated in the drawings, wherein the foregoing description is merely illustrative of preferred embodiments of the application, and the scope of the application is not limited to the embodiments illustrated in the drawings.

Claims

1. A qubit frequency drive signal generator comprising:

2. The qubit frequency drive signal generator of claim 1, further comprising a board body, wherein the first clock module, the control module, and the plurality of signal output modules are all integrated on the board body.

3. The qubit frequency drive signal generator of claim 1, further comprising a memory communicatively coupled to the control module for storing the task data.

4. A qubit frequency drive signal generator according to claim 3, further comprising a second clock module configured to output a clock signal for operation of the memory.

5. The qubit frequency drive signal generator of claim 1, further comprising a third clock module configured to output a clock signal for configuring the control module.

6. The qubit frequency drive signal generator of claim 1, further comprising a number of signal connectors, each configured to receive the clock source signal and/or the pulse-per-second signal, and/or output the pulse signal.

7. The qubit frequency drive signal generator of claim 1, further comprising a power supply module configured to provide a power supply signal for operation of the first clock module, the control module, and the signal output module.

8. The qubit frequency drive signal generator of claim 1, wherein the control module comprises an FPGA or MCU or MPU or DSP.

9. The qubit frequency drive signal generator of claim 1, wherein the signal output module comprises a DAC.

10. A quantum drive device comprising a backplate, and a plurality of qubit frequency drive signal generators as claimed in any one of claims 1 to 9, a plurality of the qubit frequency drive signal generators being integrated on the backplate.

11. A quantum control system comprising a central control system, and a plurality of quantum driving devices of claim 10, the central control system configured to control a plurality of the quantum driving devices to output pulse signals for driving a qubit frequency parameter.

12. A quantum computer system comprising the quantum control system of claim 11 and a quantum processor that performs quantum computation based on a pulse signal output by the quantum control system.