CN117234618A - Code running method and device, storage medium and electronic device - Google Patents

Code running method and device, storage medium and electronic device Download PDF

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Publication number
CN117234618A
CN117234618A CN202311266669.0A CN202311266669A CN117234618A CN 117234618 A CN117234618 A CN 117234618A CN 202311266669 A CN202311266669 A CN 202311266669A CN 117234618 A CN117234618 A CN 117234618A
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China
Prior art keywords
server
level state
determining
fault
signal
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CN202311266669.0A
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Inventor
杨德超
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Suzhou Metabrain Intelligent Technology Co Ltd
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Suzhou Metabrain Intelligent Technology Co Ltd
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Priority to CN202311266669.0A priority Critical patent/CN117234618A/en
Publication of CN117234618A publication Critical patent/CN117234618A/en
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

The embodiment of the application provides a code running method and device, a storage medium and an electronic device, wherein the code running method comprises the following steps: acquiring a first level state of a first signal and a second level state of a second signal, wherein the first signal is used for indicating the insertion state of a graphic processor on a server, and the second signal is used for indicating the type of the graphic processor on the server; determining the type of the graphics processor inserted on the server according to the second level state under the condition that the graphics processor is inserted on the server according to the first level state; the code corresponding to the graphic processor is operated according to the type of the graphic processor, so that the problem that the same server cannot identify different types of graphic processors in the prior art can be solved.

Description

Code running method and device, storage medium and electronic device
Technical Field
The embodiment of the application relates to the field of computers, in particular to a code running method and device, a storage medium and an electronic device.
Background
With the development of artificial intelligence and big data age, the role of artificial intelligence server in daily life is more and more important, the application field is very wide, especially the big language model is gradually developed, and the popularity of artificial intelligence is raised globally. In each large model application, the AI (Artificial Intelligence ) computing power grows exponentially, but AI computing power depends on a graphics processor, and in a high-performance graphics processor display card, H800 is applied to multiple scenes such as accelerating artificial intelligence, graphic rendering and the like. In the case of global H800 supply shortage, the product compatibility problem of the GPU (Graphics Processing Unit, graphics processor) of different graphics processor types must be solved, so a800 and H800 compatible design one becomes a requirement.
In the prior art, the current H800G PU card type server and a 800G PU card type server are separate, i.e., different types of graphics processors correspond to different types of servers.
Aiming at the problem that the same server cannot identify different types of graphics processors in the prior art, the method has not been solved effectively.
Disclosure of Invention
The embodiment of the application provides a code running method and device, a storage medium and an electronic device, which at least solve the problem that the same server in the prior art cannot identify different types of graphics processors.
According to an embodiment of the present application, there is provided a code running method including: acquiring a first level state of a first signal and a second level state of a second signal, wherein the first signal is used for indicating the insertion state of a graphic processor on a server, and the second signal is used for indicating the type of the graphic processor on the server; determining the type of the graphics processor inserted on the server according to the second level state under the condition that the graphics processor is inserted on the server according to the first level state; and running codes corresponding to the graphic processor according to the type of the graphic processor.
In one exemplary embodiment, determining the type of graphics processor inserted on the server based on the second level state includes: determining that the type of the graphics processor inserted on the server is a first type if the second level state is high; and determining the type of the graphics processor inserted on the server as a second type under the condition that the second level state is a low level.
In an exemplary embodiment, before determining the type of graphics processor inserted on the server according to the second level state, the method further comprises: determining whether a graphics processor is inserted on the server according to the first level state; determining that a graphics processor is not inserted on the server if the first level state is high; and determining to insert a graphics processor on the server if the second level state is low.
In one exemplary embodiment, after determining that no graphics processor is plugged into the server, the method further comprises: determining whether the server has a fault according to the second level state; determining that the server has no fault under the condition that the second level state is high level; and determining that the server has a fault under the condition that the second level state is low level.
In an exemplary embodiment, after determining that the server has failed, the method further comprises: determining fault information of the server through a log file; determining whether a fault configuration file corresponding to the fault information is matched in a pre-configured fault information list, wherein the fault information list comprises the fault information and the corresponding fault configuration file; under the condition that a fault configuration file corresponding to the fault information is matched in the fault information list, processing the fault of the server according to the fault configuration file, and obtaining a fault processing result; and under the condition that the fault configuration file corresponding to the fault information is not matched in the fault information list, generating corresponding prompt information according to the fault information, and sending the prompt information to terminal equipment corresponding to the server.
In one exemplary embodiment, acquiring a first level state of a first signal and a second level state of a second signal includes: acquiring a level state of a first pin and a level state of a second pin in a backboard of a server through a mainboard of the server, wherein the first pin is connected with a pin corresponding to the first signal, and the second pin is connected with a pin corresponding to the second signal; determining a first level state of the first signal according to the level state of the first pin, and determining a second level state of the second signal according to the level state of the second pin.
In an exemplary embodiment, after running the code corresponding to the graphics processor according to the type of the graphics processor, the method further includes: determining a logic control mode and a time sequence control mode of the graphic processor according to the type of the graphic processor; and controlling the programmable logic device of the server to execute the logic control operation corresponding to the logic control mode and execute the time sequence control operation corresponding to the time sequence control mode.
According to another embodiment of the present application, there is provided an operating apparatus of a code, including: the system comprises an acquisition module, a control module and a control module, wherein the acquisition module is used for acquiring a first level state of a first signal and a second level state of a second signal, the first signal is used for indicating the insertion state of a graphic processor on a server, and the second signal is used for indicating the type of the graphic processor on the server; a determining module, configured to determine a type of a graphics processor inserted on a server according to the second level state, where the graphics processor is determined to be inserted on the server according to the first level state; and the operation module is used for operating codes corresponding to the graphic processor according to the type of the graphic processor.
According to a further embodiment of the application, there is also provided a computer readable storage medium having stored therein a computer program, wherein the computer program is arranged to perform the steps of any of the method embodiments described above when run.
According to a further embodiment of the application there is also provided an electronic device comprising a memory having stored therein a computer program and a processor arranged to run the computer program to perform the steps of any of the method embodiments described above.
By the method, the device and the system, the first level state of the first signal for indicating the insertion state of the image processor on the server and the second level state of the second signal for indicating the type of the image processor on the server are acquired, and under the condition that the image processor is inserted into the server according to the first level state, the type of the inserted image processor on the server is determined according to the second level state, and codes corresponding to the image processor are operated according to the type of the image processor. Therefore, the problem that different types of graphics processors in the prior art need to develop corresponding servers respectively and the same server cannot identify the different types of graphics processors can be solved.
Drawings
Fig. 1 is a hardware block diagram of a computer terminal of a code running method according to an embodiment of the present application;
FIG. 2 is a flow chart of a method of operation of code according to an embodiment of the application;
fig. 3 is a circuit diagram of a server corresponding to an operation method of the code according to the present embodiment;
FIG. 4 is a server block diagram of a prior art H800 in accordance with another embodiment of the present application;
FIG. 5 is a server block diagram of a prior art A800 according to another embodiment of the present application;
FIG. 6 is a schematic diagram of a BMC obtaining product type logic according to another embodiment of the present application;
FIG. 7 is a logic diagram of a CPLD acquiring GPU card type in accordance with another embodiment of the present application;
fig. 8 is a block diagram of the structure of an operating device of a code according to an embodiment of the present application.
Detailed Description
Embodiments of the present application will be described in detail below with reference to the accompanying drawings in conjunction with the embodiments.
It should be noted that the terms "first," "second," and the like in the description and the claims of the present application and in the above-described figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order.
The method embodiments provided in the embodiments of the present application may be performed in a mobile terminal, a computer terminal or similar computing device. Taking the example of running on a computer terminal, fig. 1 is a block diagram of the hardware structure of the computer terminal of a code running method according to an embodiment of the present application. As shown in fig. 1, the computer terminal may include one or more (only one is shown in fig. 1) processors 102 (the processor 102 may include, but is not limited to, a microprocessor MCU or a processing device such as a programmable logic device FPGA) and a memory 104 for storing data, wherein the computer terminal may further include a transmission device 106 for communication functions and an input-output device 108. It will be appreciated by those skilled in the art that the configuration shown in fig. 1 is merely illustrative and is not intended to limit the configuration of the computer terminal described above. For example, the computer terminal may also include more or fewer components than shown in FIG. 1, or have a different configuration than shown in FIG. 1.
The memory 104 may be used to store a computer program, for example, a software program of application software and a module, such as a computer program corresponding to a load resource allocation method in an embodiment of the present application, and the processor 102 executes the computer program stored in the memory 104 to perform various functional applications and data processing, that is, implement the above-mentioned method. Memory 104 may include high-speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory 104 may further include memory remotely located relative to the processor 102, which may be connected to the computer terminal via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The transmission device 106 is used to receive or transmit data via a network. Specific examples of the network described above may include a wireless network provided by a communication provider of a computer terminal. In one example, the transmission device 106 includes a network adapter (Network Interface Controller, simply referred to as NIC) that can connect to other network devices through a base station to communicate with the internet. In one example, the transmission device 106 may be a Radio Frequency (RF) module, which is configured to communicate with the internet wirelessly.
Fig. 2 is a flowchart of a method of operating code according to an embodiment of the present application, as shown in fig. 2, the flowchart including the steps of:
step S202, a first level state of a first signal and a second level state of a second signal are obtained, wherein the first signal is used for indicating the insertion state of a graphic processor on a server, and the second signal is used for indicating the type of the graphic processor on the server;
step S204, in the case that the graphics processor is inserted into the server according to the first level state, determining the type of the graphics processor inserted into the server according to the second level state;
and step S206, running codes corresponding to the graphic processor according to the type of the graphic processor.
By the above steps, since the first level state of the first signal for indicating the insertion state of the image processor on the server and the second level state of the second signal for indicating the type of the image processor on the server are acquired, in the case that the image processor is inserted into the server according to the first level state, the type of the image processor inserted into the server is determined according to the second level state, and the code corresponding to the image processor is executed according to the type of the image processor. Therefore, the problem that different types of graphics processors in the prior art need to develop corresponding servers respectively and the same server cannot identify the different types of graphics processors is solved.
Optionally, the running method of the code may further include:
acquiring a third signal, wherein the third signal is used for indicating a third type of a graphic processor on a server; determining the type of the graphics processor according to the first signal, the second signal and the third signal;
and executing corresponding codes according to the type of the graphic processor.
It will be appreciated that the method may further obtain a third level state of the third signal, further, the type of the graphics processor may be determined according to the level states of the first signal, the second signal and the third signal, and the method is not limited to the first type and the second type, and further, codes corresponding to the graphics processor of the third type may be executed.
Alternatively, the step S204 may be implemented as follows: determining that the type of the graphics processor inserted on the server is a first type if the second level state is high; and determining the type of the graphics processor inserted on the server as a second type under the condition that the second level state is a low level.
It may be appreciated that, in the case where the first level state is low and the second level state is high, it is confirmed that the first type of graphics processor is inserted on the server, and the first type of graphics processor may be: an A800 graphics processor; in the case that the first level state is low and the second level state is low, then confirming that the second type of graphics processor is inserted on the server, the second type of graphics processor may be: h800 graphics processing.
Further, by judging the type of the graphic processor through the method, the development cost of the server can be reduced, and the corresponding maintenance cost is further reduced.
Optionally, before determining the type of the graphics processor inserted on the server according to the second level state, the method further includes: determining whether a graphics processor is inserted on the server according to the first level state; determining that a graphics processor is not inserted on the server if the first level state is high; and determining to insert a graphics processor on the server if the second level state is low.
It will be appreciated that it may be determined by the first level state whether the graphics processor is inserted into the server, and specifically, the following two situations may exist: 1) Under the condition that the first level state is high level, judging that the graphic processor is not inserted into the server; 2) When the first level state is low, it is determined that the graphics processor is inserted into the server.
Optionally, after determining that the graphics processor is not inserted on the server, the method further includes: determining whether the server has a fault according to the second level state; determining that the server has no fault under the condition that the second level state is high level; and determining that the server has a fault under the condition that the second level state is low level.
It may be appreciated that, in the case where it is determined that the server is not inserted into the graphics processor, whether the server is abnormal may be determined by the second level state, specifically: judging that the server has no fault under the condition that the first level state is high level and the second level state is high level; if the first level state is high and the second level state is low, it is determined that the server has a failure.
Further, according to the technical scheme for judging whether the server has faults or not, the fault problem of the server can be found in time, and the stable operation and the usability of the server are ensured.
Optionally, after determining that the server has a failure, the method further includes: determining fault information of the server through a log file; determining whether a fault configuration file corresponding to the fault information is matched in a pre-configured fault information list, wherein the fault information list comprises the fault information and the corresponding fault configuration file; under the condition that a fault configuration file corresponding to the fault information is matched in the fault information list, processing the fault of the server according to the fault configuration file, and obtaining a fault processing result; and under the condition that the fault configuration file corresponding to the fault information is not matched in the fault information list, generating corresponding prompt information according to the fault information, and sending the prompt information to terminal equipment corresponding to the server.
It can be understood that after determining that the server has a fault, the fault information of the server may also be determined by using a log file, whether a fault configuration file matched with the fault information exists is searched in a pre-configured fault information list, if the fault configuration file matched with the fault information exists, the fault of the server may be processed according to the matched fault configuration file, and if the fault configuration file matched with the fault information is not found, the fault information may be generated into corresponding prompt information, and the prompt information may be sent to a terminal device corresponding to the server.
By the technical scheme, the fault can be automatically repaired through the fault configuration file with the matched fault information, so that the fault recovery time can be reduced, and the fault processing efficiency is improved. In addition, in the embodiment of the application, a fault processing result is also obtained, corresponding prompt information is generated according to the fault information under the condition that the fault processing result indicates that the fault is not recovered, the prompt information is sent to the terminal equipment corresponding to the server, so that the target object restores the fault, and under the condition that the fault information indicates that the fault is recovered, the generation of the corresponding prompt information according to the fault information is forbidden. And further, the problem of untimely fault treatment can be avoided.
Optionally, acquiring the first level state of the first signal and the second level state of the second signal includes: acquiring a level state of a first pin and a level state of a second pin in a backboard of a server through a mainboard of the server, wherein the first pin is connected with a pin corresponding to the first signal, and the second pin is connected with a pin corresponding to the second signal; determining a first level state of the first signal according to the level state of the first pin, and determining a second level state of the second signal according to the level state of the second pin.
It can be understood that fig. 3 is a circuit diagram of a server corresponding to the code running method according to the present embodiment, as shown in fig. 3, bp_BOARD is the back plane, mb_BOARD is the main BOARD in fig. 3, and the level states of BOARD_id1 (corresponding to the first pin) and BOARD_id2 (corresponding to the second pin) can be obtained from mb_BOARD through the pin connection relationship in fig. 3.
It can be understood that the above-mentioned level state can be obtained to judge the insertion state and type of the graphics processor, so as to achieve the technical effect of flexibly adapting to various graphics processors.
Optionally, after running the code corresponding to the graphics processor according to the type of the graphics processor, the method further includes: determining a logic control mode and a time sequence control mode of the graphic processor according to the type of the graphic processor; and controlling the programmable logic device of the server to execute the logic control operation corresponding to the logic control mode and execute the time sequence control operation corresponding to the time sequence control mode.
It can be understood that, since different types of graphics processors correspond to different logic control operations and timing control operations, after determining the type of the graphics processor, the corresponding logic control manner and timing control manner can also be determined according to the type of the graphics processor, so as to execute the corresponding logic control operations and timing control operations.
It should be noted that, the programmable logic device in the embodiment of the present application may further directly obtain a first level state of a first signal and a second level state of a second signal, where the first signal is used to indicate an insertion state of a graphics processor on a server, and the second signal is used to indicate a type of the graphics processor on the server; determining the type of the graphics processor inserted on the server according to the second level state under the condition that the graphics processor is inserted on the server according to the first level state; and determining a corresponding logic control mode and a corresponding time sequence control mode according to the type of the graphic processor, and further executing corresponding logic control operation and time sequence control operation.
From the description of the above embodiments, it will be clear to a person skilled in the art that the method according to the above embodiments may be implemented by means of software plus the necessary general hardware platform, but of course also by means of hardware, but in many cases the former is a preferred embodiment. Based on such understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art in the form of a software product stored in a storage medium (e.g. ROM/RAM, magnetic disk, optical disk) comprising instructions for causing a terminal device (which may be a mobile phone, a computer, a server, or a network device, etc.) to perform the method according to the embodiments of the present application.
In order to better understand the process of the code operation method, the implementation flow of the code operation method is described below in conjunction with the alternative embodiment, but the implementation flow is not limited to the technical solution of the embodiment of the present application.
Before explaining the embodiment of the present application, description needs to be made on model servers corresponding to H800 and a800 in the prior art. Fig. 4 is a server block diagram of a prior art H800 according to another embodiment of the present application, and fig. 5 is a server block diagram of a prior art a800 according to another embodiment of the present application, as shown in fig. 4, 5: model servers corresponding to H800 and A800 in the prior art: the MB (baseboard) is not shared, and has a fixed BMC code (Baseboard Management Controller Code ) and BIOS code (Basic Input/Output System Code, basic Input/output system code); a CPLD (Complex Programmable Logic Device ) of a Switch Board (Switch Board) determines whether or not it is in place only by a PRSNT signal (Present in place signal), and does not determine whether it is an H800 card model or an A800 card model, and the CPLD code is fixed for each server model to execute; BP boards (backplanes) are not shared, and the H800 card and a800 card PIN (Personal Identification Number ) are defined differently, without a compatible design.
In the prior art, two types of H800 cards and A800 cards cannot be quickly and flexibly compatible and matched, and corresponding boards are required to be respectively matched and developed; the H800 card type and the A800 card type have the problems of high development cost, high maintenance cost and the like due to the fact that two MB mainboards, two SW boards and two BP boards, and two corresponding BMC, BIOS and CPLD codes exist.
The embodiment provides a design method of a multi-type GPU card system, and aims to design a compatible design method which can flexibly and rapidly adapt to an H800 GPU card server and an A800 GPU card server with minimum cost and minimum change.
As shown in fig. 3, the MB board mainly has key devices such as a CPU (Central Processing Unit ) and a BMC (Baseboard Management Controller, motherboard management controller), where in this scheme, the BMC is mainly responsible for system monitoring and management, and the CPU mainly provides various interface functions and mode configurations such as PCIE; the SW board is mainly provided with a SWITCH chip and a CPLD logic chip, in the scheme, the SWITCH chip is mainly responsible for PCIE expansion and forwarding, and the CPLD is mainly responsible for acquiring each state of the SW board and the GPU board and controlling time sequence;
placing BOARD_ID on the BP BOARD to be introduced into CPLD of the SW BOARD and BMC of the MB BOARD; h800 The GPU-Card has a signal HMC_PRSNT_N signal connected to BOARD_ID0 (corresponding to the second pin in the above embodiment); the same bit signal base_prsnt_n signal of the H800 GPU card and the a800 GPU card is connected to the BOARD_id1, while the signals HMC_PRSNT_n (corresponding to the second signal in the above embodiment) and base_PRSNT_n (corresponding to the first signal in the above embodiment) are connected to the CPLD of the SW BOARD, specifically:
h800 The BASE_PRSNT_N signal is pulled down to 0 after the GPU card and the A800 GPU card are inserted into the BP board, whether the GPU card is on line or not is judged by the on-site signal, meanwhile, the H800 GPU card and the A800 GPU card are mainly different in that the H800 GPU card is provided with an HMC module, the A800 GPU card is not provided with the HMC module, and after the H800 GPU card is inserted into the SW board and normally started, the corresponding PIN of the HMC_PRSNT_N signal is pulled down to 0, so that different GPU cards can be distinguished by the signal; thus, the two signals can be used to distinguish between different product types and GPU card types.
FIG. 6 is a logic diagram of a BMC obtaining a product type according to another embodiment of the present application, as shown in FIG. 6, the MB host BOARD determines the current product type by the BMC reading the BOARD_ID signal bit0 value and the bit1 value:
step S601, powering up equipment;
step S602, BMC is started normally;
step S603, acquiring BOARD_ID information: BOARD_ID [1:0];
step S604, judging a read value;
step S605, when the read value is 11, determining that there is no GPU card product form, and executing step S606 (1); if the read value is 01, determining that the gpu_a800 product is in the form of gpu_a800, and executing step S606 (2); if the read value is 00, it is determined that the gpu_h800 product is in the form of a gpu_h800 product, and step S606 (3) is performed.
Step S606 (1), the BMC starts the corresponding code branch without the GPU card product form, and configures the power supply, the CPU PCIE and the like;
step S606 (2), BMC starts A800 code branch, and configures power supply and CPU PCIE;
in step S606 (3), the BMC starts the H800 code branch to perform configuration such as power supply and CPU PCIE.
Fig. 7 is a logic diagram of a CPLD obtaining a GPU card type according to another embodiment of the present application, as shown in fig. 7, the CPLD of the SW BOARD determines the GPU card type by reading a gpu_BOARD signal:
step S701, powering up equipment;
step S702, CPLD is started normally;
step S703, the SW BOARD CPLD reads the gpu_BOARD signal;
step S704, judging a read value;
step S705, when the read value is 11/10, judging that no GPU card is inserted or the GPU card is abnormal, executing step S706 (1); if the read value is 01, it is determined that gpu_a800 is inserted, and step S706 (2) is executed; if the read value is 00, it is determined that gpu_a800 is inserted, and step S706 (3) is executed;
step S706 (1), CPLD executes code branch without GPU card product form, does not push GPU card CLK/POWER enable;
step S706 (2), executing GPU_A800 code branches, pushing CLK/POWER enable according to A800 time sequence; step S706 (3), executing GPU_H200 code branch, pushing CLK/POWER enable according to H800 time sequence.
By adding BOARD_ID and introducing HMC_PRSNT_N and BASE_PRSNT_N signals to BOARD_ID as BOARD_ID signals, different types of servers can be dynamically identified. The difference signals HMC_PRSNT_N and BASE_PRSNT_N of different GPU cards are introduced into the CPLD as identification signals of different GPU cards, so that the type of the inserted GPU card can be effectively identified. The server products with various product types are supported through the compatible design of BMC and CPU codes; through CPLD code compatible design, the logic control and the time sequence control of various GPU cards are supported.
The embodiment also provides a code running device, which is used for implementing the foregoing embodiments and preferred embodiments, and is not described in detail. As used below, the term "module" may be a combination of software and/or hardware that implements a predetermined function. While the means described in the following embodiments are preferably implemented in software, implementation in hardware, or a combination of software and hardware, is also possible and contemplated.
Fig. 8 is a block diagram of an operation apparatus of a code according to an embodiment of the present application, as shown in fig. 8, including:
an obtaining module 82, configured to obtain a first level state of a first signal and a second level state of a second signal, where the first signal is used to indicate an insertion state of a graphics processor on a server, and the second signal is used to indicate a type of the graphics processor on the server;
a determining module 84, configured to determine, in a case where it is determined that the graphics processor is inserted on the server according to the first level state, a type of the graphics processor inserted on the server according to the second level state;
and the operation module 86 is used for operating the codes corresponding to the graphic processor according to the type of the graphic processor.
By the above device, since the first level state of the first signal for indicating the insertion state of the image processor on the server and the second level state of the second signal for indicating the type of the image processor on the server are acquired, in the case that the image processor is inserted into the server according to the first level state, the type of the image processor inserted into the server is determined according to the second level state, and the code corresponding to the image processor is executed according to the type of the image processor. Therefore, the problem that different types of graphics processors in the prior art need to develop corresponding servers respectively and the same server cannot identify the different types of graphics processors can be solved.
In an exemplary embodiment, the determining module 84 is further configured to determine that the type of the graphics processor inserted on the server is the first type if the second level state is high; and determining the type of the graphics processor inserted on the server as a second type under the condition that the second level state is a low level.
It may be appreciated that, in the case where the first level state is low and the second level state is high, it is confirmed that the first type of graphics processor is inserted on the server, and the first type of graphics processor may be: an A800 graphics processor; in the case that the first level state is low and the second level state is low, then confirming that the second type of graphics processor is inserted on the server, the second type of graphics processor may be: h800 graphics processing.
Further, by judging the type of the graphic processor through the method, the development cost of the server can be reduced, and the corresponding maintenance cost is further reduced.
In an exemplary embodiment, the apparatus further comprises: a first determining module, configured to determine whether to insert a graphics processor on the server according to the first level state; determining that a graphics processor is not inserted on the server if the first level state is high; and determining to insert a graphics processor on the server if the second level state is low.
It will be appreciated that it may be determined by the first level state whether the graphics processor is inserted into the server, and specifically, the following two situations may exist: 1) Under the condition that the first level state is high level, judging that the graphic processor is not inserted into the server; 2) When the first level state is low, it is determined that the graphics processor is inserted into the server.
In an exemplary embodiment, the first determining module is further configured to determine whether the server has a failure according to the second level state; determining that the server has no fault under the condition that the second level state is high level; and determining that the server has a fault under the condition that the second level state is low level.
It may be appreciated that, in the case where it is determined that the server is not inserted into the graphics processor, whether the server is abnormal may be determined by the second level state, specifically: judging that the server has no fault under the condition that the first level state is high level and the second level state is high level; if the first level state is high and the second level state is low, it is determined that the server has a failure.
Further, according to the technical scheme for judging whether the server has faults or not, the fault problem of the server can be found in time, and the stable operation and the usability of the server are ensured.
In an exemplary embodiment, the first determining module is further configured to determine, through a log file, failure information of the server; determining whether a fault configuration file corresponding to the fault information is matched in a pre-configured fault information list, wherein the fault information list comprises the fault information and the corresponding fault configuration file; under the condition that a fault configuration file corresponding to the fault information is matched in the fault information list, processing the fault of the server according to the fault configuration file, and obtaining a fault processing result; and under the condition that the fault configuration file corresponding to the fault information is not matched in the fault information list, generating corresponding prompt information according to the fault information, and sending the prompt information to terminal equipment corresponding to the server.
It can be understood that after determining that the server has a fault, the fault information of the server may also be determined by using a log file, whether a fault configuration file matched with the fault information exists is searched in a pre-configured fault information list, if the fault configuration file matched with the fault information exists, the fault of the server may be processed according to the matched fault configuration file, and if the fault configuration file matched with the fault information is not found, the fault information may be generated into corresponding prompt information, and the prompt information may be sent to a terminal device corresponding to the server.
By the technical scheme, the fault can be automatically repaired through the fault configuration file with the matched fault information, so that the fault recovery time can be reduced, and the fault processing efficiency is improved. In addition, in the embodiment of the application, a fault processing result is also obtained, corresponding prompt information is generated according to the fault information under the condition that the fault processing result indicates that the fault is not recovered, the prompt information is sent to the terminal equipment corresponding to the server, so that the target object restores the fault, and under the condition that the fault information indicates that the fault is recovered, the generation of the corresponding prompt information according to the fault information is forbidden. And further, the problem of untimely fault treatment can be avoided.
In an exemplary embodiment, the obtaining module 82 is further configured to obtain, by a motherboard of a server, a level state of a first pin and a level state of a second pin in a backplane of the server, where the first pin is connected to a pin corresponding to the first signal, and the second pin is connected to a pin corresponding to the second signal; determining a first level state of the first signal according to the level state of the first pin, and determining a second level state of the second signal according to the level state of the second pin.
It can be understood that fig. 3 is a circuit diagram of a server corresponding to the code running method according to the present embodiment, as shown in fig. 3, bp_BOARD is the back plane, mb_BOARD is the main BOARD in fig. 3, and the level states of BOARD_id1 (corresponding to the first pin) and BOARD_id2 (corresponding to the second pin) can be obtained from mb_BOARD through the pin connection relationship in fig. 3.
It can be understood that the above-mentioned level state can be obtained to judge the insertion state and type of the graphics processor, so as to achieve the technical effect of flexibly adapting to various graphics processors.
In an exemplary embodiment, the apparatus further comprises: the second determining module is used for determining a logic control mode and a time sequence control mode of the graphic processor according to the type of the graphic processor; and controlling the programmable logic device of the server to execute the logic control operation corresponding to the logic control mode and execute the time sequence control operation corresponding to the time sequence control mode.
It can be understood that, since different types of graphics processors correspond to different logic control operations and timing control operations, after determining the type of the graphics processor, the corresponding logic control manner and timing control manner can also be determined according to the type of the graphics processor, so as to execute the corresponding logic control operations and timing control operations.
It should be noted that, the programmable logic device in the embodiment of the present application may further directly obtain a first level state of a first signal and a second level state of a second signal, where the first signal is used to indicate an insertion state of a graphics processor on a server, and the second signal is used to indicate a type of the graphics processor on the server; determining the type of the graphics processor inserted on the server according to the second level state under the condition that the graphics processor is inserted on the server according to the first level state; and determining a corresponding logic control mode and a corresponding time sequence control mode according to the type of the graphic processor, and further executing corresponding logic control operation and time sequence control operation.
Embodiments of the present application also provide a computer readable storage medium having a computer program stored therein, wherein the computer program is arranged to perform the steps of any of the method embodiments described above when run.
In one exemplary embodiment, the computer readable storage medium may include, but is not limited to: a usb disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a removable hard disk, a magnetic disk, or an optical disk, or other various media capable of storing a computer program.
An embodiment of the application also provides an electronic device comprising a memory having stored therein a computer program and a processor arranged to run the computer program to perform the steps of any of the method embodiments described above.
In an exemplary embodiment, the electronic device may further include a transmission device connected to the processor, and an input/output device connected to the processor.
Specific examples in this embodiment may refer to the examples described in the foregoing embodiments and the exemplary implementation, and this embodiment is not described herein.
It will be appreciated by those skilled in the art that the modules or steps of the application described above may be implemented in a general purpose computing device, they may be concentrated on a single computing device, or distributed across a network of computing devices, they may be implemented in program code executable by computing devices, so that they may be stored in a storage device for execution by computing devices, and in some cases, the steps shown or described may be performed in a different order than that shown or described herein, or they may be separately fabricated into individual integrated circuit modules, or multiple modules or steps of them may be fabricated into a single integrated circuit module. Thus, the present application is not limited to any specific combination of hardware and software.
The above description is only of the preferred embodiments of the present application and is not intended to limit the present application, but various modifications and variations can be made to the present application by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the principle of the present application should be included in the protection scope of the present application.

Claims (10)

1. A method of code execution, comprising:
acquiring a first level state of a first signal and a second level state of a second signal, wherein the first signal is used for indicating the insertion state of a graphic processor on a server, and the second signal is used for indicating the type of the graphic processor on the server;
determining the type of the graphics processor inserted on the server according to the second level state under the condition that the graphics processor is inserted on the server according to the first level state;
and running codes corresponding to the graphic processor according to the type of the graphic processor.
2. The method of claim 1, wherein determining the type of graphics processor inserted on the server based on the second level state comprises:
determining that the type of the graphics processor inserted on the server is a first type if the second level state is high;
and determining the type of the graphics processor inserted on the server as a second type under the condition that the second level state is a low level.
3. The method of claim 1, wherein prior to determining the type of graphics processor inserted on the server based on the second level state, the method further comprises:
determining whether a graphics processor is inserted on the server according to the first level state;
determining that a graphics processor is not inserted on the server if the first level state is high;
and determining to insert a graphics processor on the server if the second level state is low.
4. A method according to claim 3, wherein after determining that no graphics processor is plugged into the server, the method further comprises:
determining whether the server has a fault according to the second level state;
determining that the server has no fault under the condition that the second level state is high level;
and determining that the server has a fault under the condition that the second level state is low level.
5. The method of claim 4, wherein after determining that the server has failed, the method further comprises:
determining fault information of the server through a log file;
determining whether a fault configuration file corresponding to the fault information is matched in a pre-configured fault information list, wherein the fault information list comprises the fault information and the corresponding fault configuration file;
under the condition that a fault configuration file corresponding to the fault information is matched in the fault information list, processing the fault of the server according to the fault configuration file, and obtaining a fault processing result;
and under the condition that the fault configuration file corresponding to the fault information is not matched in the fault information list, generating corresponding prompt information according to the fault information, and sending the prompt information to terminal equipment corresponding to the server.
6. The method of claim 1, wherein acquiring the first level state of the first signal and the second level state of the second signal comprises:
acquiring a level state of a first pin and a level state of a second pin in a backboard of a server through a mainboard of the server, wherein the first pin is connected with a pin corresponding to the first signal, and the second pin is connected with a pin corresponding to the second signal;
determining a first level state of the first signal according to the level state of the first pin, and determining a second level state of the second signal according to the level state of the second pin.
7. The method of claim 1, wherein after running the code corresponding to the graphics processor according to the type of the graphics processor, the method further comprises:
determining a logic control mode and a time sequence control mode of the graphic processor according to the type of the graphic processor;
and controlling the programmable logic device of the server to execute the logic control operation corresponding to the logic control mode and execute the time sequence control operation corresponding to the time sequence control mode.
8. A code running apparatus, comprising:
the system comprises an acquisition module, a control module and a control module, wherein the acquisition module is used for acquiring a first level state of a first signal and a second level state of a second signal, the first signal is used for indicating the insertion state of a graphic processor on a server, and the second signal is used for indicating the type of the graphic processor on the server;
a determining module, configured to determine a type of a graphics processor inserted on a server according to the second level state, where the graphics processor is determined to be inserted on the server according to the first level state;
and the operation module is used for operating codes corresponding to the graphic processor according to the type of the graphic processor.
9. A computer readable storage medium, characterized in that a computer program is stored in the computer readable storage medium, wherein the computer program, when being executed by a processor, implements the steps of the method according to any of the claims 1 to 7.
10. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the processor implements the steps of the method of any one of claims 1 to 7 when the computer program is executed.
CN202311266669.0A 2023-09-27 2023-09-27 Code running method and device, storage medium and electronic device Pending CN117234618A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202311266669.0A CN117234618A (en) 2023-09-27 2023-09-27 Code running method and device, storage medium and electronic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202311266669.0A CN117234618A (en) 2023-09-27 2023-09-27 Code running method and device, storage medium and electronic device

Publications (1)

Publication Number Publication Date
CN117234618A true CN117234618A (en) 2023-12-15

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202311266669.0A Pending CN117234618A (en) 2023-09-27 2023-09-27 Code running method and device, storage medium and electronic device

Country Status (1)

Country Link
CN (1) CN117234618A (en)

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