CN117202715A - Display panel and preparation method thereof - Google Patents

Abstract

The disclosure provides a display panel and a preparation method thereof, and relates to the technical field of display. The display panel comprises a driving substrate, a pixel electrode layer, a pixel definition layer, a conductive structure layer, a composite film layer and a film packaging layer which are sequentially stacked. The pixel electrode layer has a plurality of pixel electrodes. The pixel defining layer has a pixel opening. The conductive structure layer is provided with conductive structures corresponding to the pixel openings, and the conductive structures corresponding to the pixel openings encircle the pixel openings. The composite film layer comprises composite units corresponding to the pixel openings one by one; each composite unit covers the pixel opening and surrounds the conductive structure corresponding to the pixel opening; the composite unit comprises a luminescent material layer, a common electrode layer and a temporary packaging layer which are sequentially laminated on one side of the pixel electrode layer, which is far away from the driving substrate; the composite unit is discontinuous at the conductive structure and the common electrode layer is electrically connected to the conductive structure such that the common electrode layer remains electrically continuous. The display panel may employ a photolithography process to prepare the pixel layer.

Description

Display panel and preparation method thereof

Technical Field

The disclosure relates to the technical field of display, in particular to a display panel and a preparation method thereof.

Background

The organic light emitting display device includes a driving circuit layer, an OLED (organic light emitting diode) display layer, and an encapsulation layer. The OLED display layer includes self-emitting OLEDs. The OLED comprises an anode, a hole injection layer, an organic light emitting layer, an electron injection layer and an anode which are sequentially stacked. When excitons in the organic light emitting layer fall from an excited state to a ground state, the organic light emitting layer may emit light. Wherein the excitons are formed when holes injected from the hole injection layer and electrons injected from the electron injection layer are combined with each other in the organic light emitting layer. A Fine Metal Mask (FMM) may be used to form the OLED display layer, but there is a limit in manufacturing a high-resolution organic light emitting display device due to a shadow effect of the metal mask. In addition, in the middle-size and large-size organic light emitting display device, the technology of the FMM is not mature, the size of the FMM produced in mass production is G6H at present, and the OLED patterning alternative is required to be found in the face of the requirement of the organic light emitting display device with larger size.

The drive circuit of the semiconductor display device usually adopts photoetching to realize patterning, but when the OLED display layer is processed, the OLED display layer is extremely easy to be corroded by water, so that the quality of a product is difficult to reach the expected level, and the yield of the product is reduced.

It should be noted that the information disclosed in the above background section is only for enhancing understanding of the background of the present disclosure and thus may include information that does not constitute prior art known to those of ordinary skill in the art.

Disclosure of Invention

The present disclosure is directed to overcoming the shortcomings of the prior art, and providing a display panel and a method for manufacturing the same, wherein the display panel can manufacture a pixel layer by using a photolithography process.

According to a first aspect of the present disclosure, there is provided a display panel including:

the substrate is driven to be in contact with the substrate,

a pixel electrode layer having a plurality of pixel electrodes;

the pixel definition layer is arranged on one side, far away from the driving substrate, of the pixel electrode layer, and is provided with a plurality of pixel openings which are in one-to-one correspondence with the pixel electrodes, and the pixel openings expose at least part of areas of the corresponding pixel electrodes;

the conductive structure layer is arranged on one side of the pixel definition layer, which is far away from the driving substrate; the conductive structure layer is provided with the conductive structures corresponding to the pixel openings, wherein the conductive structures corresponding to the pixel openings encircle the pixel openings;

the composite film layer is arranged on one side of the conductive structure layer, which is far away from the driving substrate, and comprises composite units corresponding to the pixel openings one by one; each composite unit covers the pixel opening and surrounds the corresponding conductive structure of the pixel opening; the composite unit comprises a luminescent material layer, a common electrode layer and a temporary packaging layer which are sequentially laminated on one side of the pixel electrode layer far away from the driving substrate; the composite unit is discontinuous at the conductive structure, and the common electrode layer is electrically connected with the conductive structure, so that the common electrode layer is kept electrically continuous;

And the film packaging layer covers the composite film layer.

According to one embodiment of the disclosure, the conductive structure includes a first metal layer, a second metal layer, and a third metal layer sequentially stacked on a side of the pixel defining layer away from the driving substrate; the orthographic projection of the second metal layer on the driving substrate is positioned in the orthographic projection of the first metal layer on the driving substrate and in the orthographic projection of the third metal layer on the driving substrate;

the composite units are arranged in a staggered mode at the edge of the third metal layer, and the public electrode layer of the composite units is connected with the first metal layer and/or the second metal layer.

According to one embodiment of the present disclosure, the conductive structure includes a metal ring surrounding the corresponding pixel opening;

the compound unit is provided with an annular gap surrounding the corresponding pixel opening, and the orthographic projection of the annular gap on the driving substrate is positioned in the orthographic projection of the metal ring on the driving substrate; and the parts of the common electrode layer at two sides of the annular gap are overlapped with the metal ring.

According to one embodiment of the present disclosure, the display panel further includes:

An auxiliary electrode layer covering the composite film layer; the auxiliary electrode layer is overlapped with the metal ring and the public electrode layer of the composite unit; the thin film packaging layer is arranged on one side of the auxiliary electrode layer away from the driving substrate.

According to a second aspect of the present disclosure, there is provided a method of manufacturing a display panel, including:

providing a driving substrate;

sequentially forming a pixel electrode layer and a pixel definition layer on the driving substrate; the pixel electrode layer comprises a plurality of pixel electrodes, pixel openings which are in one-to-one correspondence with the pixel electrodes are formed in the pixel definition layer, and at least part of areas of the corresponding pixel electrodes are exposed by the pixel openings;

forming a partition structure layer on the pixel definition layer, wherein the partition structure layer is provided with partition structures corresponding to the pixel openings; the partition structure surrounds the corresponding pixel opening; the partition structure is provided with a conductive structure and is internally tangent;

sequentially forming a plurality of composite unit layers, wherein any one of the composite unit layers comprises composite units corresponding to part of the pixel openings one by one;

forming a thin film packaging layer on one side of the composite unit layer far away from the driving substrate;

Wherein forming any one of the composite unit layers includes:

forming a whole composite material layer, wherein the composite material layer comprises a luminescent material layer, a public electrode layer and a temporary packaging layer which are sequentially stacked; the composite material layer is discontinuous at the partition structure, and the common electrode layer is electrically connected with the conductive structure;

patterning the composite material layer through a photoetching process to form composite units corresponding to the openings of the target pixels one by one; the composite unit covers the corresponding target pixel opening and the partition structure surrounding the target pixel opening.

According to one embodiment of the present disclosure, forming a partition structure layer on the pixel definition layer includes:

forming a composite metal material layer, wherein the composite metal material layer comprises a first metal layer, a second metal layer and a third metal layer which are sequentially laminated on the pixel definition layer;

patterning the composite metal material layer by wet etching to form a conductive structure surrounding the pixel opening; and the etching speed of the second metal layer is larger than that of the first metal layer and the third metal layer.

According to one embodiment of the present disclosure, forming a partition structure layer at the pixel definition layer includes:

forming each partition structure, wherein the partition structure comprises a metal ring surrounding the pixel opening and a partition retaining wall positioned on one side of the metal ring away from the driving substrate; the partition retaining wall surrounds the pixel opening, and both sides of the partition retaining wall are exposed to at least part of the metal ring; the partition retaining wall is internally tangent.

According to one embodiment of the present disclosure, the preparation method further comprises:

and removing the partition retaining wall and the composite material layer positioned on the partition retaining wall after the composite unit layer is formed.

According to one embodiment of the present disclosure, the preparation method further comprises:

and after the partition retaining wall is removed, forming an auxiliary electrode layer on the whole surface, wherein the auxiliary electrode layer is in lap joint with the public electrode layer and the metal ring of the composite unit.

According to one embodiment of the present disclosure, the preparation method further comprises:

forming a pixel electrode protection layer that protects the pixel electrode layer before forming the pixel definition layer; forming any one of the composite unit layers further includes: the pixel electrode protection layer in the target pixel opening is removed prior to forming the composite layer.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the disclosure and together with the description, serve to explain the principles of the disclosure. It will be apparent to those of ordinary skill in the art that the drawings in the following description are merely examples of the disclosure and that other drawings may be derived from them without undue effort.

Fig. 1 is a schematic view of a film structure of a display panel in a first exemplary embodiment of the present disclosure;

fig. 2 is a schematic structural view of a partition structure layer formed on a pixel defining layer in a first exemplary embodiment of the present disclosure;

FIG. 3 is a schematic structural view of a first composite layer forming an entire face in a first exemplary embodiment of the present disclosure;

FIG. 4 is a partially enlarged schematic illustration of the first pixel in FIG. 3;

FIG. 5 is an enlarged schematic view of portion A of FIG. 4;

fig. 6 is a schematic structural view of forming a first composite unit layer according to a first exemplary embodiment of the present disclosure;

FIG. 7 is a schematic structural view of a second composite layer forming an entire surface in a first exemplary embodiment of the present disclosure;

FIG. 8 is an enlarged view of a portion of the first pixel opening and the second pixel opening in FIG. 7;

fig. 9 is a schematic structural view of forming a second composite unit layer in a first exemplary embodiment of the present disclosure;

FIG. 10 is an enlarged view of a portion of the first pixel opening and the second pixel opening of FIG. 9;

fig. 11 is a schematic structural view of forming a third composite unit layer in the first exemplary embodiment of the present disclosure;

fig. 12 is a schematic structural view of forming a thin film encapsulation layer in a first exemplary embodiment of the present disclosure;

FIG. 13 is a schematic view of a structure in which a partition structure makes a composite material layer discontinuous in a second exemplary embodiment of the present disclosure;

FIG. 14 is a schematic view of a structure with partition walls removed in a second exemplary embodiment of the present disclosure;

fig. 15 is an enlarged view of a portion B of fig. 14;

fig. 16 is a schematic view showing a structure of protecting a pixel electrode using a pixel electrode protecting layer in a third exemplary embodiment of the present disclosure;

fig. 17 is an enlarged view of a portion C of fig. 16;

FIG. 18 is a schematic diagram of a distribution of partition structures in an exemplary embodiment of the present disclosure;

FIG. 19 is a schematic diagram of the distribution of spacer structural layers in another exemplary embodiment of the present disclosure;

fig. 20 is a schematic diagram of the distribution of insulation structure layers in another exemplary embodiment of the present disclosure.

Reference numerals illustrate:

PTS, partition structure;

m1, a first metal layer;

m2, a second metal layer;

m3, a third metal layer;

PRW, partition retaining wall;

MR, metal ring;

a PDL, pixel definition layer;

PX1, first pixel opening;

PX2, second pixel opening;

PX3, third pixel opening;

MA, composite unit; MXL, layer of composite material;

MA1, a first compound unit; MXL1, a first composite layer;

MA2, a second compound unit; MXL2, a second composite layer;

MA3, a third compound unit; MXL3, a third composite layer;

PEL, pixel electrode layer; PE, pixel electrode;

COML, common electrode layer;

EFL, luminescent material layer;

TT, temporary packaging layer;

TFE, film encapsulation layer;

PRL, pixel electrode protective layer;

AEL, auxiliary electrode layer;

AC. An annular gap;

DBP, drive base plate.

Detailed Description

Example embodiments will now be described more fully with reference to the accompanying drawings. However, the exemplary embodiments can be embodied in many forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the example embodiments to those skilled in the art. The same reference numerals in the drawings denote the same or similar structures, and thus detailed descriptions thereof will be omitted. Furthermore, the drawings are merely schematic illustrations of the present disclosure and are not necessarily drawn to scale.

Although relative terms such as "upper" and "lower" are used in this specification to describe the relative relationship of one component of an icon to another component, these terms are used in this specification for convenience only, such as in terms of the orientation of the examples described in the figures. It will be appreciated that if the device of the icon is flipped upside down, the recited "up" component will become the "down" component. When a structure is "on" another structure, it may mean that the structure is integrally formed with the other structure, or that the structure is "directly" disposed on the other structure, or that the structure is "indirectly" disposed on the other structure through another structure.

The terms "a," "an," "the," "said" and "at least one" are used to indicate the presence of one or more elements/components/etc.; the terms "comprising" and "having" are intended to be inclusive and mean that there may be additional elements/components/etc. in addition to the listed elements/components/etc.; the terms "first," "second," and "third," etc. are used merely as labels, and do not limit the number of their objects.

The embodiment of the disclosure provides a display panel and a preparation method of the display panel. Referring to fig. 1, the display panel includes a driving substrate DBP, a pixel layer PIXL, and a thin film encapsulation layer TFE, which are sequentially stacked. The pixel layer PIXL is provided with a light emitting element as a sub-pixel, the driving substrate DBP is provided with a pixel driving circuit for driving the light emitting element, and the thin film encapsulation layer TFE can provide encapsulation protection for the light emitting element.

In one embodiment of the present disclosure, referring to fig. 1, the driving substrate DBP may include a substrate SBT and a driving layer DRL sequentially stacked, and the pixel layer PIXL is disposed on a side of the driving layer DRL away from the substrate SBT. The driving layer DRL may drive each sub-pixel by active driving, or may drive each sub-pixel by passive driving.

As an example, referring to fig. 1, the driving layer DRL is provided with a pixel driving circuit for driving the sub-pixels; each sub-pixel may emit light to display a picture under the driving of the pixel driving circuit.

Alternatively, the substrate SBT may be an inorganic substrate SBT or an organic substrate SBT; of course, a composite substrate in which the inorganic substrate SBT and the organic substrate SBT are laminated may be used. For example, in some embodiments of the present disclosure, the material of the substrate base plate SBT may be a glass material such as soda lime glass, quartz glass, sapphire glass, or the like. In further embodiments of the present disclosure, the material of the substrate base SBT may be polymethyl methacrylate, polyvinyl alcohol, polyvinyl phenol, polyethersulfone, polyimide, polyamide, polyacetal, polycarbonate, polyethylene terephthalate, polyethylene naphthalate, or a combination thereof. In other embodiments of the present disclosure, the substrate SBT may also be a flexible substrate, for example the material of the substrate SBT may comprise polyimide.

Alternatively, in the driving layer DRL, any one of the pixel driving circuits may include a thin film transistor and a storage capacitor. Further, the thin film transistor may be selected from a top gate thin film transistor, a bottom gate thin film transistor, or a double gate thin film transistor; the material of the active layer of the thin film transistor may be an amorphous silicon semiconductor material, a low-temperature polysilicon semiconductor material, a metal oxide semiconductor material, an organic semiconductor material, a carbon nanotube semiconductor material or other types of semiconductor materials; the thin film transistor may be an N-type thin film transistor or a P-type thin film transistor.

It will be appreciated that the type between any two transistors in the individual transistors in the pixel drive circuit may be the same or different. Illustratively, in some embodiments, in one pixel driving circuit, a portion of the transistors may be N-type transistors and a portion of the transistors may be P-type transistors. Still further exemplary, in other embodiments, in one pixel driving circuit, the material of the active layer of the partial transistor may be a low temperature polysilicon semiconductor material, and the material of the active layer of the partial transistor may be a metal oxide semiconductor material. In some embodiments of the present disclosure, the thin film transistor is a low temperature polysilicon transistor. In other embodiments of the present disclosure, a portion of the thin film transistors are low temperature polysilicon transistors and a portion of the thin film transistors are metal oxide transistors.

Alternatively, the driving layer DRL may include a semiconductor layer SCL, a gate insulating layer GI, a gate layer GT, an interlayer dielectric layer ILD, a source drain metal layer SD, a planarization layer PLN, and the like stacked between the substrate SBT and the pixel layer PIXL. Each thin film transistor and each storage capacitor may be formed of a semiconductor layer SCL, a gate insulating layer GI, a gate layer GT, an interlayer dielectric layer ILD, a source drain metal layer SD, and other film layers; of course, other layers may be used. The positional relationship of each film layer can be determined according to the film layer structure of the thin film transistor. Further, the semiconductor layer SCL may be used to form the channel region of the transistor (as part of the active layer), as well as a partial routing or conductive structure if necessary by being conductive. The gate layer GT may be used to form one or more of the scan lines, the reset control lines, the light emission control lines, and the like, may be used to form a gate of a transistor, and may be used to form part or all of the electrode plates of the storage capacitor. The source drain metal layer SD may be used to form source drain metal layer traces such as data traces and driving power supply voltage traces, and may also be used to form part of electrode plates of the storage capacitor. Of course, in other embodiments of the present disclosure, the driving layer DRL may further include other film layers as needed, for example, a light shielding layer between the semiconductor layer SCL and the substrate SBT, and the like. Any one of the film layers SD such as the semiconductor layer SCL, the gate layer GT, the source/drain metal layer, etc. may be a plurality of layers, for example, the driving layer DRL may include two different semiconductor layers SCL, or include two or three source/drain metal layers SD, or include two or three gate layers GT; accordingly, the insulating film layer (e.g., gate insulating layer GI, interlayer dielectric layer ILD, planarizing layer PLN, etc.) in the driving layer DRL may be increased or decreased adaptively, or a new insulating film layer may be added as needed.

Optionally, the driving layer DRL may further include a passivation layer, where the passivation layer may be disposed on a surface of the source drain metal layer SD away from the substrate SBT, so as to protect the source drain metal layer SD.

As an example, referring to fig. 1, the driving layer DRL may include a buffer layer BUF, a semiconductor layer SCL, a gate insulating layer GI, a gate layer GT, an interlayer dielectric layer ILD, a source drain metal layer SD, and a planarization layer PLN, which are sequentially stacked, and thus the thin film transistor formed is a top gate thin film transistor.

It is to be understood that the above examples of the driving substrate DBP are only one possible way of driving the substrate DBP of the embodiment of the present disclosure. In other embodiments of the present disclosure, the driving substrate DBP may have other structures, for example, the driving substrate DBP may be a passive driving glass substrate, a silicon-based driving substrate, or the like.

In this embodiment, the light emitting element in the pixel layer PIXL is an OLED. The light emitting element includes a pixel electrode PE, a light emitting material layer, and a common electrode layer, which are sequentially stacked. The light emitting material layer emits light under the driving of carriers supplied from the pixel electrode PE and the common electrode layer.

Referring to fig. 1, a thin film encapsulation layer TFE may be provided on a surface of the pixel layer PIXL remote from the substrate base plate SBT, which may include an inorganic encapsulation layer and an organic encapsulation layer alternately stacked. The inorganic packaging layer can effectively block external moisture and oxygen, and avoid aging of materials in the pixel layer caused by invasion of the moisture and the oxygen into the pixel layer. Alternatively, the edges of the inorganic encapsulation layer may be located at the peripheral region. The organic encapsulation layer is located between two adjacent inorganic encapsulation layers in order to achieve planarization and to attenuate stresses between the inorganic encapsulation layers. Wherein an edge of the organic encapsulation layer may be located between an edge of the display region and an edge of the inorganic encapsulation layer. Illustratively, the thin film encapsulation layer TFE includes a first inorganic encapsulation layer CVD1, an organic encapsulation layer IJP, and a second inorganic encapsulation layer CVD2 laminated in this order on a side of the pixel layer PIXL remote from the substrate SBT. Of course, in other embodiments of the present disclosure, the display panel may not be provided with the thin film encapsulation layer TFE, and the pixel layer may be encapsulated and protected in other manners.

It is understood that the display panel may further include other film layers, for example, a touch functional layer TSL may be disposed on a side of the thin film encapsulation layer TFE away from the driving substrate DBP, or a reflection reducing layer may be disposed.

In an embodiment of the disclosure, a light emitting side of the display panel, for example, a side of the pixel layer PIXL away from the driving substrate DBP may further be attached to a cover structure, so as to protect the display panel.

In one embodiment of the present disclosure, a support structure, such as a stainless steel support plate (SUS), may also be provided on the backlight side of the display panel, such as the side of the driving substrate DBP away from the pixel layer PIXL.

Referring to fig. 18 to 20, the embodiment of the present disclosure does not particularly limit the pixel distribution and partition structure PTS.

In the related art, an evaporation process is generally used to prepare the luminescent material layer, and in particular, a precision metal mask is used to prepare the luminescent material layer. Then, since the precision metal mask has a shadow effect, it is difficult to manufacture a high resolution display panel.

The preparation method can prepare the luminescent material layer by adopting an etching process, thereby overcoming the restriction of a precision metal mask on the performance of the display panel, simplifying the process and greatly saving the manufacturing cost of the device when processing a large-size and high-resolution display device.

The preparation method of the display panel comprises the following steps:

s110: providing a driving substrate DBP;

s120: referring to fig. 2, a pixel electrode layer PEL and a pixel defining layer PDL are sequentially formed on a driving substrate DBP; the pixel electrode layer PEL comprises a plurality of pixel electrodes PE, the pixel definition layer PDL is provided with pixel openings corresponding to the pixel electrodes PE one by one, and the pixel openings expose at least part of the corresponding pixel electrode PE;

s130: referring to fig. 3 and 4, a partition structure layer having partition structures PTS corresponding to respective pixel openings is formed on the pixel definition layer PDL; the partition structure PTS surrounds the corresponding pixel opening; the partition structure PTS is provided with a conductive structure and is internally tangent;

s140: referring to fig. 11, a plurality of composite unit layers are sequentially formed, and any one of the composite unit layers includes composite units MA corresponding to a part of the pixel openings one by one;

s150: referring to fig. 12, a thin film encapsulation layer TFE is formed at a side of the composite unit layer remote from the driving substrate DBP.

In step S140, any one of the composite unit layers may be formed by the following method:

step S141, forming an entire composite material layer MXL, wherein the composite material layer MXL includes a light emitting material layer EFL, a common electrode layer COML, and a temporary encapsulation layer TT (e.g., a first composite material layer MXL1 in fig. 3-5) that are sequentially stacked; the composite material layer MXL is discontinuous at the partition structure PTS, and the common electrode layer COML is electrically connected with the conductive structure;

Step S142, performing patterning treatment on the composite material layer MXL through a photolithography process to form composite units MA corresponding to the openings of the target pixels one by one; the compound unit MA covers the corresponding target pixel opening and the partition structure PTS surrounding the target pixel opening.

In the method for manufacturing the display panel, a partition structure layer is formed on one side of a pixel definition layer PDL far away from a driving substrate DBP. The partition structure layer has a partition structure PTS surrounding the pixel opening. When forming the composite material layer MXL, the composite material layer MXL is discontinuous at the partition structure PTS. When patterning the composite material layer by an etching process, since the composite unit MA on the target pixel opening covers the corresponding partition structure PTS, the water-oxygen path from the edge of the composite unit MA to the covered pixel opening is partitioned by the partition structure PTS. Therefore, the etching process is used to pattern the composite material layer MXL, so that the light emitting material layer EFL above the target pixel opening is not eroded by water oxygen. Therefore, the etching process can be used for patterning the EFL of the luminous material layer without adopting a precise metal mask, and the restrictions of the precise metal mask on the size and density of the sub-pixels are overcome.

In this embodiment, the partition structure PTS has a conductive structure, and the common electrode layer COML is electrically connected to the conductive structure. After patterning the composite layer MXL, the common electrode layer COML of the composite unit MA may be electrically connected with the conductive structure. Therefore, although the common electrode layer COML is discontinuous at the partition structure PTS, the common electrode layer COML may remain electrically connected by the conductive structure. This can ensure that the common voltage can be smoothly applied to the common electrode layer COML of each sub-pixel.

In this embodiment, the temporary packaging layer TT may provide protection for the common electrode layer COML, so as to avoid damaging the common electrode layer COML to be retained in the patterning process of the composite material layer, thereby ensuring the light emitting performance of the sub-pixel.

In this embodiment, the prepared display panel may include a driving substrate DBP, a pixel electrode layer PEL, a pixel definition layer PDL, a conductive structure layer, a composite film layer, and a thin film encapsulation layer TFE, which are sequentially stacked.

Taking fig. 12 as an example, the pixel electrode layer PEL has a plurality of pixel electrodes PE; the pixel defining layer PDL is disposed on a side of the pixel electrode layer PEL away from the driving substrate DBP, and has a plurality of pixel openings corresponding to the pixel electrodes PE one by one, and the pixel openings expose at least a part of the corresponding pixel electrode PE.

The conductive structure layer is a film layer where each conductive structure of the partition structure layer in step S130 is located. The conductive structure layer is disposed on a side of the pixel definition layer PDL away from the driving substrate DBP. The conductive structure layer is provided with the conductive structures corresponding to the pixel openings, wherein the conductive structures corresponding to the pixel openings encircle the pixel openings.

The composite film layer is the film layer where each composite unit layer MXL is formed in step S140. In other words, the composite film layer includes each composite unit MA prepared in step S140. The composite film layer is arranged on one side of the conductive structure layer far away from the driving substrate DBP and comprises composite units MA which are in one-to-one correspondence with the pixel openings. Each of the composite units MA covers the pixel opening and a corresponding conductive structure (e.g., conductive structure CC in fig. 6) surrounding the pixel opening. The composite unit MA includes a light emitting material layer EFL, a common electrode layer COML, and a temporary package layer TT sequentially stacked on a side of the pixel electrode layer PEL remote from the driving substrate DBP. The composite unit MA is discontinuous at the conductive structure, and the common electrode layer COML is electrically connected to the conductive structure CC, so that the common electrode layer COML remains electrically continuous.

A thin film encapsulation layer TFE covers the composite film layer.

In other words, in the embodiment of the present disclosure, the pixel layer PIXL may include a pixel electrode layer PEL, a pixel definition layer PDL, a conductive structure layer, and a composite film layer, which are sequentially stacked.

The steps, principles and effects of the preparation method of the array substrate of the present disclosure are further explained and illustrated below with reference to the accompanying drawings.

In step S120, a pixel electrode layer PEL including a plurality of pixel electrodes PE may be formed on the driving substrate DBP. Then, the pixel definition layer PDL is formed. The pixel defining layer PDL has pixel openings corresponding to the pixel electrodes PE one by one, and the pixel openings expose at least a part of the corresponding pixel electrodes PE. For example, the pixel opening exposes the entire pixel electrode PE, or the pixel opening retains only a main body portion of the pixel electrode PE.

In one example, the area of the pixel opening is smaller than the area of the pixel electrode PE, i.e. the orthographic projection of the pixel opening on the driving substrate DBP is located within the orthographic projection of the pixel electrode PE on the driving substrate DBP.

In step S130 and step S140, a conductive structure layer and a composite film layer of the pixel layer PIXL may be formed.

In a first embodiment of the present disclosure, referring to fig. 2, step S130 may include:

step S210, forming a composite metal material layer, wherein the composite metal material layer includes a first metal layer M1, a second metal layer M2, and a third metal layer M3 sequentially stacked on the pixel defining layer PDL;

step S220, patterning the composite metal material layer by wet etching to form a conductive structure CC surrounding the pixel opening; the etching speed of the second metal layer M2 is greater than the etching speeds of the first metal layer M1 and the third metal layer M3.

In step S220, the width of M2 is smaller than M1 and M3 due to the difference in etching speed between M1, M2 and M3. In other words, the overall trajectories of M1, M2 and M3 are substantially identical, but the two sides of M2 respectively expose the two side portions of M1, M3, which cannot be supported by M2 to hang in the air. Finally, the formed conductive structure CC is in the shape of an "i". The conductive structure CC itself may realize the partition of the subsequent composite material layer, so the conductive structure CC itself may serve as the partition structure PTS.

Referring to fig. 2 to 5, in step S140, the light emitting material layer EFL and the common electrode layer COML in the composite material layer MXL may be staggered at the edge of M3, thereby causing the light emitting material layer EFL and the common electrode layer COML to be blocked and discontinuous. The temporary packaging layer TT can cover the public electrode layer COML and fill gaps between the public electrode layer COML and the partition structure PTS, so that the composite material layer MXL is partitioned at the public electrode layer COML and a water-oxygen channel is not formed. Meanwhile, the temporary packaging layer TT can be used for coating or partially coating the protruding part of the partition structure PTS, so that the water-oxygen channel cannot be formed at the partition structure PTS.

In this embodiment, the common electrode layer COML may be connected to M1 and or M2. Therefore, although the common electrode layer COML is discontinuous at the partition structure PTS, the electrical property thereof can be maintained by M1 or M2 without causing a problem that the common voltage cannot be applied to the common electrode layer COML.

Therefore, in this embodiment, the conductive structure CC of the pixel layer PIXL includes a first metal layer M1, a second metal layer M2, and a third metal layer M3 sequentially stacked on a side of the pixel defining layer PDL away from the driving substrate DBP; the orthographic projection of the second metal layer M2 on the driving substrate DBP is located in the orthographic projection of the first metal layer M1 on the driving substrate DBP, and is located in the orthographic projection of the third metal layer M3 on the driving substrate DBP;

the composite unit MA is arranged in a staggered manner at the edge of the third metal layer M3, and the common electrode layer COML of the composite unit MA is connected with the first metal layer M1 and/or the second metal layer M2.

In some examples, the first metal layer M1 is made of Ti, the second metal layer M2 is made of Al, and the third metal layer M3 is made of Ti. However, it should be emphasized that in the embodiment of the present application, the materials of the first metal layer M1, the second metal layer M2, and the third metal layer M3 are not particularly limited, and the etching rate of the second metal layer M2 in the processing and preparing process can be larger than the etching rates of the first metal layer M1 and the third metal layer M3, so that the conductive structure CC finally presents an inscribed shape.

It can be understood that, when the first metal layer M1, the second metal layer M2 and the third metal layer M3 are etched, the conductive structure CC has an "i" shape in cross section in an ideal state, because the etching speed of the second metal layer M2 is greater than the etching speed of the first metal layer M1 and the third metal layer M3. However, because the time between the first metal layer M1, the second metal layer M2, and the third metal layer M3 and the etching solution is different, the area where the conductive structure CC is in contact with the etching solution has a longer time, and a phenomenon that the etching degree of the metal layers is more occurs, that is, the final shape of the conductive structure CC may not be in an "i" shape in a regular state.

As follows, step S140 is exemplarily described with respect to the number of composite unit layers being three. In this example, the composite unit layer includes a first composite unit layer, a second composite unit layer, and a third composite unit layer.

The first composite unit layer includes a first composite unit MA1, and the light emitting material layer EFL of the first composite unit MA1 is capable of emitting light of a first color, for example, emitting red light. The pixel opening includes a first pixel opening PX1 corresponding to the first complex unit MA 1.

The second composite unit layer includes a second composite unit MA2, and the light emitting material layer EFL of the second composite unit MA2 is capable of emitting light of a second color, for example, emitting green light. The pixel opening includes a second pixel opening PX2 corresponding to the second complex unit MA 2.

The third composite unit layer includes a third composite unit MA3, and the light emitting material layer EFL of the third composite unit MA3 is capable of emitting light of a third color, for example, blue light. The pixel opening includes a third pixel opening PX3 corresponding to the third complex unit MA 3.

In this example, the first composite unit layer, the second composite unit layer, and the third composite unit layer may be sequentially prepared.

The preparation of the first composite unit MA1 comprises:

referring to fig. 3 to 6, the entire first composite layer MXL1 is formed. The first composite layer MXL1 covers each pixel opening and each partition structure PTS. Wherein the common electrode layer COML of the first composite material layer MXL1 is discontinuous at the partition structure PTS, but is electrically connected by the conductive structure.

Referring to fig. 6, the first composite material layer MXL1 is subjected to patterning treatment by a photolithography process to form a first composite unit MA1. In this step, the target pixel opening is a first pixel opening PX1, and the second pixel opening PX2 and the third pixel opening PX3 are non-target pixel openings. The first complex cell MA1 is formed to correspond to the first pixel opening PX1, and the first complex cell MA1 covers the first pixel opening PX1 and covers the partition structure PTS surrounding the first pixel opening PX 1. The first composite unit layer exposes each of the second pixel openings PX2, each of the third pixel openings PX3, and the partition structure PTS surrounding the second pixel openings PX2, and the partition structure PTS surrounding the third pixel openings PX3.

The preparation of the second composite unit MA2 comprises:

referring to fig. 7 to 9, the entire second composite layer MXL2 is first formed. The second composite material layer MXL2 covers each second pixel opening PX2, each third pixel opening PX3, each partition structure PTS surrounding the second pixel opening PX2, each partition structure PTS surrounding the third pixel opening PX3, and each first composite unit MA1.

Referring to fig. 9 to 10, the second composite material layer MXL2 is subjected to patterning treatment by a photolithography process to form a second composite unit MA2. In this step, the target pixel opening is the second pixel opening PX2, and the first pixel opening PX1 and the third pixel opening PX3 are non-target pixel openings. The second complex cell MA2 is formed to correspond to the second pixel opening PX2, and the second complex cell MA2 covers the second pixel opening PX2 and covers the partition structure PTS surrounding the second pixel opening PX 2. The second complex cell layer exposes each third pixel opening PX3, each partition structure PTS surrounding the third pixel opening PX3, and each first complex cell MA1. In other words, the second composite layer MXL2 over the first composite unit MA1 is removed in the photolithography process. At this time, a composite material layer is disposed above the first pixel opening PX1 and the second pixel opening PX2, and no composite material layer is disposed above the third pixel opening PX 3.

Preparing the third reset unit MA3 includes:

referring to fig. 11, a full-face third composite layer MXL3 is first formed. The third composite material layer MXL3 covers each third pixel opening PX3, each partition structure PTS surrounding the third pixel opening PX3, and each first composite unit MA1, each second composite unit MA2.

Referring to fig. 11, the third composite material layer MXL3 is subjected to a patterning process by a photolithography process to form a third composite unit MA3. In this step, the target pixel opening is a third pixel opening PX3, and the first pixel opening PX1 and the second pixel opening PX2 are non-target pixel openings. The third complex cell MA3 is formed to correspond to the third pixel opening PX3, and the third complex cell MA3 covers the third pixel opening PX3 and covers the partition structure PTS surrounding the third pixel opening PX 3. The third composite unit layer exposes each first composite unit MA1 and each second composite unit MA2. In other words, the third composite layer MXL3 over the first composite unit MA1, the third composite layer MXL3 over the second composite unit MA2 are removed in the photolithography process. At this time, a composite material layer is disposed over the first, second and third pixel openings PX1, PX2 and PX3, respectively.

In this way, the first, second, and third composite units MA1, MA2, and MA3 as a composite film layer of the display panel as a whole.

In the second embodiment of the present disclosure, in step S130, referring to fig. 13 to 14, PTS may be prepared by the following method:

forming each partition structure PTS, wherein the partition structure PTS comprises a metal ring MR surrounding the pixel opening and a partition retaining wall PRW positioned on one side of the metal ring MR away from the driving substrate DBP; the partition retaining wall PRW surrounds the pixel opening, and both sides of the partition retaining wall PRW are exposed to at least part of the metal ring MR; the partition retaining wall PRW is internally tangent.

In this embodiment, the metal ring MR may serve as a conductive structure of the partition structure PTS. In step S140, when preparing the composite material layer MXL, the composite material layer MXL is discontinuous under the partition action of the partition retaining wall PRW. Since the partition wall PRW exposes a portion of the metal ring MR, the common electrode layer COML of the composite material layer MXL may overlap with the metal ring MR. In this way, although the common electrode layer COML is discontinuous at the partition structure PTS, the common electrode layers COML located at both sides of the partition wall PRW may be electrically connected by the metal ring MR.

In this way, in the prepared display panel, a barrier wall layer is further disposed between the conductive structure layer and the composite film layer, and the barrier wall layer includes each partition barrier wall PRW in the common electrode layer COML.

Alternatively, the metal ring MR may be a circular ring, a square ring, or a profiled ring; further, for the metal rings MR disposed on different pixel openings, in order to realize the electrical connection of the common electrode layer COML, the metal rings MR may be connected to each other in a lap joint manner, so as to realize the overall conduction between the metal rings MR, and meanwhile, the metal rings MR may be connected to each other through a conductive medium, etc., which should be noted that in the embodiment of the present application, the connection manner between the metal rings MR is not limited specifically.

Alternatively, a negative photoresist may be used to prepare the blocking wall PRW.

In one example of this embodiment, the manufacturing method of the display panel may further include: after forming each of the composite unit layers, the partition wall PRW and the composite material layer MXL on the partition wall PRW are removed. In this embodiment, since the partition wall PRW is removed, the influence of the partition wall PRW on the subsequent film layer and the influence of the partition wall PRW on the light emitting effect can be avoided. For example, removing the partition wall PRW can reduce stress concentration phenomenon of the film layer such as the thin film encapsulation layer TFE, and improve the lifetime of the display panel.

Alternatively, the partition wall PRW may be removed, and for the composite material layer MXL deposited on the partition wall PRW, a stripping process is used to remove the corresponding composite material layer MXL on the partition wall PRW.

Referring to fig. 14 and 15, after removal of the blocking wall PRW, the metal ring MR that would otherwise be covered by the blocking wall PRW is exposed. This corresponds to the composite element MA having an annular gap AC surrounding the corresponding pixel opening, the annular gap AC being in front projection on the drive substrate DBP, within the front projection of the metal ring MR on the drive substrate DBP; the portions of the common electrode layer COML on both sides of the annular gap AC overlap with the metal ring MR. The annular gap AC is formed by removing the partition wall PRW.

In one example, the metal ring MR may be heated such that the blocking wall PRW is melted or evaporated, thereby eliminating the blocking wall PRW. For example, the metal ring MR may be energized, thereby causing the metal ring MR to heat up to melt the partition retaining wall PRW. Of course, laser heating or the like may be used to melt or deblock the retaining wall PRW.

Referring to fig. 14 and 15, in one example of this embodiment, the method for manufacturing a display panel may further include: after the partition retaining wall PRW is removed, an auxiliary electrode layer AEL is formed on the whole surface, and the auxiliary electrode layer AEL is overlapped with the common electrode layer COML of the composite unit MA and the metal ring MR. In this embodiment, a part of the auxiliary electrode layer AEL is covered on the temporary encapsulation layer TT of each composite unit MA; the exposed portion of the common electrode layer COML of each of the composite units MA may be covered with the auxiliary electrode layer AEL; the exposed portions of the respective metal rings MR may also be covered by the auxiliary electrode layer AEL. Thus, the auxiliary electrode layer AEL can reduce the impedance of the common electrode layer COML on the one hand and improve the uniformity of the common voltage distribution. On the other hand, the portions of the common electrode layer COML located on both sides of the annular gap AC, and the electrical connection between the common electrode layer COML and the metal ring MR, may be reinforced by the auxiliary electrode layer AEL, which is beneficial to reducing the contact resistance and ensuring the electrical connection between the common electrode layers COML.

Referring to fig. 15, in this example, the formed display panel further includes an auxiliary electrode layer AEL. The auxiliary electrode layer AEL covers the composite film layer; the auxiliary electrode layer AEL is overlapped with the metal ring MR and the common electrode layer COML of the composite unit MA; the thin film encapsulation layer TFE is disposed on a side of the auxiliary electrode layer AEL away from the driving substrate DBP.

In one example of this embodiment, the manufacturing method of the display panel further includes:

referring to fig. 16 to 17, a pixel electrode protective layer PRL protecting the pixel electrode layer PEL is formed before the pixel defining layer PDL is formed; forming any one of the composite unit layers further includes: the pixel electrode protection layer PRL in the target pixel opening is removed before the composite layer MXL is formed.

In this example, before each composite unit layer is prepared, the portions of the pixel electrodes PE exposed by the pixel definition layer PDL are protected by the pixel electrode protection layer PEL. In this way, damage to the pixel electrode PE can be avoided during the process of preparing the partition structure PTS layer. Furthermore, in preparing the composite unit layer, the pixel electrode protective layer PRL in the target pixel opening may be removed so that the light emitting material layer EFL of the composite unit on the target pixel opening may be in electrical contact with the pixel electrode PE in the target pixel opening. Whereas for non-target pixel openings not covered with the composite unit MA, the composite unit material thereof needs to be removed in an etching process. In the process of etching the composite material layer MXL, the pixel electrode protection layer PRL can protect the surface of the pixel electrode PE, thereby ensuring the performance of each sub-pixel.

Referring to fig. 17, in this example, the prepared display panel has a pixel electrode protective layer PRL disposed between a pixel electrode layer PEL and a pixel definition layer PDL. Wherein the pixel electrode protection layer PRL does not extend into the pixel opening.

In one embodiment of the present disclosure, the material of the pixel electrode protection layer PRL may be a conductive metal oxide or a conductive material such as a metal.

Alternatively, a metal or metal oxide may be deposited on the pixel electrode layer PEL by vapor deposition to serve as the pixel electrode protective layer PRL, such as IZO. Further, the pixel electrode protective layer PRL may be ITO.

Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This application is intended to cover any adaptations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.

Claims (10)

1. A display panel, comprising:

the substrate is driven to be in contact with the substrate,

a pixel electrode layer having a plurality of pixel electrodes;

the pixel definition layer is arranged on one side, far away from the driving substrate, of the pixel electrode layer, and is provided with a plurality of pixel openings which are in one-to-one correspondence with the pixel electrodes, and the pixel openings expose at least part of areas of the corresponding pixel electrodes;

the conductive structure layer is arranged on one side of the pixel definition layer, which is far away from the driving substrate; the conductive structure layer is provided with the conductive structures corresponding to the pixel openings, wherein the conductive structures corresponding to the pixel openings encircle the pixel openings;

the composite film layer is arranged on one side of the conductive structure layer, which is far away from the driving substrate, and comprises composite units corresponding to the pixel openings one by one; each composite unit covers the pixel opening and surrounds the corresponding conductive structure of the pixel opening; the composite unit comprises a luminescent material layer, a common electrode layer and a temporary packaging layer which are sequentially laminated on one side of the pixel electrode layer far away from the driving substrate; the composite unit is discontinuous at the conductive structure, and the common electrode layer is electrically connected with the conductive structure, so that the common electrode layer is kept electrically continuous;

And the film packaging layer covers the composite film layer.

2. The display panel according to claim 1, wherein the conductive structure includes a first metal layer, a second metal layer, and a third metal layer sequentially stacked on a side of the pixel defining layer away from the driving substrate; the orthographic projection of the second metal layer on the driving substrate is positioned in the orthographic projection of the first metal layer on the driving substrate and in the orthographic projection of the third metal layer on the driving substrate;

the composite units are arranged in a staggered mode at the edge of the third metal layer, and the public electrode layer of the composite units is connected with the first metal layer and/or the second metal layer.

3. The display panel of claim 1, wherein the conductive structure comprises a metal ring surrounding the corresponding pixel opening;

the compound unit is provided with an annular gap surrounding the corresponding pixel opening, and the orthographic projection of the annular gap on the driving substrate is positioned in the orthographic projection of the metal ring on the driving substrate; and the parts of the common electrode layer at two sides of the annular gap are overlapped with the metal ring.

4. The display panel of claim 3, further comprising:

an auxiliary electrode layer covering the composite film layer; the auxiliary electrode layer is overlapped with the metal ring and the public electrode layer of the composite unit; the thin film packaging layer is arranged on one side of the auxiliary electrode layer away from the driving substrate.

5. A method of manufacturing a display panel, comprising:

providing a driving substrate;

sequentially forming a pixel electrode layer and a pixel definition layer on the driving substrate; the pixel electrode layer comprises a plurality of pixel electrodes, pixel openings which are in one-to-one correspondence with the pixel electrodes are formed in the pixel definition layer, and at least part of areas of the corresponding pixel electrodes are exposed by the pixel openings;

forming a partition structure layer on the pixel definition layer, wherein the partition structure layer is provided with partition structures corresponding to the pixel openings; the partition structure surrounds the corresponding pixel opening; the partition structure is provided with a conductive structure and is internally tangent;

sequentially forming a plurality of composite unit layers, wherein any one of the composite unit layers comprises composite units corresponding to part of the pixel openings one by one;

Forming a thin film packaging layer on one side of the composite unit layer far away from the driving substrate;

wherein forming any one of the composite unit layers includes:

forming a whole composite material layer, wherein the composite material layer comprises a luminescent material layer, a public electrode layer and a temporary packaging layer which are sequentially stacked; the composite material layer is discontinuous at the partition structure, and the common electrode layer is electrically connected with the conductive structure;

patterning the composite material layer through a photoetching process to form composite units corresponding to the openings of the target pixels one by one; the composite unit covers the corresponding target pixel opening and the partition structure surrounding the target pixel opening.

6. The method of manufacturing a display panel according to claim 5, wherein forming a partition structure layer on the pixel defining layer comprises:

forming a composite metal material layer, wherein the composite metal material layer comprises a first metal layer, a second metal layer and a third metal layer which are sequentially laminated on the pixel definition layer;

patterning the composite metal material layer by wet etching to form a conductive structure surrounding the pixel opening; and the etching speed of the second metal layer is larger than that of the first metal layer and the third metal layer.

7. The method of manufacturing a display panel according to claim 5, wherein forming a partition structure layer on the pixel defining layer comprises:

forming each partition structure, wherein the partition structure comprises a metal ring surrounding the pixel opening and a partition retaining wall positioned on one side of the metal ring away from the driving substrate; the partition retaining wall surrounds the pixel opening, and both sides of the partition retaining wall are exposed to at least part of the metal ring; the partition retaining wall is internally tangent.

8. The method of manufacturing a display panel according to claim 7, further comprising:

and removing the partition retaining wall and the composite material layer positioned on the partition retaining wall after forming each composite unit layer.

9. The method of manufacturing a display panel according to claim 8, further comprising:

and after the partition retaining wall is removed, forming an auxiliary electrode layer on the whole surface, wherein the auxiliary electrode layer is in lap joint with the public electrode layer and the metal ring of the composite unit.

10. The method for manufacturing a display panel according to claim 5, further comprising:

Forming a pixel electrode protection layer that protects the pixel electrode layer before forming the pixel definition layer; forming any one of the composite unit layers further includes: the pixel electrode protection layer in the target pixel opening is removed prior to forming the composite layer.